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URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [sim/] [rtl_sim/] [run/] [Makefile] - Blame information for rev 136

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Line No. Rev Author Line
1 88 unneback
VERILOG_FILES = ./../../../rtl/verilog/versatile_library.v
2 136 unneback
INC_DIR = ./../../../rtl/verilog
3 88 unneback
 
4 91 unneback
tb_wb_b3_ram_be:
5 88 unneback
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_RAM_BE $(VERILOG_FILES) > wb_b3_ram_be.v
6 91 unneback
        vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/sim/rtl_sim/run/wb_b3_ram_be.v
7
        vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/wbm.v
8
        vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/tb_wb_b3_ram_be.v
9
        vsim -do "run 10 us" -l log.txt -c work.vl_wb_b3_ram_be_tb
10 92 unneback
 
11
tb_wb_b3_dpram:
12
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_DPRAM $(VERILOG_FILES) > wb_b3_dpram.v
13
        vlog -reportprogress 300 -work work ./wb_b3_dpram.v
14
        vlog -reportprogress 300 -work work ./../../../bench/wbm.v
15
        vlog -reportprogress 300 -work work ./../../../bench/tb_wb_b3_dpram.v
16 102 unneback
 
17
tb_wb_cache:
18 136 unneback
        vppreproc --noline --noblank +define+SYSTEMVERILOG +incdir+$(INC_DIR) +define+WB_AVALON_MEM_CACHE +define+WB_RAM +define+RAM_BE +define+WB_AVALON_MEM_CACHE $(VERILOG_FILES) > wb_cache.v
19 102 unneback
        vlog -reportprogress 300 -work work ./wb_cache.v
20
        vlog -reportprogress 300 -work work ./../../../bench/wbm.v
21
        vlog -reportprogress 300 -work work ./../../../bench/tb_wb_cache.v

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