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Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.3/] [DE2115/] [vhdl/] [PLL_Clocks_inst.vhd] - Blame information for rev 46

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PLL_Clocks_inst : PLL_Clocks PORT MAP (
                inclk0   => inclk0_sig,
                c0       => c0_sig,
                c1       => c1_sig,
                c2       => c2_sig
        );

Line No.	Rev	Author	Line
1	46	rrred	`PLL_Clocks_inst : PLL_Clocks PORT MAP (`
2			`inclk0 => inclk0_sig,`
3			`c0 => c0_sig,`
4			`c1 => c1_sig,`
5			`c2 => c2_sig`
6			`);`

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Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.3/] [DE2115/] [vhdl/] [PLL_Clocks_inst.vhd] - Blame information for rev 46