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## The ZAP ARM Processor (ARMv5T Compatible, FPGA Synthesizable Soft Processor)
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### Author        : Revanth Kamaraj (revanth91kamaraj@gmail.com)
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### Introduction
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The ZAP processor is a 10 stage pipelined processor for FPGA with support for cache and MMU (ARMv5T compliant).
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Please note that the processor is *not* an ARM clone but a completely different RTL design, written from scratch (in FPGA compliant Verilog-2001), that can run ARM v5T binaries (both user and kernel code), hence, no particular ARMX number is specified.
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This project was originally created for the ORCONF-2016 Student Design Contest.
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ZAP is specifically designed to work with FPGAs. To keep the code generic across FPGA vendors, inference based coding style is followed.
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![Wishbone logo](https://wishbone-interconnect.readthedocs.io/en/latest/_images/wishbone_stamp.svg)
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#### Repos
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This project is hosted on Github and Opencores.
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GIT: https://github.com/krevanth/ZAP
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SVN: https://opencores.org/projects/zap
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#### Features
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##### ZAP Processor (zap_top.v)
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The ZAP core is a pipelined ATMv5T processor for FPGA.
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| Property              | Description             |
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|-----------------------|-------------------------|
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|HDL                    | Verilog-2001            |
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|Author                 | Revanth Kamaraj         |
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|ARM v5T ISA Support    | Fully compatible        |
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|Branch Predictor       | Direct mapped bimodal   |
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|Write Buffer           | Yes                     |
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|Abort Model            | Base Restored           |
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|Integrated v5T CP15    | Yes                     |
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|External Coproc. Bus   | No                      |
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|Cache Interface        | 128-Bit custom interface|
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|26-Bit Support         | No                      |
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|L1 Code Cache          | Direct mapped virtual   |
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|L1 Data Cache          | Direct mapped virtual   |
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|Cache Write Policy     | Writeback               |
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|L1 Code TLB            | Direct mapped           |
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|L1 Data TLB            | Direct mapped           |
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|Bus Interface          | 32-bit Wishbone B3 Linear incrementing burst |
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|Cache/TLB Lock Support | No                      |
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|CP15 Compliance        | v5T (No fine pages)     |
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|FCSE Support           | Yes                     |
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|Cache Read Speed (Hit) | 320MB/s @ 80MHz CLK     |
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|Cache Write Speed(Hit) | 160MB/s @ 80MHz CLK     |
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|Cache Line Size        | 16B                     |
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 * 10-stage pipeline design. Pipeline has extensive bypass network to resolve dependencies. Most operations execute at a rate of 1 operation per clock.
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 * 2 write ports for the register file to allow LDR/STR with writeback to execute as a single instruction.
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 * Instructions of ALU + Shift can allow execution of subsequent commands with dependencies if the subsequent command doesn't use the shifter. This is done by having a dual feedback network.
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 * The core is specifically designed for use in FGPA and relies on FGPA inference to allow portability across FPGA vendors.
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#### CPU Configuration (zap_top.v)
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| Parameter                | Default| Description |
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|--------------------------|--------|-------------|
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| BP_ENTRIES               |  1024 | Branch Predictor Settings. Predictor RAM depth. Must be 2^n and > 2 |
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| FIFO_DEPTH               |  4    | Branch Predictor Settings. Command FIFO depth. Must be 2^n and > 2  |
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| STORE_BUFFER_DEPTH       | 16    | Branch Predictor Settings. Depth of the store buffer. Must be 2^n and > 2 |
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| DATA_SECTION_TLB_ENTRIES |  4    | Data Cache/MMU Configuration. Section TLB entries. Must be 2^n (n > 0) |
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| DATA_LPAGE_TLB_ENTRIES   |  8    | Data Cache/MMU Configuration. Large page TLB entries. Must be 2^n (n > 0) |
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| DATA_SPAGE_TLB_ENTRIES   |  16   | Data Cache/MMU Configuration. Small page TLB entries. Must be 2^n (n > 0) |
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| DATA_CACHE_SIZE          |  1024 | Data Cache/MMU Configuration. Cache size in bytes. Must be at least 256B and 2^n |
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| CODE_SECTION_TLB_ENTRIES |  4    | Instruction Cache/MMU Configuration. Section TLB entries. Must be 2^n (n > 0) |
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| CODE_LPAGE_TLB_ENTRIES   |  8    | Instruction Cache/MMU Configuration. Large page TLB entries. Must be 2^n (n > 0) |
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| CODE_SPAGE_TLB_ENTRIES   |  16   | Instruction Cache/MMU Configuration. Small page TLB entries. Must be 2^n (n > 0) |
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| CODE_CACHE_SIZE          |  1024 | Instruction Cache/MMU Configuration. Cache size in bytes. Must be at least 256B and 2^n |
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#### CPU IO Interface (zap_top.v)
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Wishbone B3 compatible 32-bit bus.
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|        Dir    | Size     | Port               | Description                      |
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|---------------|----------|--------------------|----------------------------------|
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|        input  |          | i_clk              |  Clock                           |
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|        input  |          | i_reset            |  Reset                           |
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|        input  |          | i_irq              |  Interrupt. Level Sensitive.     |
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|        input  |          | i_fiq              |  Fast Interrupt. Level Sensitive.|
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|        output |          |  o_wb_cyc          |  Wishbone B3 Signal              |
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|        output |          |  o_wb_stb          |  WIshbone B3 signal              |
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|        output | [31:0]   |  o_wb_adr          |  Wishbone B3 signal.             |
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|        output |          |  o_wb_we           |  Wishbone B3 signal.             |
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|        output | [31:0]   |  o_wb_dat          |  Wishbone B3 signal.             |
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|        output | [3:0]    |  o_wb_sel          |  Wishbone B3 signal.             |
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|        output | [2:0]    |  o_wb_cti          |  Wishbone B3 signal. Cycle Type Indicator (Supported modes: Incrementing Burst, End of Burst) |
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|        output | [1:0]    |  o_wb_bte          |  Wishbone B3 signal. Burst Type Indicator (Supported modes: Linear)                           |
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|        input  |          |  i_wb_ack          |  Wishbone B3 signal.             |
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|        input  | [31:0]   |  i_wb_dat          |  Wishbone B3 signal.             |
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|        output |          |   o_wb_stb_nxt     | IGNORE THIS PORT. LEAVE OPEN.    |
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|        output |          |   o_wb_cyc_nxt     | IGNORE THIS PORT. LEAVE OPEN.    |
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|        output |   [31:0] |   o_wb_adr_nxt     | IGNORE THIS PORT. LEAVE OPEN.    |
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### Directory Structure
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        ├── LICENSE
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        ├── makefile
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        ├── README.md
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        └── src
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                ├── rtl
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                │   └── cpu
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                │       ├── zap_alu_main.v
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                │       ├── zap_cache_fsm.v
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                │       ├── zap_cache_tag_ram.v
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                │       ├── zap_cache.v
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                │       ├── zap_core.v
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                │       ├── zap_cp15_cb.v
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                │       ├── zap_decode_main.v
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                │       ├── zap_decode.v
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                │       ├── zap_decompile.v
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                │       ├── zap_defines.vh
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                │       ├── zap_fetch_main.v
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                │       ├── zap_fifo.v
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                │       ├── zap_functions.vh
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                │       ├── zap_issue_main.v
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                │       ├── zap_localparams.vh
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                │       ├── zap_mem_inv_block.v
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                │       ├── zap_memory_main.v
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                │       ├── zap_predecode_compress.v
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                │       ├── zap_predecode_coproc.v
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                │       ├── zap_predecode_main.v
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                │       ├── zap_predecode_mem_fsm.v
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                │       ├── zap_ram_simple.v
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                │       ├── zap_register_file.v
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                │       ├── zap_shifter_main.v
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                │       ├── zap_shifter_multiply.v
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                │       ├── zap_shift_shifter.v
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                │       ├── zap_sync_fifo.v
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                │       ├── zap_thumb_decoder.v
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                │       ├── zap_tlb_check.v
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                │       ├── zap_tlb_fsm.v
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                │       ├── zap_tlb.v
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                │       ├── zap_top.v
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                │       ├── zap_wb_adapter.v
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                │       ├── zap_wb_merger.v
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                │       └── zap_writeback.v
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                ├── scripts
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                │   ├── bin2vlog.pl
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                │   ├── Config.cfg_template
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                │   ├── makefile
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                │   ├── run_sim.pl
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                │   └── uart_input.bash
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                ├── testbench
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                │   ├── chip_top.v
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                │   ├── External_IP
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                │   │   └── uart16550
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                │   │       ├── doc
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                │   │       │   ├── CHANGES.txt
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                │   │       │   ├── src
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                │   │       │   │   └── UART_spec.doc
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                │   │       │   └── UART_spec.pdf
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                │   │       └── rtl
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                │   │           ├── raminfr.v
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                │   │           ├── uart_debug_if.v
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                │   │           ├── uart_defines.v
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                │   │           ├── uart_receiver.v
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                │   │           ├── uart_regs.v
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                │   │           ├── uart_rfifo.v
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                │   │           ├── uart_sync_flops.v
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                │   │           ├── uart_tfifo.v
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                │   │           ├── uart_top.v
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                │   │           ├── uart_transmitter.v
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                │   │           └── uart_wb.v
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                │   ├── ram.v
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                │   ├── timer.v
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                │   ├── uart_rx_logger.v
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                │   ├── uart_tx_dumper.v
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                │   ├── vic.v
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                │   └── zap_tb.v
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                └── ts
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                    ├── arm_test
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                    │   ├── arm_test.c
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                    │   ├── arm_test.ld
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                    │   ├── arm_test.s
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                    │   ├── Config.cfg
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                    │   ├── Description.txt
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                    │   └── makefile
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                    ├── factorial
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                    │   ├── Config.cfg
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                    │   ├── Description.txt
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                    │   ├── factorial.c
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                    │   ├── factorial.ld
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                    │   ├── factorial.s
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                    │   └── makefile
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                    ├── makefile
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                    ├── thumb_test
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                    │   ├── Config.cfg
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                    │   ├── Description.txt
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                    │   ├── linker.ld
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                    │   ├── main.c
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                    │   ├── makefile
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                    │   └── thumb.s
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                    └── uart
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                        ├── Config.cfg
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                        ├── Description.txt
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                        ├── irq_handler.c
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                        ├── main.c
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                        ├── makefile
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                        ├── uart.c
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                        ├── uart.h
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                        ├── uart.ld
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                        └── uart.s
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### Run Sample Tests
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*Tested on Ubuntu 16.04 LTS/18.04 LTS*
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Let the variable $test_name hold the name of the test. See the src/ts directory for some basic tests pre-installed. Available test names are: factorial, arm_test, thumb_test, uart. New tests can be added using these as starting templates. Please note that these will be run on the SOC platform (chip_top) that consist of the ZAP processor, 2 x UARTs, a VIC and a timer.
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```bash
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sudo apt-get install gcc-arm-none-eabi binutils-arm-none-eabi gdb openocd
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sudo apt-get install iverilog gtkwave make perl xterm
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cd $PROJ_ROOT/src/ts/$test_name # $PROJ_ROOT is the project directory.
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make                            # Runs the test using IVerilog.
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cd $PROJ_ROOT/obj/ts/$test_name # Switch to object folder.
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gvim zap.log.gz                 # View the log file
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gtkwave zap.vcd.gz              # Exists if selected by Config.cfg of that test case.
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```
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To use this processor in your SOC, instantiate this top level CPU module in your project: /src/rtl/cpu/zap_top.v
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### FPGA Timing Performance (Vivado, Retime Enabled)
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| FPGA Part          | Speed |  Critical Path |
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|--------------------|-------|----------------|
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| xc7a35tiftg256-1L  | 80MHz | Cache access   |
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### License
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integrity of the free software distribution system, which is
458
implemented by public license practices.  Many people have made
459
generous contributions to the wide range of software distributed
460
through that system in reliance on consistent application of that
461
system; it is up to the author/donor to decide if he or she is willing
462
to distribute software through any other system and a licensee cannot
463
impose that choice.
464
 
465
This section is intended to make thoroughly clear what is believed to
466
be a consequence of the rest of this License.
467
 
468
  8. If the distribution and/or use of the Program is restricted in
469
certain countries either by patents or by copyrighted interfaces, the
470
original copyright holder who places the Program under this License
471
may add an explicit geographical distribution limitation excluding
472
those countries, so that distribution is permitted only in or among
473
countries not thus excluded.  In such case, this License incorporates
474
the limitation as if written in the body of this License.
475
 
476
  9. The Free Software Foundation may publish revised and/or new versions
477
of the General Public License from time to time.  Such new versions will
478
be similar in spirit to the present version, but may differ in detail to
479
address new problems or concerns.
480
 
481
Each version is given a distinguishing version number.  If the Program
482
specifies a version number of this License which applies to it and "any
483
later version", you have the option of following the terms and conditions
484
either of that version or of any later version published by the Free
485
Software Foundation.  If the Program does not specify a version number of
486
this License, you may choose any version ever published by the Free Software
487
Foundation.
488
 
489
  10. If you wish to incorporate parts of the Program into other free
490
programs whose distribution conditions are different, write to the author
491
to ask for permission.  For software which is copyrighted by the Free
492
Software Foundation, write to the Free Software Foundation; we sometimes
493
make exceptions for this.  Our decision will be guided by the two goals
494
of preserving the free status of all derivatives of our free software and
495
of promoting the sharing and reuse of software generally.
496
 
497
                            NO WARRANTY
498
 
499
  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
500
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
501
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
502
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
503
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
504
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
505
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
506
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
507
REPAIR OR CORRECTION.
508
 
509
  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
510
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
511
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
512
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
513
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
514
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
515
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
516
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
517
POSSIBILITY OF SUCH DAMAGES.
518
 
519
                     END OF TERMS AND CONDITIONS
520
 
521
            How to Apply These Terms to Your New Programs
522
 
523
  If you develop a new program, and you want it to be of the greatest
524
possible use to the public, the best way to achieve this is to make it
525
free software which everyone can redistribute and change under these terms.
526
 
527
  To do so, attach the following notices to the program.  It is safest
528
to attach them to the start of each source file to most effectively
529
convey the exclusion of warranty; and each file should have at least
530
the "copyright" line and a pointer to where the full notice is found.
531
 
532
    
533
    Copyright (C)   
534
 
535
    This program is free software; you can redistribute it and/or modify
536
    it under the terms of the GNU General Public License as published by
537
    the Free Software Foundation; either version 2 of the License, or
538
    (at your option) any later version.
539
 
540
    This program is distributed in the hope that it will be useful,
541
    but WITHOUT ANY WARRANTY; without even the implied warranty of
542
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
543
    GNU General Public License for more details.
544
 
545
    You should have received a copy of the GNU General Public License along
546
    with this program; if not, write to the Free Software Foundation, Inc.,
547
    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
548
 
549
Also add information on how to contact you by electronic and paper mail.
550
 
551
If the program is interactive, make it output a short notice like this
552
when it starts in an interactive mode:
553
 
554
    Gnomovision version 69, Copyright (C) year name of author
555
    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
556
    This is free software, and you are welcome to redistribute it
557
    under certain conditions; type `show c' for details.
558
 
559
The hypothetical commands `show w' and `show c' should show the appropriate
560
parts of the General Public License.  Of course, the commands you use may
561
be called something other than `show w' and `show c'; they could even be
562
mouse-clicks or menu items--whatever suits your program.
563
 
564
You should also get your employer (if you work as a programmer) or your
565
school, if any, to sign a "copyright disclaimer" for the program, if
566
necessary.  Here is a sample; alter the names:
567
 
568
  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
569
  `Gnomovision' (which makes passes at compilers) written by James Hacker.
570
 
571
  , 1 April 1989
572
  Ty Coon, President of Vice
573
 
574
This General Public License does not permit incorporating your program into
575
proprietary programs.  If your program is a subroutine library, you may
576
consider it more useful to permit linking proprietary applications with the
577
library.  If this is what you want to do, use the GNU Lesser General
578
Public License instead of this License.

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