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URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

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[/] [zipcpu/] [trunk/] [Makefile] - Blame information for rev 209

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1 28 dgisselq
################################################################################
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##
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## Filename:    Makefile
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##
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## Project:     Zip CPU -- a small, lightweight, RISC CPU soft core
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##
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## Purpose:     This is a grand makefile for the entire project.  It will
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##              build the assembler, and a Verilog testbench, and then
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##              even test the CPU via that test bench.
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##
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##      Targets include:
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##
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##              bench   Build the CPP test bench/debugger facility.
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##
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##              doc     Build the ZipCPU chip specification and the GPL
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##                      license.  These should be distributed pre-built, but
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##                      you are welcome to rebuild them if you would like.
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##
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##              rtl     Run Verilator on the RTL
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##
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##              sw      Build the obsolete assembler, binutils, and GCC.  By
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##                      default, this also 'install's the compiler into the
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##                      sw/install/ subdirectory as well.
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##
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##              test    Run the test bench on the assembler test file.
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##
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##
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## Creator:     Dan Gisselquist, Ph.D.
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##              Gisselquist Technology, LLC
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##
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################################################################################
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##
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## Copyright (C) 2015-2017, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of  the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
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## target there if the PDF file isn't present.)  If not, see
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##  for a copy.
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##
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## License:     GPL, v3, as defined and found on www.gnu.org,
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##              http://www.gnu.org/licenses/gpl.html
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##
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##
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################################################################################
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##
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##
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.PHONY: all
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all: rtl sw sim
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MAKE := make    # Was `which make`
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SUBMAKE := $(MAKE) --no-print-directory -C
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.PHONY: doc
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doc:
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        @echo "Building docs"; cd doc;
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        +@$(SUBMAKE) doc/
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.PHONY: rtl
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rtl:
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        @echo "Building rtl for Verilator";
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        +@$(SUBMAKE) rtl/
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.PHONY: sw
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sw:
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        @echo "Building toolchain";
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        +@$(SUBMAKE) sw/
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.PHONY: sim
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sim:    cppsim vsim
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cppsim:
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        @echo "Building in C++ simulator";
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        +@$(SUBMAKE) sim/cpp
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vsim: rtl
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        @echo "Building Verilator simulator";
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        +@$(SUBMAKE) sim/verilator
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clean:
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        +@$(SUBMAKE) --directory=rtl
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        +@$(SUBMAKE) --directory=sw
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        +@$(SUBMAKE) --directory=sim/cpp
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        +@$(SUBMAKE) --directory=sim/verilator
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        +@$(SUBMAKE) --directory=bench/asm
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        +@$(SUBMAKE) --directory=bench/cpp
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.PHONY: bench
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bench: rtl sw
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        @echo "Building in bench/asm"; $(SUBMAKE) bench/asm
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.PHONY: test
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test: bench sim
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        @echo "Running simulation tests"; $(SUBMAKE) sim/verilator test
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# .PHONY: dhrystone
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# dhrystone: sw bench
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        # @echo "Building Asm Dhrystone"; $(SUBMAKE) zipdhry.z --no-print-directory
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        # @echo "Running Dhrystone"; $(SUBMAKE) sim/verilator dhrystone

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