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URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [bench/] [formal/] [zipcpu.sby] - Blame information for rev 209

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Line No. Rev Author Line
1 209 dgisselq
[tasks]
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dcache          full_proof      dcache
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piped           full_proof      no_dcache
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nopipe          nopipe          no_dcache
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lowlogic        nopipe          no_dcache
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ice40           nopipe          no_dcache       nobkram
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[options]
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mode prove
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depth 18
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dcache:   depth 16 # Was 10
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piped:    depth 16 # Was 14 for yosys only, trying 18 w/ Verific
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nopipe:   depth 16 # Was 11
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lowlogic: depth 16 # Was 10
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ice40:    depth 16 # Was 11
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[engines]
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smtbmc boolector
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[script]
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nobkram: read -define -DNO_DISTRIBUTED_RAM
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read -define -DZIPCPU
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#
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read -formal -D ZIPCPU cpuops.v
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read -formal -D ZIPCPU memops.v
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read -formal -D ZIPCPU pipemem.v
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read -formal -D ZIPCPU dcache.v
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read -formal -D ZIPCPU iscachable.v
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read -formal -D ZIPCPU idecode.v
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read -formal -D ZIPCPU wbdblpriarb.v
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#
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read -formal -D ZIPCPU fwb_counter.v
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read -formal -D ZIPCPU fwb_master.v
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read -formal -D ZIPCPU fwb_slave.v
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read -formal -D ZIPCPU f_idecode.v
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read -formal -D ZIPCPU abs_prefetch.v
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read -formal -D ZIPCPU abs_div.v
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read -formal -D ZIPCPU abs_mpy.v
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#
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read -formal zipcpu.v
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chparam -set IMPLEMENT_FPU    0 zipcpu
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dcache:
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chparam -set OPT_LGDCACHE    10 zipcpu
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no_dcache:
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chparam -set OPT_LGDCACHE     0 zipcpu
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full_proof:
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chparam -set IMPLEMENT_MPY    1 zipcpu
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chparam -set IMPLEMENT_DIVIDE 1 zipcpu
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chparam -set EARLY_BRANCHING  1 zipcpu
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chparam -set OPT_CIS          1 zipcpu
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chparam -set OPT_PIPELINED    1 zipcpu
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nopipe:
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chparam -set IMPLEMENT_MPY    0 zipcpu
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chparam -set IMPLEMENT_DIVIDE 0 zipcpu
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chparam -set EARLY_BRANCHING  0 zipcpu
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chparam -set OPT_CIS          1 zipcpu
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chparam -set OPT_PIPELINED    0 zipcpu
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lowlogic:
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chparam -set OPT_CIS 0 zipcpu
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--
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prep -top zipcpu
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[files]
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../../rtl/core/zipcpu.v
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../../rtl/core/cpuops.v
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../../rtl/core/memops.v
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../../rtl/core/pipemem.v
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../../rtl/core/dcache.v
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../../rtl/core/iscachable.v
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../../rtl/core/idecode.v
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../../rtl/ex/wbdblpriarb.v
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#
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../../rtl/ex/fwb_counter.v
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../../rtl/ex/fwb_master.v
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../../rtl/ex/fwb_slave.v
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#
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../../rtl/cpudefs.v
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f_idecode.v
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abs_prefetch.v
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abs_div.v
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abs_mpy.v
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#

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