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[/] [zipcpu/] [trunk/] [rtl/] [peripherals/] [README.md] - Blame information for rev 209

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# ZipCPU Peripherals
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These are not your normal peripherals, per se, but rather peripherals that
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get tightly integrated with the CPU when built with the ZipSystem.  These
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include:
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- [icontrol.v](./icontrol.v), an interrupt controller
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- [zipcounter.v](./zipcounter.v), a *really* simple counter, for estimating CPU performance.  The counter will interrupt the CPU if/when it ever rolls over.
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- [ziptimer.v](./ziptimer.v), a similarly simple timer.  It just counts down and creates an interrupt
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- [zipjiffies.v](./zipjiffies.v).  Modeled after the Jiffies used within the Linux Kernel, the zipjiffies peripheral counts up one count per clock.  Numbers written to it request an interrupt when the clock gets to the number written.  Hence, you can get really fine grained timing control using this peripheral.
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- [wbdmac.v](./wbdmac.v), a direct memory access controller.  This can be used to copy memory, or even copy memory on an interrupt.  Source and destination addresses may or may not increment depending upon how the controller is set.  As of today, though, this controller only handles 32-bit transfers.
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- [zipmmu.v](./zipmmu.v), an experimental MMU.  Has only been tested offline.
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  An implementation exists which integrates this MMU, however that integration
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  has not been tested so there are certainly some integration bugs remaining.
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*All of these peripherals* have been formally proven.
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If you are looking for the more normal peripherals, block RAM, SDRAM, etc.,
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feel free to examine some of the distributions that use the ZipCPU.
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