OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 171

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 117 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
50
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
51
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
52
@@ -108,6 +108,14 @@
53
 #include "tree-chkp.h"
54
 #include "rtl-chkp.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+#include <stdio.h>
58
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
59
+extern void    zip_debug_rtx(const_rtx);
60
+#else
61
+#define        ZIP_DEBUG_LINE(STR,RTX)
62
+#endif
63
+
64
 /* Some systems use __main in a way incompatible with its use in gcc, in these
65
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
66
    give the same symbol without quotes for an alternative entry point.  You
67 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
68
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
69
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
70
@@ -62,6 +62,13 @@
71
 #include "ipa-prop.h"
72
 #include "ipa-inline.h"
73
 
74
+#ifdef DO_ZIP_DEBUGS
75
+extern void zip_debug_rtx(const_rtx);
76
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
77
+#else
78
+#define        ZIP_DEBUG_LINE(STR,RTX)
79
+#endif
80
+
81
 /* Context of record_reference.  */
82
 struct record_reference_ctx
83
 {
84 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
85
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
86
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
87
@@ -0,0 +1,52 @@
88
+////////////////////////////////////////////////////////////////////////////////
89
+//
90
+// Filename:   common/config/zip/zip-common.c
91
+//
92
+// Project:    Zip CPU backend for the GNU Compiler Collection
93
+//
94
+// Purpose:    To eliminate the frame register automatically.
95
+//
96
+// Creator:    Dan Gisselquist, Ph.D.
97
+//             Gisselquist Technology, LLC
98
+//
99
+////////////////////////////////////////////////////////////////////////////////
100
+//
101
+// Copyright (C) 2016, Gisselquist Technology, LLC
102
+//
103
+// This program is free software (firmware): you can redistribute it and/or
104
+// modify it under the terms of  the GNU General Public License as published
105
+// by the Free Software Foundation, either version 3 of the License, or (at
106
+// your option) any later version.
107
+//
108
+// This program is distributed in the hope that it will be useful, but WITHOUT
109
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
110
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
111
+// for more details.
112
+//
113
+// You should have received a copy of the GNU General Public License along
114
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
115
+// target there if the PDF file isn't present.)  If not, see
116
+// <http://www.gnu.org/licenses/> for a copy.
117
+//
118
+// License:    GPL, v3, as defined and found on www.gnu.org,
119
+//             http://www.gnu.org/licenses/gpl.html
120
+//
121
+//
122
+////////////////////////////////////////////////////////////////////////////////
123
+#include "config.h"
124
+#include "system.h"
125
+#include "coretypes.h"
126
+#include "tm.h"
127
+#include "common/common-target.h"
128
+#include "common/common-target-def.h"
129
+
130
+static const struct default_options zip_option_optimization_table[] =
131
+  {
132
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
133
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
134
+  };
135
+
136
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
137
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
138
+
139
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
140
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
141 171 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-09-13 10:23:45.886099269 -0400
142 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
143
@@ -21,7 +21,7 @@
144
 #ifndef GCC_AARCH64_LINUX_H
145
 #define GCC_AARCH64_LINUX_H
146
 
147
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
148
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
149
 
150
 #undef  ASAN_CC1_SPEC
151
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
152
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
153 171 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-09-13 10:23:45.886099269 -0400
154 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
155
@@ -23,8 +23,8 @@
156
 #define EXTRA_SPECS \
157
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
158
 
159
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
160
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
161
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
162
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
163
 #if DEFAULT_LIBC == LIBC_UCLIBC
164
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
165
 #elif DEFAULT_LIBC == LIBC_GLIBC
166
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
167 171 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-09-13 10:23:45.886099269 -0400
168 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
169
@@ -68,8 +68,8 @@
170
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
171
 
172
 #undef  GLIBC_DYNAMIC_LINKER
173
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
174
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
175
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
176
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
177
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
178
 
179
 #define GLIBC_DYNAMIC_LINKER \
180
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
181 171 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-09-13 10:23:45.886099269 -0400
182 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
183
@@ -62,7 +62,7 @@
184
 
185
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
186
 
187
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
188
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
189
 
190
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
191
    %{static:-Bstatic} \
192
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
193 171 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-09-13 10:23:45.886099269 -0400
194 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
195
@@ -45,7 +45,7 @@
196
   %{shared:-G -Bdynamic} \
197
   %{!shared: %{!static: \
198
    %{rdynamic:-export-dynamic} \
199
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
200
+   -dynamic-linker /lib/ld-uClibc.so.0} \
201
    %{static}} -init __init -fini __fini"
202
 
203
 #undef TARGET_SUPPORTS_SYNC_CALLS
204
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
205 171 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-09-13 10:23:45.886099269 -0400
206 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
207
@@ -102,7 +102,7 @@
208
 #undef CRIS_DEFAULT_CPU_VERSION
209
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
210
 
211
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
212
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
213
 
214
 #undef CRIS_LINK_SUBTARGET_SPEC
215
 #define CRIS_LINK_SUBTARGET_SPEC \
216
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
217 171 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-09-13 10:23:45.886099269 -0400
218 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
219
@@ -129,9 +129,9 @@
220
 #endif
221
 
222
 #if FBSD_MAJOR < 6
223
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
224
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
225
 #else
226
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
227
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
228
 #endif
229
 
230
 /* NOTE: The freebsd-spec.h header is included also for various
231
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
232 171 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-09-13 10:23:45.886099269 -0400
233 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
234
@@ -34,7 +34,7 @@
235
 #define ENDFILE_SPEC \
236
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
237
 
238
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
239
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
240
 
241
 #undef LINK_SPEC
242
 #define LINK_SPEC "\
243
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
244 171 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-09-13 10:23:45.886099269 -0400
245 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
246
@@ -22,7 +22,7 @@
247
 #define GNU_USER_LINK_EMULATION "elf_i386"
248
 
249
 #undef GNU_USER_DYNAMIC_LINKER
250
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
251
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
252
 
253
 #undef STARTFILE_SPEC
254
 #if defined HAVE_LD_PIE
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
256 171 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-09-13 10:23:45.890099248 -0400
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
258
@@ -22,6 +22,6 @@
259
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
260
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
261
 
262
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
263
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
264
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
265
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
266
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
267
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
268
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
269 171 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-09-13 10:23:45.886099269 -0400
270 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
271
@@ -19,4 +19,4 @@
272
 <http://www.gnu.org/licenses/>.  */
273
 
274
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
275
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
276
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
277
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
278 171 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-09-13 10:23:45.890099248 -0400
279 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
280
@@ -27,6 +27,6 @@
281
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
282
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
283
 
284
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
285
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
286
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
287
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
288
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
289
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
290
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
291 171 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-09-13 10:23:45.890099248 -0400
292 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
293
@@ -20,4 +20,4 @@
294
 <http://www.gnu.org/licenses/>.  */
295
 
296
 #define GNU_USER_LINK_EMULATION "elf_i386"
297
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
298
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
299
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
300 171 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-09-13 10:23:45.890099248 -0400
301 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
302
@@ -55,7 +55,7 @@
303
 /* Define this for shared library support because it isn't in the main
304
    linux.h file.  */
305
 
306
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
307
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
308
 
309
 #undef LINK_SPEC
310
 #define LINK_SPEC "\
311
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
312 171 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-09-13 10:23:45.890099248 -0400
313 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
314
@@ -32,4 +32,4 @@
315
 
316
 
317
 #undef GNU_USER_DYNAMIC_LINKER
318
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
319
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
320
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
321 171 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-09-13 10:23:45.890099248 -0400
322 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
323
@@ -31,5 +31,4 @@
324
   while (0)
325
 
326
 #undef GNU_USER_DYNAMIC_LINKER
327
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
328
-
329
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
331 171 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-09-13 10:23:45.890099248 -0400
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
333
@@ -73,10 +73,10 @@
334
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
335
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
336
    supporting both 32-bit and 64-bit compilation.  */
337
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
338
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
339
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
340
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
341
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
342
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
343
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
344
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
345
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
346
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
347
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
348
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
349 171 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-09-13 10:23:45.890099248 -0400
350 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
351
@@ -67,7 +67,7 @@
352
    %{shared:-shared} \
353
    %{symbolic:-Bsymbolic} \
354
    %{rdynamic:-export-dynamic} \
355
-   -dynamic-linker /tools/lib/ld-linux.so.2"
356
+   -dynamic-linker /lib/ld-linux.so.2"
357
 
358
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
359
 
360
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
361 171 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-09-13 10:23:45.890099248 -0400
362 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
363
@@ -71,7 +71,7 @@
364
    When the -shared link option is used a final link is not being
365
    done.  */
366
 
367
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
368
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
369
 
370
 #undef LINK_SPEC
371
 #define LINK_SPEC "-m m68kelf %{shared} \
372
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
373 171 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-09-13 10:23:45.890099248 -0400
374 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
375
@@ -28,7 +28,7 @@
376
 #undef TLS_NEEDS_GOT
377
 #define TLS_NEEDS_GOT 1
378
 
379
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
380
+#define DYNAMIC_LINKER "/lib/ld.so.1"
381
 #undef  SUBTARGET_EXTRA_SPECS
382
 #define SUBTARGET_EXTRA_SPECS \
383
   { "dynamic_linker", DYNAMIC_LINKER }
384
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
385 171 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-09-13 10:23:45.890099248 -0400
386 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
387
@@ -22,20 +22,20 @@
388
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
389
 
390
 #define GLIBC_DYNAMIC_LINKER32 \
391
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
392
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
393
 #define GLIBC_DYNAMIC_LINKER64 \
394
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
395
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
396
 #define GLIBC_DYNAMIC_LINKERN32 \
397
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
398
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
399
 
400
 #undef UCLIBC_DYNAMIC_LINKER32
401
 #define UCLIBC_DYNAMIC_LINKER32 \
402
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
403
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
404
 #undef UCLIBC_DYNAMIC_LINKER64
405
 #define UCLIBC_DYNAMIC_LINKER64 \
406
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
407
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
408
 #define UCLIBC_DYNAMIC_LINKERN32 \
409
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
410
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
411
 
412
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
413
 #define GNU_USER_DYNAMIC_LINKERN32 \
414
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
415 171 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-09-13 10:23:45.890099248 -0400
416 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
417
@@ -32,7 +32,7 @@
418
 #undef  ASM_SPEC
419
 #define ASM_SPEC ""
420
 
421
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
422
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
423
 
424
 #undef  LINK_SPEC
425
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
427 171 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-09-13 10:23:45.890099248 -0400
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
429
@@ -37,7 +37,7 @@
430
 /* Define this for shared library support because it isn't in the main
431
    linux.h file.  */
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
435
 
436
 #undef LINK_SPEC
437
 #define LINK_SPEC "\
438
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
439 171 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-09-13 10:23:45.890099248 -0400
440 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
441
@@ -357,14 +357,14 @@
442
 #undef LINK_OS_DEFAULT_SPEC
443
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
444
 
445
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
446
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
447
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
448
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
449
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
450
 #else
451
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
452
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
453
 #endif
454
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
455
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
456
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
457
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
458
 #if DEFAULT_LIBC == LIBC_UCLIBC
459
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
460
 #elif DEFAULT_LIBC == LIBC_GLIBC
461
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
462 171 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-09-13 10:23:45.890099248 -0400
463 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
464
@@ -757,8 +757,8 @@
465
 
466
 #define LINK_START_LINUX_SPEC ""
467
 
468
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
469
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
470
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
471
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
472
 #if DEFAULT_LIBC == LIBC_UCLIBC
473
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
474
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
475
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
476 171 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-09-13 10:23:45.890099248 -0400
477 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
478
@@ -60,8 +60,8 @@
479
 #define MULTILIB_DEFAULTS { "m31" }
480
 #endif
481
 
482
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
483
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
484
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
485
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
486
 
487
 #undef  LINK_SPEC
488
 #define LINK_SPEC \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
490 171 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-09-13 10:23:45.890099248 -0400
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
492
@@ -43,7 +43,7 @@
493
 
494
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef SUBTARGET_LINK_EMUL_SUFFIX
500
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
502 171 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-09-13 10:23:45.890099248 -0400
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
504
@@ -84,8 +84,8 @@
505
    When the -shared link option is used a final link is not being
506
    done.  */
507
 
508
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
509
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
510
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
511
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
512
 
513
 #ifdef SPARC_BI_ARCH
514
 
515
@@ -193,7 +193,7 @@
516
 #else /* !SPARC_BI_ARCH */
517
 
518
 #undef LINK_SPEC
519
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
520
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
521
   %{!shared: \
522
     %{!static: \
523
       %{rdynamic:-export-dynamic} \
524
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
525 171 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-09-13 10:23:45.890099248 -0400
526 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
527
@@ -83,7 +83,7 @@
528
    When the -shared link option is used a final link is not being
529
    done.  */
530
 
531
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
532
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
533
 
534
 #undef  LINK_SPEC
535
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
536
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
537 171 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-09-13 10:23:45.890099248 -0400
538 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
539
@@ -41,7 +41,7 @@
540
   %{!shared: \
541
     %{!static: \
542
       %{rdynamic:-export-dynamic} \
543
-      -dynamic-linker /tools/lib/ld.so.1} \
544
+      -dynamic-linker /lib/ld.so.1} \
545
     %{static:-static}}"
546
 
547
 #undef  WCHAR_TYPE
548
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
549 171 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-09-13 10:23:45.890099248 -0400
550 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
551
@@ -44,7 +44,7 @@
552
   %{mlongcalls:--longcalls} \
553
   %{mno-longcalls:--no-longcalls}"
554
 
555
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
556
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
557
 
558
 #undef LINK_SPEC
559
 #define LINK_SPEC \
560
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
561
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
562
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
563
@@ -0,0 +1,82 @@
564
+////////////////////////////////////////////////////////////////////////////////
565
+//
566
+// Filename:   netbsd.h
567
+//
568
+// Project:    Zip CPU backend for the GNU Compiler Collection
569
+//
570
+// Purpose:
571
+//
572
+// Creator:    Dan Gisselquist, Ph.D.
573
+//             Gisselquist Technology, LLC
574
+//
575
+////////////////////////////////////////////////////////////////////////////////
576
+//
577
+// Copyright (C) 2016, Gisselquist Technology, LLC
578
+//
579
+// This program is free software (firmware): you can redistribute it and/or
580
+// modify it under the terms of  the GNU General Public License as published
581
+// by the Free Software Foundation, either version 3 of the License, or (at
582
+// your option) any later version.
583
+//
584
+// This program is distributed in the hope that it will be useful, but WITHOUT
585
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
586
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
587
+// for more details.
588
+//
589
+// You should have received a copy of the GNU General Public License along
590
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
591
+// target there if the PDF file isn't present.)  If not, see
592
+// <http://www.gnu.org/licenses/> for a copy.
593
+//
594
+// License:    GPL, v3, as defined and found on www.gnu.org,
595
+//             http://www.gnu.org/licenses/gpl.html
596
+//
597
+//
598
+////////////////////////////////////////////////////////////////////////////////
599
+#ifndef        ZIP_NETBSD_H
600
+#define        ZIP_NETBSD_H
601
+
602
+/* Define default target values. */
603
+
604
+#undef MACHINE_TYPE
605
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
606
+
607
+#undef TARGET_OS_CPP_BUILTINS
608
+#define        TARGET_OS_CPP_BUILTINS()        \
609
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
610
+       builtin_define("__ZIPCPU__");                   \
611
+       builtin_assert("cpu=zip");                      \
612
+       builtin_assert("machine=zip");                  \
613
+       } while(0);
614
+
615
+#undef CPP_SPEC
616
+#define        CPP_SPEC        NETBSD_CPP_SPEC
617
+
618
+#undef STARTFILE_SPEC
619
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
620
+
621
+#undef ENDFILE_SPEC
622
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
623
+
624
+#undef LIB_SPEC
625
+#define        LIB_SPEC        NETBSD_LIB_SPEC
626
+
627
+#undef TARGET_VERSION
628
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
629
+
630
+/* Make gcc agree with <machine/ansi.h> */
631
+
632
+#undef WCHAR_TYPE
633
+#define        WCHAR_TYPE      "int"
634
+
635
+#undef WCHAR_TYPE_SIZE
636
+#define        WCHAR_TYPE_SIZE 32
637
+
638
+#undef WINT_TYPE
639
+#define        WINT_TYPE       "int"
640
+
641
+/* Clean up after the generic Zip/ELF configuration. */
642
+#undef MD_EXEC_PREFIX
643
+#undef MD_STARTFILE_PREFIX
644
+
645
+#endif /* ZIP_NETBSD_H */
646 171 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/notes.txt gcc-5.3.0-zip/gcc/config/zip/notes.txt
647
--- gcc-5.3.0-original/gcc/config/zip/notes.txt 1969-12-31 19:00:00.000000000 -0500
648
+++ gcc-5.3.0-zip/gcc/config/zip/notes.txt      2016-08-17 23:00:25.714139174 -0400
649
@@ -0,0 +1,6 @@
650
+signum:
651
+       CMP       0,%1
652
+       LDILO.GT  1,%1
653
+       LDILO.LT -1,%1
654
+
655
+
656 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
657
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
658
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
659
@@ -0,0 +1,47 @@
660
+################################################################################
661
+##
662
+## Filename:   t-zip
663
+##
664
+## Project:    Zip CPU backend for the GNU Compiler Collection
665
+##
666
+## Purpose:
667
+##
668
+## Creator:    Dan Gisselquist, Ph.D.
669
+##             Gisselquist Technology, LLC
670
+##
671
+################################################################################
672
+##
673
+## Copyright (C) 2016, Gisselquist Technology, LLC
674
+##
675
+## This program is free software (firmware): you can redistribute it and/or
676
+## modify it under the terms of  the GNU General Public License as published
677
+## by the Free Software Foundation, either version 3 of the License, or (at
678
+## your option) any later version.
679
+##
680
+## This program is distributed in the hope that it will be useful, but WITHOUT
681
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
682
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
683
+## for more details.
684
+##
685
+## You should have received a copy of the GNU General Public License along
686
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
687
+## target there if the PDF file isn't present.)  If not, see
688
+## <http://www.gnu.org/licenses/> for a copy.
689
+##
690
+## License:    GPL, v3, as defined and found on www.gnu.org,
691
+##             http://www.gnu.org/licenses/gpl.html
692
+##
693
+##
694
+################################################################################
695
+
696
+FPBIT = fp-bit.c
697
+DPBIT = dp-bit.c
698
+
699
+# dp-bit.c: $(srcdir)/config/fp-bit.c
700
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
701
+#
702
+# fp-bit.c: $(srcdir)/config/fp-bit.c
703
+       # echo '#define FLOAT" > fp-bit.c
704
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
705
+
706
+
707
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
708
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
709 171 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-09-13 10:06:40.979536485 -0400
710
@@ -0,0 +1,2151 @@
711 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
712
+//
713
+// Filename:   zip.c
714
+//
715
+// Project:    Zip CPU backend for the GNU Compiler Collection
716
+//
717
+// Purpose:
718
+//
719
+// Creator:    Dan Gisselquist, Ph.D.
720
+//             Gisselquist Technology, LLC
721
+//
722
+////////////////////////////////////////////////////////////////////////////////
723
+//
724
+// Copyright (C) 2016, Gisselquist Technology, LLC
725
+//
726
+// This program is free software (firmware): you can redistribute it and/or
727
+// modify it under the terms of  the GNU General Public License as published
728
+// by the Free Software Foundation, either version 3 of the License, or (at
729
+// your option) any later version.
730
+//
731
+// This program is distributed in the hope that it will be useful, but WITHOUT
732
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
733
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
734
+// for more details.
735
+//
736
+// You should have received a copy of the GNU General Public License along
737
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
738
+// target there if the PDF file isn't present.)  If not, see
739
+// <http://www.gnu.org/licenses/> for a copy.
740
+//
741
+// License:    GPL, v3, as defined and found on www.gnu.org,
742
+//             http://www.gnu.org/licenses/gpl.html
743
+//
744
+//
745
+////////////////////////////////////////////////////////////////////////////////
746
+#include "config.h"
747
+#include "system.h"
748
+#include "coretypes.h"
749
+#include "tm.h"
750
+#include "rtl.h"
751
+#include "dominance.h"
752
+#include "cfg.h"
753
+#include "cfgrtl.h"
754
+#include "cfganal.h"
755
+#include "lcm.h"
756
+#include "cfgbuild.h"
757
+#include "cfgcleanup.h"
758
+#include "predict.h"
759
+#include "basic-block.h"
760
+#include "df.h"
761
+#include "hashtab.h"
762
+#include "hash-set.h"
763
+#include "machmode.h"
764
+#include "symtab.h"
765
+#include "rtlhash.h"
766
+#include "tree.h"
767
+#include "regs.h"
768
+#include "hard-reg-set.h"
769
+#include "real.h"
770
+#include "insn-config.h"
771
+#include "conditions.h"
772
+#include "output.h"
773
+#include "insn-attr.h"
774
+#include "flags.h"
775
+#include "expr.h"
776
+#include "function.h"
777
+#include "recog.h"
778
+#include "toplev.h"
779
+#include "ggc.h"
780
+#include "builtins.h"
781
+#include "calls.h"
782
+#include "langhooks.h"
783
+#include "optabs.h"
784
+#include "explow.h"
785
+#include "emit-rtl.h"
786 122 dgisselq
+#include "ifcvt.h"
787 102 dgisselq
+
788
+// #include "tmp_p.h"
789
+#include "target.h"
790
+#include "target-def.h"
791
+// #include "tm-constrs.h"
792 122 dgisselq
+#include "tm-preds.h"
793 102 dgisselq
+
794
+#include "diagnostic.h"
795
+// #include "integrate.h"
796
+
797
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
798
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
799
+static bool    zip_return_in_memory(const_tree, const_tree);
800
+static bool    zip_frame_pointer_required(void);
801
+
802
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
803
+               const_tree type, bool named);
804
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
805
+
806
+static void    zip_asm_trampoline_template(FILE *);
807
+static void    zip_trampoline_init(rtx, tree, rtx);
808
+static void    zip_init_builtins(void);
809
+static tree zip_builtin_decl(unsigned, bool);
810
+// static void zip_asm_output_anchor(rtx x);
811
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
812
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
813
+                       enum machine_mode tmode, int    ignore);
814
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
815
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
816
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
817
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
818
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
819 122 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x20000;
820
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1ffff;
821 142 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x2000;
822
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1fff;
823 102 dgisselq
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
824
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
825
+static int     zip_sched_issue_rate(void) { return 1; }
826
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
827
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
828
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
829
+       void    zip_debug_rtx(const_rtx x);
830
+static void    zip_override_options(void);
831
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
832
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
833 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
834 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void);
835 122 dgisselq
+#ifdef HAVE_cc0
836
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
837
+#error "We're not supposed to have CC0 anymore"
838
+#else
839
+static bool    zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b);
840
+#endif
841 102 dgisselq
+
842
+
843 103 dgisselq
+#define        ALL_DEBUG_OFF   false
844 102 dgisselq
+#define        ALL_DEBUG_ON    false
845
+
846
+enum ZIP_BUILTIN_ID_CODE {
847
+       ZIP_BUILTIN_RTU,
848
+       ZIP_BUILTIN_HALT,
849
+       ZIP_BUILTIN_IDLE,
850
+       ZIP_BUILTIN_SYSCALL,
851
+       ZIP_BUILTIN_SAVE_CONTEXT,
852
+       ZIP_BUILTIN_RESTORE_CONTEXT,
853
+       ZIP_BUILTIN_BITREV,
854
+       ZIP_BUILTIN_CC,
855 117 dgisselq
+       ZIP_BUILTIN_UCC,
856 171 dgisselq
+       ZIP_BUILTIN_BUSY,
857 102 dgisselq
+       ZIP_BUILTIN_MAX
858
+};
859
+
860
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
861
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
862
+
863
+
864
+#include "gt-zip.h"
865
+
866
+/* The Global 'targetm' Variable. */
867
+struct gcc_target      targetm = TARGET_INITIALIZER;
868
+
869
+
870
+enum   reg_class zip_reg_class(int);
871
+
872
+#define        LOSE_AND_RETURN(msgid, x)               \
873
+       do {                                    \
874
+               zip_operand_lossage(msgid, x);  \
875
+               return;                         \
876
+       } while(0)
877
+
878
+/* Per-function machine data. */
879
+struct GTY(()) machine_function
880
+{
881
+       /* number of pretented arguments for varargs */
882
+       int     pretend_size;
883
+
884
+       /* Number of bytes saved on the stack for local variables. */
885
+       int     local_vars_size;
886
+
887
+       /* Number of bytes saved on stack for register save area */
888
+       int     saved_reg_size;
889
+       int     save_ret;
890
+
891
+       int     sp_fp_offset;
892
+       bool    fp_needed;
893
+       int     size_for_adjusting_sp;
894
+};
895
+
896
+/* Allocate a chunk of memory for per-function machine-dependent data. */
897
+
898
+static struct machine_function *
899
+zip_init_machine_status(void) {
900
+       return ggc_cleared_alloc<machine_function>();
901
+}
902
+
903
+static void
904
+zip_override_options(void)
905
+{
906
+       init_machine_status = zip_init_machine_status;
907
+}
908
+
909
+enum   reg_class
910
+zip_reg_class(int regno)
911
+{
912
+       if (is_ZIP_GENERAL_REG(regno)) {
913
+               return GENERAL_REGS;
914
+       } else if (is_ZIP_REG(regno)) {
915
+               return ALL_REGS;
916
+       } return NO_REGS;
917
+}
918
+
919
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
920
+static bool
921
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
922
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
923
+       return (size == -1)||(size > UNITS_PER_WORD);
924
+}
925
+
926
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
927
+ * insn.  Formatted output isn't easily implemented, since we use output operand
928
+ * lossage to output the actual message and handle the categorization of the
929
+ * error.  */
930
+
931
+static void
932
+zip_operand_lossage(const char *msgid, rtx op) {
933
+       fprintf(stderr, "Operand lossage??\n");
934
+       debug_rtx(op);
935
+       zip_debug_rtx(op);
936
+       output_operand_lossage("%s", msgid);
937
+}
938
+
939
+/* The PRINT_OPERAND_ADDRESS worker.   */
940
+void
941
+zip_print_operand_address(FILE *file, rtx x) {
942
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
943
+
944
+       if (dbg) zip_debug_rtx(x);
945
+       switch(GET_CODE(x)) {
946
+               case REG:
947 127 dgisselq
+                       gcc_assert(is_ZIP_REG(REGNO(x)));
948 171 dgisselq
+                       gcc_assert(REGNO(x) < 16);
949 102 dgisselq
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
950
+                       break;
951
+               case SYMBOL_REF:
952
+                       fprintf(file, "%s", XSTR(x,0));
953
+                       break;
954
+               case LABEL_REF:
955
+                       x = LABEL_REF_LABEL(x);
956
+               case CODE_LABEL:
957
+                       { char buf[256];
958
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
959
+#ifdef ASM_OUTPUT_LABEL_REF
960
+                       ASM_OUTPUT_LABEL_REF(file, buf);
961
+#else
962
+                       assemble_name(file, buf);
963
+#endif
964
+                       }
965
+                       break;
966
+               case PLUS:
967 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
968
+                               fprintf(stderr, "Unsupported address construct\n");
969
+                               zip_debug_rtx(x);
970 102 dgisselq
+                               abort();
971 127 dgisselq
+                       } gcc_assert(is_ZIP_REG(REGNO(XEXP(x,0))));
972 171 dgisselq
+                       gcc_assert(REGNO(XEXP(x,0))<16);
973 127 dgisselq
+                       if (CONST_INT_P(XEXP(x, 1))) {
974 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
975
+                                       fprintf(file, "%ld(%s)",
976 135 dgisselq
+                                       (long)INTVAL(XEXP(x, 1)),
977 102 dgisselq
+                                       reg_names[REGNO(XEXP(x, 0))]);
978
+                               } else {
979
+                                       fprintf(file, "(%s)",
980
+                                       reg_names[REGNO(XEXP(x, 0))]);
981
+                               }
982
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
983
+                               fprintf(file, "%s(%s)", XSTR(x,0),
984
+                                       reg_names[REGNO(XEXP(x, 0))]);
985
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
986
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
987
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
988
+                               fprintf(file, "%s-%s(%s)",
989
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
990
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
991
+                                       reg_names[REGNO(XEXP(x, 0))]);
992
+                       } else
993
+                               fprintf(file, "#INVALID(%s)",
994
+                                       reg_names[REGNO(XEXP(x, 0))]);
995
+                       /*
996
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
997
+                               fprintf(file, "%s(%s)",
998
+                                       GET_CODE(XEXP(addr, 1)),
999
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1000
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
1001
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
1002
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
1003
+                               fprintf(file, "%s-%s(%s)",
1004
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1005
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1006
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1007
+                       }
1008
+                       */
1009
+                       break;
1010
+               // We don't support direct memory addressing within our
1011
+               // instruction set, even though the instructions themselves
1012
+               // would support direct memory addressing of the lower 18 bits
1013
+               // of memory space.
1014
+               case MEM:
1015
+                       if (dbg) zip_debug_rtx(x);
1016
+                       zip_print_operand_address(file, XEXP(x, 0));
1017
+                       break;
1018 111 dgisselq
+               case CONST_INT:
1019 135 dgisselq
+                       fprintf(file, "%ld",(long)INTVAL(x));
1020 111 dgisselq
+                       break;
1021 102 dgisselq
+               default:
1022 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
1023
+                       zip_debug_rtx(x);
1024 102 dgisselq
+                       abort(); break;
1025
+                       // output_addr_const(file, x);
1026
+               break;
1027
+       }
1028
+}
1029
+
1030
+/* The PRINT_OPERAND worker. */
1031
+
1032
+void
1033
+zip_print_operand(FILE *file, rtx x, int code)
1034
+{
1035
+       rtx operand = x;
1036
+       int     rgoff = 0;
1037
+
1038
+       // fprintf(file, "Print Operand!\n");
1039
+
1040
+       /* New code entries should just be added to the switch below.  If
1041
+        * handling is finished, just return.  If handling was just a
1042
+        * modification of the operand, the modified operand should be put in
1043
+        * "operand", and then do a break to let default handling
1044
+        * (zero-modifier) output the operand.
1045
+        */
1046
+       switch(code) {
1047
+               case 0:
1048
+                       /* No code, print as usual. */
1049
+                       break;
1050
+               case 'L':
1051
+                       /* Lower of two registers, print one up */
1052
+                       rgoff = 1;
1053
+                       break;
1054
+               case 'R':
1055
+               case 'H':
1056
+                       /* Higher of a register pair, print normal */
1057
+                       break;
1058
+
1059
+               default:
1060
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1061
+       }
1062
+
1063
+       /* Print an operand as without a modifier letter. */
1064
+       switch (GET_CODE(operand)) {
1065
+       case REG:
1066
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1067
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1068
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1069
+               return;
1070
+       case SCRATCH:
1071
+               LOSE_AND_RETURN("Need a scratch register", x);
1072
+               return;
1073
+
1074
+       case CODE_LABEL:
1075
+       case LABEL_REF:
1076
+       case SYMBOL_REF:
1077
+       case PLUS:
1078
+               PRINT_OPERAND_ADDRESS(file, operand);
1079
+               return;
1080
+       case MEM:
1081
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1082
+               return;
1083
+
1084
+       default:
1085
+               /* No need to handle all strange variants, let
1086
+                * output_addr_const do it for us.
1087
+                */
1088
+               if (CONSTANT_P(operand)) {
1089
+                       output_addr_const(file, operand);
1090
+                       return;
1091
+               }
1092
+
1093
+               LOSE_AND_RETURN("unexpected operand", x);
1094
+       }
1095
+}
1096
+
1097
+static bool
1098
+zip_frame_pointer_required(void)
1099
+{
1100
+       // This should really depend upon whether we have variable sized
1101
+       // arguments in our frame or not.  Once this fails, let's look
1102
+       // at what the problem was and then whether or not we can detect
1103
+       // it.
1104
+       //
1105
+       // Use a GCC global to determine our answer
1106 103 dgisselq
+       if (cfun->calls_alloca)
1107
+               return true;
1108 102 dgisselq
+       return (frame_pointer_needed);
1109
+/*
1110
+*/
1111
+}
1112
+
1113
+/* Determine whether or not a register needs to be saved on the stack or not.
1114
+ */
1115
+static bool
1116
+zip_save_reg(int regno) {
1117
+       if (regno == 0)
1118
+               return ((!crtl->is_leaf)
1119
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1120
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1121
+               return  ((df_regs_ever_live_p(regno))
1122
+                               &&(!call_used_regs[regno]));
1123
+       else if (regno == zip_FP)
1124
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1125
+                               &&(!call_used_regs[regno])));
1126
+       else if (regno < zip_FP)
1127
+               return  ((df_regs_ever_live_p(regno))
1128
+                               &&(!call_used_regs[regno]));
1129
+       return false;
1130
+}
1131
+
1132
+/* Compute the size of the local area and the size to be adjusted by the
1133
+ * prologue and epilogue.
1134
+ *
1135
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1136
+ *
1137
+ *     Stack Pointer ->
1138 124 dgisselq
+ *                     Outgoing arguments
1139 102 dgisselq
+ *                     Local variables (could be variable size)
1140
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1141
+ *                     Saved return address, if saved
1142
+ *                     Other Saved registers
1143
+ *                     Saved frame pointer (if used)
1144
+ *                     Saved R12, if used
1145
+ *                     (Stack pointer is not saved)
1146 171 dgisselq
+ *                     (PRETEND-ARGS)
1147 102 dgisselq
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1148
+ *                     Called arguments (not passed in registers)
1149
+ *                     Return arguments (not R1, args.pretend_args_size)
1150
+ *             (Prior function's stack frame ... )
1151
+ *
1152
+ */
1153
+static void
1154
+zip_compute_frame(void) {
1155
+       int     regno;
1156
+       int     args_size;
1157 124 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1158 102 dgisselq
+
1159 171 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-COMPUTE-FRAME: %s\n", current_function_name());
1160 102 dgisselq
+       // gcc_assert(crtl);
1161
+       gcc_assert(cfun);
1162
+       gcc_assert(cfun->machine);
1163
+
1164
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1165
+
1166
+       if(crtl->args.pretend_args_size > 0) {
1167
+               args_size += crtl->args.pretend_args_size;
1168 171 dgisselq
+               if (dbg) fprintf(stderr, "%s pretend_args_size : %d\n", current_function_name(),
1169
+                       crtl->args.pretend_args_size);
1170 102 dgisselq
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1171
+       }
1172
+
1173
+       cfun->machine->local_vars_size = get_frame_size();
1174
+
1175
+       // Save callee-saved registers.
1176
+       cfun->machine->saved_reg_size = 0;
1177
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1178
+               if (zip_save_reg(regno))
1179
+                       cfun->machine->saved_reg_size ++;
1180
+       }
1181
+
1182
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1183
+
1184
+       if ((cfun->machine->fp_needed)&&
1185
+                       (!df_regs_ever_live_p(zip_FP))) {
1186
+               cfun->machine->saved_reg_size ++;
1187
+       }
1188
+
1189 171 dgisselq
+       cfun->machine->sp_fp_offset = crtl->outgoing_args_size
1190
+                               + cfun->machine->local_vars_size;
1191 102 dgisselq
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1192
+                       + cfun->machine->saved_reg_size
1193
+                       + args_size;
1194 124 dgisselq
+       if(dbg) {
1195 171 dgisselq
+               fprintf(stderr, "\t---- STACK PTR ----\n");
1196
+               fprintf(stderr, "\tOUTGOIN-SIZE: %d\n",
1197
+                       crtl->outgoing_args_size);
1198 124 dgisselq
+               fprintf(stderr, "\tLOCALS-SIZE : %d\n",
1199
+                       cfun->machine->local_vars_size);
1200 171 dgisselq
+               fprintf(stderr, "\t---- FRAME PTR ----%s\n",
1201
+                       cfun->machine->fp_needed?"":" (Eliminated)");
1202 124 dgisselq
+               fprintf(stderr, "\tREGISTERS   : %d\n",
1203
+                       cfun->machine->saved_reg_size);
1204 171 dgisselq
+               fprintf(stderr, "\tPRETEND SIZE: %d\n",
1205
+                       crtl->args.pretend_args_size);
1206
+               fprintf(stderr, "\t---- ARG PTR (Original SP, should be eliminated) ----\n");
1207
+               fprintf(stderr, "\t----\n");
1208
+               fprintf(stderr, "\tARGS-SIZE   : %d\n", args_size);
1209 124 dgisselq
+               fprintf(stderr, "\tSP_FP_OFFSET: %d\n",
1210
+                       cfun->machine->sp_fp_offset);
1211
+               fprintf(stderr, "\tSP-ADJUSTMNT: %d\n",
1212
+                       cfun->machine->size_for_adjusting_sp);
1213
+       }
1214 102 dgisselq
+}
1215
+
1216
+void
1217
+zip_expand_prologue(void) {
1218
+       rtx     insn;
1219
+
1220
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1221
+       zip_compute_frame();
1222
+
1223 124 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: Computing Prologue instructions\n");
1224 127 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: SP-FP offset is %d\n",
1225
+                       cfun->machine->sp_fp_offset);
1226 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1227 138 dgisselq
+               insn = emit_insn(gen_subsi3_reg_clobber(stack_pointer_rtx,
1228 102 dgisselq
+                               stack_pointer_rtx,
1229
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1230
+                               SImode)));
1231
+                       // cfun->machine->sp_fp_offset
1232
+
1233
+               RTX_FRAME_RELATED_P(insn) = 1;
1234
+       }
1235
+
1236
+       {
1237
+               int offset = 0, regno;
1238
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1239
+                       if (zip_save_reg(regno)) {
1240 127 dgisselq
+                               if (dbg) fprintf(stderr,
1241
+                                       "PROLOGUE: Saving R%d in %d+%d(SP)\n",
1242
+                                       regno, cfun->machine->sp_fp_offset,
1243
+                                       offset);
1244 124 dgisselq
+                               insn=emit_insn(gen_movsi_sto_off(
1245
+                                       stack_pointer_rtx,
1246
+                                       GEN_INT(cfun->machine->sp_fp_offset
1247
+                                               +offset++),
1248 102 dgisselq
+                                       gen_rtx_REG(SImode, regno)));
1249
+                               RTX_FRAME_RELATED_P(insn) = 1;
1250
+                       }
1251
+               }
1252 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1253
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1254 102 dgisselq
+       }
1255
+
1256
+       if (cfun->machine->fp_needed) {
1257
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1258
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1259
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1260 124 dgisselq
+                               stack_pointer_rtx,
1261
+                               GEN_INT(cfun->machine->sp_fp_offset)));
1262 102 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1263 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1264 102 dgisselq
+       }
1265
+}
1266
+
1267
+bool
1268
+zip_use_return_insn(void)
1269
+{
1270
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1271
+                       ||(get_frame_size()!=0)) {
1272
+               // If R0 ever gets pushed to the stack, then we cannot
1273
+               // use a master return from anywhere.  We need to clean up the
1274
+               // stack first.
1275
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1276
+                                               &&(!call_used_regs[0]))) {
1277
+                       return false;
1278
+               }
1279
+       }
1280
+       zip_compute_frame();
1281
+       return (cfun->machine->size_for_adjusting_sp == 0);
1282
+}
1283
+
1284
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1285
+ * upon the current stack pointer.  It should use the frame poitner only,
1286
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1287
+ * take advantage of it to omit stack adjustments before returning ...
1288
+ *
1289
+ * Let's see if we can use their approach here.
1290
+ *
1291
+ * We can't.  Consider our choices:
1292
+ *     LOD (FP),R0
1293
+ *     LOD 1(FP),R4
1294
+ *     LOD 2(FP),R5
1295
+ *     LOD 3(FP),R6
1296
+ *     LOD 4(FP),FP
1297
+ *     ... Then what is the stack pointer?
1298
+ * or
1299
+ *     LOD (FP),R0
1300
+ *     LOD 1(FP),R4
1301
+ *     LOD 2(FP),R5
1302
+ *     LOD 3(FP),R6
1303
+ *     MOV FP,SP
1304
+ *     LOD 4(SP),FP
1305
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1306
+ *     exploit our pipeline memory function
1307
+ * or
1308
+ *     MOV FP,SP
1309
+ *     LOD (SP),R0
1310
+ *     LOD 1(SP),R4
1311
+ *     LOD 2(SP),R5
1312
+ *     LOD 3(SP),R6
1313
+ *     LOD 4(SP),FP
1314
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1315
+ *
1316
+ */
1317
+void
1318
+zip_expand_epilogue(void) {
1319
+       int     regno, offset;
1320
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1321 138 dgisselq
+       rtx     insn;
1322 102 dgisselq
+
1323
+       zip_compute_frame();
1324
+
1325
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1326
+       if (cfun->machine->fp_needed) {
1327 124 dgisselq
+               // This is done special--if you can't trust the stack pointer
1328
+               // enough so that you must have a frame pointer, then you can't
1329
+               // trust its offset enough to restore from it.  Hence, we start
1330
+               // by moving the frame pointer to the stack pointer to recover
1331
+               // the stack pointer back to a usable value.
1332 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1333 138 dgisselq
+               insn = emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1334
+               RTX_FRAME_RELATED_P(insn) = 1;
1335 102 dgisselq
+       }
1336
+
1337
+       if (cfun->machine->saved_reg_size != 0) {
1338 124 dgisselq
+               if (cfun->machine->fp_needed)
1339
+                       offset = 0;
1340
+               else
1341
+                       offset = cfun->machine->sp_fp_offset;
1342 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1343
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1344
+                       if (zip_save_reg(regno)) {
1345
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1346 138 dgisselq
+                               rtx reg = gen_rtx_REG(SImode, regno);
1347
+                               insn = emit_insn(gen_movsi_lod_off(
1348
+                                               reg,
1349 124 dgisselq
+                                               stack_pointer_rtx,
1350
+                                               GEN_INT(offset++)));
1351 138 dgisselq
+                               add_reg_note(insn, REG_CFA_RESTORE, reg);
1352
+                               RTX_FRAME_RELATED_P(insn) = 1;
1353 102 dgisselq
+                       }
1354
+               }
1355
+       }
1356
+
1357 124 dgisselq
+       if (cfun->machine->fp_needed) {
1358
+               // Restore the stack pointer back to the original, the
1359
+               // difference being the difference from the frame pointer
1360
+               // to the original stack
1361 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1362
+                       stack_pointer_rtx,
1363 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp
1364
+                               -cfun->machine->sp_fp_offset)));
1365 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1366 124 dgisselq
+       } else {
1367
+               // else now the difference is between the stack pointer and
1368
+               // the original stack pointer.
1369 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1370
+                               cfun->machine->size_for_adjusting_sp);
1371 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1372
+                       stack_pointer_rtx,
1373 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp)));
1374 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1375 102 dgisselq
+       }
1376
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1377
+
1378 138 dgisselq
+       // The return RTX is not allowed to be frame related
1379
+       insn = emit_jump_insn(ret_rtx);
1380
+       // RTX_FRAME_RELATED_P(insn) = 1;
1381 102 dgisselq
+}
1382
+
1383
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1384
+ *
1385
+ * We currently only support calculating the return address for the current
1386
+ * frame.
1387
+ */
1388
+
1389
+/*
1390
+rtx
1391
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1392
+{
1393
+       if (count)
1394
+               return NULL_RTX;
1395
+
1396
+       zip_compute_frame();
1397
+
1398
+       // saved return address for current function is at fp - 1
1399
+       if (cfun->machine->save_ret)
1400
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1401
+                               -UNITS_PER_WORD));
1402
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1403
+}
1404
+*/
1405
+
1406
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1407
+ * return the OFFSET.
1408
+ */
1409
+int
1410
+zip_initial_elimination_offset(int from, int to) {
1411
+       int     ret = 0;
1412
+       zip_compute_frame();
1413
+
1414 171 dgisselq
+/*
1415 102 dgisselq
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1416
+               ret = cfun->machine->sp_fp_offset;
1417 117 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1418 171 dgisselq
+               // Since the ARG_POINTER_REGNUM is defined to be identical
1419
+               // to the FRAME_POINTER_REGNUM, this "if" will never ever
1420
+               // get called.
1421 117 dgisselq
+               ret = cfun->machine->sp_fp_offset;
1422 102 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1423 171 dgisselq
+               // Since we define ARG_POINTER_REGNUM to be FRAME_POINTER_REGNUM
1424
+               // we're asked for the offset between the frame pointer and
1425
+               // itself.  The result had better be zero.
1426
+               //
1427 117 dgisselq
+               ret = 0;
1428 102 dgisselq
+       } else {
1429
+               abort();
1430
+       }
1431 171 dgisselq
+*/
1432 102 dgisselq
+
1433 171 dgisselq
+       // Let's try using an ARG_POINTER != FRAME_POINTER
1434
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1435
+               ret = cfun->machine->sp_fp_offset;
1436
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1437
+               // Since the ARG_POINTER_REGNUM is defined to be identical
1438
+               // to the FRAME_POINTER_REGNUM, this "if" will never ever
1439
+               // get called.
1440
+               ret = cfun->machine->size_for_adjusting_sp;
1441
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1442
+               ret = cfun->machine->size_for_adjusting_sp
1443
+                       - cfun->machine->sp_fp_offset;
1444
+       } else {
1445
+               abort();
1446
+       }
1447
+
1448 102 dgisselq
+       return ret;
1449
+}
1450
+
1451
+/*
1452
+ * Code taken from m68k ...
1453
+ */
1454
+static bool
1455
+zip_can_eliminate(int from, int to)
1456
+{
1457
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1458
+       if ((from == zip_FP)&&(to == zip_SP))
1459
+               return !cfun->machine->fp_needed;
1460
+       return true;
1461
+}
1462
+
1463
+/*
1464
+static void
1465
+zip_basic_check(void)
1466
+{
1467
+       gcc_assert(mode_base_align[SImode]==4);
1468
+       if ((BITS_PER_UNIT != 32)
1469
+                       ||(GET_MODE_SIZE(SImode)!=1)
1470
+                       ||(GET_MODE_SIZE(DImode)!=1)
1471
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1472
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1473
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1474
+               gcc_assert(BITS_PER_UNIT==32);
1475
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1476
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1477
+       }
1478
+}
1479
+*/
1480
+
1481
+#define        zip_basic_check()
1482
+
1483 171 dgisselq
+/* Compute the number of word sized registers needed to hold a function
1484 102 dgisselq
+ * argument of mode INT_MODE and tree type TYPE.
1485
+ */
1486
+int
1487
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1488
+       int     size;
1489
+
1490
+       zip_basic_check();
1491
+
1492
+       if (targetm.calls.must_pass_in_stack(mode, type))
1493
+               return 0;
1494
+
1495
+       if ((type)&&(mode == BLKmode))
1496
+               size = int_size_in_bytes(type);
1497
+       else
1498
+               size = GET_MODE_SIZE(mode);
1499
+
1500
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1501
+}
1502
+
1503
+static void
1504
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1505
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1506
+       CUMULATIVE_ARGS *cum;
1507
+       int     nreg;
1508
+
1509
+       zip_basic_check();
1510
+
1511
+       cum = get_cumulative_args(ca);
1512
+       nreg = zip_num_arg_regs(mode, type);
1513
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1514
+               (*cum) = NUM_ARG_REGS;
1515
+       else
1516
+               (*cum) += nreg;
1517
+}
1518
+
1519
+static rtx
1520
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1521
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1522
+       CUMULATIVE_ARGS *cum;
1523
+
1524
+       zip_basic_check();
1525
+
1526
+
1527
+       if (!named)
1528
+               return NULL_RTX;
1529
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1530
+               //return NULL_RTX;
1531
+       cum = get_cumulative_args(ca);
1532
+
1533
+       if ((*cum) >= NUM_ARG_REGS)
1534
+               return NULL_RTX;
1535
+       return
1536
+               gen_rtx_REG(mode, (*cum)+1);
1537
+}
1538
+
1539 122 dgisselq
+void   zip_canonicalize_comparison(int *code, rtx *op0, rtx *op1,
1540
+               bool preserve_op0)
1541
+{
1542
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1543 102 dgisselq
+
1544 122 dgisselq
+       if (dbg) fprintf(stderr, "CANONICALIZE ...%s\n", (preserve_op0)?"(Preserve Op0)":"");
1545
+       if (dbg) zip_debug_rtx_pfx("CODE", gen_rtx_fmt_ee((rtx_code)*code, VOIDmode, gen_rtx_REG(CCmode,zip_CC), const0_rtx));
1546
+       if (dbg) zip_debug_rtx_pfx("OP0 ", *op0);
1547
+       if (dbg) zip_debug_rtx_pfx("OP1 ", *op1);
1548
+
1549
+       if ((!preserve_op0)&&((*code == LE)||(*code == GTU)||(*code == GEU))) {
1550
+               rtx tem = *op0;
1551
+               *op0 = *op1;
1552
+               *op1 = tem;
1553
+               *code = (int)swap_condition((enum rtx_code)*code);
1554
+       }
1555
+
1556
+       if ((*code == LE)||(*code == LEU)||(*code == GTU)) {
1557
+               int offset = 1; // (*code == GTU) ? 1 : -1;
1558
+               bool    swap = false;
1559
+
1560
+               if (CONST_INT_P(*op1)) {
1561
+                       *op1 = GEN_INT(INTVAL(*op1)+offset);
1562
+                       swap = true;
1563
+               } else if (REG_P(*op1)) {
1564 138 dgisselq
+                       *op1 = plus_constant(GET_MODE(*op1), *op1, offset, true);
1565 122 dgisselq
+                       swap = true;
1566
+               } else if ((GET_CODE(*op1)==PLUS)&&(CONST_INT_P(XEXP(*op1,1)))){
1567
+                       *op1 = plus_constant(GET_MODE(*op1),XEXP(*op1,0),
1568
+                               INTVAL(XEXP(*op1,1))+offset);
1569
+                       swap = true;
1570
+               } if (swap) {
1571
+                       if (*code == LE)
1572
+                               (*code)= LT;
1573
+                       else if (*code == LEU)
1574
+                               (*code)= LTU;
1575
+                       else // (*code == GTU)
1576
+                               (*code) = GEU;
1577
+               }
1578
+       }
1579
+}
1580
+
1581
+static bool
1582
+zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b) {
1583
+       *a = zip_CC;
1584
+       *b = INVALID_REGNUM;
1585
+       return true;
1586
+}
1587
+
1588
+
1589 102 dgisselq
+/* totally buggy - we can't return pointers to nested functions */
1590
+static void
1591
+zip_asm_trampoline_template(FILE *f) {
1592
+       // Whereas at one time I thought I wouldn't need it, now I know I
1593
+       // need this trampoline function, although it is for a completely
1594
+       // different purpose than the one I was familiar with.
1595 138 dgisselq
+       fprintf(f, "\tbrev\t0,r1\n");
1596
+       fprintf(f, "\tldilo\t0,r1\n");
1597 102 dgisselq
+       fprintf(f, "\tjmp r1\n");
1598
+}
1599
+
1600
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1601
+static void
1602
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1603
+       tree fndecl ATTRIBUTE_UNUSED,
1604
+       rtx chain_value ATTRIBUTE_UNUSED) {
1605
+// #warning "This needs to be filled out"
1606
+       abort();
1607
+}
1608
+
1609
+static tree
1610
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1611
+       tree type)
1612
+{
1613
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1614
+       zip_basic_check();
1615
+
1616
+       if(t) {
1617
+               zip_builtins[code] = t;
1618
+               zip_builtins_icode[code] = icode;
1619
+       }
1620
+
1621
+       return t;
1622
+
1623
+}
1624
+
1625
+void   zip_init_builtins(void) {
1626
+       zip_basic_check();
1627
+
1628
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1629
+#ifdef HAVE_zip_rtu
1630
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1631
+#endif
1632
+#ifdef HAVE_zip_halt
1633
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1634
+#endif
1635 171 dgisselq
+#ifdef HAVE_zip_busy
1636
+  def_builtin("zip_busy",  CODE_FOR_zip_busy,  ZIP_BUILTIN_BUSY, void_ftype_void);
1637
+#endif
1638 102 dgisselq
+#ifdef HAVE_zip_idle
1639
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1640
+#endif
1641
+
1642
+#ifdef HAVE_zip_syscall
1643
+// Support int SYSCALL(callID, int a, int b, int c);
1644
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1645
+                       build_function_type_list(void_type_node, NULL_TREE));
1646
+#endif
1647
+
1648
+#ifdef HAVE_zip_save_context
1649
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1650
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1651
+#endif
1652
+
1653
+#ifdef HAVE_zip_restore_context
1654
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1655
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1656
+#endif
1657
+
1658
+#ifdef HAVE_zip_bitrev
1659
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1660
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1661
+               NULL_TREE));
1662
+#endif
1663
+
1664
+#ifdef HAVE_zip_cc
1665
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1666
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1667
+#endif
1668
+
1669 117 dgisselq
+#ifdef HAVE_zip_ucc
1670
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
1671
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1672
+#endif
1673
+
1674 102 dgisselq
+}
1675
+
1676
+static tree
1677
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1678
+{
1679
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1680
+    return error_mark_node;
1681
+
1682
+  return zip_builtins[zip_builtin_code];
1683
+}
1684
+
1685
+static rtx
1686
+zip_expand_builtin(tree exp, rtx target,
1687
+               rtx subtarget ATTRIBUTE_UNUSED,
1688
+               machine_mode tmode ATTRIBUTE_UNUSED,
1689
+               int     ignore ATTRIBUTE_UNUSED) {
1690
+
1691
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1692
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1693
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1694
+       enum    insn_code icode = zip_builtins_icode[code];
1695
+       rtx     pat, op[5];
1696
+       call_expr_arg_iterator  iter;
1697
+       tree    arg;
1698
+
1699
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1700
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1701
+               arg = first_call_expr_arg(exp, &iter);
1702
+               if (arg == error_mark_node)
1703
+                       return NULL_RTX;
1704
+               op[0] = expand_normal(arg);
1705
+               if (GET_CODE(op[0]) != REG)
1706
+                       op[0] = force_reg(Pmode, op[0]);
1707
+               pat = GEN_FCN(icode)(op[0]);
1708
+       } else if (code == ZIP_BUILTIN_BITREV) {
1709
+               arg = first_call_expr_arg(exp, &iter);
1710
+               if (arg == error_mark_node) {
1711
+                       return NULL_RTX;
1712
+               }
1713
+               op[0] = expand_normal(arg);
1714
+               if (!target)
1715
+                       target = gen_reg_rtx(SImode);
1716
+               pat = GEN_FCN(icode)(target, op[0]);
1717 117 dgisselq
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
1718 102 dgisselq
+               if (!target)
1719
+                       target = gen_reg_rtx(SImode);
1720
+               pat = GEN_FCN(icode)(target);
1721
+       } else // RTU, HALT, IDLE
1722
+               pat = GEN_FCN(icode)();
1723
+       if (!pat)
1724
+               return NULL_RTX;
1725
+       emit_insn(pat);
1726
+       return (nonvoid ? target : const0_rtx);
1727
+}
1728
+
1729
+static bool
1730
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1731
+       zip_basic_check();
1732
+
1733
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1734
+}
1735
+
1736
+static bool
1737
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1738
+       return ((mode)==SFmode)||((mode)==DFmode);
1739
+}
1740
+
1741
+static int
1742
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1743
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1744
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1745
+       return 1;
1746
+}
1747
+
1748
+static bool
1749
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1750
+       addr_space_t as ATTRIBUTE_UNUSED) {
1751
+       return false;
1752
+}
1753
+
1754
+/*
1755
+static void
1756
+zip_asm_output_anchor(rtx x) {
1757
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1758
+}
1759
+*/
1760
+
1761
+static void
1762
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1763
+       int     i;
1764
+       i = lvl;
1765
+       if ((true)||(lvl == 0))
1766
+               fprintf(stderr, "%s", pfx);
1767
+       else
1768
+               i += strlen(pfx);
1769
+       while(i-->0)
1770
+               fprintf(stderr, "  ");
1771
+       fprintf(stderr, "%s\n", str);
1772
+}
1773
+
1774
+static void
1775
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1776
+       int     i;
1777
+
1778
+       i = lvl;
1779
+       if ((true)||(lvl == 0))
1780
+               fprintf(stderr, "%s", pfx);
1781
+       else
1782
+               i = lvl+strlen(pfx);
1783
+       while(i-->0)
1784
+               fprintf(stderr, "  ");
1785
+       switch(m) {
1786
+               case VOIDmode:
1787
+                       fprintf(stderr, "%s:V\n", str);
1788
+                       break;
1789
+               case BLKmode:
1790
+                       fprintf(stderr, "%s:BLK\n", str);
1791
+                       break;
1792
+               case BImode:
1793
+                       fprintf(stderr, "%s:BI\n", str);
1794
+                       break;
1795
+#ifdef HAVE_QImode
1796
+               case QImode:
1797
+                       fprintf(stderr, "%s:QI\n", str);
1798
+                       break;
1799
+#endif
1800
+#ifdef HAVE_HImode
1801
+               case HImode:
1802
+                       fprintf(stderr, "%s:HI\n", str);
1803
+                       break;
1804
+#endif
1805
+               case SImode:
1806
+                       fprintf(stderr, "%s:SI\n", str);
1807
+                       break;
1808 122 dgisselq
+               case CCmode:
1809
+                       fprintf(stderr, "%s:CC\n", str);
1810
+                       break;
1811 102 dgisselq
+               case DImode:
1812
+                       fprintf(stderr, "%s:DI\n", str);
1813
+                       break;
1814
+               default:
1815
+                       fprintf(stderr, "%s:?\n", str);
1816
+       }
1817
+}
1818
+
1819
+static void
1820
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1821
+       if (x == NULL_RTX) {
1822
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1823
+               return;
1824
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1825
+               char    buf[64];
1826
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1827
+               zip_debug_print(pfx, lvl, buf);
1828 117 dgisselq
+               gcc_assert(0 && "Bad RTX Code");
1829 102 dgisselq
+               return;
1830
+       } switch(GET_CODE(x)) { // rtl.def
1831 122 dgisselq
+       case PARALLEL:
1832
+               zip_debug_print(pfx, lvl, "(PARALLEL");
1833
+               for(int j=0; j<XVECLEN(x,0);j++)
1834
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1835
+               zip_debug_print(pfx, lvl, ")");
1836
+               debug_rtx(x);
1837
+               break;
1838 102 dgisselq
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1839 122 dgisselq
+       case SEQUENCE:
1840
+               zip_debug_print(pfx, lvl, "(SEQUENCE");
1841
+               for(int j=0; j<XVECLEN(x,0);j++)
1842
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1843
+               zip_debug_print(pfx, lvl, ")");
1844
+               debug_rtx(x);
1845
+               break;
1846 102 dgisselq
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1847
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1848
+       case INSN:
1849
+               zip_debug_print(pfx, lvl, "(INSN");
1850
+               /*
1851
+               { const rtx_insn *tmp_rtx;
1852
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1853
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1854
+               }}
1855
+               */
1856
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1857
+               zip_debug_print(pfx, lvl, ")");
1858 117 dgisselq
+               debug_rtx(x);
1859 102 dgisselq
+               break;
1860
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1861 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1862
+               zip_debug_print(pfx, lvl, ")");
1863
+               /*
1864 102 dgisselq
+               if (JUMP_LABEL(x)) {
1865 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
1866
+                               char    buf[64];
1867
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
1868
+                               zip_debug_print(pfx, lvl+1, buf);
1869
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
1870
+                               char    buf[64];
1871
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
1872
+                               zip_debug_print(pfx, lvl+1, buf);
1873
+                       } else
1874
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
1875 102 dgisselq
+               } else
1876 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
1877
+               debug_rtx(x);
1878
+               */
1879 102 dgisselq
+               break;
1880
+       case CALL:
1881
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
1882
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
1883
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
1884
+               zip_debug_print(pfx, lvl, ")");
1885
+               break;
1886
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
1887
+               debug_rtx(x);
1888
+               break;
1889
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
1890
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
1891
+       case NOTE:
1892
+               {       char buf[128];
1893
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
1894
+                       zip_debug_print(pfx, lvl, buf);
1895
+               }break;
1896
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
1897
+               debug_rtx(x);
1898
+               break;
1899
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
1900
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
1901
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
1902
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
1903
+       case CODE_LABEL:
1904
+               {
1905
+                       char    buf[64];
1906 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
1907 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1908
+               } break;
1909
+       case SET:
1910
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
1911 117 dgisselq
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
1912
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
1913 102 dgisselq
+               zip_debug_print(pfx, lvl, ")");
1914 117 dgisselq
+               debug_rtx(x);
1915 102 dgisselq
+               break;
1916 122 dgisselq
+       case REG: {
1917 127 dgisselq
+               char buf[25], mstr[4];
1918
+               mstr[0] = '\0';
1919
+               if (GET_MODE(x) == SImode)
1920
+                       strcpy(mstr, ":SI");
1921
+               else if (GET_MODE(x) == DImode)
1922
+                       strcpy(mstr, ":DI");
1923
+               else if (GET_MODE(x) == VOIDmode)
1924
+                       strcpy(mstr, ":V");
1925 102 dgisselq
+               if (REGNO(x) == zip_PC)
1926 127 dgisselq
+                       sprintf(buf, "(PC%s)", mstr);
1927 102 dgisselq
+               else if (REGNO(x) == zip_CC)
1928 127 dgisselq
+                       sprintf(buf, "(CC%s)", mstr);
1929 102 dgisselq
+               else if (REGNO(x) == zip_SP)
1930 127 dgisselq
+                       sprintf(buf, "(SP%s)", mstr);
1931 102 dgisselq
+               else if (REGNO(x) == zip_FP)
1932 127 dgisselq
+                       sprintf(buf, "(REG%s FP)", mstr);
1933 102 dgisselq
+               else if (REGNO(x) == zip_GOT)
1934 127 dgisselq
+                       sprintf(buf, "(REG%s GBL)", mstr);
1935 102 dgisselq
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
1936 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-VL)", mstr);
1937 102 dgisselq
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
1938 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-AD)", mstr);
1939 122 dgisselq
+               else
1940 127 dgisselq
+                       sprintf(buf, "(REG%s %d)", mstr, REGNO(x));
1941
+               if (mstr[0])
1942
+                       zip_debug_print(pfx, lvl, buf);
1943
+               else
1944
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1945 102 dgisselq
+               } break;
1946
+       case IF_THEN_ELSE: // 51
1947
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
1948
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1949
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1950
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
1951
+               zip_debug_print(pfx, lvl, ")");
1952
+               break;
1953
+       case PC:
1954
+               zip_debug_print(pfx, lvl, "(PC)");
1955
+               break;
1956
+       case CC0:
1957
+               zip_debug_print(pfx, lvl, "(CC0)");
1958
+               break;
1959
+       case COMPARE:
1960 127 dgisselq
+               zip_debug_print_m(pfx, lvl, "(COMPARE", GET_MODE(x));
1961 102 dgisselq
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1962
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1963
+               zip_debug_print(pfx, lvl, ")");
1964
+               break;
1965 111 dgisselq
+       case CONST:
1966
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
1967
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1968
+               zip_debug_print(pfx, lvl, ")");
1969
+               break;
1970 102 dgisselq
+       case CONST_INT:
1971
+               { char buf[25];
1972
+               if (GET_MODE(x)==SImode)
1973 135 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", (long)INTVAL(x));
1974 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
1975 135 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", (long)INTVAL(x));
1976 102 dgisselq
+               else
1977 135 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", (long)INTVAL(x));
1978 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
1979
+               } break;
1980
+       case LABEL_REF:
1981 122 dgisselq
+               { char buf[256];
1982 111 dgisselq
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
1983
+               zip_debug_print(pfx, lvl, buf);
1984
+               }
1985 102 dgisselq
+               break;
1986
+       case SYMBOL_REF:
1987
+               {
1988
+                       char buf[64];
1989
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
1990
+                       // fprintf(file, "%s", XSTR(x,0));
1991
+                       zip_debug_print(pfx, lvl, buf);
1992
+               }
1993
+               break;
1994
+       case MEM:
1995
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
1996
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1997
+               zip_debug_print(pfx, lvl, ")");
1998
+               break;
1999
+       /*
2000
+       case VALUE:
2001
+               {
2002
+                       char buf[64];
2003
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2004
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2005
+               }
2006
+               break;
2007
+       */
2008
+       case PLUS:
2009
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2010
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2011
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2012
+               zip_debug_print(pfx, lvl, ")");
2013
+               break;
2014
+       case MINUS:
2015
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2016
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2017
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2018
+               zip_debug_print(pfx, lvl, ")");
2019
+               break;
2020
+       case AND:
2021
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2022
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2023
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2024
+               zip_debug_print(pfx, lvl, ")");
2025
+               break;
2026
+       case IOR:
2027
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2028
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2029
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2030
+               zip_debug_print(pfx, lvl, ")");
2031
+               break;
2032
+       case XOR:
2033
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2034
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2035
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2036
+               zip_debug_print(pfx, lvl, ")");
2037
+               break;
2038
+       case MULT:
2039
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2040
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2041
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2042
+               zip_debug_print(pfx, lvl, ")");
2043
+               break;
2044
+       case EQ:        //
2045
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2046
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2047
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2048
+               zip_debug_print(pfx, lvl, ")");
2049
+               break;
2050
+       case NE:        //
2051
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2052
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2053
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2054
+               zip_debug_print(pfx, lvl, ")");
2055
+               break;
2056
+       case GE:        //
2057
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2058
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2059
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2060
+               zip_debug_print(pfx, lvl, ")");
2061
+               break;
2062
+       case GT:        //
2063
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2064
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2065
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2066
+               zip_debug_print(pfx, lvl, ")");
2067
+               break;
2068
+       case LE:        //
2069
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2070
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2071
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2072
+               zip_debug_print(pfx, lvl, ")");
2073
+               break;
2074
+       case LT:        //
2075
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2076
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2077
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2078
+               zip_debug_print(pfx, lvl, ")");
2079
+               break;
2080
+       case GEU:       //
2081
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2082
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2083
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2084
+               zip_debug_print(pfx, lvl, ")");
2085
+               break;
2086
+       case GTU:       //
2087
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2088
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2089
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2090
+               zip_debug_print(pfx, lvl, ")");
2091
+               break;
2092
+       case LEU:       //
2093
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2094
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2095
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2096
+               zip_debug_print(pfx, lvl, ")");
2097
+               break;
2098
+       case LTU:       //
2099
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2100
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2101
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2102
+               zip_debug_print(pfx, lvl, ")");
2103
+               break;
2104
+       case SCRATCH:   //
2105
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2106
+               break;
2107
+       case SUBREG:
2108
+               { char buf[25];
2109 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2110
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2111
+                               SUBREG_BYTE(x));
2112
+                       zip_debug_print(pfx, lvl, buf);
2113
+               } else if (MEM_P(XEXP(x,0))) {
2114
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2115
+                       zip_debug_print(pfx, lvl, buf);
2116
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2117
+                       zip_debug_print(pfx, lvl, ")");
2118
+               } else {
2119
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2120
+                       zip_debug_print(pfx, lvl, buf);
2121
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2122
+                       zip_debug_print(pfx, lvl, ")");
2123
+               }}
2124
+               break;
2125 127 dgisselq
+       case ASHIFT:
2126
+               zip_debug_print_m(pfx, lvl, "(ASHIFT", GET_MODE(x));
2127
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2128
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2129
+               zip_debug_print(pfx, lvl, ")");
2130
+               break;
2131
+       case ASHIFTRT:
2132
+               zip_debug_print_m(pfx, lvl, "(ASHIFTRT", GET_MODE(x));
2133
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2134
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2135
+               zip_debug_print(pfx, lvl, ")");
2136
+               break;
2137
+       case LSHIFTRT:
2138
+               zip_debug_print_m(pfx, lvl, "(LSHIFTRT", GET_MODE(x));
2139
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2140
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2141
+               zip_debug_print(pfx, lvl, ")");
2142
+               break;
2143 102 dgisselq
+       default:
2144 111 dgisselq
+               { char buf[128];
2145 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2146
+               zip_debug_print(pfx, lvl, buf);
2147
+               debug_rtx(x);
2148
+               } break;
2149
+       }
2150
+}
2151
+
2152
+void
2153
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2154
+       zip_debug_rtx_1(pfx, x, 0);
2155
+}
2156
+
2157
+void
2158
+zip_debug_rtx(const_rtx x) {
2159
+       zip_debug_rtx_pfx("", x);
2160
+}
2161
+
2162
+void
2163 142 dgisselq
+zip_debug_ccode(int ccode) {
2164
+       switch(ccode) {
2165
+       case    EQ: fprintf(stderr, "EQ"); break;
2166
+       case    NE: fprintf(stderr, "NE"); break;
2167
+       case    GT: fprintf(stderr, "GT"); break;
2168
+       case    GE: fprintf(stderr, "GE"); break;
2169
+       case    LT: fprintf(stderr, "LT"); break;
2170
+       case    LE: fprintf(stderr, "LE"); break;
2171
+       case    GTU: fprintf(stderr, "GTU"); break;
2172
+       case    GEU: fprintf(stderr, "GEU"); break;
2173
+       case    LTU: fprintf(stderr, "LTU"); break;
2174
+       case    LEU: fprintf(stderr, "LEU"); break;
2175
+       default:
2176
+               fprintf(stderr, "%d", ccode); break;
2177
+       }
2178
+}
2179
+
2180
+void
2181 102 dgisselq
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2182
+}
2183
+
2184
+void
2185
+zip_debug_bb(basic_block bb) {
2186
+       rtx_insn        *insn;
2187
+
2188
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2189
+       FOR_BB_INSNS(bb, insn)
2190
+       {
2191
+               zip_debug_rtx(insn);
2192
+       }
2193
+}
2194
+
2195
+
2196
+static bool
2197 122 dgisselq
+zip_legitimate_opb(rtx x, bool strict)
2198 102 dgisselq
+{
2199 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2200 102 dgisselq
+
2201 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2202 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2203
+
2204
+       if (NULL_RTX == x)
2205
+               return false;
2206 122 dgisselq
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2207
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> Mode failure\n");
2208 102 dgisselq
+               return false;
2209 122 dgisselq
+       } else if ((strict)&&(REG_P(x))) {
2210
+               if (REGNO(x)<zip_CC) {
2211
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2212
+                       return true;
2213
+               } else return false;
2214
+       } else if (register_operand(x, GET_MODE(x))) {
2215
+               // This also handles subregs
2216
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2217
+               return true;
2218 111 dgisselq
+       } else if ((CONST_INT_P(x))
2219
+               &&(INTVAL(x) >= zip_min_opb_imm)
2220
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2221 136 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const) %ld <= %ld <= %ld\n", (long)zip_min_opb_imm, (long)INTVAL(x), (long)zip_max_opb_imm);
2222 111 dgisselq
+               return true;
2223 122 dgisselq
+       // } else if ((GET_CODE(x) == LABEL_REF)||(GET_CODE(x)==CODE_LABEL)) {
2224
+               // return true;
2225 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2226
+               // Is it a valid register?
2227 122 dgisselq
+               if ((!strict)&&(!register_operand((rtx)XEXP((rtx)x,0), GET_MODE(x)))) {
2228 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2229 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2230
+                       return false;
2231 122 dgisselq
+               } else if ((strict)&&((!REG_P(XEXP(x,0)))||(REGNO(XEXP(x,0))>=zip_CC))) {
2232 102 dgisselq
+                       return false;
2233
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2234
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2235
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2236 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2237 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2238
+                               // gcc_unreachable();
2239 102 dgisselq
+                       return true;
2240
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2241 122 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == CODE_LABEL)
2242 102 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2243
+                       // While we can technically support this, the problem
2244
+                       // is that the symbol address could be anywhere, and we
2245
+                       // have no way of recovering if it's outside of our
2246
+                       // 14 allowable bits.
2247 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2248 102 dgisselq
+                       return false;
2249
+               }
2250
+       }
2251
+
2252 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2253 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2254
+       return false;
2255
+}
2256
+
2257
+static bool
2258
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2259
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2260
+
2261
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2262
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2263
+
2264 122 dgisselq
+       if (!zip_legitimate_opb(x, strict))
2265 102 dgisselq
+               return false;
2266 122 dgisselq
+       else if ((GET_CODE(x)==PLUS)&&(CONST_INT_P(XEXP(x,1)))) {
2267
+               if ((INTVAL(XEXP(x, 1)) > zip_max_mov_offset)
2268
+                       ||(INTVAL(XEXP(x, 1)) < zip_min_mov_offset)) {
2269 135 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> NO! (reg+int), int out of bounds: %ld\n", (long)INTVAL(XEXP(x,1)));
2270 102 dgisselq
+                       return false;
2271
+               }
2272
+       }
2273
+
2274 122 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> Yes\n");
2275 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2276 122 dgisselq
+       return true;
2277 102 dgisselq
+}
2278
+
2279
+int
2280
+zip_pd_mov_operand(rtx op)
2281
+{
2282
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2283
+
2284
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2285
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2286
+}
2287
+
2288
+int
2289 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2290
+{
2291
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2292
+
2293
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2294
+       if (!CONST_INT_P(op))
2295
+               return false;
2296
+       if (INTVAL(op) > zip_max_mov_offset)
2297
+               return false;
2298
+       if (INTVAL(op) < zip_min_mov_offset)
2299
+               return false;
2300
+       return true;
2301
+}
2302
+
2303
+int
2304
+zip_pd_imm_operand(rtx op)
2305
+{
2306
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2307
+
2308
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2309
+       if (!CONST_INT_P(op))
2310
+               return false;
2311
+       if (INTVAL(op) > zip_max_anchor_offset)
2312
+               return false;
2313
+       if (INTVAL(op) < zip_min_anchor_offset)
2314
+               return false;
2315
+       return true;
2316
+}
2317
+
2318
+int
2319 102 dgisselq
+zip_address_operand(rtx op)
2320
+{
2321
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2322
+
2323
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2324 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2325
+               return false;
2326
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2327
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2328
+               return false;
2329
+       else
2330
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2331 102 dgisselq
+}
2332
+
2333
+int
2334 111 dgisselq
+zip_pd_opb_operand(rtx op)
2335 102 dgisselq
+{
2336
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2337
+
2338 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2339 122 dgisselq
+       return zip_legitimate_opb(op, false); //, !can_create_pseudo_p());
2340 102 dgisselq
+}
2341
+
2342
+int
2343
+zip_ct_address_operand(rtx op)
2344
+{
2345
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2346
+
2347
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2348 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2349 102 dgisselq
+}
2350
+
2351
+int
2352
+zip_const_address_operand(rtx x) {
2353
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2354
+
2355
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2356
+       if (dbg) zip_debug_rtx(x);
2357 127 dgisselq
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2358
+               fprintf(stderr, "is ZIP-CONST-ADDRESS? -> NO, BAD MODE\n");
2359 102 dgisselq
+               return false;
2360 127 dgisselq
+       }
2361 102 dgisselq
+       if ((GET_CODE(x) == LABEL_REF)
2362
+                       ||(GET_CODE(x) == CODE_LABEL)
2363
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2364 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (LBL)\n");
2365 102 dgisselq
+               return true;
2366
+       } else if (CONST_INT_P(x)) {
2367 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (INT)\n");
2368 102 dgisselq
+               return true;
2369
+       } else if (GET_CODE(x) == PLUS) {
2370
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2371
+               return ((zip_const_address_operand(XEXP(x,0)))
2372
+                       &&(CONST_INT_P(XEXP(x,1))));
2373
+       } else if (GET_CODE(x) == MINUS) {
2374
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2375
+               return ((zip_const_address_operand(XEXP(x,0)))
2376
+                       &&(zip_const_address_operand(XEXP(x,1))));
2377
+       }
2378
+
2379
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2380
+       if (dbg) zip_debug_rtx(x);
2381
+       return false;
2382
+}
2383
+
2384
+int
2385
+zip_ct_const_address_operand(rtx x) {
2386
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2387
+
2388
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2389
+       return zip_const_address_operand(x);
2390
+}
2391
+
2392
+int
2393
+zip_pd_const_address_operand(rtx x) {
2394
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2395
+
2396
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2397
+       return zip_const_address_operand(x);
2398
+}
2399
+
2400
+
2401
+static bool
2402
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2403
+{
2404
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2405
+
2406
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2407
+       if (dbg) zip_debug_rtx(x);
2408
+
2409
+       // Only insist the register be a valid register if strict is true
2410 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2411 102 dgisselq
+               return true;
2412 111 dgisselq
+       // else if (zip_const_address_operand(x))
2413
+               // return true;
2414 102 dgisselq
+
2415
+       return false;
2416
+}
2417
+
2418 111 dgisselq
+static rtx
2419
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2420
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2421
+
2422
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2423
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2424
+               return x;
2425
+
2426
+       if (GET_CODE(x)==PLUS) {
2427
+               if (!REG_P(XEXP(x,0)))
2428
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2429
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2430
+                       &&(!CONST_INT_P(XEXP(x,1))))
2431
+                       x = force_reg(GET_MODE(x),x);
2432
+       } else if (MEM_P(x))
2433
+               x = force_reg(GET_MODE(x),x);
2434
+
2435
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2436
+       return x;
2437
+}
2438
+
2439 102 dgisselq
+void
2440
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2441
+{
2442
+       assemble_name(stream, name);
2443
+       fprintf(stream, "\t.equ ");
2444
+       assemble_name(stream, value);
2445
+       fputc('\n', stream);
2446
+}
2447
+
2448 111 dgisselq
+#define        USE_SUBREG
2449
+#ifdef USE_SUBREG
2450
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2451
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2452
+#else
2453
+#define        SREG_P(RTX)     false
2454
+#define        SMEM_P(RTX)     false
2455
+#endif
2456 102 dgisselq
+
2457
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2458 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2459 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2460
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2461
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2462
+       switch(GET_CODE(condition)) {
2463
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2464
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2465
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2466
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2467
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2468
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2469
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2470
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2471
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2472
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2473
+       default:
2474
+               zip_debug_rtx(condition);
2475
+               internal_error("CSTORE Unsupported condition");
2476
+               return NULL;
2477
+       }
2478
+}
2479
+
2480 127 dgisselq
+/*
2481 102 dgisselq
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2482
+       static char     result[64] = "";
2483
+       switch(condition) {
2484
+               //
2485
+               // Result already exists in the iffalse register
2486
+               // Can't change it.  Therefore, on the
2487
+               // condition ... move true register to the
2488
+               // destination
2489
+               //
2490
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2491
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2492
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2493
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2494
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2495
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2496
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2497
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2498
+               //
2499
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2500
+               // .C will never be set on an equal condition.  Therefore, we
2501
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2502
+               // as long as .Z wasn't true.  We then undo this when we're
2503
+               // done.  This is possible since none of these instructions
2504
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2505
+               // the condition codes.
2506
+               //
2507
+               // This is obviously not very optimal.  Avoid this by all means
2508
+               // if you can
2509
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2510
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2511
+               // two instructions
2512
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2513
+               //
2514
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2515
+               // painful.  We can change the condition codes to make it so,
2516
+               // but the instruction requires the condition codes not be
2517
+               // changed.  Hence, we must change them back if we do so.
2518
+               //
2519
+               // .C will be set on less than but not equal.  Hence !.C will
2520
+               // be true on greater than or equal.
2521
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2522
+               default:
2523
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2524
+                       return NULL;
2525
+       } return result;
2526
+}
2527 127 dgisselq
+*/
2528 102 dgisselq
+
2529 127 dgisselq
+bool
2530
+zip_supported_condition(int c) {
2531
+       switch(c) {
2532
+       case NE: case LT: case EQ: case GT: case GE: case LTU:
2533
+               return true;
2534
+               break;
2535
+       default:
2536
+               break;
2537
+       } return false;
2538 102 dgisselq
+}
2539
+
2540 127 dgisselq
+bool
2541
+zip_signed_comparison(int c) {
2542
+       switch(c) {
2543
+       case NE: case LT: case EQ: case GT: case GE:
2544
+               return true;
2545
+       default:
2546
+               break;
2547
+       } return false;
2548
+}
2549
+
2550 142 dgisselq
+bool
2551 127 dgisselq
+zip_expand_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2552 142 dgisselq
+       rtx_insn *insn;
2553 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2554 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2555
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2556
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2557
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2558
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2559 127 dgisselq
+
2560
+       // Start with the condition
2561
+       rtx     cmpa = XEXP(condition,0), cmpb=XEXP(condition,1);
2562
+       enum rtx_code   cmpcode = GET_CODE(condition);
2563
+
2564 142 dgisselq
+       // Want to always do the false expression, and only sometimes the
2565
+       // true expression.  If, however, the false is a constant and the
2566
+       // true and destination are the same thing, this doesn't work.
2567
+       if (rtx_equal_p(dst, iftrue)) {
2568
+               // If the true value is the same as the destination already,
2569
+               // then swap so we only do the condition on true
2570
+               rtx tem = iffalse;
2571
+               iffalse = iftrue;
2572
+               iftrue  = tem;
2573
+               cmpcode = reverse_condition(cmpcode);
2574
+       }
2575
+
2576 127 dgisselq
+       //; Do we need to swap or adjust the condition?
2577
+       if (zip_supported_condition((int)cmpcode)) {
2578
+               // Keep everything as is
2579 142 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Condition is supported\n");
2580 127 dgisselq
+       } else if ((zip_supported_condition(reverse_condition(cmpcode)))
2581 142 dgisselq
+                       &&(!MEM_P(iffalse))
2582
+                       &&(!rtx_equal_p(dst,iffalse))) {
2583 127 dgisselq
+               rtx tem = iffalse;
2584
+               iffalse = iftrue;
2585
+               iftrue = tem;
2586
+
2587
+               cmpcode = reverse_condition(cmpcode);
2588
+       } else if ((zip_supported_condition((int)swap_condition(cmpcode)))
2589
+               &&((REG_P(cmpb))||(can_create_pseudo_p()))) {
2590
+               rtx tem = cmpa;
2591
+               cmpa = cmpb;
2592
+               cmpa = tem;
2593
+               cmpcode = swap_condition(cmpcode);
2594
+
2595
+               if ((GET_CODE(cmpa)==PLUS)&&(zip_signed_comparison((int)cmpcode))
2596
+                       &&(REG_P(XEXP(cmpa,0)))
2597
+                       &&(CONST_INT_P(XEXP(cmpa,1)))
2598
+                       &&(abs(INTVAL(XEXP(cmpa,1)))<(1<<17))) {
2599
+
2600
+                       // If we were doing CMP x(Rb),Ra
2601
+                       // and we just changed it to CMP Ra,x(Rb)
2602
+                       // adjust it to CMP -x(Ra),Rb
2603
+                       cmpb = plus_constant(SImode, cmpb, -INTVAL(XEXP(cmpa,1)));
2604
+                       cmpa = XEXP(cmpa,0);
2605
+               } else if (!REG_P(cmpa)) {
2606
+                       // Otherwise, if we had anything else in Rb other than
2607
+                       // a register ... such as a constant, then load it into
2608
+                       // a register before comparing it.  So
2609
+                       //      CMP x,Ra
2610
+                       // became
2611
+                       //      CMP Ra,x
2612
+                       // now becomes
2613
+                       //      LDI x,Rt
2614
+                       //      CMP Ra,Rt
2615
+                       // (We already tested for can_create_pseudo_p() above..)
2616
+                       tem = gen_reg_rtx(SImode);
2617
+                       emit_move_insn(tem, cmpa);
2618
+                       cmpa = tem;
2619 102 dgisselq
+               }
2620 127 dgisselq
+       } else {
2621
+               // Here's our last chance.
2622
+               // This will adjust for less than equal types of stuff
2623
+               int     cod = (int)cmpcode;
2624
+               zip_canonicalize_comparison(&cod, &cmpa, &cmpb, false);
2625
+               cmpcode = (enum rtx_code)cod;
2626 102 dgisselq
+       }
2627
+
2628 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Post-Modes\n");
2629
+       if (dbg) zip_debug_rtx_pfx("DST-P: ", dst);
2630
+       if (dbg) zip_debug_rtx_pfx("CND-P: ", condition);
2631
+       if (dbg) zip_debug_rtx_pfx("TRU-P: ", iftrue);
2632
+       if (dbg) zip_debug_rtx_pfx("FAL-P: ", iffalse);
2633
+
2634
+       if (!zip_supported_condition((int)cmpcode)) {
2635
+               if (dbg) {
2636
+               fprintf(stderr, "ZIP::MOVSICC -- Unsupported condition: ");
2637
+                       zip_debug_ccode(cmpcode);
2638
+                       fprintf(stderr, "\n");
2639
+               }
2640
+               return false;
2641
+       }
2642 127 dgisselq
+       gcc_assert(zip_supported_condition((int)cmpcode));
2643
+
2644
+       //; Always do the default move
2645 142 dgisselq
+       bool    conditionally_do_false = false;
2646
+       conditionally_do_false = (MEM_P(iffalse))
2647
+               &&(!rtx_equal_p(dst,iffalse))
2648
+               &&(zip_supported_condition(reverse_condition(cmpcode)));
2649
+       conditionally_do_false = conditionally_do_false || (rtx_equal_p(dst,iftrue));
2650
+       if ((conditionally_do_false)&&(!zip_supported_condition(reverse_condition(cmpcode)))) {
2651
+               if (dbg) {
2652
+                       fprintf(stderr, "ZIP::MOVSICC -- Cant support the reverse condition: ");
2653
+                       zip_debug_ccode(cmpcode);
2654
+                       fprintf(stderr, "\n");
2655
+               }
2656
+               return false;
2657
+       }
2658 127 dgisselq
+
2659 142 dgisselq
+       if ((!rtx_equal_p(dst, iffalse))&&(!conditionally_do_false)) {
2660
+               if (dbg)
2661
+               fprintf(stderr, "ZIP::MOVSICC -- EMITTING MOVE FALSE->DST\n");
2662
+               insn = emit_move_insn(dst, iffalse);
2663
+               if (dbg) zip_debug_rtx_pfx("BARE-U: ", insn);
2664
+       }
2665
+
2666 127 dgisselq
+       rtx     cc_rtx = gen_rtx_REG(CCmode, zip_CC);
2667
+
2668
+       //; Now let's get our comparison right
2669 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING COMPARISON\n");
2670
+       insn = emit_insn(gen_rtx_SET(VOIDmode, cc_rtx,
2671 127 dgisselq
+               gen_rtx_COMPARE(CCmode, cmpa, cmpb)));
2672 142 dgisselq
+       if (dbg) zip_debug_rtx_pfx("BARE-C: ", insn);
2673 127 dgisselq
+
2674
+       //; Finally, let's load the value on true
2675 142 dgisselq
+       if (!rtx_equal_p(dst, iftrue)) {
2676
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING BARE\n");
2677
+               insn=emit_insn(gen_movsicc_bare(dst,
2678 127 dgisselq
+                       gen_rtx_fmt_ee(cmpcode, SImode, NULL_RTX, NULL_RTX),
2679
+                       iftrue, dst));
2680 142 dgisselq
+               if (dbg) zip_debug_rtx_pfx("BARE-T: ", insn);
2681
+       }
2682
+
2683
+       if (conditionally_do_false) {
2684
+               gcc_assert(zip_supported_condition(reverse_condition(cmpcode)));
2685
+               insn=emit_insn(gen_movsicc_bare(dst,
2686
+                       gen_rtx_fmt_ee(reverse_condition(cmpcode), SImode,
2687
+                       NULL_RTX, NULL_RTX), iffalse, dst));
2688
+               if (dbg) zip_debug_rtx_pfx("BARE-F: ", insn);
2689
+       }
2690
+
2691
+       // Return true on success
2692
+       return true;
2693 102 dgisselq
+}
2694
+
2695
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2696
+       // We know upon entry that REG_P(dst) must be true
2697
+       if (!REG_P(dst))
2698
+               internal_error("%s","ADDSICC into something other than register");
2699
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2700
+               switch (GET_CODE(condition)) {
2701
+               case EQ: return "ADD.Z\t%3,%0";
2702
+               case NE: return "ADD.NZ\t%3,%0";
2703
+               case LT: return "ADD.LT\t%3,%0";
2704
+               case GT: return "ADD.GT\t%3,%0";
2705
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2706
+               case GE: return "ADD.GE\t%3,%0";
2707
+               case LTU: return "ADD.C\t%3,%0";
2708
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2709
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2710
+               // Can do a GEU comparison, and then undo on the Zero condition
2711
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2712
+               default:
2713
+                       internal_error("%s", "Zip/No usable addsi expansion");
2714
+                       break;
2715
+               }
2716
+       } else {
2717
+               // MOV A+REG,REG
2718
+               switch (GET_CODE(condition)) {
2719
+               case EQ: return "MOV.Z\t%3+%2,%0";
2720
+               case NE: return "MOV.NZ\t%3+%2,%0";
2721
+               case LT: return "MOV.LT\t%3+%2,%0";
2722
+               case GT: return "MOV.GT\t%3+%2,%0";
2723
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2724
+               case GE: return "MOV.GE\t%3+%2,%0";
2725
+               case LTU: return "MOV.C\t%3+%2,%0";
2726
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2727
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2728
+               // Can do a GEU comparison, and then undo on the Zero condition
2729
+               // EXCEPT: with a move instruction, what's there to undo?  We
2730
+               // just clobbered our register!
2731
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2732
+               default:
2733
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2734
+                       break;
2735
+               }
2736
+       }
2737
+
2738
+       return "BREAK";
2739
+}
2740
+
2741 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2742 102 dgisselq
+       int     rv = 14;
2743
+       if ((mode == DImode)||(mode == DFmode))
2744
+               rv += 2;
2745
+       return rv;
2746
+}
2747
+
2748 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
2749 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void) {
2750
+       // Let's try their suggested approach, keeping us from modifying jumps
2751
+       // after reload.  This should also allow our peephole2 optimizations
2752
+       // to adjust things back to what they need to be if necessary.
2753
+       return (reload_completed || reload_in_progress);
2754
+}
2755 122 dgisselq
+
2756
+rtx_insn       *zip_ifcvt_info;
2757
+
2758
+void
2759
+zip_ifcvt_modify_tests(ce_if_block *ce_info ATTRIBUTE_UNUSED, rtx *true_expr, rtx *false_expr) {
2760
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2761
+       if (dbg) fprintf(stderr, "IFCVT-MODIFY-TESTS\n");
2762
+       if (*true_expr) switch(GET_CODE(*true_expr)) {
2763
+               case LE:
2764
+               case GTU:
2765
+               case GEU:
2766
+               case LEU:
2767
+                       if (dbg) fprintf(stderr, "TRUE, missing expr\n");
2768
+                       if (dbg) zip_debug_rtx(*true_expr);
2769
+                       *true_expr = NULL_RTX;
2770
+                       break;
2771
+               default: // LT, GT, GTE, LTU, NE, EQ
2772
+                       break;
2773
+       }
2774
+
2775
+       if (*false_expr) switch(GET_CODE(*false_expr)) {
2776
+               case LE:
2777
+               case GTU:
2778
+               case GEU:
2779
+               case LEU:
2780
+                       if (dbg) fprintf(stderr, "FALSE, missing expr\n");
2781
+                       if (dbg) zip_debug_rtx(*false_expr);
2782
+                       *false_expr = NULL_RTX;
2783
+               default:
2784
+                       break;
2785
+       }
2786
+       if ((dbg)&&((!*true_expr)||(!*false_expr)))
2787
+               fprintf(stderr, "IFCVT-MODIFY-TESTS -- FAIL\n");
2788
+}
2789
+
2790
+void
2791 142 dgisselq
+zip_ifcvt_machdep_init(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2792 122 dgisselq
+/*
2793 142 dgisselq
+if (!ceinfo->then_bb)
2794
+       return;
2795
+rtx_insn *insn;
2796
+FOR_BB_INSNS(ceinfo->then_bb, insn) {
2797
+       fprintf(stderr, "IFCVT -- INIT\n");
2798
+       zip_debug_rtx_pfx("INIT-BB", insn);
2799 122 dgisselq
+}
2800
+*/
2801
+/*
2802
+       zip_ifcvt_info = NULL;
2803
+       rtx_insn *insn, *ifinsn = NULL;
2804
+       FOR_BB_INSNS(ceinfo->test_bb, insn) {
2805
+               rtx     p;
2806
+               p = single_set(insn);
2807
+               if (!p) continue;
2808
+               if (SET_DEST(p)==pc_rtx) {
2809
+                       ifinsn = insn;
2810
+               }
2811
+               if (!REG_P(SET_DEST(p)))
2812
+                       continue;
2813
+               if (GET_MODE(SET_DEST(p))!=CCmode)
2814
+                       continue;
2815
+               if (REGNO(SET_DEST(p))!=zip_CC)
2816
+                       continue;
2817
+               zip_ifcvt_info = insn;
2818
+       }
2819
+
2820
+       if (zip_ifcvt_info)
2821
+               zip_debug_rtx_pfx("PUTATIVE-CMP",zip_ifcvt_info);
2822
+       if (ifinsn)
2823
+               zip_debug_rtx_pfx("PRIOR-JMP",ifinsn);
2824
+*/
2825
+}
2826
+
2827 142 dgisselq
+void
2828
+zip_ifcvt_modify_insn(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED,
2829
+               rtx pattern ATTRIBUTE_UNUSED,
2830
+               rtx_insn *insn ATTRIBUTE_UNUSED) {
2831
+       // zip_debug_rtx_pfx("MODIFY-INSN: ", insn);
2832
+}
2833
+
2834
+void
2835
+zip_ifcvt_modify_cancel(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2836
+/*
2837
+       fprintf(stderr, "IFCVT -- CANCEL\n");
2838
+       zip_ifcvt_info = NULL;
2839
+*/
2840
+}
2841
+
2842
+void
2843
+zip_ifcvt_modify_final(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2844
+/*
2845
+rtx_insn *insn;
2846
+FOR_BB_INSNS(ceinfo->test_bb, insn) {
2847
+       fprintf(stderr, "IFCVT -- FINAL\n");
2848
+       zip_debug_rtx_pfx("FINAL-TEST-BB", insn);
2849
+}
2850
+       zip_ifcvt_info = NULL;
2851
+*/
2852
+}
2853
+
2854
+
2855 127 dgisselq
+int    zip_insn_sets_cc(rtx_insn *insn) {
2856
+       return (get_attr_ccresult(insn)==CCRESULT_SET);
2857
+}
2858
+
2859
+int    zip_is_conditional(rtx_insn *insn) {
2860
+       return (get_attr_conditional(insn)==CONDITIONAL_YES);
2861
+}
2862 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
2863
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
2864 171 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-09-13 10:05:21.871953479 -0400
2865
@@ -0,0 +1,4058 @@
2866 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
2867
+//
2868
+// Filename:   gcc/config/zip/zip.h
2869
+//
2870
+// Project:    Zip CPU backend for the GNU Compiler Collection
2871
+//
2872
+// Purpose:
2873
+//
2874
+// Creator:    Dan Gisselquist, Ph.D.
2875
+//             Gisselquist Technology, LLC
2876
+//
2877
+////////////////////////////////////////////////////////////////////////////////
2878
+//
2879
+// Copyright (C) 2016, Gisselquist Technology, LLC
2880
+//
2881
+// This program is free software (firmware): you can redistribute it and/or
2882
+// modify it under the terms of  the GNU General Public License as published
2883
+// by the Free Software Foundation, either version 3 of the License, or (at
2884
+// your option) any later version.
2885
+//
2886
+// This program is distributed in the hope that it will be useful, but WITHOUT
2887
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
2888
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
2889
+// for more details.
2890
+//
2891
+// You should have received a copy of the GNU General Public License along
2892
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
2893
+// target there if the PDF file isn't present.)  If not, see
2894
+// <http://www.gnu.org/licenses/> for a copy.
2895
+//
2896
+// License:    GPL, v3, as defined and found on www.gnu.org,
2897
+//             http://www.gnu.org/licenses/gpl.html
2898
+//
2899
+//
2900
+////////////////////////////////////////////////////////////////////////////////
2901
+#ifndef        GCC_ZIP_H
2902
+#define        GCC_ZIP_H
2903
+
2904
+
2905
+//
2906
+//
2907 127 dgisselq
+// Zip CPU configuration defines
2908 102 dgisselq
+//
2909
+//
2910
+#define        ZIP_USER        0        // Assume we are in supervisor mode
2911
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
2912
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
2913
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
2914
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
2915
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
2916
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
2917
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
2918
+#define        ZIP_HAS_DI      1
2919 127 dgisselq
+// Should we use the peephole optimizations?
2920
+#define        ZIP_PEEPHOLE    1       // 0 means no peephole optimizations.
2921 138 dgisselq
+// How about the new long multiply instruction set?
2922
+#define        ZIP_LONGMPY     1       // 0 means use the old instruction set
2923 102 dgisselq
+
2924
+// Zip has 16 registers in each user mode.
2925
+//     Register 15 is the program counter (PC)
2926
+//     Register 14 is the condition codes (CC)
2927
+//     Register 13 is the stack pointer   (SP)
2928
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
2929
+//     Register  0 (may be) the return address pointer
2930
+// Registers 16-31 may only be used in supervisor mode.
2931
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
2932 171 dgisselq
+#define        is_ZIP_REG(REGNO)               ((REGNO)<33)
2933 102 dgisselq
+
2934 171 dgisselq
+#define        zip_AP_PSEUDO   32
2935 103 dgisselq
+#define        zip_PC          15
2936
+#define        zip_CC          14
2937
+#define        zip_SP          13
2938
+#define        zip_FP          12
2939
+#define        zip_GOT         11
2940 171 dgisselq
+// #define     zip_AP          10      // We're using a PSEUDO REG instead
2941 103 dgisselq
+#define        zip_R1          1
2942
+#define        zip_R0          0
2943 102 dgisselq
+
2944
+#define        ZIP_FIRST_ARG_REGNO     1
2945
+#define        ZIP_LAST_ARG_REGNO      5
2946 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
2947
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
2948 102 dgisselq
+
2949
+/* The overall framework of an assembler file */
2950
+
2951
+#define        ASM_COMMENT_START       ";"
2952
+#define        ASM_APP_ON              ""
2953
+#define        ASM_APP_OFF             ""
2954
+
2955
+#define        FILE_ASM_OP             "\t.file\n"
2956
+
2957
+/* Output and Generation of Labels */
2958
+#define        GLOBAL_ASM_OP           "\t.global\t"
2959
+
2960
+#undef BITS_PER_UNIT
2961
+#define        BITS_PER_UNIT   (32)
2962
+
2963
+/* Assembler Commands for Alignment */
2964
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
2965 127 dgisselq
+       { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
2966 102 dgisselq
+
2967
+
2968
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
2969
+ * for an instruction operand X. */
2970
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
2971
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
2972
+
2973
+/* Passing arguments in registers */
2974
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
2975
+
2976
+/* Define how to find the value returned by a function.  VALTYPE is the data
2977
+ * type of the value (as a tree).  If the precise function being called is known
2978
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
2979
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
2980
+
2981
+/* Define how to find the value returned by a library function assuming the
2982
+ * value has mode MODE.
2983
+ */
2984
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
2985
+
2986
+
2987
+/* STACK AND CALLING */
2988
+
2989
+
2990
+/* Define this macro as a C expression that is nonzero for registers that are
2991
+ * used by the epilogue or the return pattern.  The stack and frame pointer
2992
+ * registers are already assumed to be used as needed.
2993
+ */
2994
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
2995
+
2996
+
2997
+/* The best alignment to use in cases where we have a choice. */
2998 127 dgisselq
+#define        FASTEST_ALIGNMENT       BITS_PER_WORD
2999 102 dgisselq
+
3000
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3001
+ * largest integer machine mode that should actually be used.  All integer
3002
+ * machine modes of this size and smaller can be used for structures and unions
3003
+ * with the appropriate sizes.  If this macro is undefined,
3004
+ * GET_MODE_BITSIZE(DImode) is assumed.
3005
+ *
3006
+ * ZipCPU -- The default looks good enough for us.
3007
+ */
3008
+
3009
+/* Generate Code for Profiling
3010
+ */
3011
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3012
+
3013
+
3014
+/* A C expression which is nonzero if register number NUM is suitable for use
3015
+ * as an index register in operand addresses.
3016
+ */
3017
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3018
+
3019
+
3020
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3021
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3022
+ * operand of mode MODE.
3023
+ */
3024 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3025
+// DRIVER_SELF_SPECS
3026
+// OPTION_DEFAULT_SPECS
3027
+// CPP_SPEC
3028
+// CPLUSPLUS_CPP_SPEC
3029
+// CC1_SPEC
3030
+// CC1PLUS_SPEC
3031
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3032
+ * to pass to the assembler.  It can also specify how to translate options you
3033
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3034
+ * 'sun3.h' for an example of this.
3035
+ *
3036
+ * Do not define thismacro if it does not need to do anything.
3037
+ */
3038
+// #undef      ASM_SPEC
3039
+// ASM_FINAL_SPEC
3040
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3041
+
3042
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3043
+ * to pass to the linker.  It can also specify how to translate options you give
3044
+ * to GCC into options for GCC to pass to the linker.
3045
+ *
3046
+ * Do not define this macro if it does not need to do anything.
3047
+ */
3048
+
3049
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3050
+ * difference between the two is that LIB_SPEC is used at the end of the
3051
+ * command given to the linker.
3052
+ *
3053
+ * If this macro is not defined, a default is provided that loads the standard
3054
+ * C library from the usual place.  See 'gcc.c'.
3055
+ */
3056
+#undef LIB_SPEC
3057
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3058
+#define        LIB_SPEC        ""
3059
+
3060
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3061
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3062
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3063
+ *
3064
+ * If this macro is not defined, the GCC driver provides a default that passes
3065
+ * the string '-lgcc' to the linker.
3066
+ */
3067
+#undef LIBGCC_SPEC
3068
+#define        LIBGCC_SPEC     ""
3069
+
3070
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3071
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3072
+ * modified to refer to different versions of 'libgcc.a' depending on the
3073
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3074
+ * and '-shared-libgcc'.  On targets where these modifications are
3075
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3076
+ * driver how to place a reference to 'libgcc' on the link command line, but
3077
+ * unlike LIBGCC_SPEC, it is used unmodified.
3078
+ */
3079
+#define        REAL_LIBGCC_SPEC        ""
3080
+
3081
+// USE_LD_AS_NEEDED
3082
+// LINK_EH_SPEC
3083
+
3084
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3085
+ * difference between the two is that STARTFILE_SPEC is used at the very
3086
+ * beginning of the command given to the linker.
3087
+ *
3088
+ * If this macro is not defined, a default is provided that loads the standard
3089
+ * C startup file from the usual place.  See 'gcc.c'
3090
+ */
3091
+#undef STARTFILE_SPEC
3092
+#define        STARTFILE_SPEC  ""
3093
+
3094
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3095
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3096
+ * of the command given to the linker.
3097
+ *
3098
+ * Do not define this macro if it does not do anything.
3099
+ */
3100
+// #undef      ENDFILE_SPEC
3101
+// #define     ENDFILE_SPEC    ""
3102
+
3103
+// THREAD_MODEL_SPEC
3104
+// SYSROOT_SUFFIX_SPEC
3105
+// SYSROOT_HEADERS_SUFFIX_SPEC
3106
+// EXTRA_SPECS
3107
+// LINK_LIBGCC_SPECIAL_1
3108
+// LINK_GCC_C_SEQUENCE_SPEC
3109
+// LINK_COMMAND_SPEC
3110
+// TARGET_ALWAYS_STRIP_DOTDOT
3111
+// MULTILIB_DEFAULTS
3112
+// RELATIVE_PREFIX_NOT_LINKDIR
3113
+// MD_EXEC_PREFIX
3114
+// STANDARD_STARTFILE_PREFIX
3115
+// STANDARD_STARTFILE_PREFIX_1
3116
+// STANDARD_STARTFILE_PREFIX_2
3117
+// MD_STARTFILE_PREFIX
3118
+// MD_STARTFILE_PREFIX_1
3119
+// INIT_ENVIRONMENT
3120
+// LOCAL_INCLUDE_DIR
3121
+#undef LOCAL_INCLUDE_DIR
3122
+
3123
+// NATIVE_SYSTEM_HEADER_COMPONENT
3124
+// INCLUDE_DEFAULTS
3125
+
3126 102 dgisselq
+/* 17.03 Run-time Target Specification */
3127
+
3128
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3129
+ * code that defines built-in preprocessor macros and assertions for the target
3130
+ * CPU, using the functions builtin_define, builtin_define_std, and
3131
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3132
+ * semicolon, and since it has finished command line option proccessing your
3133
+ * code can use those results freely.
3134
+ *
3135
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3136
+ * command line parameters we've been given indicate that our CPU has.  That
3137
+ * way, code can be adjusted depending upon the CPU's capabilities.
3138
+ */
3139
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3140
+       { builtin_define("__ZIPCPU__");                 \
3141
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3142
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3143
+       }
3144
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3145
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3146
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3147
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3148
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3149
+       // If (we support int64s) builtin_define("___int64_t_defined");
3150
+
3151
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3152
+ * macro is optional and is used for the target operating system instead.
3153
+ */
3154
+
3155
+/* Option macros: (we need to define these eventually ... )
3156
+ *
3157
+ *     TARGET_HANDLE_OPTION
3158
+ *     TARGET_HANDLE_C_OPTION
3159
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3160
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3161
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3162
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3163
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3164
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3165
+ *     C_COMMON_OVERRIDE_OTPTIONS
3166
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3167
+ *     TARGET_OPTION_INIT_STRUCT
3168
+ *     TARGET_OPTION_DEFAULT_PARAMS
3169
+ */
3170
+
3171
+/* SWITCHABLE_TARGET
3172
+ *
3173
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3174
+ * here.
3175
+ */
3176
+
3177
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3178
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3179
+ * otherwise.  This is intended to relate to the float and double types, but not
3180
+ * necessarily "long double".  By default, returns true if the adddf3
3181
+ * instruction pattern is available and false otherwise, on the assumption that
3182
+ * hardware floating point supports exceptions and rounding modes but software
3183
+ * floating point does not.
3184
+ *
3185
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3186
+ * support all of these bells and whistles when full functionality is even
3187
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3188
+ * set this to zero, so let's come back to this.
3189
+ */
3190
+// #warning "Wrong answer encoded to date"
3191 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3192 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3193
+
3194
+/* 17.04 Defining data structures for per-function information */
3195
+
3196
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3197
+ * information.  This macro is called once per function, before generation of
3198
+ * any RTL has begun.  The intention is to allow the initialization of the
3199
+ * function pointer init_machine_status.
3200
+ */
3201
+// #warning "I may need to define this to handle function return addresses ..."
3202
+
3203
+/* 17.05 Storage Layout */
3204
+
3205
+/* Storage Layout */
3206
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3207
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3208
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3209
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3210
+#define        BITS_PER_WORD           32
3211
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3212
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3213
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3214
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3215
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3216
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3217
+ * default is BITS_PER_WORD.
3218
+ *
3219
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3220
+ */
3221
+#define        POINTER_SIZE            32      // Ptr width in bits
3222
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3223
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3224
+ * than zero if pointers should be zero-extended, zero if they should be sign
3225
+ * extended, and negative if some other conversion is needed.  In the last case,
3226
+ * the extension is done by the target's ptr_extend instruction.
3227
+ *
3228
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3229
+ * the same width.
3230
+ *
3231
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3232
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3233
+ * two.  Hence, we specify how we would do that here.
3234
+ */
3235 127 dgisselq
+#define        POINTERS_EXTEND_UNSIGNED        1
3236 102 dgisselq
+
3237
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3238
+ * object whose type is type and which has he specified mode and signedness is
3239
+ * to be stored in a register.  This macro is only called when type is a scalar
3240
+ * type.
3241
+ *
3242
+ * On most RISC machines, which only have operations that operate on a full
3243
+ * register, define this macro to set m to word_mode if m is an integer mode
3244
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3245
+ * widened because wider precision floating-point operations are usually more
3246
+ * expensive than their narrower counterparts.
3247
+ *
3248
+ * For most machines, the macro definition does not change unsigndep.  However,
3249
+ * some machines, have instructions that preferentially handle either signed or
3250
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3251
+ * loads from memory and 32-bit add instructions sign-extend the result to
3252
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3253
+ * is more efficient.
3254
+ *
3255
+ * Do not define this macro if it would never modify m.
3256
+ *
3257
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3258
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3259
+ */
3260
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3261
+
3262
+// TARGET_PROMOTE_FUNCTION_MODE
3263
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3264
+ * stack, in bits.  All stack parameters receive at least this much alignment
3265
+ * regardless of data type.  On most machines, this is the same as the size of
3266
+ * an integer.
3267
+ */
3268
+#define        PARM_BOUNDARY   32
3269
+
3270
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3271
+ * hardware for the stack pointer on this machine.  The definition is a C
3272
+ * expression for the desired alignment (measured in bits).  This value is used
3273
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3274
+ * this should be the same as PARM_BOUNDARY.
3275
+ */
3276
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3277
+
3278
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3279 127 dgisselq
+#define        PREFERRED_STACK_BOUNDARY        STACK_BOUNDARY
3280 102 dgisselq
+
3281 127 dgisselq
+/* INCOMING_STACK_BOUNDARY ... Define this macro if the incoming stack boundary
3282
+ * may be different from PREFERRED_STACK_BOUNDARY.  This macro must evaluate
3283
+ * to a value equal to or larger than STACK_BOUNDARY.
3284 102 dgisselq
+ */
3285 127 dgisselq
+#define        INCOMING_STACK_BOUNDARY STACK_BOUNDARY
3286 102 dgisselq
+
3287
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3288
+ */
3289
+#define        FUNCTION_BOUNDARY       32
3290
+
3291
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3292
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3293
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3294
+ */
3295
+#define BIGGEST_ALIGNMENT      32
3296
+
3297 127 dgisselq
+/* MALLOC_ABI_ALIGNMENT
3298
+ */
3299
+
3300
+/* ATTRIBUTE_ALIGNED_VALUE
3301
+ */
3302
+
3303 102 dgisselq
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3304
+ * given to an object that can be referenced in one operation, without
3305
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3306
+ * larger on machines that don't have byte or halfword store operations.
3307
+ */
3308
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3309
+
3310 127 dgisselq
+/* BIGGEST_FIELD_ALIGNMENT ... Biggest alignment that any structure or union
3311
+ * field can require on this machine, in bits.  If defined, this overrides
3312
+ * BIGGEST_ALIGNMENT for structure and union fields only, unless the field
3313
+ * alignment has been set by the __attribute__((aligned(n))) construct.
3314
+ */
3315
+#define        BIGGEST_FIELD_ALIGNMENT BITS_PER_UNIT
3316
+
3317
+/* ADJUST_FIELD_ALIGN
3318
+ */
3319
+#define        ADJUST_FIELD_ALIGN(A,B) BITS_PER_WORD
3320
+
3321
+/* MAX_STACK_ALIGNMENT
3322
+ */
3323
+#define        MAX_STACK_ALIGNMENT     BITS_PER_WORD
3324
+
3325
+/* MAX_OFILE_ALIGNMENT
3326
+ */
3327
+
3328
+/* DATA_ALIGNMENT(TYPE, BASIC-ALIGN) ... If defined, a C expression to compute
3329
+ * the alignment for a variable in the static store.  TYPE is the data type, and
3330
+ * BASIC-ALIGN is the alignment that the object would ordinarily have.  The
3331
+ * value of this macro is used instead of that alignment to align the object.
3332
+ *
3333
+ * If this macro is not defined, then BASIC-ALIGN is used.
3334
+ *
3335
+ * ZipCPU -- in hindsight, if this macro is not defined then the compiler is
3336
+ * broken.  So we define it to be our fastest alignment, or 32-bits.
3337
+ */
3338
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     BITS_PER_WORD
3339
+
3340
+
3341
+/* DATA_ABI_ALIGNMENT(TYPE,BASIC-ALIGN)
3342
+ */
3343
+
3344
+/* CONSTANT_ALIGNMENT(CONST, BASIC-ALIGN) ... If defined, a C expression to
3345
+ * compute the alignment given to a constant that is being placed in memory.
3346
+ * CONST is the constant and BASIC-ALIGN is the alignment that the object
3347
+ * would ordinarily have.  The value of this macro is used instead of that
3348
+ * alignment to align the object.
3349
+ *
3350
+ * If this macro is not defined, then BASIC-ALIGN is used.
3351
+ *
3352
+ * ZipCPU -- in hindsiht, if this macro is not defined then the compiler is
3353
+ * broken.  We'll define it as above.
3354
+ *
3355
+ */
3356
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  BITS_PER_WORD
3357
+
3358
+/* LOCAL_ALIGNMENT(TYPE,BASIC-ALIGN) ... If defined ...
3359
+ */
3360
+#define        LOCAL_ALIGNMENT(TYP,ALIGN)      BITS_PER_WORD
3361
+
3362
+/* TARGET_VECTOR_ALIGNMENT
3363
+ */
3364
+
3365
+/* STACK_SLOT_ALIGNMENT
3366
+ */
3367
+#define        STACK_SLOT_ALIGNMENT(T,M,B)     BITS_PER_WORD
3368
+
3369
+/* LOCAL_DECL_ALIGNMEN(DECL)
3370
+ */
3371
+#define        LOCAL_DECL_ALIGNMENT(DECL)      BITS_PER_WORD
3372
+
3373
+/* MINIMUM_ALIGNMENT
3374
+ */
3375
+#define        MINIMUM_ALIGNMENT(EXP,MOD,ALIGN)        BITS_PER_WORD
3376
+
3377
+/* EMPTY_FIELD_BOUNDARY
3378
+ * Alignment of field after 'int : 0' in a structure.
3379
+ */
3380
+#define        EMPTY_FIELD_BOUNDARY    BITS_PER_WORD
3381
+
3382
+/* STRUCTURE_SIE_BOUNDARY
3383
+ * ZipCPU -- Every structures size must be a multiple of 32-bits.
3384
+ */
3385
+#define        STRUCTURE_SIZE_BOUNDARY BITS_PER_WORD
3386
+
3387 102 dgisselq
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3388
+ * fail to work when given unaligned data.  If instructions will merely go
3389
+ * slower in that case, define this macro as 0.
3390 125 dgisselq
+ *
3391
+ * ZipCPU -- Since we have defined our smallest addressable unit to be a 32-bit
3392
+ * word (one byte, on our machine), and since reading any amount of 32-bit words
3393
+ * is easy, then there really are no instructions that will ever fail.
3394 102 dgisselq
+ */
3395 125 dgisselq
+#define        STRICT_ALIGNMENT        0
3396 102 dgisselq
+
3397 127 dgisselq
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3398
+ * other C compilers handle alignment of bit-fields and the structures that
3399
+ * contain them.
3400
+ *
3401
+ * The behavior is that the type written for a named bit-field (int, short, or
3402
+ * other integer type) imposes an alignment for the entire structure, as if the
3403
+ * structure really did contain an ordinary field of that type.  In addition,
3404
+ * the bit-field is placed within the structure so that it would fit within
3405
+ * such a field, not crossing a boundary for it.
3406
+ *
3407
+ * Thus, no most machines, a named bit-field whose type is written as int would
3408
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3409
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3410
+ * by other alignment parameters.)
3411
+ *
3412
+ * An unnamed bit-field will not affect the alignment of the containing
3413
+ * structure.
3414
+ *
3415
+ * If the macro is defined, its definition should be a C expression, a non
3416
+ * zero value for the expression enables this behavior.
3417
+ * Look at the fundamental type that is used for a bit-field and use that to
3418
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3419
+ * have the same alignment as 'int', not 'char'.
3420
+ */
3421
+#undef PCC_BITFIELD_TYPE_MATTERS
3422
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3423
+
3424 102 dgisselq
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3425
+ * largest integer machine mode that should actually be used.  All integer
3426
+ * machine modes of this size or smaller can be used for structures and unions
3427
+ * with the appropriate sizes.  If this macro is undefined,
3428
+ * GET_MODE_BITSIZE(DImode) is assumed.
3429
+ *
3430
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3431
+ * size on bits of the largest integer machine mode.  However, that's the case
3432
+ * with most DI implementations: A long is two words, spliced together.  We'd
3433
+ * like to support that eventually, but we need to get there.  Hence, let's use
3434
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3435
+ */
3436
+#if (ZIP_HAS_DI != 0)
3437
+#define        MAX_FIXED_MODE_SIZE     64
3438
+#else
3439
+#define        MAX_FIXED_MODE_SIZE     32
3440
+#endif
3441
+
3442
+
3443
+/* 17.06 Layout of Source Language Data Types */
3444
+
3445
+#undef CHAR_TYPE_SIZE
3446
+#undef SHORT_TYPE_SIZE
3447
+#undef INT_TYPE_SIZE
3448
+#undef LONG_TYPE_SIZE
3449
+#undef LONG_LONG_TYPE_SIZE
3450
+//
3451
+#define        CHAR_TYPE_SIZE  32
3452
+#define        SHORT_TYPE_SIZE 32
3453
+#define        INT_TYPE_SIZE   32
3454
+#define        LONG_TYPE_SIZE  32
3455
+#define        LONG_LONG_TYPE_SIZE     64
3456
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3457
+#undef FLOAT_TYPE_SIZE
3458
+#undef DOUBLE_TYPE_SIZE
3459
+#undef LONG_DOUBLE_TYPE_SIZE
3460
+#define        FLOAT_TYPE_SIZE         32
3461
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3462
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3463
+// SHORT_FRAC_TYPE_SIZE
3464
+// LONG_FFRACT_TYPE_SIZE
3465
+// LONG_LONG_FRACT_TIME_SIZE
3466
+#undef SHORT_ACCUM_TYPE_SIZE
3467
+#undef ACCUM_TYPE_SIZE
3468
+#undef LONG_ACCUM_TYPE_SIZE
3469
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3470
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3471
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3472
+
3473
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3474
+ * hook and should be defined if that hook is overriden to be true.  It causes
3475
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3476
+ * rather than the default __.  A port which uses this macro should also arrange
3477
+ * to use t-gnu-prefix in the libgcc config.host.
3478
+ *
3479
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3480
+ */
3481
+
3482
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3483
+ * in float.h,, assuming, if applicable, that the floating-point control word
3484
+ * is in its default state.  If you do not define this macro the value of
3485
+ * FLT_EVAL_METHOD will be zero.
3486
+ *
3487
+ * ZipCPU --- ???
3488
+ */
3489
+
3490
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3491
+ * floating-point format supported by the hardware.  If you define this macro,
3492
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3493
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3494
+ * default.
3495
+ *
3496
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3497
+ * really needs to be determined, then, based upon a compile time parameter
3498
+ * where the one compiling the code states whether or not the H/W even has
3499
+ * floating point support.
3500
+ *
3501
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3502
+ * need to change this.
3503
+ */
3504
+#undef WIDEST_HARDWARE_FP_SIZE
3505
+// #warning "Definition needs to change if no FPU present"
3506
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3507
+
3508
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3509
+ * whether the type char should be signed or unsigned by default.  The user
3510
+ * can always override this default with the options -fsigned-char and
3511
+ * -funsigned-char.
3512
+ *
3513
+ * ZipCPU--let's go with the default behavior.
3514
+ */
3515
+#define        DEFAULT_SIGNED_CHAR     1
3516
+
3517
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3518 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3519 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3520
+ * false if all enum types should be allocated like int.
3521
+ *
3522
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3523
+ * override it.
3524
+ */
3525
+
3526
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3527
+ * type to use for size values.  The typedef name size_t is defined using the
3528
+ * contents of the string.
3529
+ *
3530
+ * If you don't define this macro, the default is "long unsigned int".  Since
3531
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3532
+ * the default seems perfect for us.
3533
+ */
3534
+#define        SIZE_TYPE       "unsigned int"
3535
+
3536
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3537
+ * This macro is a C expression for a string describing the name of the data
3538
+ * type from which the precision of sizetype is extracted.  The string has the
3539
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3540
+ * default is SIZE_TYPE --- which seems good enough for us.
3541
+ */
3542
+
3543
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3544 127 dgisselq
+ * type to use for the result of subtracting two pointers.  The typedef name
3545 102 dgisselq
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3546
+ * more information.
3547
+ *
3548
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3549
+ * for us.
3550
+ */
3551
+#define        PTRDIFF_TYPE    "int"
3552
+
3553
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3554
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3555
+ * the contents of  the string.  If you don't define this macro, the default is
3556
+ * 'int'--good enough for ZipCPU.
3557
+ */
3558
+
3559
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3560
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3561
+ */
3562
+#undef WCHAR_TYPE_SIZE
3563
+#define        WCHAR_TYPE_SIZE 32
3564
+
3565
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3566
+ * type to use for wide characters passed to printf and returned from getwc.
3567
+ * The typedef name wint_t is defined using the contents of the string.  See
3568
+ *
3569 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3570
+ * best for us again.
3571 102 dgisselq
+ */
3572
+
3573
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3574
+ * data type that can represent any value of any standard or extended signed
3575
+ * integer type.  The typedef name intmax_t is defined using the contents of
3576
+ * the string.
3577
+ *
3578
+ * If you don't define this macro, the default is the first of "int", "long int"
3579
+ * or "long long int" that has as much precision as "long long int".
3580
+ */
3581
+
3582
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3583
+ */
3584
+
3585
+#undef SIG_ATOMIC_TYPE
3586
+#if (ZIP_ATOMIC != 0)
3587
+#define        SIG_ATOMIC_TYPE "int"
3588
+#else
3589
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3590
+#endif
3591
+#undef INT8_TYPE
3592
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3593
+#undef INT16_TYPE
3594
+#define        INT16_TYPE              NULL
3595
+#undef INT32_TYPE
3596
+#define        INT32_TYPE              "int"
3597
+#undef UINT8_TYPE
3598
+#define        UINT8_TYPE              NULL
3599
+#undef UINT16_TYPE
3600
+#define        UINT16_TYPE             NULL
3601
+#undef UINT32_TYPE
3602
+#define        UINT32_TYPE             "unsigned int"
3603
+#undef INT_LEAST8_TYPE
3604
+#define        INT_LEAST8_TYPE         "int"
3605
+#undef INT_LEAST16_TYPE
3606
+#define        INT_LEAST16_TYPE        "int"
3607
+#undef INT_LEAST32_TYPE
3608
+#define        INT_LEAST32_TYPE        "int"
3609
+#undef UINT_LEAST8_TYPE
3610
+#define        UINT_LEAST8_TYPE        "unsigned int"
3611
+#undef UINT_LEAST16_TYPE
3612
+#define        UINT_LEAST16_TYPE       "unsigned int"
3613
+#undef UINT_LEAST32_TYPE
3614
+#define        UINT_LEAST32_TYPE       "unsigned int"
3615
+#undef INT_FAST8_TYPE
3616
+#define        INT_FAST8_TYPE          "int"
3617
+#undef INT_FAST16_TYPE
3618
+#define        INT_FAST16_TYPE         "int"
3619
+#undef INT_FAST32_TYPE
3620
+#define        INT_FAST32_TYPE         "int"
3621
+#undef UINT_FAST8_TYPE
3622
+#define        UINT_FAST8_TYPE         "unsigned int"
3623
+#undef UINT_FAST16_TYPE
3624
+#define        UINT_FAST16_TYPE        "unsigned int"
3625
+#undef UINT_FAST32_TYPE
3626
+#define        UINT_FAST32_TYPE        "unsigned int"
3627
+#undef INTPTR_TYPE
3628
+#define        INTPTR_TYPE             "unsigned int"
3629
+#undef UINTPTR_TYPE
3630
+#define        UINTPTR_TYPE            "unsigned int"
3631
+
3632
+#undef INT64_TYPE
3633
+#undef UINT64_TYPE
3634
+#undef INT_LEAST64_TYPE
3635
+#undef UINT_LEAST64_TYPE
3636
+#undef INT_FAST64_TYPE
3637
+#undef UINT_FAST64_TYPE
3638
+
3639
+#if (ZIP_HAS_DI != 0)
3640
+#define        INT64_TYPE              "long int"
3641
+#define        UINT64_TYPE             "long unsigned int"
3642
+#define        INT_LEAST64_TYPE        "long int"
3643
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3644
+#define        INT_FAST64_TYPE         "long int"
3645
+#define        UINT_FAST64_TYPE        "long unsigned int"
3646
+#else
3647
+#define        INT64_TYPE              NULL
3648
+#define        UINT64_TYPE             NULL
3649
+#define        INT_LEAST64_TYPE        NULL
3650
+#define        UINT_LEAST64_TYPE       NULL
3651
+#define        INT_FAST64_TYPE         NULL
3652
+#define        UINT_FAST64_TYPE        NULL
3653
+#endif
3654
+
3655
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3656
+
3657
+
3658
+/* 17.07 Register Usage / Register definitions */
3659
+
3660
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3661
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3662
+ * pseudo register's numbrer really is assigned the number
3663
+ * FIRST_PSEUDO_REGISTER.
3664
+ *
3665
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3666 171 dgisselq
+ * and PC register being numbered 14 and 15 respectively.  The ZipCPU has
3667
+ * another 16 registers, identical to the first, but user mode registers.  These
3668
+ * are number the same as the first (0-15) in user mode, but numbered (16-31)
3669
+ * in supervisor mode.  In addition, we create a pretend argument pointer
3670
+ * register, zip_AP_PSEUDO, to refer to our arguments.  This final register,
3671
+ * although it gets a valid number, will be eliminated in optimization.
3672 102 dgisselq
+ */
3673 171 dgisselq
+#define        FIRST_PSEUDO_REGISTER   (zip_AP_PSEUDO+1)
3674 102 dgisselq
+
3675
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3676
+ * fixed purposes all throughout the compiled code and are therefore not
3677
+ * available for general allocation.  These would include the stack pointer, the
3678
+ * frame pointer (except on machines where that can be used as a general
3679
+ * register when no frame pointer is needed), the program counter on machines
3680
+ * where that is considered one of the addressable registers, and any other
3681
+ * numbered register with a standard use.
3682
+ *
3683
+ * This information is expressed as a sequence of numbers, separated by commas,
3684
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3685
+ * otherwise.
3686
+ *
3687
+ * For the Zip CPU, we have three fixed registers that are not available for
3688
+ * general allocation:
3689
+ *
3690
+ *     SP      The stack pointer
3691
+ *     CC      The condition codes and CPU state register
3692
+ *     PC      The program counter
3693
+ *
3694
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3695
+ * table pointer) are registers that we hope will not be so fixed.
3696 171 dgisselq
+ *
3697
+ * Okay, just updated this process.  We now have more registers that are not
3698
+ * available for general allocation:
3699
+ *     uR0-uPC         User registers
3700
+ *     PSEUDO-AP       The pseudo arg pointer
3701 102 dgisselq
+ */
3702 171 dgisselq
+#define        FIXED_REGISTERS         { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1 }
3703 102 dgisselq
+
3704
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3705
+ * that is clobbered (in general) by function calls as well as for fixed
3706
+ * registers.  This macro therefore identifies the registers that are not
3707
+ * available for general allocation of values that must live across function
3708
+ * calls.
3709
+ *
3710
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3711
+ * it on function entry and restores it on function exit, if the register is
3712
+ * used within the function.
3713
+ *
3714
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3715
+ * register above R5.
3716
+ */
3717 171 dgisselq
+#define        CALL_USED_REGISTERS     { 0,1,1,1, 1,0,0,0, 0,0,0,0, 0,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  1 }
3718 102 dgisselq
+
3719
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3720
+ * to the value of CALL_USED_REGISTERS.
3721
+ */
3722
+
3723
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3724
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3725
+ * across a call without some part of it being clobbbered.  For most machines,
3726
+ * this macro need not be defined.  It is only required for machines that do
3727 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3728 102 dgisselq
+ *
3729 127 dgisselq
+ * ZipCPU--Always preserves the entire contents of those registers that are
3730
+ * preserved across calls, so this shouldnt need to be defined.
3731 102 dgisselq
+ */
3732 127 dgisselq
+// #define     HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3733 102 dgisselq
+
3734
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3735
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3736
+ * reg_class_contents, to take into account any dependence of these register
3737
+ * sets on target flags.  The first three of these are of type char[]
3738
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3739
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3740
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3741
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3742
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3743
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3744
+ * applied.
3745
+ *
3746 171 dgisselq
+ * ZipCPU -- I may need to return and define this depending upon how the
3747
+ * GBL register allocation goes.  But for now, we'll leave this at its default
3748 102 dgisselq
+ * value.
3749
+ */
3750
+// #warning "Revisit me after FP and GBL allocation"
3751
+
3752
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3753
+ * windows. ...
3754
+ *
3755
+ * Zip CPU has no register windows.
3756
+ */
3757
+
3758
+/* OUTGOING_REGNO ... same thing.
3759 171 dgisselq
+ * LOCAL_REGNO ... same thing.
3760 102 dgisselq
+ */
3761
+
3762
+/* PC_REGNUM ... If the program counter has a register number, define this as
3763
+ * that register number.  Otherwise do not define it.
3764
+ */
3765
+#define        PC_REGNUM       zip_PC
3766
+
3767
+
3768
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3769
+ * containing the number of hard registers in the order in which GCC should
3770
+ * prefer to use them (from most preferred to least.
3771
+ *
3772 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3773 102 dgisselq
+ * else being equal).
3774
+ *
3775
+ * Since the default is the ZipCPU desired case, we won't define this here.
3776
+ */
3777
+
3778
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3779
+ * this macro, so we won't either.
3780
+ */
3781
+
3782
+/* HONOR_REG_ALLOC_ORDER ...
3783
+ */
3784
+
3785
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3786
+ * this macro, so we won't either.
3787
+ */
3788
+
3789
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3790
+ * consecutive hard registers, starting at register number REGNO, required to
3791
+ * hold a value of mode MODE.
3792
+ *
3793
+ * On a machine where all registers are exactly one word, a suitable definition
3794
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3795
+ *
3796
+ * On ZipCPU, we might do
3797
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3798
+ * but I think the default (above) code should work as well.  Hence, let's stick
3799
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3800
+ * XImode) and expect us to follow them properly some how.
3801
+ *
3802
+ * Okay, now in hind sight, we know that the default doesn't work for our
3803
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3804
+ * this expression to work in bits rather than in bytes and we'll know more
3805
+ * of what we are doing.
3806
+ */
3807
+#undef HARD_REGNO_NREGS
3808
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3809
+               / (UNITS_PER_WORD))
3810
+
3811
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3812
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3813
+ * to take up more space than in registers starting at register number REGNO
3814
+ * (as determined by multiplying GCC's notion of the size of the register when
3815
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3816
+ * By default this is zero.
3817
+ *
3818
+ * Zip CPU --- The default looks good enough to me.
3819
+ */
3820
+
3821
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3822
+ *
3823
+ * ZipCPU ---
3824
+ */
3825
+
3826
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3827
+ * registers that hold values of mode mode is not the word size.  It is a C
3828
+ * expression that should give the natural size in bytes for the specified mode.
3829
+ * It is used by the register allocator to try to optimize its results.
3830
+ *
3831
+ * ZipCPU ---
3832
+ */
3833
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3834
+
3835
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3836 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3837 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3838
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3839
+ * for the numbers of fixed registers, because the allocation mechanism
3840
+ * considered them to be always occupied.
3841
+ *
3842
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3843
+ * suitable default definition mentioned above should be sufficient.
3844
+ */
3845
+#undef HARD_REGNO_MODE_OK
3846 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3847 102 dgisselq
+
3848
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3849
+ * okay to rename a hard register FROM to another hard register TO.  One common
3850
+ * use of this macro is to prevernt renaming of a register to another register
3851
+ * that is not saved by a prologue in an interrupt handler.  The default is
3852
+ * always nonzero.
3853
+ *
3854
+ * ZipCPU --- The default looks good enough to us.
3855
+ */
3856
+#undef HARD_REGNO_RENAME_OK
3857
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
3858
+
3859
+
3860
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
3861
+ * M1 is accessible in mode M2 without copying.
3862
+ *
3863
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
3864
+ * so lets' set to one.
3865
+ */
3866
+#define        MODES_TIEABLE_P(M1,M2)  1
3867
+
3868
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
3869
+ * This target hook should return true if it is OK to use a hard register
3870
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
3871
+ * to prevent using of a register that is not saved by a prologue in an
3872
+ * interrupt handler.  The default version of this hook always returns true.
3873
+ *
3874
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
3875
+ * context, you have an entirely new set of registers (the supervisor set), so
3876
+ * this is a non-issue.
3877
+ */
3878
+
3879
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
3880
+ * copies to/from CCmode register(s).  You should only define this macro if
3881
+ * support for copying to/from CCmode is incomplete.
3882
+ *
3883
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
3884
+ * default definition.
3885
+ */
3886
+
3887
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
3888
+ *
3889
+ * Zip CPU has no stack-like registers, as their definition is different from
3890
+ * the ZipCPU stack pointer register.
3891
+ */
3892
+
3893 127 dgisselq
+// #define     ZIP_REG_BYTE_SIZE       1
3894 102 dgisselq
+
3895
+/* 17.08 Register Classes */
3896
+
3897
+/* enum reg_class ... An enumerate type that must be defined with all the
3898
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
3899
+ * must be the last register class, followed by one more enumerated value,
3900
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
3901
+ * classes there are.
3902
+ *
3903
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
3904
+ * all_regs, and go from there.
3905
+ */
3906
+enum   reg_class {
3907
+       NO_REGS, GENERAL_REGS,
3908
+       USER_REGS,
3909
+       ALL_REGS, LIM_REG_CLASSES
3910
+};
3911
+
3912
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
3913
+ */
3914
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
3915
+
3916
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
3917
+ * classes as C string constants.  These names are used in writing some of the
3918
+ * debugging dumps.
3919
+ */
3920 171 dgisselq
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
3921 102 dgisselq
+
3922
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
3923 127 dgisselq
+ * classes, as integers which are bit masks.  The nth integer specifies the
3924 102 dgisselq
+ * contents of class n.  That way the integer mask is interpreted as that
3925
+ * register r is in the class if (mask&(1<<r)) is 1.
3926
+ *
3927 171 dgisselq
+ * When the machine has more than 32 registers, an integer does not suffice.
3928
+ * Then the integers are replaced by sub-initializers, braced groupings
3929
+ * containing several integers.  Each sub-initializer must be suitable as an
3930
+ * initializer for the type HARD_REG_SET which is defined in 'hard-reg-set.h'.
3931
+ * In this situation, the first integer in each subinitializer corresponds to
3932
+ * registers 0-31, the second integer to registers 32-634, and so on.
3933 102 dgisselq
+ *
3934
+ * ZipCPU --- This is straight forward, three register classes, etc.
3935
+ */
3936 171 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x000000000, 0}, {0x00003fff, 0}, {0x0ffff0000, 0}, {0x0ffffffff, 1} }
3937 102 dgisselq
+
3938
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
3939
+ * containing hard register REGNO.  In general there is more than one such
3940
+ * class;  Choose a class which is minimal, meaning that no smaller class also
3941
+ * contains the register.
3942
+ */
3943 171 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?(((R)<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
3944 102 dgisselq
+
3945
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
3946
+ * a valid base register must belong.  A base register is one used in an address
3947
+ * which is the register value plus a displacement.
3948
+ */
3949
+#undef BASE_REG_CLASS
3950
+#define        BASE_REG_CLASS  GENERAL_REGS
3951
+
3952
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
3953
+ * which allows the selection of a bse register in a mode dependent manner.  If
3954
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
3955
+ */
3956
+#undef MODE_BASE_CLASS
3957
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
3958
+
3959
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
3960
+ * class to which a valid base register must belong in order to be used in a
3961
+ * base plus index register address.  You should define this macro if base plus
3962
+ * index addresses have different requirements than other base register uses.
3963
+ *
3964
+ * Zip CPU does not support the base plus index addressing mode, thus ...
3965
+ */
3966 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
3967
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
3968 102 dgisselq
+
3969
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
3970
+ * which a valid index register must belong.  An index register is one used in
3971
+ * an address where its value is either multiplied by a scale factor or added
3972
+ * to another register (as well as added to a displacement).
3973
+ *
3974
+ * ZipCPU -- Has no index registers.
3975
+ */
3976
+#undef INDEX_REG_CLASS
3977
+#define        INDEX_REG_CLASS NO_REGS
3978
+
3979
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
3980
+ * number num is suitable for use as a base register in operand addresses.
3981
+ */
3982
+#undef REGNO_OK_FOR_BASE_P
3983 127 dgisselq
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM>=FIRST_PSEUDO_REGISTER)||(NUM != zip_CC))
3984 102 dgisselq
+
3985
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
3986
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
3987 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
3988 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
3989
+ *
3990
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
3991
+ */
3992
+
3993
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
3994
+ * addresses, accessing memory in mode mode.
3995
+ *
3996
+ * Use of this macro is deprecated.
3997
+ */
3998
+
3999 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
4000 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
4001
+ * operand addresses, accessing memory in mode M in address space AS.  This is
4002
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
4003
+ * the context in which the register appears in the memory reference.
4004
+ *
4005
+ * ZipCPU---We aren't specific in how we use our registers.
4006
+ */
4007
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
4008
+
4009
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
4010
+ * num is suitable for use as an index register in opernad addressess.  It may
4011
+ * be either a suitable hard register or a pseudo register that has been
4012 111 dgisselq
+ * allocated such as a hard register.
4013 102 dgisselq
+ *
4014
+ * ZipCPU has no index registers, therefore we declare this to be zero.
4015
+ */
4016
+#undef REGNO_OK_FOR_INDEX_P
4017
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
4018
+
4019
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
4020
+ * additional preference on the register class to use when it is necessary to
4021
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
4022
+ * preferred register class is found or hook preferred_rename_class is not
4023
+ * implemented.  SOmething returning a more restrictive class makes better code.
4024
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
4025
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
4026
+ * preferred_rename_class, code size can be reduced.
4027
+ */
4028
+// #undef TARGET_PREFERRED_RENAME_CLASS
4029
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
4030
+
4031
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
4032
+ * restri tions on the register class to use when it is necessary to copy value
4033
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
4034
+ * perhaps a smaller class.
4035
+ *
4036
+ * The default fversion of this hook always returns value of RC argument, which
4037
+ * sounds quite appropriate for the ZipCPU.
4038
+ */
4039
+
4040
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
4041
+ * restrictions on the register class to use when it is necessary to copy
4042
+ * value X into a register in class CLASS.  On many machines, the following
4043
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
4044
+ * Sometimes returning a more restrictive class makes better code.  For example,
4045
+ * on the 68k, when x is an integer constant that is in range for a moveq
4046
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
4047 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
4048 102 dgisselq
+ * 'moveq' will be used.
4049
+ *
4050
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
4051
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
4052
+ * Hence, we only allow loads into the GENERAL_REG class.
4053
+ */
4054
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
4055
+
4056
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
4057
+ * RELOAD_CLASS, but for output instead of input reloads.
4058
+ *
4059
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
4060
+ */
4061
+
4062
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
4063
+ *
4064
+ * Don't define this macro unless the target machine has limitations which
4065
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
4066
+ */
4067
+
4068
+/* TARGET_SECONDARY_RELOAD
4069
+ * SECONDARY_ ...
4070
+ * Don't think we need these ...
4071
+ */
4072
+
4073
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
4074
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
4075
+ *
4076
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
4077
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
4078
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
4079
+ *
4080
+ * This macro helps control the handling of multiple word values in the reload
4081
+ * pass.
4082
+ *
4083
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
4084
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
4085
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
4086
+ */
4087
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
4088
+
4089
+/* CANNOT_CHANGE_MODE_CLASS
4090
+ * ???
4091
+ */
4092
+
4093
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
4094
+ */
4095
+
4096
+/* TARRGET_LRA_P
4097
+ * Default looks good.
4098
+ */
4099
+
4100
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
4101 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
4102 102 dgisselq
+ * number
4103
+ *
4104
+ * The default version of this target hook returns always zero---good enough for
4105
+ * the ZipCPU.
4106
+ */
4107
+
4108
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4109
+ * if we need register usage leveling.  That means if a few hard registers are
4110
+ * equally good for the assignment, we choose the least used hard register.  The
4111
+ * register usage leveling may be profitable for some targets.  Don't use usage
4112
+ * leveling for targets with conditional execution or targets with big register
4113
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4114
+ * version of this target hook returns always false.
4115
+ *
4116
+ * ZipCPU --- Default is the right answer.
4117
+ */
4118
+
4119
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4120
+ * Default looks good.
4121
+ */
4122
+
4123
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4124
+ * Default looks good.
4125
+ */
4126
+
4127
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4128
+ */
4129
+
4130
+/* TARGET_SPILL_CLASS
4131
+ *
4132
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4133
+ * user set of registers.  However, we're not building for that mode (now),
4134
+ * so we'll leave this at the default of NO_REGS.
4135
+ */
4136
+
4137
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4138
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4139
+ * instruction code for the cstore being performed.  Not defining this hook is
4140
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4141
+ * patterns.
4142
+ *
4143
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4144
+ * default therefore.
4145
+ */
4146
+
4147
+/* 17.09 Stack Layout and Calling Conventions */
4148
+
4149
+
4150
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4151
+ * moves the stack pointer to a smaller address, and false otherwise.
4152
+ *
4153
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4154
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4155
+ * is our convention, we'll define it as such.
4156
+ */
4157
+#undef STACK_GROWS_DOWNWARD
4158
+#define        STACK_GROWS_DOWNWARD    1
4159
+
4160
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4161
+ * pushed on the stack.  In RTL, a push operation will be
4162
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4163
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4164
+ * direction and on whether the stack pointer points to the last item on the
4165
+ * stack or whether it points to the space for the next item on the stack.
4166
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4167
+ * always right, and PRE_INC otherwise, which is often wrong.
4168
+ *
4169
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4170
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4171
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4172
+ */
4173
+
4174
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4175
+ * local variable slots are at negative offsets from the frame pointer.
4176
+ *
4177
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4178 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4179 102 dgisselq
+ * this should be the case as well.
4180
+ */
4181
+#undef FRAME_GROWS_DOWNWARD
4182
+#define        FRAME_GROWS_DOWNWARD    1
4183
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4184
+
4185
+
4186
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4187
+ * function occupy decreasing addresses on the stack.
4188
+ *
4189
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4190
+ * it is of no consequence to the hardware.
4191
+ */
4192
+
4193
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4194
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4195 171 dgisselq
+ * offset by subtracting the first slot's length from STARTING_FRAME_OFFSET.
4196 102 dgisselq
+ * Otherwise it is found by adding the length of the first slot to the value
4197
+ * START_FRAME_OFFSET.
4198
+ *
4199
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4200
+ * the code is getting generated.  However, the ECO32 code I am copying from
4201
+ * suggests that 0 is the right value, so we'll use that here.
4202
+ */
4203 171 dgisselq
+// #warning "Re-evaluate me" --- I did.  This still looks good.
4204 102 dgisselq
+#define        STARTING_FRAME_OFFSET   0
4205
+
4206
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4207
+ * stack during reload.  The nonzero default for this macro is suitable for most
4208
+ * ports.
4209
+ *
4210
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4211
+ * shows up on the stack we may need to adjust it.
4212
+ */
4213
+
4214
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4215
+ * which outgoing arguments are placed.  If not specified, the default value
4216
+ * of zero is used.  This is the proper value for most machines.
4217
+ */
4218
+#define        STACK_POINTER_OFFSET    0
4219
+
4220
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4221
+ * argument's address.  On some machines it may depend on the data type of the
4222 171 dgisselq
+ * function.
4223 102 dgisselq
+ */
4224
+#define        FIRST_PARM_OFFSET(F)    0
4225
+
4226
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4227
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4228
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4229
+ * The default is correct for most machines, ...
4230
+ *
4231
+ * ZipCPU --- so we'll use it for the ZipCPU.
4232
+ */
4233
+
4234
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4235
+ * the address of the initial stack frame.  This address is passed to
4236
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4237
+ * a reasonable default value will be used.  Define this macro in order to make
4238
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4239
+ * and __builtin_return_address(C) for (C) not equal to zero.
4240
+ *
4241
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4242
+ */
4243
+
4244
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4245
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4246
+ * example, on the SPARC, we must flush all of the register windows to the stack
4247
+ * before we can access arbitrary stack frames.  You will seldom need to define
4248
+ * this macro.  The default is to do nothing.
4249
+ *
4250
+ * ZipCPU --- which is what we shall do here.
4251
+ */
4252
+
4253
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4254
+ * an RTX that is used to store the address of the current frame into the
4255
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4256
+ * for most machines.  One reason you may need to define this target hook is if
4257
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4258
+ *
4259
+ * ZipCPU --- leave this undefined, since the default value should be correct
4260
+ * for "most" machines.
4261
+ */
4262
+
4263
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4264
+ */
4265
+
4266
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4267
+ * representing the value of the return address for the frame COUNT steps up
4268
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4269
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4270
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4271
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4272
+ * there is no way to determine the return address of other frames.
4273
+ *
4274
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4275
+ */
4276
+#undef RETURN_ADDR_RTX
4277
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4278
+
4279
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4280
+ * return address of a particular stack frame is accessed from the frame pointer
4281
+ * of the previous stack frame.  The zero default for this macro is suitable
4282
+ * for most ports.
4283
+ *
4284
+ * ZipCPU---Default works here as well.
4285
+ */
4286
+
4287
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4288
+ * the location of the incoming return address at the beginning of any function,
4289
+ * before the prologue.  This RTL is either a REG, indicating that the return
4290
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4291
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4292
+ * DWARF_FRAME_REGNUM(REGNO).
4293
+ *
4294
+ * ZipCPU --- While our incoming return address could theoretically be in any
4295
+ * register, our machine description file is going to place it into register
4296
+ * R0, so that's what we return here.
4297
+ */
4298
+#undef INCOMING_RETURN_ADDR_RTX
4299
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4300
+
4301
+
4302
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4303
+ */
4304
+
4305
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4306
+ * register number that is considered to always have the value zero.  This
4307
+ * should only be defined if the target has an architected zero register (ZipCPU
4308
+ * does not), and someone decided it was a good idea to use that register number
4309
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4310
+ * ZipCPU port will avoid it as well).
4311
+ *
4312
+ */
4313
+
4314
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4315
+ */
4316
+
4317 171 dgisselq
+/* INCOMING_FRAME_SP_OFFSET ... A C expression whose value is an integer giving
4318
+ * the offset, in bytes, from the value of the stack pointer register to the
4319
+ * top of the stack frame at the beginning of any function, before the prologue.
4320
+ * The top of the frame is defined to be the value of the stack pointer in the
4321
+ * previous frame, just before the call instruction.
4322
+ *
4323
+ * You only need to define this macro if you want to support call frame
4324
+ * debugging information like that provided by DWARF 2.
4325
+ *
4326
+ * ZipCPU---Our value is zero.
4327 102 dgisselq
+ */
4328
+#define        INCOMING_FRAME_SP_OFFSET        0
4329
+
4330
+/* ARG_POINTER_CFA_OFFSET
4331
+ */
4332
+
4333
+/* FRAME_POINTER_CFA_OFFSET
4334
+ */
4335
+
4336
+/* CFA_FRAME_BASE_OFFSET
4337
+ */
4338
+
4339
+/* 17.09.02 Exception handling support */
4340
+
4341
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
4342
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
4343
+ * N registers are usable.  The exception handling library routines communicate
4344
+ * with the exception handlers via a set of agreed upon registers.  Ideally
4345
+ * these registers should be call clobbered; it is possible to use call-saved
4346
+ * registers, but may negatively impact code size.  The target must support at
4347
+ * least 2 data registers, but should define 4 if their are enough free
4348
+ * registers.
4349
+ *
4350
+ * You must define this macro if you want to support call frame exception
4351
+ * handling like that provided by DWARF 2.
4352
+ */
4353
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
4354
+
4355
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
4356
+ * a location in which to store a stack adjustment to be applied before function
4357
+ * return.  This is used to unwind the stack to an exception handler's call
4358
+ * frame.  It will be assigned zero on code paths that return normally.
4359
+ *
4360
+ * Do not define this macro if the stack pointer is saved and restored by the
4361
+ * regular prolog and epilog code in the call frame itself (which it is for the
4362
+ * ZipCPU); in this case, the exception handling library routines will update
4363
+ * the stack location to be restored in place.  Otherwise, you must define this
4364
+ * macro if you want to support call frame exception handling like that provided
4365
+ * by DWARF 2.
4366
+ *
4367
+ */
4368
+
4369
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
4370
+ * location in which to store the address of an exception handler to which we
4371
+ * should return.  It will not be assigned on code paths that return normally.
4372
+ *
4373
+ * Typcally this is the location in the call frame at which the normal return
4374
+ * address is stored.  For targets that return by popping an address of the
4375
+ * stack, this might be a memory address just below the target callf rame
4376
+ * rather than inside the current call frame.  If defined,
4377
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
4378
+ * to calculate the location of the target call frame.
4379
+ *
4380
+ * If you want to support call frame exception handling, you must define either
4381
+ * this macro or the eh_return instruction pattern.
4382
+ */
4383
+// #warning "I don't know what to do here."
4384
+
4385
+/*
4386
+ *
4387
+ *
4388
+ *
4389
+ *   REST OF SECTION SKIPPED ...
4390
+ *
4391
+ *
4392
+ *
4393
+ */
4394
+
4395
+/* 17.09.03 Specifying how stack checking is done */
4396
+
4397
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
4398
+ * configuration files in a machine-dependent manner.  You should define this
4399
+ * macro if stack checking is required by the ABI of your machine or if you
4400
+ * would like to do stack checking in some more efficient way than the generic
4401
+ * appraoch.  The default value of this macro is zero.
4402
+ *
4403
+ * ZipCPU --- The default makes sense for us.
4404
+ */
4405
+// #define STACK_CHECK_BUILTIN 0
4406
+
4407
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
4408
+ * done by the configuration files in a machine-dependent manner.  You should
4409
+ * define this macro if you would like to do static stack checking in some more
4410
+ * efficient way than the generic approach.  The default value of this macro
4411
+ * is zero.
4412
+ *
4413
+ * ZipCPU --- The default makes sense for us.
4414
+ */
4415
+
4416
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
4417
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
4418
+ * interval.  You will normally define this macro so that the interval is no
4419
+ * larger than the size of the "guard pages" at the end of a stack area.  The
4420
+ * default value of 12 (4096-byte interval) is suitable for most systems.
4421
+ *
4422
+ * ZipCPU --- Default.
4423
+ */
4424
+
4425
+/* STACK_CHECK_MOVING_SP ... An integer which is non-zero if GCC should move
4426
+ * the stack pointer page by page when doing probes.  This can be necessary
4427
+ * on systems where the stack pointer contains the bottom address of the memory
4428
+ * area accessible to the executing thread at any point in time.  In this
4429
+ * situation, an alternate signal stack is required in order to be able to
4430
+ * recover from a stack overflow.  The default value of this macro is zero.
4431
+ *
4432
+ * ZipCPU -- Default.
4433
+ */
4434
+
4435
+/* STACK_CHECK_PROTECT
4436
+ */
4437
+/* STACK_CHECK_MAX_FRAME_SIZE
4438
+ * ... you should normally not change the default value of this macro.
4439
+ */
4440
+/* STACK_CHECK_FIXED_FRAME_SIZE
4441
+ * ... you ... will normally use the default of four words.
4442
+ */
4443
+
4444
+/* STACK_CHECK_MAX_VAR_SIZE
4445
+ * ... you will normally not need to override that default.
4446
+ */
4447
+
4448
+/* 17.09.04 Registers that Address the Stack Frame*/
4449
+
4450
+/* STACK_POINTER_REGNUM ... The register number of the stack pointer register,
4451
+ * which must also be a fixed register according to FIXED_REGISTERS.  On most
4452
+ * machines, the hardware determines which register this is.
4453
+ */
4454
+#undef STACK_POINTER_REGNUM
4455
+#define        STACK_POINTER_REGNUM    zip_SP
4456
+
4457
+/* FRAME_POINTER_REGNUM ... The register number of the frame pointer register,