OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 200

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 117 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
50
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
51
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
52
@@ -108,6 +108,14 @@
53
 #include "tree-chkp.h"
54
 #include "rtl-chkp.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+#include <stdio.h>
58
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
59
+extern void    zip_debug_rtx(const_rtx);
60
+#else
61
+#define        ZIP_DEBUG_LINE(STR,RTX)
62
+#endif
63
+
64
 /* Some systems use __main in a way incompatible with its use in gcc, in these
65
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
66
    give the same symbol without quotes for an alternative entry point.  You
67 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
68
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
69
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
70
@@ -62,6 +62,13 @@
71
 #include "ipa-prop.h"
72
 #include "ipa-inline.h"
73
 
74
+#ifdef DO_ZIP_DEBUGS
75
+extern void zip_debug_rtx(const_rtx);
76
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
77
+#else
78
+#define        ZIP_DEBUG_LINE(STR,RTX)
79
+#endif
80
+
81
 /* Context of record_reference.  */
82
 struct record_reference_ctx
83
 {
84 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
85
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
86
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
87
@@ -0,0 +1,52 @@
88
+////////////////////////////////////////////////////////////////////////////////
89
+//
90
+// Filename:   common/config/zip/zip-common.c
91
+//
92
+// Project:    Zip CPU backend for the GNU Compiler Collection
93
+//
94
+// Purpose:    To eliminate the frame register automatically.
95
+//
96
+// Creator:    Dan Gisselquist, Ph.D.
97
+//             Gisselquist Technology, LLC
98
+//
99
+////////////////////////////////////////////////////////////////////////////////
100
+//
101
+// Copyright (C) 2016, Gisselquist Technology, LLC
102
+//
103
+// This program is free software (firmware): you can redistribute it and/or
104
+// modify it under the terms of  the GNU General Public License as published
105
+// by the Free Software Foundation, either version 3 of the License, or (at
106
+// your option) any later version.
107
+//
108
+// This program is distributed in the hope that it will be useful, but WITHOUT
109
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
110
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
111
+// for more details.
112
+//
113
+// You should have received a copy of the GNU General Public License along
114
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
115
+// target there if the PDF file isn't present.)  If not, see
116
+// <http://www.gnu.org/licenses/> for a copy.
117
+//
118
+// License:    GPL, v3, as defined and found on www.gnu.org,
119
+//             http://www.gnu.org/licenses/gpl.html
120
+//
121
+//
122
+////////////////////////////////////////////////////////////////////////////////
123
+#include "config.h"
124
+#include "system.h"
125
+#include "coretypes.h"
126
+#include "tm.h"
127
+#include "common/common-target.h"
128
+#include "common/common-target-def.h"
129
+
130
+static const struct default_options zip_option_optimization_table[] =
131
+  {
132
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
133
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
134
+  };
135
+
136
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
137
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
138
+
139
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
140
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
141 200 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-11-28 18:14:19.382586425 -0500
142 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
143
@@ -21,7 +21,7 @@
144
 #ifndef GCC_AARCH64_LINUX_H
145
 #define GCC_AARCH64_LINUX_H
146
 
147
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
148
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
149
 
150
 #undef  ASAN_CC1_SPEC
151
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
152
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
153 200 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-11-28 18:14:19.382586425 -0500
154 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
155
@@ -23,8 +23,8 @@
156
 #define EXTRA_SPECS \
157
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
158
 
159
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
160
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
161
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
162
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
163
 #if DEFAULT_LIBC == LIBC_UCLIBC
164
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
165
 #elif DEFAULT_LIBC == LIBC_GLIBC
166
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
167 200 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-11-28 18:14:19.382586425 -0500
168 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
169
@@ -68,8 +68,8 @@
170
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
171
 
172
 #undef  GLIBC_DYNAMIC_LINKER
173
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
174
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
175
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
176
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
177
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
178
 
179
 #define GLIBC_DYNAMIC_LINKER \
180
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
181 200 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-11-28 18:14:19.382586425 -0500
182 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
183
@@ -62,7 +62,7 @@
184
 
185
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
186
 
187
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
188
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
189
 
190
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
191
    %{static:-Bstatic} \
192
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
193 200 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-11-28 18:14:19.382586425 -0500
194 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
195
@@ -45,7 +45,7 @@
196
   %{shared:-G -Bdynamic} \
197
   %{!shared: %{!static: \
198
    %{rdynamic:-export-dynamic} \
199
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
200
+   -dynamic-linker /lib/ld-uClibc.so.0} \
201
    %{static}} -init __init -fini __fini"
202
 
203
 #undef TARGET_SUPPORTS_SYNC_CALLS
204
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
205 200 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-11-28 18:14:19.382586425 -0500
206 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
207
@@ -102,7 +102,7 @@
208
 #undef CRIS_DEFAULT_CPU_VERSION
209
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
210
 
211
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
212
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
213
 
214
 #undef CRIS_LINK_SUBTARGET_SPEC
215
 #define CRIS_LINK_SUBTARGET_SPEC \
216
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
217 200 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-11-28 18:14:19.382586425 -0500
218 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
219
@@ -129,9 +129,9 @@
220
 #endif
221
 
222
 #if FBSD_MAJOR < 6
223
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
224
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
225
 #else
226
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
227
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
228
 #endif
229
 
230
 /* NOTE: The freebsd-spec.h header is included also for various
231
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
232 200 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-11-28 18:14:19.382586425 -0500
233 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
234
@@ -34,7 +34,7 @@
235
 #define ENDFILE_SPEC \
236
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
237
 
238
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
239
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
240
 
241
 #undef LINK_SPEC
242
 #define LINK_SPEC "\
243
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
244 200 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-11-28 18:14:19.382586425 -0500
245 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
246
@@ -22,7 +22,7 @@
247
 #define GNU_USER_LINK_EMULATION "elf_i386"
248
 
249
 #undef GNU_USER_DYNAMIC_LINKER
250
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
251
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
252
 
253
 #undef STARTFILE_SPEC
254
 #if defined HAVE_LD_PIE
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
256 200 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-11-28 18:14:19.386586394 -0500
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
258
@@ -22,6 +22,6 @@
259
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
260
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
261
 
262
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
263
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
264
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
265
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
266
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
267
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
268
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
269 200 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-11-28 18:14:19.386586394 -0500
270 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
271
@@ -19,4 +19,4 @@
272
 <http://www.gnu.org/licenses/>.  */
273
 
274
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
275
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
276
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
277
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
278 200 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-11-28 18:14:19.386586394 -0500
279 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
280
@@ -27,6 +27,6 @@
281
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
282
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
283
 
284
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
285
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
286
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
287
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
288
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
289
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
290
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
291 200 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-11-28 18:14:19.386586394 -0500
292 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
293
@@ -20,4 +20,4 @@
294
 <http://www.gnu.org/licenses/>.  */
295
 
296
 #define GNU_USER_LINK_EMULATION "elf_i386"
297
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
298
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
299
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
300 200 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-11-28 18:14:19.386586394 -0500
301 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
302
@@ -55,7 +55,7 @@
303
 /* Define this for shared library support because it isn't in the main
304
    linux.h file.  */
305
 
306
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
307
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
308
 
309
 #undef LINK_SPEC
310
 #define LINK_SPEC "\
311
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
312 200 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-11-28 18:14:19.386586394 -0500
313 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
314
@@ -32,4 +32,4 @@
315
 
316
 
317
 #undef GNU_USER_DYNAMIC_LINKER
318
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
319
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
320
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
321 200 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-11-28 18:14:19.386586394 -0500
322 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
323
@@ -31,5 +31,4 @@
324
   while (0)
325
 
326
 #undef GNU_USER_DYNAMIC_LINKER
327
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
328
-
329
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
331 200 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-11-28 18:14:19.386586394 -0500
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
333
@@ -73,10 +73,10 @@
334
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
335
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
336
    supporting both 32-bit and 64-bit compilation.  */
337
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
338
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
339
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
340
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
341
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
342
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
343
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
344
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
345
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
346
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
347
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
348
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
349 200 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-11-28 18:14:19.386586394 -0500
350 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
351
@@ -67,7 +67,7 @@
352
    %{shared:-shared} \
353
    %{symbolic:-Bsymbolic} \
354
    %{rdynamic:-export-dynamic} \
355
-   -dynamic-linker /tools/lib/ld-linux.so.2"
356
+   -dynamic-linker /lib/ld-linux.so.2"
357
 
358
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
359
 
360
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
361 200 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-11-28 18:14:19.386586394 -0500
362 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
363
@@ -71,7 +71,7 @@
364
    When the -shared link option is used a final link is not being
365
    done.  */
366
 
367
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
368
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
369
 
370
 #undef LINK_SPEC
371
 #define LINK_SPEC "-m m68kelf %{shared} \
372
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
373 200 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-11-28 18:14:19.386586394 -0500
374 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
375
@@ -28,7 +28,7 @@
376
 #undef TLS_NEEDS_GOT
377
 #define TLS_NEEDS_GOT 1
378
 
379
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
380
+#define DYNAMIC_LINKER "/lib/ld.so.1"
381
 #undef  SUBTARGET_EXTRA_SPECS
382
 #define SUBTARGET_EXTRA_SPECS \
383
   { "dynamic_linker", DYNAMIC_LINKER }
384
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
385 200 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-11-28 18:14:19.386586394 -0500
386 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
387
@@ -22,20 +22,20 @@
388
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
389
 
390
 #define GLIBC_DYNAMIC_LINKER32 \
391
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
392
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
393
 #define GLIBC_DYNAMIC_LINKER64 \
394
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
395
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
396
 #define GLIBC_DYNAMIC_LINKERN32 \
397
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
398
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
399
 
400
 #undef UCLIBC_DYNAMIC_LINKER32
401
 #define UCLIBC_DYNAMIC_LINKER32 \
402
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
403
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
404
 #undef UCLIBC_DYNAMIC_LINKER64
405
 #define UCLIBC_DYNAMIC_LINKER64 \
406
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
407
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
408
 #define UCLIBC_DYNAMIC_LINKERN32 \
409
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
410
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
411
 
412
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
413
 #define GNU_USER_DYNAMIC_LINKERN32 \
414
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
415 200 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-11-28 18:14:19.386586394 -0500
416 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
417
@@ -32,7 +32,7 @@
418
 #undef  ASM_SPEC
419
 #define ASM_SPEC ""
420
 
421
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
422
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
423
 
424
 #undef  LINK_SPEC
425
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
427 200 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-11-28 18:14:19.386586394 -0500
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
429
@@ -37,7 +37,7 @@
430
 /* Define this for shared library support because it isn't in the main
431
    linux.h file.  */
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
435
 
436
 #undef LINK_SPEC
437
 #define LINK_SPEC "\
438
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
439 200 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-11-28 18:14:19.386586394 -0500
440 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
441
@@ -357,14 +357,14 @@
442
 #undef LINK_OS_DEFAULT_SPEC
443
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
444
 
445
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
446
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
447
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
448
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
449
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
450
 #else
451
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
452
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
453
 #endif
454
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
455
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
456
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
457
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
458
 #if DEFAULT_LIBC == LIBC_UCLIBC
459
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
460
 #elif DEFAULT_LIBC == LIBC_GLIBC
461
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
462 200 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-11-28 18:14:19.386586394 -0500
463 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
464
@@ -757,8 +757,8 @@
465
 
466
 #define LINK_START_LINUX_SPEC ""
467
 
468
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
469
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
470
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
471
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
472
 #if DEFAULT_LIBC == LIBC_UCLIBC
473
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
474
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
475
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
476 200 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-11-28 18:14:19.386586394 -0500
477 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
478
@@ -60,8 +60,8 @@
479
 #define MULTILIB_DEFAULTS { "m31" }
480
 #endif
481
 
482
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
483
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
484
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
485
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
486
 
487
 #undef  LINK_SPEC
488
 #define LINK_SPEC \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
490 200 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-11-28 18:14:19.386586394 -0500
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
492
@@ -43,7 +43,7 @@
493
 
494
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef SUBTARGET_LINK_EMUL_SUFFIX
500
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
502 200 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-11-28 18:14:19.386586394 -0500
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
504
@@ -84,8 +84,8 @@
505
    When the -shared link option is used a final link is not being
506
    done.  */
507
 
508
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
509
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
510
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
511
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
512
 
513
 #ifdef SPARC_BI_ARCH
514
 
515
@@ -193,7 +193,7 @@
516
 #else /* !SPARC_BI_ARCH */
517
 
518
 #undef LINK_SPEC
519
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
520
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
521
   %{!shared: \
522
     %{!static: \
523
       %{rdynamic:-export-dynamic} \
524
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
525 200 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-11-28 18:14:19.386586394 -0500
526 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
527
@@ -83,7 +83,7 @@
528
    When the -shared link option is used a final link is not being
529
    done.  */
530
 
531
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
532
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
533
 
534
 #undef  LINK_SPEC
535
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
536
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
537 200 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-11-28 18:14:19.386586394 -0500
538 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
539
@@ -41,7 +41,7 @@
540
   %{!shared: \
541
     %{!static: \
542
       %{rdynamic:-export-dynamic} \
543
-      -dynamic-linker /tools/lib/ld.so.1} \
544
+      -dynamic-linker /lib/ld.so.1} \
545
     %{static:-static}}"
546
 
547
 #undef  WCHAR_TYPE
548
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
549 200 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-11-28 18:14:19.386586394 -0500
550 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
551
@@ -44,7 +44,7 @@
552
   %{mlongcalls:--longcalls} \
553
   %{mno-longcalls:--no-longcalls}"
554
 
555
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
556
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
557
 
558
 #undef LINK_SPEC
559
 #define LINK_SPEC \
560
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
561
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
562
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
563
@@ -0,0 +1,82 @@
564
+////////////////////////////////////////////////////////////////////////////////
565
+//
566
+// Filename:   netbsd.h
567
+//
568
+// Project:    Zip CPU backend for the GNU Compiler Collection
569
+//
570
+// Purpose:
571
+//
572
+// Creator:    Dan Gisselquist, Ph.D.
573
+//             Gisselquist Technology, LLC
574
+//
575
+////////////////////////////////////////////////////////////////////////////////
576
+//
577
+// Copyright (C) 2016, Gisselquist Technology, LLC
578
+//
579
+// This program is free software (firmware): you can redistribute it and/or
580
+// modify it under the terms of  the GNU General Public License as published
581
+// by the Free Software Foundation, either version 3 of the License, or (at
582
+// your option) any later version.
583
+//
584
+// This program is distributed in the hope that it will be useful, but WITHOUT
585
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
586
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
587
+// for more details.
588
+//
589
+// You should have received a copy of the GNU General Public License along
590
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
591
+// target there if the PDF file isn't present.)  If not, see
592
+// <http://www.gnu.org/licenses/> for a copy.
593
+//
594
+// License:    GPL, v3, as defined and found on www.gnu.org,
595
+//             http://www.gnu.org/licenses/gpl.html
596
+//
597
+//
598
+////////////////////////////////////////////////////////////////////////////////
599
+#ifndef        ZIP_NETBSD_H
600
+#define        ZIP_NETBSD_H
601
+
602
+/* Define default target values. */
603
+
604
+#undef MACHINE_TYPE
605
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
606
+
607
+#undef TARGET_OS_CPP_BUILTINS
608
+#define        TARGET_OS_CPP_BUILTINS()        \
609
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
610
+       builtin_define("__ZIPCPU__");                   \
611
+       builtin_assert("cpu=zip");                      \
612
+       builtin_assert("machine=zip");                  \
613
+       } while(0);
614
+
615
+#undef CPP_SPEC
616
+#define        CPP_SPEC        NETBSD_CPP_SPEC
617
+
618
+#undef STARTFILE_SPEC
619
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
620
+
621
+#undef ENDFILE_SPEC
622
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
623
+
624
+#undef LIB_SPEC
625
+#define        LIB_SPEC        NETBSD_LIB_SPEC
626
+
627
+#undef TARGET_VERSION
628
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
629
+
630
+/* Make gcc agree with <machine/ansi.h> */
631
+
632
+#undef WCHAR_TYPE
633
+#define        WCHAR_TYPE      "int"
634
+
635
+#undef WCHAR_TYPE_SIZE
636
+#define        WCHAR_TYPE_SIZE 32
637
+
638
+#undef WINT_TYPE
639
+#define        WINT_TYPE       "int"
640
+
641
+/* Clean up after the generic Zip/ELF configuration. */
642
+#undef MD_EXEC_PREFIX
643
+#undef MD_STARTFILE_PREFIX
644
+
645
+#endif /* ZIP_NETBSD_H */
646 171 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/notes.txt gcc-5.3.0-zip/gcc/config/zip/notes.txt
647
--- gcc-5.3.0-original/gcc/config/zip/notes.txt 1969-12-31 19:00:00.000000000 -0500
648
+++ gcc-5.3.0-zip/gcc/config/zip/notes.txt      2016-08-17 23:00:25.714139174 -0400
649
@@ -0,0 +1,6 @@
650
+signum:
651
+       CMP       0,%1
652
+       LDILO.GT  1,%1
653
+       LDILO.LT -1,%1
654
+
655
+
656 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
657
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
658
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
659
@@ -0,0 +1,47 @@
660
+################################################################################
661
+##
662
+## Filename:   t-zip
663
+##
664
+## Project:    Zip CPU backend for the GNU Compiler Collection
665
+##
666
+## Purpose:
667
+##
668
+## Creator:    Dan Gisselquist, Ph.D.
669
+##             Gisselquist Technology, LLC
670
+##
671
+################################################################################
672
+##
673
+## Copyright (C) 2016, Gisselquist Technology, LLC
674
+##
675
+## This program is free software (firmware): you can redistribute it and/or
676
+## modify it under the terms of  the GNU General Public License as published
677
+## by the Free Software Foundation, either version 3 of the License, or (at
678
+## your option) any later version.
679
+##
680
+## This program is distributed in the hope that it will be useful, but WITHOUT
681
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
682
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
683
+## for more details.
684
+##
685
+## You should have received a copy of the GNU General Public License along
686
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
687
+## target there if the PDF file isn't present.)  If not, see
688
+## <http://www.gnu.org/licenses/> for a copy.
689
+##
690
+## License:    GPL, v3, as defined and found on www.gnu.org,
691
+##             http://www.gnu.org/licenses/gpl.html
692
+##
693
+##
694
+################################################################################
695
+
696
+FPBIT = fp-bit.c
697
+DPBIT = dp-bit.c
698
+
699
+# dp-bit.c: $(srcdir)/config/fp-bit.c
700
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
701
+#
702
+# fp-bit.c: $(srcdir)/config/fp-bit.c
703
+       # echo '#define FLOAT" > fp-bit.c
704
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
705
+
706
+
707
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
708
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
709 200 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-11-19 08:28:56.703678695 -0500
710
@@ -0,0 +1,2293 @@
711 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
712
+//
713
+// Filename:   zip.c
714
+//
715
+// Project:    Zip CPU backend for the GNU Compiler Collection
716
+//
717
+// Purpose:
718
+//
719
+// Creator:    Dan Gisselquist, Ph.D.
720
+//             Gisselquist Technology, LLC
721
+//
722
+////////////////////////////////////////////////////////////////////////////////
723
+//
724
+// Copyright (C) 2016, Gisselquist Technology, LLC
725
+//
726
+// This program is free software (firmware): you can redistribute it and/or
727
+// modify it under the terms of  the GNU General Public License as published
728
+// by the Free Software Foundation, either version 3 of the License, or (at
729
+// your option) any later version.
730
+//
731
+// This program is distributed in the hope that it will be useful, but WITHOUT
732
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
733
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
734
+// for more details.
735
+//
736
+// You should have received a copy of the GNU General Public License along
737
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
738
+// target there if the PDF file isn't present.)  If not, see
739
+// <http://www.gnu.org/licenses/> for a copy.
740
+//
741
+// License:    GPL, v3, as defined and found on www.gnu.org,
742
+//             http://www.gnu.org/licenses/gpl.html
743
+//
744
+//
745
+////////////////////////////////////////////////////////////////////////////////
746
+#include "config.h"
747
+#include "system.h"
748
+#include "coretypes.h"
749
+#include "tm.h"
750
+#include "rtl.h"
751
+#include "dominance.h"
752
+#include "cfg.h"
753
+#include "cfgrtl.h"
754
+#include "cfganal.h"
755
+#include "lcm.h"
756
+#include "cfgbuild.h"
757
+#include "cfgcleanup.h"
758
+#include "predict.h"
759
+#include "basic-block.h"
760
+#include "df.h"
761
+#include "hashtab.h"
762
+#include "hash-set.h"
763
+#include "machmode.h"
764
+#include "symtab.h"
765
+#include "rtlhash.h"
766
+#include "tree.h"
767
+#include "regs.h"
768
+#include "hard-reg-set.h"
769
+#include "real.h"
770
+#include "insn-config.h"
771
+#include "conditions.h"
772
+#include "output.h"
773
+#include "insn-attr.h"
774
+#include "flags.h"
775
+#include "expr.h"
776
+#include "function.h"
777
+#include "recog.h"
778
+#include "toplev.h"
779
+#include "ggc.h"
780
+#include "builtins.h"
781
+#include "calls.h"
782
+#include "langhooks.h"
783
+#include "optabs.h"
784
+#include "explow.h"
785
+#include "emit-rtl.h"
786 122 dgisselq
+#include "ifcvt.h"
787 102 dgisselq
+
788
+// #include "tmp_p.h"
789
+#include "target.h"
790
+#include "target-def.h"
791
+// #include "tm-constrs.h"
792 122 dgisselq
+#include "tm-preds.h"
793 102 dgisselq
+
794
+#include "diagnostic.h"
795
+// #include "integrate.h"
796
+
797 200 dgisselq
+#include "zip-protos.h"
798
+
799 102 dgisselq
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
800
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
801
+static bool    zip_return_in_memory(const_tree, const_tree);
802
+static bool    zip_frame_pointer_required(void);
803
+
804
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
805
+               const_tree type, bool named);
806
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
807
+
808
+static void    zip_asm_trampoline_template(FILE *);
809
+static void    zip_trampoline_init(rtx, tree, rtx);
810
+static void    zip_init_builtins(void);
811
+static tree zip_builtin_decl(unsigned, bool);
812
+// static void zip_asm_output_anchor(rtx x);
813
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
814
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
815
+                       enum machine_mode tmode, int    ignore);
816
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
817
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
818
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
819
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
820
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
821 122 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x20000;
822
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1ffff;
823 142 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x2000;
824
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1fff;
825 102 dgisselq
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
826
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
827
+static int     zip_sched_issue_rate(void) { return 1; }
828
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
829
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
830
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
831
+       void    zip_debug_rtx(const_rtx x);
832
+static void    zip_override_options(void);
833
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
834
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
835 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
836 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void);
837 122 dgisselq
+#ifdef HAVE_cc0
838
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
839
+#error "We're not supposed to have CC0 anymore"
840
+#else
841
+static bool    zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b);
842
+#endif
843 102 dgisselq
+
844
+
845 103 dgisselq
+#define        ALL_DEBUG_OFF   false
846 102 dgisselq
+#define        ALL_DEBUG_ON    false
847
+
848
+enum ZIP_BUILTIN_ID_CODE {
849
+       ZIP_BUILTIN_RTU,
850
+       ZIP_BUILTIN_HALT,
851
+       ZIP_BUILTIN_IDLE,
852
+       ZIP_BUILTIN_SYSCALL,
853
+       ZIP_BUILTIN_SAVE_CONTEXT,
854
+       ZIP_BUILTIN_RESTORE_CONTEXT,
855
+       ZIP_BUILTIN_BITREV,
856
+       ZIP_BUILTIN_CC,
857 117 dgisselq
+       ZIP_BUILTIN_UCC,
858 171 dgisselq
+       ZIP_BUILTIN_BUSY,
859 102 dgisselq
+       ZIP_BUILTIN_MAX
860
+};
861
+
862
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
863
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
864
+
865
+
866
+#include "gt-zip.h"
867
+
868
+/* The Global 'targetm' Variable. */
869
+struct gcc_target      targetm = TARGET_INITIALIZER;
870
+
871
+
872
+enum   reg_class zip_reg_class(int);
873
+
874
+#define        LOSE_AND_RETURN(msgid, x)               \
875
+       do {                                    \
876
+               zip_operand_lossage(msgid, x);  \
877
+               return;                         \
878
+       } while(0)
879
+
880
+/* Per-function machine data. */
881
+struct GTY(()) machine_function
882
+{
883
+       /* number of pretented arguments for varargs */
884
+       int     pretend_size;
885
+
886
+       /* Number of bytes saved on the stack for local variables. */
887
+       int     local_vars_size;
888
+
889
+       /* Number of bytes saved on stack for register save area */
890
+       int     saved_reg_size;
891
+       int     save_ret;
892
+
893
+       int     sp_fp_offset;
894
+       bool    fp_needed;
895
+       int     size_for_adjusting_sp;
896
+};
897
+
898
+/* Allocate a chunk of memory for per-function machine-dependent data. */
899
+
900
+static struct machine_function *
901
+zip_init_machine_status(void) {
902
+       return ggc_cleared_alloc<machine_function>();
903
+}
904
+
905
+static void
906
+zip_override_options(void)
907
+{
908
+       init_machine_status = zip_init_machine_status;
909
+}
910
+
911
+enum   reg_class
912
+zip_reg_class(int regno)
913
+{
914
+       if (is_ZIP_GENERAL_REG(regno)) {
915
+               return GENERAL_REGS;
916
+       } else if (is_ZIP_REG(regno)) {
917
+               return ALL_REGS;
918
+       } return NO_REGS;
919
+}
920
+
921
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
922
+static bool
923
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
924
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
925
+       return (size == -1)||(size > UNITS_PER_WORD);
926
+}
927
+
928
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
929
+ * insn.  Formatted output isn't easily implemented, since we use output operand
930
+ * lossage to output the actual message and handle the categorization of the
931
+ * error.  */
932
+
933
+static void
934
+zip_operand_lossage(const char *msgid, rtx op) {
935
+       fprintf(stderr, "Operand lossage??\n");
936
+       debug_rtx(op);
937
+       zip_debug_rtx(op);
938
+       output_operand_lossage("%s", msgid);
939
+}
940
+
941
+/* The PRINT_OPERAND_ADDRESS worker.   */
942
+void
943
+zip_print_operand_address(FILE *file, rtx x) {
944
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
945
+
946
+       if (dbg) zip_debug_rtx(x);
947
+       switch(GET_CODE(x)) {
948
+               case REG:
949 127 dgisselq
+                       gcc_assert(is_ZIP_REG(REGNO(x)));
950 171 dgisselq
+                       gcc_assert(REGNO(x) < 16);
951 102 dgisselq
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
952
+                       break;
953
+               case SYMBOL_REF:
954
+                       fprintf(file, "%s", XSTR(x,0));
955
+                       break;
956
+               case LABEL_REF:
957
+                       x = LABEL_REF_LABEL(x);
958
+               case CODE_LABEL:
959
+                       { char buf[256];
960
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
961
+#ifdef ASM_OUTPUT_LABEL_REF
962
+                       ASM_OUTPUT_LABEL_REF(file, buf);
963
+#else
964
+                       assemble_name(file, buf);
965
+#endif
966
+                       }
967
+                       break;
968
+               case PLUS:
969 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
970
+                               fprintf(stderr, "Unsupported address construct\n");
971
+                               zip_debug_rtx(x);
972 102 dgisselq
+                               abort();
973 127 dgisselq
+                       } gcc_assert(is_ZIP_REG(REGNO(XEXP(x,0))));
974 171 dgisselq
+                       gcc_assert(REGNO(XEXP(x,0))<16);
975 127 dgisselq
+                       if (CONST_INT_P(XEXP(x, 1))) {
976 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
977
+                                       fprintf(file, "%ld(%s)",
978 135 dgisselq
+                                       (long)INTVAL(XEXP(x, 1)),
979 102 dgisselq
+                                       reg_names[REGNO(XEXP(x, 0))]);
980
+                               } else {
981
+                                       fprintf(file, "(%s)",
982
+                                       reg_names[REGNO(XEXP(x, 0))]);
983
+                               }
984
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
985
+                               fprintf(file, "%s(%s)", XSTR(x,0),
986
+                                       reg_names[REGNO(XEXP(x, 0))]);
987
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
988
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
989
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
990
+                               fprintf(file, "%s-%s(%s)",
991
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
992
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
993
+                                       reg_names[REGNO(XEXP(x, 0))]);
994
+                       } else
995
+                               fprintf(file, "#INVALID(%s)",
996
+                                       reg_names[REGNO(XEXP(x, 0))]);
997
+                       /*
998
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
999
+                               fprintf(file, "%s(%s)",
1000
+                                       GET_CODE(XEXP(addr, 1)),
1001
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1002
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
1003
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
1004
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
1005
+                               fprintf(file, "%s-%s(%s)",
1006
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1007
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1008
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
1009
+                       }
1010
+                       */
1011
+                       break;
1012
+               // We don't support direct memory addressing within our
1013
+               // instruction set, even though the instructions themselves
1014
+               // would support direct memory addressing of the lower 18 bits
1015
+               // of memory space.
1016
+               case MEM:
1017
+                       if (dbg) zip_debug_rtx(x);
1018
+                       zip_print_operand_address(file, XEXP(x, 0));
1019
+                       break;
1020 111 dgisselq
+               case CONST_INT:
1021 135 dgisselq
+                       fprintf(file, "%ld",(long)INTVAL(x));
1022 111 dgisselq
+                       break;
1023 102 dgisselq
+               default:
1024 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
1025
+                       zip_debug_rtx(x);
1026 102 dgisselq
+                       abort(); break;
1027
+                       // output_addr_const(file, x);
1028
+               break;
1029
+       }
1030
+}
1031
+
1032
+/* The PRINT_OPERAND worker. */
1033
+
1034
+void
1035
+zip_print_operand(FILE *file, rtx x, int code)
1036
+{
1037
+       rtx operand = x;
1038
+       int     rgoff = 0;
1039
+
1040
+       // fprintf(file, "Print Operand!\n");
1041
+
1042
+       /* New code entries should just be added to the switch below.  If
1043
+        * handling is finished, just return.  If handling was just a
1044
+        * modification of the operand, the modified operand should be put in
1045
+        * "operand", and then do a break to let default handling
1046
+        * (zero-modifier) output the operand.
1047
+        */
1048
+       switch(code) {
1049
+               case 0:
1050
+                       /* No code, print as usual. */
1051
+                       break;
1052
+               case 'L':
1053
+                       /* Lower of two registers, print one up */
1054
+                       rgoff = 1;
1055
+                       break;
1056
+               case 'R':
1057
+               case 'H':
1058
+                       /* Higher of a register pair, print normal */
1059
+                       break;
1060
+
1061
+               default:
1062
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1063
+       }
1064
+
1065
+       /* Print an operand as without a modifier letter. */
1066
+       switch (GET_CODE(operand)) {
1067
+       case REG:
1068
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1069
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1070
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1071
+               return;
1072
+       case SCRATCH:
1073
+               LOSE_AND_RETURN("Need a scratch register", x);
1074
+               return;
1075
+
1076
+       case CODE_LABEL:
1077
+       case LABEL_REF:
1078
+       case SYMBOL_REF:
1079
+       case PLUS:
1080
+               PRINT_OPERAND_ADDRESS(file, operand);
1081
+               return;
1082
+       case MEM:
1083
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1084
+               return;
1085
+
1086
+       default:
1087
+               /* No need to handle all strange variants, let
1088
+                * output_addr_const do it for us.
1089
+                */
1090
+               if (CONSTANT_P(operand)) {
1091
+                       output_addr_const(file, operand);
1092
+                       return;
1093
+               }
1094
+
1095
+               LOSE_AND_RETURN("unexpected operand", x);
1096
+       }
1097
+}
1098
+
1099
+static bool
1100
+zip_frame_pointer_required(void)
1101
+{
1102
+       // This should really depend upon whether we have variable sized
1103
+       // arguments in our frame or not.  Once this fails, let's look
1104
+       // at what the problem was and then whether or not we can detect
1105
+       // it.
1106
+       //
1107
+       // Use a GCC global to determine our answer
1108 103 dgisselq
+       if (cfun->calls_alloca)
1109
+               return true;
1110 102 dgisselq
+       return (frame_pointer_needed);
1111
+/*
1112
+*/
1113
+}
1114
+
1115
+/* Determine whether or not a register needs to be saved on the stack or not.
1116
+ */
1117
+static bool
1118
+zip_save_reg(int regno) {
1119
+       if (regno == 0)
1120
+               return ((!crtl->is_leaf)
1121
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1122
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1123
+               return  ((df_regs_ever_live_p(regno))
1124
+                               &&(!call_used_regs[regno]));
1125
+       else if (regno == zip_FP)
1126
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1127
+                               &&(!call_used_regs[regno])));
1128
+       else if (regno < zip_FP)
1129
+               return  ((df_regs_ever_live_p(regno))
1130
+                               &&(!call_used_regs[regno]));
1131
+       return false;
1132
+}
1133
+
1134
+/* Compute the size of the local area and the size to be adjusted by the
1135
+ * prologue and epilogue.
1136
+ *
1137
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1138
+ *
1139
+ *     Stack Pointer ->
1140 124 dgisselq
+ *                     Outgoing arguments
1141 102 dgisselq
+ *                     Local variables (could be variable size)
1142
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1143
+ *                     Saved return address, if saved
1144
+ *                     Other Saved registers
1145
+ *                     Saved frame pointer (if used)
1146
+ *                     Saved R12, if used
1147
+ *                     (Stack pointer is not saved)
1148 171 dgisselq
+ *                     (PRETEND-ARGS)
1149 102 dgisselq
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1150
+ *                     Called arguments (not passed in registers)
1151
+ *                     Return arguments (not R1, args.pretend_args_size)
1152
+ *             (Prior function's stack frame ... )
1153
+ *
1154
+ */
1155
+static void
1156
+zip_compute_frame(void) {
1157
+       int     regno;
1158
+       int     args_size;
1159 124 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1160 102 dgisselq
+
1161 171 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-COMPUTE-FRAME: %s\n", current_function_name());
1162 102 dgisselq
+       // gcc_assert(crtl);
1163
+       gcc_assert(cfun);
1164
+       gcc_assert(cfun->machine);
1165
+
1166
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1167
+
1168
+       if(crtl->args.pretend_args_size > 0) {
1169
+               args_size += crtl->args.pretend_args_size;
1170 171 dgisselq
+               if (dbg) fprintf(stderr, "%s pretend_args_size : %d\n", current_function_name(),
1171
+                       crtl->args.pretend_args_size);
1172 102 dgisselq
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1173
+       }
1174
+
1175
+       cfun->machine->local_vars_size = get_frame_size();
1176
+
1177
+       // Save callee-saved registers.
1178
+       cfun->machine->saved_reg_size = 0;
1179
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1180
+               if (zip_save_reg(regno))
1181
+                       cfun->machine->saved_reg_size ++;
1182
+       }
1183
+
1184
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1185
+
1186
+       if ((cfun->machine->fp_needed)&&
1187
+                       (!df_regs_ever_live_p(zip_FP))) {
1188
+               cfun->machine->saved_reg_size ++;
1189
+       }
1190
+
1191 171 dgisselq
+       cfun->machine->sp_fp_offset = crtl->outgoing_args_size
1192
+                               + cfun->machine->local_vars_size;
1193 102 dgisselq
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1194
+                       + cfun->machine->saved_reg_size
1195
+                       + args_size;
1196 124 dgisselq
+       if(dbg) {
1197 171 dgisselq
+               fprintf(stderr, "\t---- STACK PTR ----\n");
1198
+               fprintf(stderr, "\tOUTGOIN-SIZE: %d\n",
1199
+                       crtl->outgoing_args_size);
1200 124 dgisselq
+               fprintf(stderr, "\tLOCALS-SIZE : %d\n",
1201
+                       cfun->machine->local_vars_size);
1202 171 dgisselq
+               fprintf(stderr, "\t---- FRAME PTR ----%s\n",
1203
+                       cfun->machine->fp_needed?"":" (Eliminated)");
1204 124 dgisselq
+               fprintf(stderr, "\tREGISTERS   : %d\n",
1205
+                       cfun->machine->saved_reg_size);
1206 171 dgisselq
+               fprintf(stderr, "\tPRETEND SIZE: %d\n",
1207
+                       crtl->args.pretend_args_size);
1208
+               fprintf(stderr, "\t---- ARG PTR (Original SP, should be eliminated) ----\n");
1209
+               fprintf(stderr, "\t----\n");
1210
+               fprintf(stderr, "\tARGS-SIZE   : %d\n", args_size);
1211 124 dgisselq
+               fprintf(stderr, "\tSP_FP_OFFSET: %d\n",
1212
+                       cfun->machine->sp_fp_offset);
1213
+               fprintf(stderr, "\tSP-ADJUSTMNT: %d\n",
1214
+                       cfun->machine->size_for_adjusting_sp);
1215
+       }
1216 102 dgisselq
+}
1217
+
1218
+void
1219
+zip_expand_prologue(void) {
1220
+       rtx     insn;
1221
+
1222
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1223
+       zip_compute_frame();
1224
+
1225 124 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: Computing Prologue instructions\n");
1226 127 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: SP-FP offset is %d\n",
1227
+                       cfun->machine->sp_fp_offset);
1228 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1229 138 dgisselq
+               insn = emit_insn(gen_subsi3_reg_clobber(stack_pointer_rtx,
1230 102 dgisselq
+                               stack_pointer_rtx,
1231
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1232
+                               SImode)));
1233
+                       // cfun->machine->sp_fp_offset
1234
+
1235
+               RTX_FRAME_RELATED_P(insn) = 1;
1236
+       }
1237
+
1238
+       {
1239
+               int offset = 0, regno;
1240
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1241
+                       if (zip_save_reg(regno)) {
1242 127 dgisselq
+                               if (dbg) fprintf(stderr,
1243
+                                       "PROLOGUE: Saving R%d in %d+%d(SP)\n",
1244
+                                       regno, cfun->machine->sp_fp_offset,
1245
+                                       offset);
1246 124 dgisselq
+                               insn=emit_insn(gen_movsi_sto_off(
1247
+                                       stack_pointer_rtx,
1248
+                                       GEN_INT(cfun->machine->sp_fp_offset
1249
+                                               +offset++),
1250 102 dgisselq
+                                       gen_rtx_REG(SImode, regno)));
1251
+                               RTX_FRAME_RELATED_P(insn) = 1;
1252
+                       }
1253
+               }
1254 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1255
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1256 102 dgisselq
+       }
1257
+
1258
+       if (cfun->machine->fp_needed) {
1259
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1260
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1261
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1262 124 dgisselq
+                               stack_pointer_rtx,
1263
+                               GEN_INT(cfun->machine->sp_fp_offset)));
1264 102 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1265 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1266 102 dgisselq
+       }
1267
+}
1268
+
1269 200 dgisselq
+int
1270 102 dgisselq
+zip_use_return_insn(void)
1271
+{
1272
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1273
+                       ||(get_frame_size()!=0)) {
1274
+               // If R0 ever gets pushed to the stack, then we cannot
1275
+               // use a master return from anywhere.  We need to clean up the
1276
+               // stack first.
1277
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1278
+                                               &&(!call_used_regs[0]))) {
1279 200 dgisselq
+                       return 0;
1280 102 dgisselq
+               }
1281
+       }
1282
+       zip_compute_frame();
1283 200 dgisselq
+       return (cfun->machine->size_for_adjusting_sp == 0)?1:0;
1284 102 dgisselq
+}
1285
+
1286
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1287
+ * upon the current stack pointer.  It should use the frame poitner only,
1288
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1289
+ * take advantage of it to omit stack adjustments before returning ...
1290
+ *
1291
+ * Let's see if we can use their approach here.
1292
+ *
1293
+ * We can't.  Consider our choices:
1294
+ *     LOD (FP),R0
1295
+ *     LOD 1(FP),R4
1296
+ *     LOD 2(FP),R5
1297
+ *     LOD 3(FP),R6
1298
+ *     LOD 4(FP),FP
1299
+ *     ... Then what is the stack pointer?
1300
+ * or
1301
+ *     LOD (FP),R0
1302
+ *     LOD 1(FP),R4
1303
+ *     LOD 2(FP),R5
1304
+ *     LOD 3(FP),R6
1305
+ *     MOV FP,SP
1306
+ *     LOD 4(SP),FP
1307
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1308
+ *     exploit our pipeline memory function
1309
+ * or
1310
+ *     MOV FP,SP
1311
+ *     LOD (SP),R0
1312
+ *     LOD 1(SP),R4
1313
+ *     LOD 2(SP),R5
1314
+ *     LOD 3(SP),R6
1315
+ *     LOD 4(SP),FP
1316
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1317
+ *
1318
+ */
1319
+void
1320
+zip_expand_epilogue(void) {
1321
+       int     regno, offset;
1322
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1323 138 dgisselq
+       rtx     insn;
1324 102 dgisselq
+
1325
+       zip_compute_frame();
1326
+
1327
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1328
+       if (cfun->machine->fp_needed) {
1329 124 dgisselq
+               // This is done special--if you can't trust the stack pointer
1330
+               // enough so that you must have a frame pointer, then you can't
1331
+               // trust its offset enough to restore from it.  Hence, we start
1332
+               // by moving the frame pointer to the stack pointer to recover
1333
+               // the stack pointer back to a usable value.
1334 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1335 138 dgisselq
+               insn = emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1336
+               RTX_FRAME_RELATED_P(insn) = 1;
1337 102 dgisselq
+       }
1338
+
1339
+       if (cfun->machine->saved_reg_size != 0) {
1340 124 dgisselq
+               if (cfun->machine->fp_needed)
1341
+                       offset = 0;
1342
+               else
1343
+                       offset = cfun->machine->sp_fp_offset;
1344 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1345
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1346
+                       if (zip_save_reg(regno)) {
1347
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1348 138 dgisselq
+                               rtx reg = gen_rtx_REG(SImode, regno);
1349
+                               insn = emit_insn(gen_movsi_lod_off(
1350
+                                               reg,
1351 124 dgisselq
+                                               stack_pointer_rtx,
1352
+                                               GEN_INT(offset++)));
1353 138 dgisselq
+                               add_reg_note(insn, REG_CFA_RESTORE, reg);
1354
+                               RTX_FRAME_RELATED_P(insn) = 1;
1355 102 dgisselq
+                       }
1356
+               }
1357
+       }
1358
+
1359 124 dgisselq
+       if (cfun->machine->fp_needed) {
1360
+               // Restore the stack pointer back to the original, the
1361
+               // difference being the difference from the frame pointer
1362
+               // to the original stack
1363 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1364
+                       stack_pointer_rtx,
1365 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp
1366
+                               -cfun->machine->sp_fp_offset)));
1367 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1368 124 dgisselq
+       } else {
1369
+               // else now the difference is between the stack pointer and
1370
+               // the original stack pointer.
1371 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1372
+                               cfun->machine->size_for_adjusting_sp);
1373 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1374
+                       stack_pointer_rtx,
1375 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp)));
1376 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1377 102 dgisselq
+       }
1378
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1379
+
1380 138 dgisselq
+       // The return RTX is not allowed to be frame related
1381
+       insn = emit_jump_insn(ret_rtx);
1382
+       // RTX_FRAME_RELATED_P(insn) = 1;
1383 102 dgisselq
+}
1384
+
1385 191 dgisselq
+void
1386
+zip_sibcall_epilogue(void) {
1387
+       int     regno, offset;
1388
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1389
+       rtx     insn;
1390
+
1391
+       zip_compute_frame();
1392
+
1393
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1394
+       if (cfun->machine->fp_needed) {
1395
+               // This is done special--if you can't trust the stack pointer
1396
+               // enough so that you must have a frame pointer, then you can't
1397
+               // trust its offset enough to restore from it.  Hence, we start
1398
+               // by moving the frame pointer to the stack pointer to recover
1399
+               // the stack pointer back to a usable value.
1400
+               if (dbg) fprintf(stderr, "SIBCALL-EPILOG::Moving frame pointer to stack register\n");
1401
+               insn = emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1402
+               RTX_FRAME_RELATED_P(insn) = 1;
1403
+       }
1404
+
1405
+       if (cfun->machine->saved_reg_size != 0) {
1406
+               if (cfun->machine->fp_needed)
1407
+                       offset = 0;
1408
+               else
1409
+                       offset = cfun->machine->sp_fp_offset;
1410
+               if (dbg) fprintf(stderr, "SIBCALL-EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1411
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1412
+                       if (zip_save_reg(regno)) {
1413
+                               if (dbg) fprintf(stderr, "SIBCALL-EPILOG::RESTORING R%d\n", regno);
1414
+                               rtx reg = gen_rtx_REG(SImode, regno);
1415
+                               insn = emit_insn(gen_movsi_lod_off(
1416
+                                               reg,
1417
+                                               stack_pointer_rtx,
1418
+                                               GEN_INT(offset++)));
1419
+                               add_reg_note(insn, REG_CFA_RESTORE, reg);
1420
+                               RTX_FRAME_RELATED_P(insn) = 1;
1421
+                       }
1422
+               }
1423
+       }
1424
+
1425
+       if (cfun->machine->fp_needed) {
1426
+               // Restore the stack pointer back to the original, the
1427
+               // difference being the difference from the frame pointer
1428
+               // to the original stack
1429
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1430
+                       stack_pointer_rtx,
1431
+                       GEN_INT(cfun->machine->size_for_adjusting_sp
1432
+                               -cfun->machine->sp_fp_offset)));
1433
+               RTX_FRAME_RELATED_P(insn) = 1;
1434
+       } else {
1435
+               // else now the difference is between the stack pointer and
1436
+               // the original stack pointer.
1437
+               if (dbg) fprintf(stderr, "SIBCALL-EPILOG::ADDSI3(StackPtr, %d)\n",
1438
+                               cfun->machine->size_for_adjusting_sp);
1439
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1440
+                       stack_pointer_rtx,
1441
+                       GEN_INT(cfun->machine->size_for_adjusting_sp)));
1442
+               RTX_FRAME_RELATED_P(insn) = 1;
1443
+       }
1444
+}
1445
+
1446 102 dgisselq
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1447
+ *
1448
+ * We currently only support calculating the return address for the current
1449
+ * frame.
1450
+ */
1451
+
1452
+/*
1453
+rtx
1454
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1455
+{
1456
+       if (count)
1457
+               return NULL_RTX;
1458
+
1459
+       zip_compute_frame();
1460
+
1461
+       // saved return address for current function is at fp - 1
1462
+       if (cfun->machine->save_ret)
1463
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1464
+                               -UNITS_PER_WORD));
1465
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1466
+}
1467
+*/
1468
+
1469
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1470
+ * return the OFFSET.
1471
+ */
1472
+int
1473
+zip_initial_elimination_offset(int from, int to) {
1474
+       int     ret = 0;
1475
+       zip_compute_frame();
1476
+
1477 171 dgisselq
+/*
1478 102 dgisselq
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1479
+               ret = cfun->machine->sp_fp_offset;
1480 117 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1481 171 dgisselq
+               // Since the ARG_POINTER_REGNUM is defined to be identical
1482
+               // to the FRAME_POINTER_REGNUM, this "if" will never ever
1483
+               // get called.
1484 117 dgisselq
+               ret = cfun->machine->sp_fp_offset;
1485 102 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1486 171 dgisselq
+               // Since we define ARG_POINTER_REGNUM to be FRAME_POINTER_REGNUM
1487
+               // we're asked for the offset between the frame pointer and
1488
+               // itself.  The result had better be zero.
1489
+               //
1490 117 dgisselq
+               ret = 0;
1491 102 dgisselq
+       } else {
1492
+               abort();
1493
+       }
1494 171 dgisselq
+*/
1495 102 dgisselq
+
1496 171 dgisselq
+       // Let's try using an ARG_POINTER != FRAME_POINTER
1497
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1498
+               ret = cfun->machine->sp_fp_offset;
1499
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1500
+               // Since the ARG_POINTER_REGNUM is defined to be identical
1501
+               // to the FRAME_POINTER_REGNUM, this "if" will never ever
1502
+               // get called.
1503
+               ret = cfun->machine->size_for_adjusting_sp;
1504
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1505
+               ret = cfun->machine->size_for_adjusting_sp
1506
+                       - cfun->machine->sp_fp_offset;
1507
+       } else {
1508
+               abort();
1509
+       }
1510
+
1511 102 dgisselq
+       return ret;
1512
+}
1513
+
1514
+/*
1515
+ * Code taken from m68k ...
1516
+ */
1517
+static bool
1518
+zip_can_eliminate(int from, int to)
1519
+{
1520
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1521
+       if ((from == zip_FP)&&(to == zip_SP))
1522
+               return !cfun->machine->fp_needed;
1523
+       return true;
1524
+}
1525
+
1526
+/*
1527
+static void
1528
+zip_basic_check(void)
1529
+{
1530
+       gcc_assert(mode_base_align[SImode]==4);
1531
+       if ((BITS_PER_UNIT != 32)
1532
+                       ||(GET_MODE_SIZE(SImode)!=1)
1533
+                       ||(GET_MODE_SIZE(DImode)!=1)
1534
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1535
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1536
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1537
+               gcc_assert(BITS_PER_UNIT==32);
1538
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1539
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1540
+       }
1541
+}
1542
+*/
1543
+
1544
+#define        zip_basic_check()
1545
+
1546 171 dgisselq
+/* Compute the number of word sized registers needed to hold a function
1547 102 dgisselq
+ * argument of mode INT_MODE and tree type TYPE.
1548
+ */
1549
+int
1550
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1551
+       int     size;
1552
+
1553
+       zip_basic_check();
1554
+
1555
+       if (targetm.calls.must_pass_in_stack(mode, type))
1556
+               return 0;
1557
+
1558
+       if ((type)&&(mode == BLKmode))
1559
+               size = int_size_in_bytes(type);
1560
+       else
1561
+               size = GET_MODE_SIZE(mode);
1562
+
1563
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1564
+}
1565
+
1566
+static void
1567
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1568
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1569
+       CUMULATIVE_ARGS *cum;
1570
+       int     nreg;
1571
+
1572
+       zip_basic_check();
1573
+
1574
+       cum = get_cumulative_args(ca);
1575
+       nreg = zip_num_arg_regs(mode, type);
1576
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1577
+               (*cum) = NUM_ARG_REGS;
1578
+       else
1579
+               (*cum) += nreg;
1580
+}
1581
+
1582
+static rtx
1583
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1584
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1585
+       CUMULATIVE_ARGS *cum;
1586
+
1587
+       zip_basic_check();
1588
+
1589
+
1590
+       if (!named)
1591
+               return NULL_RTX;
1592
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1593
+               //return NULL_RTX;
1594
+       cum = get_cumulative_args(ca);
1595
+
1596
+       if ((*cum) >= NUM_ARG_REGS)
1597
+               return NULL_RTX;
1598
+       return
1599
+               gen_rtx_REG(mode, (*cum)+1);
1600
+}
1601
+
1602 191 dgisselq
+/* DECL is the declaration of the function being targeted by the call, and EXP
1603
+ * is the CALL_EXPR representing the call.
1604
+ */
1605
+bool   zip_function_ok_for_sibcall(ATTRIBUTE_UNUSED tree decl, tree exp) {
1606
+       // calls.c already checks whether or not the parameter stack space
1607
+       // is identical, so ... let's hope this all works and find out.
1608
+
1609
+       //
1610
+       // Actually, this will fail:  If the sibling uses R5 to pass registers
1611
+       // in and we don't, then there will be no way to restore R5.  This is
1612
+       // true for the current configuration.  It will be true for future
1613
+       // configurations if the sibling ever uses a register that must be
1614
+       // saved as a parameter register.
1615
+       //
1616
+       // We can check this ... if we can count how many registers the
1617
+       // sibling call will use.
1618
+       //
1619
+       CUMULATIVE_ARGS cum_v;
1620
+       cumulative_args_t       cum;
1621
+       tree            parameter;
1622
+       machine_mode    mode;
1623
+       tree            ttype;
1624
+       rtx             parm_rtx;
1625
+       int             i;
1626
+       static const char zip_call_used_register[] = CALL_USED_REGISTERS;
1627
+
1628
+       INIT_CUMULATIVE_ARGS(cum_v, NULL, NULL, 0,0);
1629
+       cum = pack_cumulative_args(&cum_v);
1630
+       for (i=0; i<call_expr_nargs(exp); i++) {
1631
+
1632
+               parameter = CALL_EXPR_ARG(exp, i);
1633
+
1634
+               if ((!parameter) || (TREE_CODE(parameter)==ERROR_MARK))
1635
+                       return true;
1636
+               ttype = TREE_TYPE(parameter);
1637
+               gcc_assert(ttype);
1638
+               mode = ttype->type_common.mode;
1639
+
1640
+               if (pass_by_reference(&cum_v, mode, ttype, true)) {
1641
+                       mode = Pmode;
1642
+                       ttype = build_pointer_type(ttype);
1643
+               }
1644
+
1645
+               parm_rtx = zip_function_arg(cum, mode, ttype, 0);
1646
+               zip_function_arg_advance(cum, mode, ttype, 0);
1647
+               if (!parm_rtx)
1648
+                       continue;
1649
+
1650
+               // If it is a register
1651
+               //      and it is *NOT* a CALL_USED_REGISTER
1652
+               //      then we can't do this.
1653
+               //
1654
+               // Example: func(R1,..R4,R5)
1655
+               //      can be followed by func2(R1,.., up to R5)
1656
+               //      (not supported, though... just to simplify our test
1657
+               //      below)
1658
+               // Example: func(R1,..R4)
1659
+               //      cannot be followed by func2(R1,..,R5)
1660
+               //      We would blow R5 away by our prologue, even if it was
1661
+               //      properly set.
1662
+               // Example: func(R1,..R5)
1663
+               //      can be followed by func2(R1,.., up to R4)
1664
+               //      func2 may save R5 (which doesn't need saving) but that's
1665
+               //              irrelevant
1666
+               // Example: func(R1,..up to R4)
1667
+               //      can be followed by func2(R1,.., up to R4)
1668
+               //
1669
+               if (REG_P(parm_rtx)&&(REGNO(parm_rtx))
1670
+                               &&(REGNO(parm_rtx)<sizeof(zip_call_used_register))
1671
+                               &&(!zip_call_used_register[REGNO(parm_rtx)]))
1672
+                       return false;
1673
+       }
1674
+
1675
+       return true;
1676
+
1677
+       // We also need to check if the return types are the same ... or
1678
+       // will GCC handle that for us?
1679
+}
1680
+
1681 122 dgisselq
+void   zip_canonicalize_comparison(int *code, rtx *op0, rtx *op1,
1682
+               bool preserve_op0)
1683
+{
1684
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1685 102 dgisselq
+
1686 122 dgisselq
+       if (dbg) fprintf(stderr, "CANONICALIZE ...%s\n", (preserve_op0)?"(Preserve Op0)":"");
1687
+       if (dbg) zip_debug_rtx_pfx("CODE", gen_rtx_fmt_ee((rtx_code)*code, VOIDmode, gen_rtx_REG(CCmode,zip_CC), const0_rtx));
1688
+       if (dbg) zip_debug_rtx_pfx("OP0 ", *op0);
1689
+       if (dbg) zip_debug_rtx_pfx("OP1 ", *op1);
1690
+
1691
+       if ((!preserve_op0)&&((*code == LE)||(*code == GTU)||(*code == GEU))) {
1692
+               rtx tem = *op0;
1693
+               *op0 = *op1;
1694
+               *op1 = tem;
1695
+               *code = (int)swap_condition((enum rtx_code)*code);
1696
+       }
1697
+
1698
+       if ((*code == LE)||(*code == LEU)||(*code == GTU)) {
1699
+               int offset = 1; // (*code == GTU) ? 1 : -1;
1700
+               bool    swap = false;
1701
+
1702
+               if (CONST_INT_P(*op1)) {
1703
+                       *op1 = GEN_INT(INTVAL(*op1)+offset);
1704
+                       swap = true;
1705
+               } else if (REG_P(*op1)) {
1706 138 dgisselq
+                       *op1 = plus_constant(GET_MODE(*op1), *op1, offset, true);
1707 122 dgisselq
+                       swap = true;
1708
+               } else if ((GET_CODE(*op1)==PLUS)&&(CONST_INT_P(XEXP(*op1,1)))){
1709
+                       *op1 = plus_constant(GET_MODE(*op1),XEXP(*op1,0),
1710
+                               INTVAL(XEXP(*op1,1))+offset);
1711
+                       swap = true;
1712
+               } if (swap) {
1713
+                       if (*code == LE)
1714
+                               (*code)= LT;
1715
+                       else if (*code == LEU)
1716
+                               (*code)= LTU;
1717
+                       else // (*code == GTU)
1718
+                               (*code) = GEU;
1719
+               }
1720
+       }
1721
+}
1722
+
1723
+static bool
1724
+zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b) {
1725
+       *a = zip_CC;
1726
+       *b = INVALID_REGNUM;
1727
+       return true;
1728
+}
1729
+
1730
+
1731 102 dgisselq
+/* totally buggy - we can't return pointers to nested functions */
1732
+static void
1733
+zip_asm_trampoline_template(FILE *f) {
1734
+       // Whereas at one time I thought I wouldn't need it, now I know I
1735
+       // need this trampoline function, although it is for a completely
1736
+       // different purpose than the one I was familiar with.
1737 138 dgisselq
+       fprintf(f, "\tbrev\t0,r1\n");
1738
+       fprintf(f, "\tldilo\t0,r1\n");
1739 102 dgisselq
+       fprintf(f, "\tjmp r1\n");
1740
+}
1741
+
1742
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1743
+static void
1744
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1745
+       tree fndecl ATTRIBUTE_UNUSED,
1746
+       rtx chain_value ATTRIBUTE_UNUSED) {
1747
+// #warning "This needs to be filled out"
1748
+       abort();
1749
+}
1750
+
1751
+static tree
1752
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1753
+       tree type)
1754
+{
1755
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1756
+       zip_basic_check();
1757
+
1758
+       if(t) {
1759
+               zip_builtins[code] = t;
1760
+               zip_builtins_icode[code] = icode;
1761
+       }
1762
+
1763
+       return t;
1764
+
1765
+}
1766
+
1767
+void   zip_init_builtins(void) {
1768
+       zip_basic_check();
1769
+
1770
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1771
+#ifdef HAVE_zip_rtu
1772
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1773
+#endif
1774
+#ifdef HAVE_zip_halt
1775
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1776
+#endif
1777 171 dgisselq
+#ifdef HAVE_zip_busy
1778
+  def_builtin("zip_busy",  CODE_FOR_zip_busy,  ZIP_BUILTIN_BUSY, void_ftype_void);
1779
+#endif
1780 102 dgisselq
+#ifdef HAVE_zip_idle
1781
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1782
+#endif
1783
+
1784
+#ifdef HAVE_zip_syscall
1785
+// Support int SYSCALL(callID, int a, int b, int c);
1786
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1787
+                       build_function_type_list(void_type_node, NULL_TREE));
1788
+#endif
1789
+
1790
+#ifdef HAVE_zip_save_context
1791
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1792
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1793
+#endif
1794
+
1795
+#ifdef HAVE_zip_restore_context
1796
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1797
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1798
+#endif
1799
+
1800
+#ifdef HAVE_zip_bitrev
1801
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1802
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1803
+               NULL_TREE));
1804
+#endif
1805
+
1806
+#ifdef HAVE_zip_cc
1807
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1808
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1809
+#endif
1810
+
1811 117 dgisselq
+#ifdef HAVE_zip_ucc
1812
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
1813
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1814
+#endif
1815
+
1816 102 dgisselq
+}
1817
+
1818
+static tree
1819
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1820
+{
1821
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1822
+    return error_mark_node;
1823
+
1824
+  return zip_builtins[zip_builtin_code];
1825
+}
1826
+
1827
+static rtx
1828
+zip_expand_builtin(tree exp, rtx target,
1829
+               rtx subtarget ATTRIBUTE_UNUSED,
1830
+               machine_mode tmode ATTRIBUTE_UNUSED,
1831
+               int     ignore ATTRIBUTE_UNUSED) {
1832
+
1833
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1834
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1835
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1836
+       enum    insn_code icode = zip_builtins_icode[code];
1837
+       rtx     pat, op[5];
1838
+       call_expr_arg_iterator  iter;
1839
+       tree    arg;
1840
+
1841
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1842
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1843
+               arg = first_call_expr_arg(exp, &iter);
1844
+               if (arg == error_mark_node)
1845
+                       return NULL_RTX;
1846
+               op[0] = expand_normal(arg);
1847
+               if (GET_CODE(op[0]) != REG)
1848
+                       op[0] = force_reg(Pmode, op[0]);
1849
+               pat = GEN_FCN(icode)(op[0]);
1850
+       } else if (code == ZIP_BUILTIN_BITREV) {
1851
+               arg = first_call_expr_arg(exp, &iter);
1852
+               if (arg == error_mark_node) {
1853
+                       return NULL_RTX;
1854
+               }
1855
+               op[0] = expand_normal(arg);
1856
+               if (!target)
1857
+                       target = gen_reg_rtx(SImode);
1858
+               pat = GEN_FCN(icode)(target, op[0]);
1859 117 dgisselq
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
1860 102 dgisselq
+               if (!target)
1861
+                       target = gen_reg_rtx(SImode);
1862
+               pat = GEN_FCN(icode)(target);
1863
+       } else // RTU, HALT, IDLE
1864
+               pat = GEN_FCN(icode)();
1865
+       if (!pat)
1866
+               return NULL_RTX;
1867
+       emit_insn(pat);
1868
+       return (nonvoid ? target : const0_rtx);
1869
+}
1870
+
1871
+static bool
1872
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1873
+       zip_basic_check();
1874
+
1875
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1876
+}
1877
+
1878
+static bool
1879
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1880
+       return ((mode)==SFmode)||((mode)==DFmode);
1881
+}
1882
+
1883
+static int
1884
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1885
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1886
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1887
+       return 1;
1888
+}
1889
+
1890
+static bool
1891
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1892
+       addr_space_t as ATTRIBUTE_UNUSED) {
1893
+       return false;
1894
+}
1895
+
1896
+/*
1897
+static void
1898
+zip_asm_output_anchor(rtx x) {
1899
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1900
+}
1901
+*/
1902
+
1903
+static void
1904
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1905
+       int     i;
1906
+       i = lvl;
1907
+       if ((true)||(lvl == 0))
1908
+               fprintf(stderr, "%s", pfx);
1909
+       else
1910
+               i += strlen(pfx);
1911
+       while(i-->0)
1912
+               fprintf(stderr, "  ");
1913
+       fprintf(stderr, "%s\n", str);
1914
+}
1915
+
1916
+static void
1917
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1918
+       int     i;
1919
+
1920
+       i = lvl;
1921
+       if ((true)||(lvl == 0))
1922
+               fprintf(stderr, "%s", pfx);
1923
+       else
1924
+               i = lvl+strlen(pfx);
1925
+       while(i-->0)
1926
+               fprintf(stderr, "  ");
1927
+       switch(m) {
1928
+               case VOIDmode:
1929
+                       fprintf(stderr, "%s:V\n", str);
1930
+                       break;
1931
+               case BLKmode:
1932
+                       fprintf(stderr, "%s:BLK\n", str);
1933
+                       break;
1934
+               case BImode:
1935
+                       fprintf(stderr, "%s:BI\n", str);
1936
+                       break;
1937
+#ifdef HAVE_QImode
1938
+               case QImode:
1939
+                       fprintf(stderr, "%s:QI\n", str);
1940
+                       break;
1941
+#endif
1942
+#ifdef HAVE_HImode
1943
+               case HImode:
1944
+                       fprintf(stderr, "%s:HI\n", str);
1945
+                       break;
1946
+#endif
1947
+               case SImode:
1948
+                       fprintf(stderr, "%s:SI\n", str);
1949
+                       break;
1950 122 dgisselq
+               case CCmode:
1951
+                       fprintf(stderr, "%s:CC\n", str);
1952
+                       break;
1953 102 dgisselq
+               case DImode:
1954
+                       fprintf(stderr, "%s:DI\n", str);
1955
+                       break;
1956
+               default:
1957
+                       fprintf(stderr, "%s:?\n", str);
1958
+       }
1959
+}
1960
+
1961
+static void
1962
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1963
+       if (x == NULL_RTX) {
1964
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1965
+               return;
1966
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1967
+               char    buf[64];
1968
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1969
+               zip_debug_print(pfx, lvl, buf);
1970 117 dgisselq
+               gcc_assert(0 && "Bad RTX Code");
1971 102 dgisselq
+               return;
1972
+       } switch(GET_CODE(x)) { // rtl.def
1973 122 dgisselq
+       case PARALLEL:
1974
+               zip_debug_print(pfx, lvl, "(PARALLEL");
1975
+               for(int j=0; j<XVECLEN(x,0);j++)
1976
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1977
+               zip_debug_print(pfx, lvl, ")");
1978
+               debug_rtx(x);
1979
+               break;
1980 102 dgisselq
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1981 122 dgisselq
+       case SEQUENCE:
1982
+               zip_debug_print(pfx, lvl, "(SEQUENCE");
1983
+               for(int j=0; j<XVECLEN(x,0);j++)
1984
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1985
+               zip_debug_print(pfx, lvl, ")");
1986
+               debug_rtx(x);
1987
+               break;
1988 102 dgisselq
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1989
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1990
+       case INSN:
1991
+               zip_debug_print(pfx, lvl, "(INSN");
1992
+               /*
1993
+               { const rtx_insn *tmp_rtx;
1994
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1995
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1996
+               }}
1997
+               */
1998
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1999
+               zip_debug_print(pfx, lvl, ")");
2000 117 dgisselq
+               debug_rtx(x);
2001 102 dgisselq
+               break;
2002
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
2003 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
2004
+               zip_debug_print(pfx, lvl, ")");
2005
+               /*
2006 102 dgisselq
+               if (JUMP_LABEL(x)) {
2007 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
2008
+                               char    buf[64];
2009
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
2010
+                               zip_debug_print(pfx, lvl+1, buf);
2011
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
2012
+                               char    buf[64];
2013
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
2014
+                               zip_debug_print(pfx, lvl+1, buf);
2015
+                       } else
2016
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
2017 102 dgisselq
+               } else
2018 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
2019
+               debug_rtx(x);
2020
+               */
2021 102 dgisselq
+               break;
2022
+       case CALL:
2023
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
2024
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
2025
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
2026
+               zip_debug_print(pfx, lvl, ")");
2027
+               break;
2028
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
2029
+               debug_rtx(x);
2030
+               break;
2031
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
2032
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
2033
+       case NOTE:
2034
+               {       char buf[128];
2035
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
2036
+                       zip_debug_print(pfx, lvl, buf);
2037
+               }break;
2038
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
2039
+               debug_rtx(x);
2040
+               break;
2041
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
2042
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
2043
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
2044
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
2045
+       case CODE_LABEL:
2046
+               {
2047 192 dgisselq
+                       char    buf[128];
2048 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
2049 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2050
+               } break;
2051
+       case SET:
2052
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
2053 117 dgisselq
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
2054
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
2055 102 dgisselq
+               zip_debug_print(pfx, lvl, ")");
2056 117 dgisselq
+               debug_rtx(x);
2057 102 dgisselq
+               break;
2058 122 dgisselq
+       case REG: {
2059 127 dgisselq
+               char buf[25], mstr[4];
2060
+               mstr[0] = '\0';
2061
+               if (GET_MODE(x) == SImode)
2062
+                       strcpy(mstr, ":SI");
2063
+               else if (GET_MODE(x) == DImode)
2064
+                       strcpy(mstr, ":DI");
2065
+               else if (GET_MODE(x) == VOIDmode)
2066
+                       strcpy(mstr, ":V");
2067 102 dgisselq
+               if (REGNO(x) == zip_PC)
2068 127 dgisselq
+                       sprintf(buf, "(PC%s)", mstr);
2069 102 dgisselq
+               else if (REGNO(x) == zip_CC)
2070 127 dgisselq
+                       sprintf(buf, "(CC%s)", mstr);
2071 102 dgisselq
+               else if (REGNO(x) == zip_SP)
2072 127 dgisselq
+                       sprintf(buf, "(SP%s)", mstr);
2073 102 dgisselq
+               else if (REGNO(x) == zip_FP)
2074 127 dgisselq
+                       sprintf(buf, "(REG%s FP)", mstr);
2075 102 dgisselq
+               else if (REGNO(x) == zip_GOT)
2076 127 dgisselq
+                       sprintf(buf, "(REG%s GBL)", mstr);
2077 102 dgisselq
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
2078 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-VL)", mstr);
2079 102 dgisselq
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
2080 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-AD)", mstr);
2081 122 dgisselq
+               else
2082 127 dgisselq
+                       sprintf(buf, "(REG%s %d)", mstr, REGNO(x));
2083
+               if (mstr[0])
2084
+                       zip_debug_print(pfx, lvl, buf);
2085
+               else
2086
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2087 102 dgisselq
+               } break;
2088
+       case IF_THEN_ELSE: // 51
2089
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
2090
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2091
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2092
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
2093
+               zip_debug_print(pfx, lvl, ")");
2094
+               break;
2095
+       case PC:
2096
+               zip_debug_print(pfx, lvl, "(PC)");
2097
+               break;
2098
+       case CC0:
2099
+               zip_debug_print(pfx, lvl, "(CC0)");
2100
+               break;
2101
+       case COMPARE:
2102 127 dgisselq
+               zip_debug_print_m(pfx, lvl, "(COMPARE", GET_MODE(x));
2103 102 dgisselq
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2104
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2105
+               zip_debug_print(pfx, lvl, ")");
2106
+               break;
2107 111 dgisselq
+       case CONST:
2108
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
2109
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2110
+               zip_debug_print(pfx, lvl, ")");
2111
+               break;
2112 102 dgisselq
+       case CONST_INT:
2113 192 dgisselq
+               { char buf[128];
2114 102 dgisselq
+               if (GET_MODE(x)==SImode)
2115 135 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", (long)INTVAL(x));
2116 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
2117 135 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", (long)INTVAL(x));
2118 102 dgisselq
+               else
2119 135 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", (long)INTVAL(x));
2120 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
2121
+               } break;
2122
+       case LABEL_REF:
2123 122 dgisselq
+               { char buf[256];
2124 111 dgisselq
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
2125
+               zip_debug_print(pfx, lvl, buf);
2126
+               }
2127 102 dgisselq
+               break;
2128
+       case SYMBOL_REF:
2129
+               {
2130 192 dgisselq
+                       char buf[128];
2131 102 dgisselq
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
2132
+                       // fprintf(file, "%s", XSTR(x,0));
2133
+                       zip_debug_print(pfx, lvl, buf);
2134
+               }
2135
+               break;
2136
+       case MEM:
2137
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
2138
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2139
+               zip_debug_print(pfx, lvl, ")");
2140
+               break;
2141
+       /*
2142
+       case VALUE:
2143
+               {
2144
+                       char buf[64];
2145
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2146
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2147
+               }
2148
+               break;
2149
+       */
2150
+       case PLUS:
2151
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2152
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2153
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2154
+               zip_debug_print(pfx, lvl, ")");
2155
+               break;
2156
+       case MINUS:
2157
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2158
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2159
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2160
+               zip_debug_print(pfx, lvl, ")");
2161
+               break;
2162
+       case AND:
2163
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2164
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2165
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2166
+               zip_debug_print(pfx, lvl, ")");
2167
+               break;
2168
+       case IOR:
2169
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2170
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2171
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2172
+               zip_debug_print(pfx, lvl, ")");
2173
+               break;
2174
+       case XOR:
2175
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2176
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2177
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2178
+               zip_debug_print(pfx, lvl, ")");
2179
+               break;
2180
+       case MULT:
2181
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2182
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2183
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2184
+               zip_debug_print(pfx, lvl, ")");
2185
+               break;
2186
+       case EQ:        //
2187
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2188
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2189
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2190
+               zip_debug_print(pfx, lvl, ")");
2191
+               break;
2192
+       case NE:        //
2193
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2194
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2195
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2196
+               zip_debug_print(pfx, lvl, ")");
2197
+               break;
2198
+       case GE:        //
2199
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2200
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2201
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2202
+               zip_debug_print(pfx, lvl, ")");
2203
+               break;
2204
+       case GT:        //
2205
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2206
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2207
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2208
+               zip_debug_print(pfx, lvl, ")");
2209
+               break;
2210
+       case LE:        //
2211
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2212
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2213
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2214
+               zip_debug_print(pfx, lvl, ")");
2215
+               break;
2216
+       case LT:        //
2217
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2218
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2219
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2220
+               zip_debug_print(pfx, lvl, ")");
2221
+               break;
2222
+       case GEU:       //
2223
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2224
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2225
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2226
+               zip_debug_print(pfx, lvl, ")");
2227
+               break;
2228
+       case GTU:       //
2229
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2230
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2231
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2232
+               zip_debug_print(pfx, lvl, ")");
2233
+               break;
2234
+       case LEU:       //
2235
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2236
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2237
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2238
+               zip_debug_print(pfx, lvl, ")");
2239
+               break;
2240
+       case LTU:       //
2241
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2242
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2243
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2244
+               zip_debug_print(pfx, lvl, ")");
2245
+               break;
2246
+       case SCRATCH:   //
2247
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2248
+               break;
2249
+       case SUBREG:
2250
+               { char buf[25];
2251 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2252
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2253
+                               SUBREG_BYTE(x));
2254
+                       zip_debug_print(pfx, lvl, buf);
2255
+               } else if (MEM_P(XEXP(x,0))) {
2256
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2257
+                       zip_debug_print(pfx, lvl, buf);
2258
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2259
+                       zip_debug_print(pfx, lvl, ")");
2260
+               } else {
2261
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2262
+                       zip_debug_print(pfx, lvl, buf);
2263
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2264
+                       zip_debug_print(pfx, lvl, ")");
2265
+               }}
2266
+               break;
2267 127 dgisselq
+       case ASHIFT:
2268
+               zip_debug_print_m(pfx, lvl, "(ASHIFT", GET_MODE(x));
2269
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2270
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2271
+               zip_debug_print(pfx, lvl, ")");
2272
+               break;
2273
+       case ASHIFTRT:
2274
+               zip_debug_print_m(pfx, lvl, "(ASHIFTRT", GET_MODE(x));
2275
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2276
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2277
+               zip_debug_print(pfx, lvl, ")");
2278
+               break;
2279
+       case LSHIFTRT:
2280
+               zip_debug_print_m(pfx, lvl, "(LSHIFTRT", GET_MODE(x));
2281
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2282
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2283
+               zip_debug_print(pfx, lvl, ")");
2284
+               break;
2285 102 dgisselq
+       default:
2286 111 dgisselq
+               { char buf[128];
2287 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2288
+               zip_debug_print(pfx, lvl, buf);
2289
+               debug_rtx(x);
2290
+               } break;
2291
+       }
2292
+}
2293
+
2294
+void
2295
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2296
+       zip_debug_rtx_1(pfx, x, 0);
2297
+}
2298
+
2299
+void
2300
+zip_debug_rtx(const_rtx x) {
2301
+       zip_debug_rtx_pfx("", x);
2302
+}
2303
+
2304
+void
2305 142 dgisselq
+zip_debug_ccode(int ccode) {
2306
+       switch(ccode) {
2307
+       case    EQ: fprintf(stderr, "EQ"); break;
2308
+       case    NE: fprintf(stderr, "NE"); break;
2309
+       case    GT: fprintf(stderr, "GT"); break;
2310
+       case    GE: fprintf(stderr, "GE"); break;
2311
+       case    LT: fprintf(stderr, "LT"); break;
2312
+       case    LE: fprintf(stderr, "LE"); break;
2313
+       case    GTU: fprintf(stderr, "GTU"); break;
2314
+       case    GEU: fprintf(stderr, "GEU"); break;
2315
+       case    LTU: fprintf(stderr, "LTU"); break;
2316
+       case    LEU: fprintf(stderr, "LEU"); break;
2317
+       default:
2318
+               fprintf(stderr, "%d", ccode); break;
2319
+       }
2320
+}
2321
+
2322
+void
2323 102 dgisselq
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2324
+}
2325
+
2326
+void
2327
+zip_debug_bb(basic_block bb) {
2328
+       rtx_insn        *insn;
2329
+
2330
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2331
+       FOR_BB_INSNS(bb, insn)
2332
+       {
2333
+               zip_debug_rtx(insn);
2334
+       }
2335
+}
2336
+
2337
+
2338
+static bool
2339 122 dgisselq
+zip_legitimate_opb(rtx x, bool strict)
2340 102 dgisselq
+{
2341 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2342 102 dgisselq
+
2343 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2344 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2345
+
2346
+       if (NULL_RTX == x)
2347
+               return false;
2348 122 dgisselq
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2349
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> Mode failure\n");
2350 102 dgisselq
+               return false;
2351 122 dgisselq
+       } else if ((strict)&&(REG_P(x))) {
2352
+               if (REGNO(x)<zip_CC) {
2353
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2354
+                       return true;
2355
+               } else return false;
2356
+       } else if (register_operand(x, GET_MODE(x))) {
2357
+               // This also handles subregs
2358
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2359
+               return true;
2360 111 dgisselq
+       } else if ((CONST_INT_P(x))
2361
+               &&(INTVAL(x) >= zip_min_opb_imm)
2362
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2363 136 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const) %ld <= %ld <= %ld\n", (long)zip_min_opb_imm, (long)INTVAL(x), (long)zip_max_opb_imm);
2364 111 dgisselq
+               return true;
2365 122 dgisselq
+       // } else if ((GET_CODE(x) == LABEL_REF)||(GET_CODE(x)==CODE_LABEL)) {
2366
+               // return true;
2367 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2368
+               // Is it a valid register?
2369 122 dgisselq
+               if ((!strict)&&(!register_operand((rtx)XEXP((rtx)x,0), GET_MODE(x)))) {
2370 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2371 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2372
+                       return false;
2373 122 dgisselq
+               } else if ((strict)&&((!REG_P(XEXP(x,0)))||(REGNO(XEXP(x,0))>=zip_CC))) {
2374 102 dgisselq
+                       return false;
2375
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2376
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2377
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2378 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2379 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2380
+                               // gcc_unreachable();
2381 102 dgisselq
+                       return true;
2382
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2383 122 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == CODE_LABEL)
2384 102 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2385
+                       // While we can technically support this, the problem
2386
+                       // is that the symbol address could be anywhere, and we
2387
+                       // have no way of recovering if it's outside of our
2388
+                       // 14 allowable bits.
2389 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2390 102 dgisselq
+                       return false;
2391
+               }
2392
+       }
2393
+
2394 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2395 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2396
+       return false;
2397
+}
2398
+
2399
+static bool
2400
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2401
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2402
+
2403
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2404
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2405
+
2406 122 dgisselq
+       if (!zip_legitimate_opb(x, strict))
2407 102 dgisselq
+               return false;
2408 122 dgisselq
+       else if ((GET_CODE(x)==PLUS)&&(CONST_INT_P(XEXP(x,1)))) {
2409
+               if ((INTVAL(XEXP(x, 1)) > zip_max_mov_offset)
2410
+                       ||(INTVAL(XEXP(x, 1)) < zip_min_mov_offset)) {
2411 135 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> NO! (reg+int), int out of bounds: %ld\n", (long)INTVAL(XEXP(x,1)));
2412 102 dgisselq
+                       return false;
2413
+               }
2414
+       }
2415
+
2416 122 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> Yes\n");
2417 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2418 122 dgisselq
+       return true;
2419 102 dgisselq
+}
2420
+
2421
+int
2422
+zip_pd_mov_operand(rtx op)
2423
+{
2424
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2425
+
2426
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2427
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2428
+}
2429
+
2430
+int
2431 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2432
+{
2433
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2434
+
2435
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2436
+       if (!CONST_INT_P(op))
2437
+               return false;
2438
+       if (INTVAL(op) > zip_max_mov_offset)
2439
+               return false;
2440
+       if (INTVAL(op) < zip_min_mov_offset)
2441
+               return false;
2442
+       return true;
2443
+}
2444
+
2445
+int
2446
+zip_pd_imm_operand(rtx op)
2447
+{
2448
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2449
+
2450
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2451
+       if (!CONST_INT_P(op))
2452
+               return false;
2453
+       if (INTVAL(op) > zip_max_anchor_offset)
2454
+               return false;
2455
+       if (INTVAL(op) < zip_min_anchor_offset)
2456
+               return false;
2457
+       return true;
2458
+}
2459
+
2460
+int
2461 102 dgisselq
+zip_address_operand(rtx op)
2462
+{
2463
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2464
+
2465
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2466 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2467
+               return false;
2468
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2469
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2470
+               return false;
2471
+       else
2472
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2473 102 dgisselq
+}
2474
+
2475
+int
2476 111 dgisselq
+zip_pd_opb_operand(rtx op)
2477 102 dgisselq
+{
2478
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2479
+
2480 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2481 122 dgisselq
+       return zip_legitimate_opb(op, false); //, !can_create_pseudo_p());
2482 102 dgisselq
+}
2483
+
2484
+int
2485
+zip_ct_address_operand(rtx op)
2486
+{
2487
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2488
+
2489
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2490 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2491 102 dgisselq
+}
2492
+
2493
+int
2494
+zip_const_address_operand(rtx x) {
2495
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2496
+
2497
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2498
+       if (dbg) zip_debug_rtx(x);
2499 127 dgisselq
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2500
+               fprintf(stderr, "is ZIP-CONST-ADDRESS? -> NO, BAD MODE\n");
2501 102 dgisselq
+               return false;
2502 127 dgisselq
+       }
2503 102 dgisselq
+       if ((GET_CODE(x) == LABEL_REF)
2504
+                       ||(GET_CODE(x) == CODE_LABEL)
2505
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2506 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (LBL)\n");
2507 102 dgisselq
+               return true;
2508
+       } else if (CONST_INT_P(x)) {
2509 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (INT)\n");
2510 102 dgisselq
+               return true;
2511
+       } else if (GET_CODE(x) == PLUS) {
2512
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2513
+               return ((zip_const_address_operand(XEXP(x,0)))
2514
+                       &&(CONST_INT_P(XEXP(x,1))));
2515
+       } else if (GET_CODE(x) == MINUS) {
2516
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2517
+               return ((zip_const_address_operand(XEXP(x,0)))
2518
+                       &&(zip_const_address_operand(XEXP(x,1))));
2519
+       }
2520
+
2521
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2522
+       if (dbg) zip_debug_rtx(x);
2523
+       return false;
2524
+}
2525
+
2526
+int
2527
+zip_ct_const_address_operand(rtx x) {
2528
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2529
+
2530
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2531
+       return zip_const_address_operand(x);
2532
+}
2533
+
2534
+int
2535
+zip_pd_const_address_operand(rtx x) {
2536
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2537
+
2538
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2539
+       return zip_const_address_operand(x);
2540
+}
2541
+
2542
+
2543
+static bool
2544
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2545
+{
2546
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2547
+
2548
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2549
+       if (dbg) zip_debug_rtx(x);
2550
+
2551
+       // Only insist the register be a valid register if strict is true
2552 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2553 102 dgisselq
+               return true;
2554 111 dgisselq
+       // else if (zip_const_address_operand(x))
2555
+               // return true;
2556 102 dgisselq
+
2557
+       return false;
2558
+}
2559
+
2560 111 dgisselq
+static rtx
2561
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2562
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2563
+
2564
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2565
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2566
+               return x;
2567
+
2568
+       if (GET_CODE(x)==PLUS) {
2569
+               if (!REG_P(XEXP(x,0)))
2570
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2571
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2572
+                       &&(!CONST_INT_P(XEXP(x,1))))
2573
+                       x = force_reg(GET_MODE(x),x);
2574
+       } else if (MEM_P(x))
2575
+               x = force_reg(GET_MODE(x),x);
2576
+
2577
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2578
+       return x;
2579
+}
2580
+
2581 102 dgisselq
+void
2582
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2583
+{
2584
+       assemble_name(stream, name);
2585
+       fprintf(stream, "\t.equ ");
2586
+       assemble_name(stream, value);
2587
+       fputc('\n', stream);
2588
+}
2589
+
2590 111 dgisselq
+#define        USE_SUBREG
2591
+#ifdef USE_SUBREG
2592
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2593
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2594
+#else
2595
+#define        SREG_P(RTX)     false
2596
+#define        SMEM_P(RTX)     false
2597
+#endif
2598 102 dgisselq
+
2599
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2600 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2601 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2602
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2603
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2604
+       switch(GET_CODE(condition)) {
2605
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2606
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2607
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2608
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2609
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2610
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2611
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2612
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2613
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2614
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2615
+       default:
2616
+               zip_debug_rtx(condition);
2617
+               internal_error("CSTORE Unsupported condition");
2618
+               return NULL;
2619
+       }
2620
+}
2621
+
2622 127 dgisselq
+/*
2623 102 dgisselq
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2624
+       static char     result[64] = "";
2625
+       switch(condition) {
2626
+               //
2627
+               // Result already exists in the iffalse register
2628
+               // Can't change it.  Therefore, on the
2629
+               // condition ... move true register to the
2630
+               // destination
2631
+               //
2632
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2633
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2634
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2635
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2636
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2637
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2638
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2639
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2640
+               //
2641
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2642
+               // .C will never be set on an equal condition.  Therefore, we
2643
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2644
+               // as long as .Z wasn't true.  We then undo this when we're
2645
+               // done.  This is possible since none of these instructions
2646
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2647
+               // the condition codes.
2648
+               //
2649
+               // This is obviously not very optimal.  Avoid this by all means
2650
+               // if you can
2651
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2652
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2653
+               // two instructions
2654
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2655
+               //
2656
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2657
+               // painful.  We can change the condition codes to make it so,
2658
+               // but the instruction requires the condition codes not be
2659
+               // changed.  Hence, we must change them back if we do so.
2660
+               //
2661
+               // .C will be set on less than but not equal.  Hence !.C will
2662
+               // be true on greater than or equal.
2663
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2664
+               default:
2665
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2666
+                       return NULL;
2667
+       } return result;
2668
+}
2669 127 dgisselq
+*/
2670 102 dgisselq
+
2671 200 dgisselq
+int
2672 127 dgisselq
+zip_supported_condition(int c) {
2673
+       switch(c) {
2674
+       case NE: case LT: case EQ: case GT: case GE: case LTU:
2675 200 dgisselq
+               return 1;
2676 127 dgisselq
+               break;
2677
+       default:
2678
+               break;
2679 200 dgisselq
+       } return 0;
2680 102 dgisselq
+}
2681
+
2682 127 dgisselq
+bool
2683
+zip_signed_comparison(int c) {
2684
+       switch(c) {
2685
+       case NE: case LT: case EQ: case GT: case GE:
2686
+               return true;
2687
+       default:
2688
+               break;
2689
+       } return false;
2690
+}
2691
+
2692 200 dgisselq
+int
2693 127 dgisselq
+zip_expand_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2694 142 dgisselq
+       rtx_insn *insn;
2695 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2696 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2697
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2698
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2699
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2700
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2701 127 dgisselq
+
2702
+       // Start with the condition
2703
+       rtx     cmpa = XEXP(condition,0), cmpb=XEXP(condition,1);
2704
+       enum rtx_code   cmpcode = GET_CODE(condition);
2705
+
2706 142 dgisselq
+       // Want to always do the false expression, and only sometimes the
2707
+       // true expression.  If, however, the false is a constant and the
2708
+       // true and destination are the same thing, this doesn't work.
2709
+       if (rtx_equal_p(dst, iftrue)) {
2710
+               // If the true value is the same as the destination already,
2711
+               // then swap so we only do the condition on true
2712
+               rtx tem = iffalse;
2713
+               iffalse = iftrue;
2714
+               iftrue  = tem;
2715
+               cmpcode = reverse_condition(cmpcode);
2716
+       }
2717
+
2718 127 dgisselq
+       //; Do we need to swap or adjust the condition?
2719
+       if (zip_supported_condition((int)cmpcode)) {
2720
+               // Keep everything as is
2721 142 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Condition is supported\n");
2722 127 dgisselq
+       } else if ((zip_supported_condition(reverse_condition(cmpcode)))
2723 142 dgisselq
+                       &&(!MEM_P(iffalse))
2724
+                       &&(!rtx_equal_p(dst,iffalse))) {
2725 127 dgisselq
+               rtx tem = iffalse;
2726
+               iffalse = iftrue;
2727
+               iftrue = tem;
2728
+
2729
+               cmpcode = reverse_condition(cmpcode);
2730
+       } else if ((zip_supported_condition((int)swap_condition(cmpcode)))
2731
+               &&((REG_P(cmpb))||(can_create_pseudo_p()))) {
2732
+               rtx tem = cmpa;
2733
+               cmpa = cmpb;
2734
+               cmpa = tem;
2735
+               cmpcode = swap_condition(cmpcode);
2736
+
2737
+               if ((GET_CODE(cmpa)==PLUS)&&(zip_signed_comparison((int)cmpcode))
2738
+                       &&(REG_P(XEXP(cmpa,0)))
2739
+                       &&(CONST_INT_P(XEXP(cmpa,1)))
2740
+                       &&(abs(INTVAL(XEXP(cmpa,1)))<(1<<17))) {
2741
+
2742
+                       // If we were doing CMP x(Rb),Ra
2743
+                       // and we just changed it to CMP Ra,x(Rb)
2744
+                       // adjust it to CMP -x(Ra),Rb
2745
+                       cmpb = plus_constant(SImode, cmpb, -INTVAL(XEXP(cmpa,1)));
2746
+                       cmpa = XEXP(cmpa,0);
2747
+               } else if (!REG_P(cmpa)) {
2748
+                       // Otherwise, if we had anything else in Rb other than
2749
+                       // a register ... such as a constant, then load it into
2750
+                       // a register before comparing it.  So
2751
+                       //      CMP x,Ra
2752
+                       // became
2753
+                       //      CMP Ra,x
2754
+                       // now becomes
2755
+                       //      LDI x,Rt
2756
+                       //      CMP Ra,Rt
2757
+                       // (We already tested for can_create_pseudo_p() above..)
2758
+                       tem = gen_reg_rtx(SImode);
2759
+                       emit_move_insn(tem, cmpa);
2760
+                       cmpa = tem;
2761 102 dgisselq
+               }
2762 127 dgisselq
+       } else {
2763
+               // Here's our last chance.
2764
+               // This will adjust for less than equal types of stuff
2765
+               int     cod = (int)cmpcode;
2766
+               zip_canonicalize_comparison(&cod, &cmpa, &cmpb, false);
2767
+               cmpcode = (enum rtx_code)cod;
2768 102 dgisselq
+       }
2769
+
2770 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Post-Modes\n");
2771
+       if (dbg) zip_debug_rtx_pfx("DST-P: ", dst);
2772
+       if (dbg) zip_debug_rtx_pfx("CND-P: ", condition);
2773
+       if (dbg) zip_debug_rtx_pfx("TRU-P: ", iftrue);
2774
+       if (dbg) zip_debug_rtx_pfx("FAL-P: ", iffalse);
2775
+
2776
+       if (!zip_supported_condition((int)cmpcode)) {
2777
+               if (dbg) {
2778
+               fprintf(stderr, "ZIP::MOVSICC -- Unsupported condition: ");
2779
+                       zip_debug_ccode(cmpcode);
2780
+                       fprintf(stderr, "\n");
2781
+               }
2782 200 dgisselq
+               return 0;
2783 142 dgisselq
+       }
2784 127 dgisselq
+       gcc_assert(zip_supported_condition((int)cmpcode));
2785
+
2786
+       //; Always do the default move
2787 142 dgisselq
+       bool    conditionally_do_false = false;
2788
+       conditionally_do_false = (MEM_P(iffalse))
2789
+               &&(!rtx_equal_p(dst,iffalse))
2790
+               &&(zip_supported_condition(reverse_condition(cmpcode)));
2791
+       conditionally_do_false = conditionally_do_false || (rtx_equal_p(dst,iftrue));
2792
+       if ((conditionally_do_false)&&(!zip_supported_condition(reverse_condition(cmpcode)))) {
2793
+               if (dbg) {
2794
+                       fprintf(stderr, "ZIP::MOVSICC -- Cant support the reverse condition: ");
2795
+                       zip_debug_ccode(cmpcode);
2796
+                       fprintf(stderr, "\n");
2797
+               }
2798 200 dgisselq
+               return 0;
2799 142 dgisselq
+       }
2800 127 dgisselq
+
2801 142 dgisselq
+       if ((!rtx_equal_p(dst, iffalse))&&(!conditionally_do_false)) {
2802
+               if (dbg)
2803
+               fprintf(stderr, "ZIP::MOVSICC -- EMITTING MOVE FALSE->DST\n");
2804
+               insn = emit_move_insn(dst, iffalse);
2805
+               if (dbg) zip_debug_rtx_pfx("BARE-U: ", insn);
2806
+       }
2807
+
2808 127 dgisselq
+       rtx     cc_rtx = gen_rtx_REG(CCmode, zip_CC);
2809
+
2810
+       //; Now let's get our comparison right
2811 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING COMPARISON\n");
2812
+       insn = emit_insn(gen_rtx_SET(VOIDmode, cc_rtx,
2813 127 dgisselq
+               gen_rtx_COMPARE(CCmode, cmpa, cmpb)));
2814 142 dgisselq
+       if (dbg) zip_debug_rtx_pfx("BARE-C: ", insn);
2815 127 dgisselq
+
2816
+       //; Finally, let's load the value on true
2817 142 dgisselq
+       if (!rtx_equal_p(dst, iftrue)) {
2818
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING BARE\n");
2819
+               insn=emit_insn(gen_movsicc_bare(dst,
2820 127 dgisselq
+                       gen_rtx_fmt_ee(cmpcode, SImode, NULL_RTX, NULL_RTX),
2821
+                       iftrue, dst));
2822 142 dgisselq
+               if (dbg) zip_debug_rtx_pfx("BARE-T: ", insn);
2823
+       }
2824
+
2825
+       if (conditionally_do_false) {
2826
+               gcc_assert(zip_supported_condition(reverse_condition(cmpcode)));
2827
+               insn=emit_insn(gen_movsicc_bare(dst,
2828
+                       gen_rtx_fmt_ee(reverse_condition(cmpcode), SImode,
2829
+                       NULL_RTX, NULL_RTX), iffalse, dst));
2830
+               if (dbg) zip_debug_rtx_pfx("BARE-F: ", insn);
2831
+       }
2832
+
2833
+       // Return true on success
2834 200 dgisselq
+       return 1;
2835 102 dgisselq
+}
2836
+
2837
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2838
+       // We know upon entry that REG_P(dst) must be true
2839
+       if (!REG_P(dst))
2840
+               internal_error("%s","ADDSICC into something other than register");
2841
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2842
+               switch (GET_CODE(condition)) {
2843
+               case EQ: return "ADD.Z\t%3,%0";
2844
+               case NE: return "ADD.NZ\t%3,%0";
2845
+               case LT: return "ADD.LT\t%3,%0";
2846
+               case GT: return "ADD.GT\t%3,%0";
2847
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2848
+               case GE: return "ADD.GE\t%3,%0";
2849
+               case LTU: return "ADD.C\t%3,%0";
2850
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2851
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2852
+               // Can do a GEU comparison, and then undo on the Zero condition
2853
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2854
+               default:
2855
+                       internal_error("%s", "Zip/No usable addsi expansion");
2856
+                       break;
2857
+               }
2858
+       } else {
2859
+               // MOV A+REG,REG
2860
+               switch (GET_CODE(condition)) {
2861
+               case EQ: return "MOV.Z\t%3+%2,%0";
2862
+               case NE: return "MOV.NZ\t%3+%2,%0";
2863
+               case LT: return "MOV.LT\t%3+%2,%0";
2864
+               case GT: return "MOV.GT\t%3+%2,%0";
2865
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2866
+               case GE: return "MOV.GE\t%3+%2,%0";
2867
+               case LTU: return "MOV.C\t%3+%2,%0";
2868
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2869
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2870
+               // Can do a GEU comparison, and then undo on the Zero condition
2871
+               // EXCEPT: with a move instruction, what's there to undo?  We
2872
+               // just clobbered our register!
2873
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2874
+               default:
2875
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2876
+                       break;
2877
+               }
2878
+       }
2879
+
2880
+       return "BREAK";
2881
+}
2882
+
2883 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2884 102 dgisselq
+       int     rv = 14;
2885
+       if ((mode == DImode)||(mode == DFmode))
2886
+               rv += 2;
2887
+       return rv;
2888
+}
2889
+
2890 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
2891 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void) {
2892
+       // Let's try their suggested approach, keeping us from modifying jumps
2893
+       // after reload.  This should also allow our peephole2 optimizations
2894
+       // to adjust things back to what they need to be if necessary.
2895
+       return (reload_completed || reload_in_progress);
2896
+}
2897 122 dgisselq
+
2898
+rtx_insn       *zip_ifcvt_info;
2899
+
2900
+void
2901
+zip_ifcvt_modify_tests(ce_if_block *ce_info ATTRIBUTE_UNUSED, rtx *true_expr, rtx *false_expr) {
2902
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2903
+       if (dbg) fprintf(stderr, "IFCVT-MODIFY-TESTS\n");
2904
+       if (*true_expr) switch(GET_CODE(*true_expr)) {
2905
+               case LE:
2906
+               case GTU:
2907
+               case GEU:
2908
+               case LEU:
2909
+                       if (dbg) fprintf(stderr, "TRUE, missing expr\n");
2910
+                       if (dbg) zip_debug_rtx(*true_expr);
2911
+                       *true_expr = NULL_RTX;
2912
+                       break;
2913
+               default: // LT, GT, GTE, LTU, NE, EQ
2914
+                       break;
2915
+       }
2916
+
2917
+       if (*false_expr) switch(GET_CODE(*false_expr)) {
2918
+               case LE:
2919
+               case GTU:
2920
+               case GEU:
2921
+               case LEU:
2922
+                       if (dbg) fprintf(stderr, "FALSE, missing expr\n");
2923
+                       if (dbg) zip_debug_rtx(*false_expr);
2924
+                       *false_expr = NULL_RTX;
2925
+               default:
2926
+                       break;
2927
+       }
2928
+       if ((dbg)&&((!*true_expr)||(!*false_expr)))
2929
+               fprintf(stderr, "IFCVT-MODIFY-TESTS -- FAIL\n");
2930
+}
2931
+
2932
+void
2933 142 dgisselq
+zip_ifcvt_machdep_init(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2934 122 dgisselq
+/*
2935 142 dgisselq
+if (!ceinfo->then_bb)
2936
+       return;
2937
+rtx_insn *insn;
2938
+FOR_BB_INSNS(ceinfo->then_bb, insn) {
2939
+       fprintf(stderr, "IFCVT -- INIT\n");
2940
+       zip_debug_rtx_pfx("INIT-BB", insn);
2941 122 dgisselq
+}
2942
+*/
2943
+/*
2944
+       zip_ifcvt_info = NULL;
2945
+       rtx_insn *insn, *ifinsn = NULL;
2946
+       FOR_BB_INSNS(ceinfo->test_bb, insn) {
2947
+               rtx     p;
2948
+               p = single_set(insn);
2949
+               if (!p) continue;
2950
+               if (SET_DEST(p)==pc_rtx) {
2951
+                       ifinsn = insn;
2952
+               }
2953
+               if (!REG_P(SET_DEST(p)))
2954
+                       continue;
2955
+               if (GET_MODE(SET_DEST(p))!=CCmode)
2956
+                       continue;
2957
+               if (REGNO(SET_DEST(p))!=zip_CC)
2958
+                       continue;
2959
+               zip_ifcvt_info = insn;
2960
+       }
2961
+
2962
+       if (zip_ifcvt_info)
2963
+               zip_debug_rtx_pfx("PUTATIVE-CMP",zip_ifcvt_info);
2964
+       if (ifinsn)
2965
+               zip_debug_rtx_pfx("PRIOR-JMP",ifinsn);
2966
+*/
2967
+}
2968
+
2969 142 dgisselq
+void
2970
+zip_ifcvt_modify_insn(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED,
2971
+               rtx pattern ATTRIBUTE_UNUSED,
2972
+               rtx_insn *insn ATTRIBUTE_UNUSED) {
2973
+       // zip_debug_rtx_pfx("MODIFY-INSN: ", insn);
2974
+}
2975
+
2976
+void
2977
+zip_ifcvt_modify_cancel(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2978
+/*
2979
+       fprintf(stderr, "IFCVT -- CANCEL\n");
2980
+       zip_ifcvt_info = NULL;
2981
+*/
2982
+}
2983
+
2984
+void
2985
+zip_ifcvt_modify_final(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2986
+/*
2987
+rtx_insn *insn;
2988
+FOR_BB_INSNS(ceinfo->test_bb, insn) {
2989
+       fprintf(stderr, "IFCVT -- FINAL\n");
2990
+       zip_debug_rtx_pfx("FINAL-TEST-BB", insn);
2991
+}
2992
+       zip_ifcvt_info = NULL;
2993
+*/
2994
+}
2995
+
2996
+
2997 127 dgisselq
+int    zip_insn_sets_cc(rtx_insn *insn) {
2998
+       return (get_attr_ccresult(insn)==CCRESULT_SET);
2999
+}
3000
+
3001
+int    zip_is_conditional(rtx_insn *insn) {
3002
+       return (get_attr_conditional(insn)==CONDITIONAL_YES);
3003
+}
3004 200 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip-float.md gcc-5.3.0-zip/gcc/config/zip/zip-float.md
3005
--- gcc-5.3.0-original/gcc/config/zip/zip-float.md      1969-12-31 19:00:00.000000000 -0500
3006
+++ gcc-5.3.0-zip/gcc/config/zip/zip-float.md   2016-11-10 10:17:53.248750791 -0500
3007
@@ -0,0 +1,138 @@
3008
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3009
+;;
3010
+;; Filename:   zip-float.md
3011
+;;
3012
+;; Project:    Zip CPU -- a small, lightweight, RISC CPU soft core
3013
+;;
3014
+;; Purpose:    This is the machine description of the ZipCPU floating point
3015
+;;             unit (if installed).
3016
+;;
3017
+;;
3018
+;; Creator:    Dan Gisselquist, Ph.D.
3019
+;;             Gisselquist Technology, LLC
3020
+;;
3021
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3022
+;;
3023
+;; Copyright (C) 2015, Gisselquist Technology, LLC
3024
+;;
3025
+;; This program is free software (firmware): you can redistribute it and/or
3026
+;; modify it under the terms of  the GNU General Public License as published
3027
+;; by the Free Software Foundation, either version 3 of the License, or (at
3028
+;; your option) any later version.
3029
+;;
3030
+;; This program is distributed in the hope that it will be useful, but WITHOUT
3031
+;; ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
3032
+;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3033
+;; for more details.
3034
+;;
3035
+;; License:    GPL, v3, as defined and found on www.gnu.org,
3036
+;;             http://www.gnu.org/licenses/gpl.html
3037
+;;
3038
+;;
3039
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3040
+;;
3041
+;;
3042
+;
3043
+;
3044
+;
3045
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3046
+;;
3047
+;; Floating point Op-codes
3048
+;;
3049
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3050
+;
3051
+;
3052
+;
3053
+(define_insn "addsf3"
3054
+       [(set (match_operand:SF 0 "register_operand" "=r")
3055
+               (plus:SF (match_operand:SF 1 "register_operand" "0")
3056
+                       (match_operand:SF 2 "register_operand" "r")))
3057
+       (set (reg:CC CC_REG) (compare:CC (match_dup 0) (const_int 0)))]
3058
+       "(ZIP_FPU)"
3059
+       "FPADD  %2,%0"
3060
+       [(set_attr "ccresult" "unknown")])
3061
+(define_insn "subsf3"
3062
+       [(set (match_operand:SF 0 "register_operand" "=r")
3063
+               (minus:SF (match_operand:SF 1 "register_operand" "0")
3064
+                       (match_operand:SF 2 "register_operand" "r")))
3065
+       (set (reg:CC CC_REG) (compare:CC (match_dup 0) (const_int 0)))]
3066
+       "(ZIP_FPU)"
3067
+       "FPSUB  %2,%0"
3068
+       [(set_attr "ccresult" "unknown")])
3069
+(define_insn "mulsf3"
3070
+       [(set (match_operand:SF 0 "register_operand" "=r")
3071
+               (mult:SF (match_operand:SF 1 "register_operand" "0")
3072
+                       (match_operand:SF 2 "register_operand" "r")))
3073
+       (set (reg:CC CC_REG) (compare:CC (match_dup 0) (const_int 0)))]
3074
+       "(ZIP_FPU)"
3075
+       "FPMUL  %2,%0"
3076
+       [(set_attr "ccresult" "unknown")])
3077
+(define_insn "divsf3"
3078
+       [(set (match_operand:SF 0 "register_operand" "=r")
3079
+               (div:SF (match_operand:SF 1 "register_operand" "0")
3080
+                       (match_operand:SF 2 "register_operand" "r")))
3081
+       (set (reg:CC CC_REG) (compare:CC (match_dup 0) (const_int 0)))]
3082
+       "(ZIP_FPU)"
3083
+       "FPDIV  %2,%0"
3084
+       [(set_attr "ccresult" "unknown")])
3085
+; (define_insn "floatsisf2"
3086
+;      [(set (match_operand:SF 0 "register_operand" "=r"
3087
+;              (float:SI (match_operand:SF 1 "register_operand" "r"))))
3088
+;      (set (reg:CC CC_REG) (compare:CC (match_dup 1) (const_int 0)))]
3089
+;      "(ZIP_FPU)"
3090
+;      "FPI2F  %1,%0")
3091
+; (define_insn "floatunssisf2" ... ?)
3092
+; (define_insn "fix_truncsfsi2"
3093
+;      [(set (match_operand:SI 0 "register_operand" "=r"
3094
+;              (float:SF (match_operand:SF 1 "register_operand" "r"))))
3095
+;      (set (reg:CC CC_REG) (compare:CC (match_dup 1) (const_int 0)))]
3096
+;      "(ZIP_FPU)"
3097
+;      "FPI2F  %1,%0")
3098
+; (define_insn "nearbyintsf2" ... ?)
3099
+; (define_insn "truncsfsi2" ... ?)
3100
+(define_expand "negsf2"
3101
+       [(set (match_operand:SF 0 "register_operand" "=r")
3102
+               (neg:SF (match_operand:SF 1 "register_operand" "0")))
3103
+       ]
3104
+       ""
3105
+       {
3106
+               operands[0] = gen_rtx_SUBREG(SImode, operands[0], 0);
3107
+               if (can_create_pseudo_p()) {
3108
+                       rtx tmp = gen_reg_rtx(SImode);
3109
+                       emit_insn(gen_movsi_ldi(tmp,gen_int_mode(0x80000000,SImode)));
3110
+                       emit_insn(gen_xorsi3(operands[0], operands[0], tmp));
3111
+                       DONE;
3112
+               } else {
3113
+                       emit_insn(gen_zip_bitrev(operands[0],operands[0]));
3114
+                       emit_insn(gen_iorsi3(operands[0], operands[0],
3115
+                               gen_int_mode(1,SImode)));
3116
+                       emit_insn(gen_zip_bitrev(operands[0],operands[0]));
3117
+                       DONE;
3118
+               }
3119
+       })
3120
+(define_expand "abssf2"
3121
+       [(set (match_operand:SF 0 "register_operand" "=r")
3122
+               (abs:SF (match_operand:SF 1 "register_operand" "0")))
3123
+       ]
3124
+       ""
3125
+       {
3126
+               operands[0] = gen_rtx_SUBREG(SImode, operands[0], 0);
3127
+               if (can_create_pseudo_p()) {
3128
+                       rtx tmp = gen_reg_rtx(SImode);
3129
+                       emit_insn(gen_movsi_ldi(tmp,gen_int_mode(0x7fffffff,SImode)));
3130
+                       emit_insn(gen_andsi3(operands[0], operands[0], tmp));
3131
+                       DONE;
3132
+               } else {
3133
+                       emit_insn(gen_zip_bitrev(operands[0],operands[0]));
3134
+                       emit_insn(gen_andsi3(operands[0], operands[0],
3135
+                               gen_int_mode(-2,SImode)));
3136
+                       emit_insn(gen_zip_bitrev(operands[0],operands[0]));
3137
+                       DONE;
3138
+               }
3139
+       })
3140
+;
3141
+;
3142
+; STILL MISSING:
3143
+;
3144
+;
3145
+;
3146 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
3147
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
3148 200 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-11-19 08:26:58.092386679 -0500
3149
@@ -0,0 +1,4096 @@
3150 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
3151
+//
3152
+// Filename:   gcc/config/zip/zip.h
3153
+//
3154
+// Project:    Zip CPU backend for the GNU Compiler Collection
3155
+//
3156
+// Purpose:
3157
+//
3158
+// Creator:    Dan Gisselquist, Ph.D.
3159
+//             Gisselquist Technology, LLC
3160
+//
3161
+////////////////////////////////////////////////////////////////////////////////
3162
+//
3163
+// Copyright (C) 2016, Gisselquist Technology, LLC
3164
+//
3165
+// This program is free software (firmware): you can redistribute it and/or
3166
+// modify it under the terms of  the GNU General Public License as published
3167
+// by the Free Software Foundation, either version 3 of the License, or (at
3168
+// your option) any later version.
3169
+//
3170
+// This program is distributed in the hope that it will be useful, but WITHOUT
3171
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
3172
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3173
+// for more details.
3174
+//
3175
+// You should have received a copy of the GNU General Public License along
3176
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
3177
+// target there if the PDF file isn't present.)  If not, see
3178
+// <http://www.gnu.org/licenses/> for a copy.
3179
+//
3180
+// License:    GPL, v3, as defined and found on www.gnu.org,
3181
+//             http://www.gnu.org/licenses/gpl.html
3182
+//
3183
+//
3184
+////////////////////////////////////////////////////////////////////////////////
3185
+#ifndef        GCC_ZIP_H
3186
+#define        GCC_ZIP_H
3187
+
3188
+
3189
+//
3190
+//
3191 127 dgisselq
+// Zip CPU configuration defines
3192 102 dgisselq
+//
3193
+//
3194
+#define        ZIP_USER        0        // Assume we are in supervisor mode
3195
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
3196
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
3197
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
3198
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
3199
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
3200 200 dgisselq
+#define        ZIP_ATOMIC      (ZIP_PIPELINED)
3201 102 dgisselq
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
3202
+#define        ZIP_HAS_DI      1
3203 127 dgisselq
+// Should we use the peephole optimizations?
3204
+#define        ZIP_PEEPHOLE    1       // 0 means no peephole optimizations.
3205 138 dgisselq
+// How about the new long multiply instruction set?
3206
+#define        ZIP_LONGMPY     1       // 0 means use the old instruction set
3207 200 dgisselq
+#define        ZIP_NEW_CONDITION_CODE  0        // 0 means use the old condition codes
3208 102 dgisselq
+
3209
+// Zip has 16 registers in each user mode.
3210
+//     Register 15 is the program counter (PC)
3211
+//     Register 14 is the condition codes (CC)
3212
+//     Register 13 is the stack pointer   (SP)
3213
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
3214
+//     Register  0 (may be) the return address pointer
3215
+// Registers 16-31 may only be used in supervisor mode.
3216
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
3217 171 dgisselq
+#define        is_ZIP_REG(REGNO)               ((REGNO)<33)
3218 102 dgisselq
+
3219 171 dgisselq
+#define        zip_AP_PSEUDO   32
3220 103 dgisselq
+#define        zip_PC          15
3221
+#define        zip_CC          14
3222
+#define        zip_SP          13
3223
+#define        zip_FP          12
3224
+#define        zip_GOT         11
3225 171 dgisselq
+// #define     zip_AP          10      // We're using a PSEUDO REG instead
3226 103 dgisselq
+#define        zip_R1          1
3227
+#define        zip_R0          0
3228 102 dgisselq
+
3229
+#define        ZIP_FIRST_ARG_REGNO     1
3230
+#define        ZIP_LAST_ARG_REGNO      5
3231 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3232
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3233 102 dgisselq
+
3234
+/* The overall framework of an assembler file */
3235
+
3236
+#define        ASM_COMMENT_START       ";"
3237
+#define        ASM_APP_ON              ""
3238
+#define        ASM_APP_OFF             ""
3239
+
3240
+#define        FILE_ASM_OP             "\t.file\n"
3241
+
3242
+/* Output and Generation of Labels */
3243
+#define        GLOBAL_ASM_OP           "\t.global\t"
3244
+
3245
+#undef BITS_PER_UNIT
3246
+#define        BITS_PER_UNIT   (32)
3247
+
3248
+/* Assembler Commands for Alignment */
3249
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
3250 127 dgisselq
+       { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
3251 102 dgisselq
+
3252
+
3253
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
3254
+ * for an instruction operand X. */
3255
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
3256
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
3257
+
3258
+/* Passing arguments in registers */
3259
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
3260
+
3261
+/* Define how to find the value returned by a function.  VALTYPE is the data
3262
+ * type of the value (as a tree).  If the precise function being called is known
3263
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
3264
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
3265
+
3266
+/* Define how to find the value returned by a library function assuming the
3267
+ * value has mode MODE.
3268
+ */
3269
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
3270
+
3271
+
3272
+/* STACK AND CALLING */
3273
+
3274
+
3275
+/* Define this macro as a C expression that is nonzero for registers that are
3276
+ * used by the epilogue or the return pattern.  The stack and frame pointer
3277
+ * registers are already assumed to be used as needed.
3278
+ */
3279
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
3280
+
3281
+
3282
+/* The best alignment to use in cases where we have a choice. */
3283 127 dgisselq
+#define        FASTEST_ALIGNMENT       BITS_PER_WORD
3284 102 dgisselq
+
3285
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3286
+ * largest integer machine mode that should actually be used.  All integer
3287
+ * machine modes of this size and smaller can be used for structures and unions
3288
+ * with the appropriate sizes.  If this macro is undefined,
3289
+ * GET_MODE_BITSIZE(DImode) is assumed.
3290
+ *
3291
+ * ZipCPU -- The default looks good enough for us.
3292
+ */
3293
+
3294
+/* Generate Code for Profiling
3295
+ */
3296
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3297
+
3298
+
3299
+/* A C expression which is nonzero if register number NUM is suitable for use
3300
+ * as an index register in operand addresses.
3301
+ */
3302
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3303
+
3304
+
3305
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3306
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3307
+ * operand of mode MODE.
3308
+ */
3309 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3310
+// DRIVER_SELF_SPECS
3311
+// OPTION_DEFAULT_SPECS
3312
+// CPP_SPEC
3313
+// CPLUSPLUS_CPP_SPEC
3314
+// CC1_SPEC
3315
+// CC1PLUS_SPEC
3316
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3317
+ * to pass to the assembler.  It can also specify how to translate options you
3318
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3319
+ * 'sun3.h' for an example of this.
3320
+ *
3321
+ * Do not define thismacro if it does not need to do anything.
3322
+ */
3323
+// #undef      ASM_SPEC
3324
+// ASM_FINAL_SPEC
3325
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3326
+
3327
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3328
+ * to pass to the linker.  It can also specify how to translate options you give
3329
+ * to GCC into options for GCC to pass to the linker.
3330
+ *
3331
+ * Do not define this macro if it does not need to do anything.
3332
+ */
3333
+
3334
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3335
+ * difference between the two is that LIB_SPEC is used at the end of the
3336
+ * command given to the linker.
3337
+ *
3338
+ * If this macro is not defined, a default is provided that loads the standard
3339
+ * C library from the usual place.  See 'gcc.c'.
3340
+ */
3341
+#undef LIB_SPEC
3342
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3343
+#define        LIB_SPEC        ""
3344
+
3345
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3346
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3347
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3348
+ *
3349
+ * If this macro is not defined, the GCC driver provides a default that passes
3350
+ * the string '-lgcc' to the linker.
3351
+ */
3352
+#undef LIBGCC_SPEC
3353
+#define        LIBGCC_SPEC     ""
3354
+
3355
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3356
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3357
+ * modified to refer to different versions of 'libgcc.a' depending on the
3358
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3359
+ * and '-shared-libgcc'.  On targets where these modifications are
3360
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3361
+ * driver how to place a reference to 'libgcc' on the link command line, but
3362
+ * unlike LIBGCC_SPEC, it is used unmodified.
3363
+ */
3364
+#define        REAL_LIBGCC_SPEC        ""
3365
+
3366
+// USE_LD_AS_NEEDED
3367
+// LINK_EH_SPEC
3368
+
3369
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3370
+ * difference between the two is that STARTFILE_SPEC is used at the very
3371
+ * beginning of the command given to the linker.
3372
+ *
3373
+ * If this macro is not defined, a default is provided that loads the standard
3374
+ * C startup file from the usual place.  See 'gcc.c'
3375
+ */
3376
+#undef STARTFILE_SPEC
3377
+#define        STARTFILE_SPEC  ""
3378
+
3379
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3380
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3381
+ * of the command given to the linker.
3382
+ *
3383
+ * Do not define this macro if it does not do anything.
3384
+ */
3385
+// #undef      ENDFILE_SPEC
3386
+// #define     ENDFILE_SPEC    ""
3387
+
3388
+// THREAD_MODEL_SPEC
3389
+// SYSROOT_SUFFIX_SPEC
3390
+// SYSROOT_HEADERS_SUFFIX_SPEC
3391
+// EXTRA_SPECS
3392
+// LINK_LIBGCC_SPECIAL_1
3393
+// LINK_GCC_C_SEQUENCE_SPEC
3394
+// LINK_COMMAND_SPEC
3395
+// TARGET_ALWAYS_STRIP_DOTDOT
3396
+// MULTILIB_DEFAULTS
3397
+// RELATIVE_PREFIX_NOT_LINKDIR
3398
+// MD_EXEC_PREFIX
3399
+// STANDARD_STARTFILE_PREFIX
3400
+// STANDARD_STARTFILE_PREFIX_1
3401
+// STANDARD_STARTFILE_PREFIX_2
3402
+// MD_STARTFILE_PREFIX
3403
+// MD_STARTFILE_PREFIX_1
3404
+// INIT_ENVIRONMENT
3405
+// LOCAL_INCLUDE_DIR
3406
+#undef LOCAL_INCLUDE_DIR
3407
+
3408
+// NATIVE_SYSTEM_HEADER_COMPONENT
3409
+// INCLUDE_DEFAULTS
3410
+
3411 102 dgisselq
+/* 17.03 Run-time Target Specification */
3412
+
3413
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3414
+ * code that defines built-in preprocessor macros and assertions for the target
3415
+ * CPU, using the functions builtin_define, builtin_define_std, and
3416
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3417
+ * semicolon, and since it has finished command line option proccessing your
3418
+ * code can use those results freely.
3419
+ *
3420
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3421
+ * command line parameters we've been given indicate that our CPU has.  That
3422
+ * way, code can be adjusted depending upon the CPU's capabilities.
3423
+ */
3424
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3425
+       { builtin_define("__ZIPCPU__");                 \
3426
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3427
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3428
+       }
3429
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3430
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3431
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3432
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3433
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3434
+       // If (we support int64s) builtin_define("___int64_t_defined");
3435
+
3436
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3437
+ * macro is optional and is used for the target operating system instead.
3438
+ */
3439
+
3440
+/* Option macros: (we need to define these eventually ... )
3441
+ *
3442
+ *     TARGET_HANDLE_OPTION
3443
+ *     TARGET_HANDLE_C_OPTION
3444
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3445
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3446
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3447
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3448
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3449
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3450
+ *     C_COMMON_OVERRIDE_OTPTIONS
3451
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3452
+ *     TARGET_OPTION_INIT_STRUCT
3453
+ *     TARGET_OPTION_DEFAULT_PARAMS
3454
+ */
3455
+
3456
+/* SWITCHABLE_TARGET
3457
+ *
3458
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3459
+ * here.
3460
+ */
3461
+
3462
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3463
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3464
+ * otherwise.  This is intended to relate to the float and double types, but not
3465
+ * necessarily "long double".  By default, returns true if the adddf3
3466
+ * instruction pattern is available and false otherwise, on the assumption that
3467
+ * hardware floating point supports exceptions and rounding modes but software
3468
+ * floating point does not.
3469
+ *
3470
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3471
+ * support all of these bells and whistles when full functionality is even
3472
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3473
+ * set this to zero, so let's come back to this.
3474
+ */
3475
+// #warning "Wrong answer encoded to date"
3476 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3477 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3478
+
3479
+/* 17.04 Defining data structures for per-function information */
3480
+
3481
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3482
+ * information.  This macro is called once per function, before generation of
3483
+ * any RTL has begun.  The intention is to allow the initialization of the
3484
+ * function pointer init_machine_status.
3485
+ */
3486
+// #warning "I may need to define this to handle function return addresses ..."
3487
+
3488
+/* 17.05 Storage Layout */
3489
+
3490
+/* Storage Layout */
3491
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3492
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3493
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3494
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3495
+#define        BITS_PER_WORD           32
3496
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3497
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3498
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3499
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3500
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3501
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3502
+ * default is BITS_PER_WORD.
3503
+ *
3504
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3505
+ */
3506
+#define        POINTER_SIZE            32      // Ptr width in bits
3507
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3508
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3509
+ * than zero if pointers should be zero-extended, zero if they should be sign
3510
+ * extended, and negative if some other conversion is needed.  In the last case,
3511
+ * the extension is done by the target's ptr_extend instruction.
3512
+ *
3513
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3514
+ * the same width.
3515
+ *
3516
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3517
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3518
+ * two.  Hence, we specify how we would do that here.
3519
+ */
3520 127 dgisselq
+#define        POINTERS_EXTEND_UNSIGNED        1
3521 102 dgisselq
+
3522
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3523
+ * object whose type is type and which has he specified mode and signedness is
3524
+ * to be stored in a register.  This macro is only called when type is a scalar
3525
+ * type.
3526
+ *
3527
+ * On most RISC machines, which only have operations that operate on a full
3528
+ * register, define this macro to set m to word_mode if m is an integer mode
3529
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3530
+ * widened because wider precision floating-point operations are usually more
3531
+ * expensive than their narrower counterparts.
3532
+ *
3533
+ * For most machines, the macro definition does not change unsigndep.  However,
3534
+ * some machines, have instructions that preferentially handle either signed or
3535
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3536
+ * loads from memory and 32-bit add instructions sign-extend the result to
3537
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3538
+ * is more efficient.
3539
+ *
3540
+ * Do not define this macro if it would never modify m.
3541
+ *
3542
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3543
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3544
+ */
3545
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3546
+
3547
+// TARGET_PROMOTE_FUNCTION_MODE
3548
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3549
+ * stack, in bits.  All stack parameters receive at least this much alignment
3550
+ * regardless of data type.  On most machines, this is the same as the size of
3551
+ * an integer.
3552
+ */
3553
+#define        PARM_BOUNDARY   32
3554
+
3555
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3556
+ * hardware for the stack pointer on this machine.  The definition is a C
3557
+ * expression for the desired alignment (measured in bits).  This value is used
3558
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3559
+ * this should be the same as PARM_BOUNDARY.
3560
+ */
3561
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3562
+
3563
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3564 127 dgisselq
+#define        PREFERRED_STACK_BOUNDARY        STACK_BOUNDARY
3565 102 dgisselq
+
3566 127 dgisselq
+/* INCOMING_STACK_BOUNDARY ... Define this macro if the incoming stack boundary
3567
+ * may be different from PREFERRED_STACK_BOUNDARY.  This macro must evaluate
3568
+ * to a value equal to or larger than STACK_BOUNDARY.
3569 102 dgisselq
+ */
3570 127 dgisselq
+#define        INCOMING_STACK_BOUNDARY STACK_BOUNDARY
3571 102 dgisselq
+
3572
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3573
+ */
3574
+#define        FUNCTION_BOUNDARY       32
3575
+
3576
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3577
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3578
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3579
+ */
3580
+#define BIGGEST_ALIGNMENT      32
3581
+
3582 127 dgisselq
+/* MALLOC_ABI_ALIGNMENT
3583
+ */
3584
+
3585
+/* ATTRIBUTE_ALIGNED_VALUE
3586
+ */
3587
+
3588 102 dgisselq
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3589
+ * given to an object that can be referenced in one operation, without
3590
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3591
+ * larger on machines that don't have byte or halfword store operations.
3592
+ */
3593
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3594
+
3595 127 dgisselq
+/* BIGGEST_FIELD_ALIGNMENT ... Biggest alignment that any structure or union
3596
+ * field can require on this machine, in bits.  If defined, this overrides
3597
+ * BIGGEST_ALIGNMENT for structure and union fields only, unless the field
3598
+ * alignment has been set by the __attribute__((aligned(n))) construct.
3599
+ */
3600
+#define        BIGGEST_FIELD_ALIGNMENT BITS_PER_UNIT
3601
+
3602
+/* ADJUST_FIELD_ALIGN
3603
+ */
3604
+#define        ADJUST_FIELD_ALIGN(A,B) BITS_PER_WORD
3605
+
3606
+/* MAX_STACK_ALIGNMENT
3607
+ */
3608
+#define        MAX_STACK_ALIGNMENT     BITS_PER_WORD
3609
+
3610
+/* MAX_OFILE_ALIGNMENT
3611
+ */
3612
+
3613
+/* DATA_ALIGNMENT(TYPE, BASIC-ALIGN) ... If defined, a C expression to compute
3614
+ * the alignment for a variable in the static store.  TYPE is the data type, and
3615
+ * BASIC-ALIGN is the alignment that the object would ordinarily have.  The
3616
+ * value of this macro is used instead of that alignment to align the object.
3617
+ *
3618
+ * If this macro is not defined, then BASIC-ALIGN is used.
3619
+ *
3620
+ * ZipCPU -- in hindsight, if this macro is not defined then the compiler is
3621
+ * broken.  So we define it to be our fastest alignment, or 32-bits.
3622
+ */
3623
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     BITS_PER_WORD
3624
+
3625
+
3626
+/* DATA_ABI_ALIGNMENT(TYPE,BASIC-ALIGN)
3627
+ */
3628
+
3629
+/* CONSTANT_ALIGNMENT(CONST, BASIC-ALIGN) ... If defined, a C expression to
3630
+ * compute the alignment given to a constant that is being placed in memory.
3631
+ * CONST is the constant and BASIC-ALIGN is the alignment that the object
3632
+ * would ordinarily have.  The value of this macro is used instead of that
3633
+ * alignment to align the object.
3634
+ *
3635
+ * If this macro is not defined, then BASIC-ALIGN is used.
3636
+ *
3637
+ * ZipCPU -- in hindsiht, if this macro is not defined then the compiler is
3638
+ * broken.  We'll define it as above.
3639
+ *
3640
+ */
3641
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  BITS_PER_WORD
3642
+
3643
+/* LOCAL_ALIGNMENT(TYPE,BASIC-ALIGN) ... If defined ...
3644
+ */
3645
+#define        LOCAL_ALIGNMENT(TYP,ALIGN)      BITS_PER_WORD
3646
+
3647
+/* TARGET_VECTOR_ALIGNMENT
3648
+ */
3649
+
3650
+/* STACK_SLOT_ALIGNMENT
3651
+ */
3652
+#define        STACK_SLOT_ALIGNMENT(T,M,B)     BITS_PER_WORD
3653
+
3654
+/* LOCAL_DECL_ALIGNMEN(DECL)
3655
+ */
3656
+#define        LOCAL_DECL_ALIGNMENT(DECL)      BITS_PER_WORD
3657
+
3658
+/* MINIMUM_ALIGNMENT
3659
+ */
3660
+#define        MINIMUM_ALIGNMENT(EXP,MOD,ALIGN)        BITS_PER_WORD
3661
+
3662
+/* EMPTY_FIELD_BOUNDARY
3663
+ * Alignment of field after 'int : 0' in a structure.
3664
+ */
3665
+#define        EMPTY_FIELD_BOUNDARY    BITS_PER_WORD
3666
+
3667
+/* STRUCTURE_SIE_BOUNDARY
3668
+ * ZipCPU -- Every structures size must be a multiple of 32-bits.
3669
+ */
3670
+#define        STRUCTURE_SIZE_BOUNDARY BITS_PER_WORD
3671
+
3672 102 dgisselq
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3673
+ * fail to work when given unaligned data.  If instructions will merely go
3674
+ * slower in that case, define this macro as 0.
3675 125 dgisselq
+ *
3676
+ * ZipCPU -- Since we have defined our smallest addressable unit to be a 32-bit
3677
+ * word (one byte, on our machine), and since reading any amount of 32-bit words
3678
+ * is easy, then there really are no instructions that will ever fail.
3679 102 dgisselq
+ */
3680 125 dgisselq
+#define        STRICT_ALIGNMENT        0
3681 102 dgisselq
+
3682 127 dgisselq
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3683
+ * other C compilers handle alignment of bit-fields and the structures that
3684
+ * contain them.
3685
+ *
3686
+ * The behavior is that the type written for a named bit-field (int, short, or
3687
+ * other integer type) imposes an alignment for the entire structure, as if the
3688
+ * structure really did contain an ordinary field of that type.  In addition,
3689
+ * the bit-field is placed within the structure so that it would fit within
3690
+ * such a field, not crossing a boundary for it.
3691
+ *
3692
+ * Thus, no most machines, a named bit-field whose type is written as int would
3693
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3694
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3695
+ * by other alignment parameters.)
3696
+ *
3697
+ * An unnamed bit-field will not affect the alignment of the containing
3698
+ * structure.
3699
+ *
3700
+ * If the macro is defined, its definition should be a C expression, a non
3701
+ * zero value for the expression enables this behavior.
3702
+ * Look at the fundamental type that is used for a bit-field and use that to
3703
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3704
+ * have the same alignment as 'int', not 'char'.
3705
+ */
3706
+#undef PCC_BITFIELD_TYPE_MATTERS
3707
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3708
+
3709 102 dgisselq
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3710
+ * largest integer machine mode that should actually be used.  All integer
3711
+ * machine modes of this size or smaller can be used for structures and unions
3712
+ * with the appropriate sizes.  If this macro is undefined,
3713
+ * GET_MODE_BITSIZE(DImode) is assumed.
3714
+ *
3715
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3716
+ * size on bits of the largest integer machine mode.  However, that's the case
3717
+ * with most DI implementations: A long is two words, spliced together.  We'd
3718
+ * like to support that eventually, but we need to get there.  Hence, let's use
3719
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3720
+ */
3721
+#if (ZIP_HAS_DI != 0)
3722
+#define        MAX_FIXED_MODE_SIZE     64
3723
+#else
3724
+#define        MAX_FIXED_MODE_SIZE     32
3725
+#endif
3726
+
3727
+
3728
+/* 17.06 Layout of Source Language Data Types */
3729
+
3730
+#undef CHAR_TYPE_SIZE
3731
+#undef SHORT_TYPE_SIZE
3732
+#undef INT_TYPE_SIZE
3733
+#undef LONG_TYPE_SIZE
3734
+#undef LONG_LONG_TYPE_SIZE
3735
+//
3736
+#define        CHAR_TYPE_SIZE  32
3737
+#define        SHORT_TYPE_SIZE 32
3738
+#define        INT_TYPE_SIZE   32
3739 200 dgisselq
+#define        LONG_TYPE_SIZE  64
3740 102 dgisselq
+#define        LONG_LONG_TYPE_SIZE     64
3741
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3742
+#undef FLOAT_TYPE_SIZE
3743
+#undef DOUBLE_TYPE_SIZE
3744
+#undef LONG_DOUBLE_TYPE_SIZE
3745
+#define        FLOAT_TYPE_SIZE         32
3746 200 dgisselq
+#define        DOUBLE_TYPE_SIZE        64      // This'll need to be done via emulation
3747 102 dgisselq
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3748
+// SHORT_FRAC_TYPE_SIZE
3749
+// LONG_FFRACT_TYPE_SIZE
3750
+// LONG_LONG_FRACT_TIME_SIZE
3751
+#undef SHORT_ACCUM_TYPE_SIZE
3752
+#undef ACCUM_TYPE_SIZE
3753
+#undef LONG_ACCUM_TYPE_SIZE
3754
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3755
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3756
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3757
+
3758
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3759
+ * hook and should be defined if that hook is overriden to be true.  It causes
3760
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3761
+ * rather than the default __.  A port which uses this macro should also arrange
3762
+ * to use t-gnu-prefix in the libgcc config.host.
3763
+ *
3764
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3765
+ */
3766
+
3767
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3768
+ * in float.h,, assuming, if applicable, that the floating-point control word
3769
+ * is in its default state.  If you do not define this macro the value of
3770
+ * FLT_EVAL_METHOD will be zero.
3771
+ *
3772
+ * ZipCPU --- ???
3773
+ */
3774
+
3775
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3776
+ * floating-point format supported by the hardware.  If you define this macro,
3777
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3778
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3779
+ * default.
3780
+ *
3781
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3782
+ * really needs to be determined, then, based upon a compile time parameter
3783
+ * where the one compiling the code states whether or not the H/W even has
3784
+ * floating point support.
3785
+ *
3786
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3787
+ * need to change this.
3788
+ */
3789
+#undef WIDEST_HARDWARE_FP_SIZE
3790
+// #warning "Definition needs to change if no FPU present"
3791
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3792
+
3793
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3794
+ * whether the type char should be signed or unsigned by default.  The user
3795
+ * can always override this default with the options -fsigned-char and
3796
+ * -funsigned-char.
3797
+ *
3798
+ * ZipCPU--let's go with the default behavior.
3799
+ */
3800
+#define        DEFAULT_SIGNED_CHAR     1
3801
+
3802
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3803 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3804 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3805
+ * false if all enum types should be allocated like int.
3806
+ *
3807
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3808
+ * override it.
3809
+ */
3810
+
3811
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3812
+ * type to use for size values.  The typedef name size_t is defined using the
3813
+ * contents of the string.
3814
+ *
3815
+ * If you don't define this macro, the default is "long unsigned int".  Since
3816
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3817
+ * the default seems perfect for us.
3818
+ */
3819
+#define        SIZE_TYPE       "unsigned int"
3820
+
3821
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3822
+ * This macro is a C expression for a string describing the name of the data
3823
+ * type from which the precision of sizetype is extracted.  The string has the
3824
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3825
+ * default is SIZE_TYPE --- which seems good enough for us.
3826
+ */
3827
+
3828
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3829 127 dgisselq
+ * type to use for the result of subtracting two pointers.  The typedef name
3830 102 dgisselq
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3831
+ * more information.
3832
+ *
3833
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3834
+ * for us.
3835
+ */
3836
+#define        PTRDIFF_TYPE    "int"
3837
+
3838
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3839
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3840
+ * the contents of  the string.  If you don't define this macro, the default is
3841
+ * 'int'--good enough for ZipCPU.
3842
+ */
3843
+
3844
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3845
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3846
+ */
3847
+#undef WCHAR_TYPE_SIZE
3848
+#define        WCHAR_TYPE_SIZE 32
3849
+
3850
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3851
+ * type to use for wide characters passed to printf and returned from getwc.
3852
+ * The typedef name wint_t is defined using the contents of the string.  See
3853
+ *
3854 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3855
+ * best for us again.
3856 102 dgisselq
+ */
3857
+
3858
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3859
+ * data type that can represent any value of any standard or extended signed
3860
+ * integer type.  The typedef name intmax_t is defined using the contents of
3861
+ * the string.
3862
+ *
3863
+ * If you don't define this macro, the default is the first of "int", "long int"
3864
+ * or "long long int" that has as much precision as "long long int".
3865
+ */
3866
+
3867
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3868
+ */
3869
+
3870
+#undef SIG_ATOMIC_TYPE
3871
+#if (ZIP_ATOMIC != 0)
3872
+#define        SIG_ATOMIC_TYPE "int"
3873
+#else
3874
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3875
+#endif
3876
+#undef INT8_TYPE
3877
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3878
+#undef INT16_TYPE
3879
+#define        INT16_TYPE              NULL
3880
+#undef INT32_TYPE
3881
+#define        INT32_TYPE              "int"
3882
+#undef UINT8_TYPE
3883
+#define        UINT8_TYPE              NULL
3884
+#undef UINT16_TYPE
3885
+#define        UINT16_TYPE             NULL
3886
+#undef UINT32_TYPE
3887
+#define        UINT32_TYPE             "unsigned int"
3888
+#undef INT_LEAST8_TYPE
3889
+#define        INT_LEAST8_TYPE         "int"
3890
+#undef INT_LEAST16_TYPE
3891
+#define        INT_LEAST16_TYPE        "int"
3892
+#undef INT_LEAST32_TYPE
3893
+#define        INT_LEAST32_TYPE        "int"
3894
+#undef UINT_LEAST8_TYPE
3895
+#define        UINT_LEAST8_TYPE        "unsigned int"
3896
+#undef UINT_LEAST16_TYPE
3897
+#define        UINT_LEAST16_TYPE       "unsigned int"
3898
+#undef UINT_LEAST32_TYPE
3899
+#define        UINT_LEAST32_TYPE       "unsigned int"
3900
+#undef INT_FAST8_TYPE
3901
+#define        INT_FAST8_TYPE          "int"
3902
+#undef INT_FAST16_TYPE
3903
+#define        INT_FAST16_TYPE         "int"
3904
+#undef INT_FAST32_TYPE
3905
+#define        INT_FAST32_TYPE         "int"
3906
+#undef UINT_FAST8_TYPE
3907
+#define        UINT_FAST8_TYPE         "unsigned int"
3908
+#undef UINT_FAST16_TYPE
3909
+#define        UINT_FAST16_TYPE        "unsigned int"
3910
+#undef UINT_FAST32_TYPE
3911
+#define        UINT_FAST32_TYPE        "unsigned int"
3912
+#undef INTPTR_TYPE
3913
+#define        INTPTR_TYPE             "unsigned int"
3914
+#undef UINTPTR_TYPE
3915
+#define        UINTPTR_TYPE            "unsigned int"
3916
+
3917
+#undef INT64_TYPE
3918
+#undef UINT64_TYPE
3919
+#undef INT_LEAST64_TYPE
3920
+#undef UINT_LEAST64_TYPE
3921
+#undef INT_FAST64_TYPE
3922
+#undef UINT_FAST64_TYPE
3923
+
3924
+#if (ZIP_HAS_DI != 0)
3925
+#define        INT64_TYPE              "long int"
3926
+#define        UINT64_TYPE             "long unsigned int"
3927
+#define        INT_LEAST64_TYPE        "long int"
3928
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3929
+#define        INT_FAST64_TYPE         "long int"
3930
+#define        UINT_FAST64_TYPE        "long unsigned int"
3931
+#else
3932
+#define        INT64_TYPE              NULL
3933
+#define        UINT64_TYPE             NULL
3934
+#define        INT_LEAST64_TYPE        NULL
3935
+#define        UINT_LEAST64_TYPE       NULL
3936
+#define        INT_FAST64_TYPE         NULL
3937
+#define        UINT_FAST64_TYPE        NULL
3938
+#endif
3939
+
3940
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3941
+
3942
+
3943
+/* 17.07 Register Usage / Register definitions */
3944
+
3945
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3946
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3947
+ * pseudo register's numbrer really is assigned the number
3948
+ * FIRST_PSEUDO_REGISTER.
3949
+ *
3950
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3951 171 dgisselq
+ * and PC register being numbered 14 and 15 respectively.  The ZipCPU has
3952
+ * another 16 registers, identical to the first, but user mode registers.  These
3953
+ * are number the same as the first (0-15) in user mode, but numbered (16-31)
3954
+ * in supervisor mode.  In addition, we create a pretend argument pointer
3955
+ * register, zip_AP_PSEUDO, to refer to our arguments.  This final register,
3956
+ * although it gets a valid number, will be eliminated in optimization.
3957 102 dgisselq
+ */
3958 171 dgisselq
+#define        FIRST_PSEUDO_REGISTER   (zip_AP_PSEUDO+1)
3959 102 dgisselq
+
3960
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3961
+ * fixed purposes all throughout the compiled code and are therefore not
3962
+ * available for general allocation.  These would include the stack pointer, the
3963
+ * frame pointer (except on machines where that can be used as a general
3964
+ * register when no frame pointer is needed), the program counter on machines
3965
+ * where that is considered one of the addressable registers, and any other
3966
+ * numbered register with a standard use.
3967
+ *
3968
+ * This information is expressed as a sequence of numbers, separated by commas,
3969
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3970
+ * otherwise.
3971
+ *
3972
+ * For the Zip CPU, we have three fixed registers that are not available for
3973
+ * general allocation:
3974
+ *
3975
+ *     SP      The stack pointer
3976
+ *     CC      The condition codes and CPU state register
3977
+ *     PC      The program counter
3978
+ *
3979
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3980
+ * table pointer) are registers that we hope will not be so fixed.
3981 171 dgisselq
+ *
3982
+ * Okay, just updated this process.  We now have more registers that are not
3983
+ * available for general allocation:
3984
+ *     uR0-uPC         User registers
3985
+ *     PSEUDO-AP       The pseudo arg pointer
3986 102 dgisselq
+ */
3987 171 dgisselq
+#define        FIXED_REGISTERS         { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1 }
3988 102 dgisselq
+
3989
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3990
+ * that is clobbered (in general) by function calls as well as for fixed
3991
+ * registers.  This macro therefore identifies the registers that are not
3992
+ * available for general allocation of values that must live across function
3993
+ * calls.
3994
+ *
3995
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3996
+ * it on function entry and restores it on function exit, if the register is
3997
+ * used within the function.
3998
+ *
3999
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
4000
+ * register above R5.
4001
+ */
4002 171 dgisselq
+#define        CALL_USED_REGISTERS     { 0,1,1,1, 1,0,0,0, 0,0,0,0, 0,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1, 1,1,1,1,  1 }
4003 102 dgisselq
+
4004
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
4005
+ * to the value of CALL_USED_REGISTERS.
4006
+ */
4007
+
4008
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
4009
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
4010
+ * across a call without some part of it being clobbbered.  For most machines,
4011
+ * this macro need not be defined.  It is only required for machines that do
4012 103 dgisselq
+ * not preserve the entire contents of a register across a call.
4013 102 dgisselq
+ *
4014 127 dgisselq
+ * ZipCPU--Always preserves the entire contents of those registers that are
4015
+ * preserved across calls, so this shouldnt need to be defined.
4016 102 dgisselq
+ */
4017 127 dgisselq
+// #define     HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
4018 102 dgisselq
+
4019
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
4020
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
4021
+ * reg_class_contents, to take into account any dependence of these register
4022
+ * sets on target flags.  The first three of these are of type char[]
4023
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
4024
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
4025
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
4026
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
4027
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
4028
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
4029
+ * applied.
4030
+ *
4031 171 dgisselq
+ * ZipCPU -- I may need to return and define this depending upon how the
4032
+ * GBL register allocation goes.  But for now, we'll leave this at its default
4033 102 dgisselq
+ * value.
4034
+ */
4035
+// #warning "Revisit me after FP and GBL allocation"
4036
+
4037
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
4038
+ * windows. ...
4039
+ *
4040
+ * Zip CPU has no register windows.
4041
+ */
4042
+
4043
+/* OUTGOING_REGNO ... same thing.
4044 171 dgisselq
+ * LOCAL_REGNO ... same thing.
4045 102 dgisselq
+ */
4046
+
4047
+/* PC_REGNUM ... If the program counter has a register number, define this as
4048
+ * that register number.  Otherwise do not define it.
4049
+ */
4050
+#define        PC_REGNUM       zip_PC
4051
+
4052
+
4053
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
4054
+ * containing the number of hard registers in the order in which GCC should
4055
+ * prefer to use them (from most preferred to least.
4056
+ *
4057 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
4058 102 dgisselq
+ * else being equal).
4059
+ *
4060
+ * Since the default is the ZipCPU desired case, we won't define this here.
4061
+ */
4062
+
4063
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
4064
+ * this macro, so we won't either.
4065
+ */
4066
+
4067
+/* HONOR_REG_ALLOC_ORDER ...
4068
+ */
4069
+
4070
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
4071
+ * this macro, so we won't either.
4072
+ */
4073
+
4074
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
4075
+ * consecutive hard registers, starting at register number REGNO, required to
4076
+ * hold a value of mode MODE.
4077
+ *
4078
+ * On a machine where all registers are exactly one word, a suitable definition
4079
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
4080
+ *
4081
+ * On ZipCPU, we might do
4082
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
4083
+ * but I think the default (above) code should work as well.  Hence, let's stick
4084
+ * with the default, lest someone try to create larger modes (TImode, OImode,
4085
+ * XImode) and expect us to follow them properly some how.
4086
+ *
4087
+ * Okay, now in hind sight, we know that the default doesn't work for our
4088
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
4089
+ * this expression to work in bits rather than in bytes and we'll know more
4090
+ * of what we are doing.
4091
+ */
4092
+#undef HARD_REGNO_NREGS
4093
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
4094
+               / (UNITS_PER_WORD))
4095
+
4096
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
4097
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
4098
+ * to take up more space than in registers starting at register number REGNO
4099
+ * (as determined by multiplying GCC's notion of the size of the register when
4100
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
4101
+ * By default this is zero.
4102
+ *
4103
+ * Zip CPU --- The default looks good enough to me.
4104
+ */
4105
+
4106
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
4107
+ *
4108
+ * ZipCPU ---
4109
+ */
4110
+
4111
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
4112
+ * registers that hold values of mode mode is not the word size.  It is a C
4113
+ * expression that should give the natural size in bytes for the specified mode.
4114
+ * It is used by the register allocator to try to optimize its results.
4115
+ *
4116
+ * ZipCPU ---
4117
+ */
4118
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
4119
+
4120
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
4121 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
4122 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
4123
+ * equivalent, a suitable definition is '1'.  You need not include code to check
4124
+ * for the numbers of fixed registers, because the allocation mechanism
4125
+ * considered them to be always occupied.
4126
+ *
4127
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
4128
+ * suitable default definition mentioned above should be sufficient.
4129
+ */
4130
+#undef HARD_REGNO_MODE_OK
4131 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
4132 102 dgisselq
+
4133
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
4134
+ * okay to rename a hard register FROM to another hard register TO.  One common
4135
+ * use of this macro is to prevernt renaming of a register to another register
4136
+ * that is not saved by a prologue in an interrupt handler.  The default is
4137
+ * always nonzero.
4138
+ *
4139
+ * ZipCPU --- The default looks good enough to us.
4140
+ */
4141
+#undef HARD_REGNO_RENAME_OK
4142
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
4143
+
4144
+
4145
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
4146
+ * M1 is accessible in mode M2 without copying.
4147
+ *
4148
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
4149
+ * so lets' set to one.
4150
+ */
4151
+#define        MODES_TIEABLE_P(M1,M2)  1
4152
+
4153
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
4154
+ * This target hook should return true if it is OK to use a hard register
4155
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
4156
+ * to prevent using of a register that is not saved by a prologue in an
4157
+ * interrupt handler.  The default version of this hook always returns true.
4158
+ *
4159
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
4160
+ * context, you have an entirely new set of registers (the supervisor set), so
4161
+ * this is a non-issue.
4162
+ */
4163
+
4164
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
4165
+ * copies to/from CCmode register(s).  You should only define this macro if
4166
+ * support for copying to/from CCmode is incomplete.
4167
+ *
4168
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
4169
+ * default definition.
4170
+ */
4171
+
4172
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
4173
+ *
4174
+ * Zip CPU has no stack-like registers, as their definition is different from
4175
+ * the ZipCPU stack pointer register.
4176
+ */
4177
+
4178 127 dgisselq
+// #define     ZIP_REG_BYTE_SIZE       1
4179 102 dgisselq
+
4180
+/* 17.08 Register Classes */
4181
+
4182
+/* enum reg_class ... An enumerate type that must be defined with all the
4183
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
4184
+ * must be the last register class, followed by one more enumerated value,
4185
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
4186
+ * classes there are.
4187
+ *
4188
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
4189
+ * all_regs, and go from there.
4190
+ */
4191
+enum   reg_class {
4192
+       NO_REGS, GENERAL_REGS,
4193
+       USER_REGS,
4194
+       ALL_REGS, LIM_REG_CLASSES
4195
+};
4196
+
4197
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
4198
+ */
4199
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
4200
+
4201
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
4202
+ * classes as C string constants.  These names are used in writing some of the
4203
+ * debugging dumps.
4204
+ */
4205 171 dgisselq
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
4206 102 dgisselq
+
4207
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
4208 127 dgisselq
+ * classes, as integers which are bit masks.  The nth integer specifies the
4209 102 dgisselq
+ * contents of class n.  That way the integer mask is interpreted as that
4210
+ * register r is in the class if (mask&(1<<r)) is 1.
4211
+ *
4212 171 dgisselq
+ * When the machine has more than 32 registers, an integer does not suffice.
4213
+ * Then the integers are replaced by sub-initializers, braced groupings
4214
+ * containing several integers.  Each sub-initializer must be suitable as an
4215
+ * initializer for the type HARD_REG_SET which is defined in 'hard-reg-set.h'.
4216
+ * In this situation, the first integer in each subinitializer corresponds to
4217
+ * registers 0-31, the second integer to registers 32-634, and so on.
4218 102 dgisselq
+ *
4219
+ * ZipCPU --- This is straight forward, three register classes, etc.
4220
+ */
4221 171 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x000000000, 0}, {0x00003fff, 0}, {0x0ffff0000, 0}, {0x0ffffffff, 1} }
4222 102 dgisselq
+
4223
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
4224
+ * containing hard register REGNO.  In general there is more than one such
4225
+ * class;  Choose a class which is minimal, meaning that no smaller class also
4226
+ * contains the register.
4227
+ */
4228 171 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?(((R)<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
4229 102 dgisselq
+
4230
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
4231
+ * a valid base register must belong.  A base register is one used in an address
4232
+ * which is the register value plus a displacement.
4233
+ */
4234
+#undef BASE_REG_CLASS
4235
+#define        BASE_REG_CLASS  GENERAL_REGS
4236
+
4237
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
4238
+ * which allows the selection of a bse register in a mode dependent manner.  If
4239
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
4240
+ */
4241
+#undef MODE_BASE_CLASS
4242
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
4243
+
4244
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
4245
+ * class to which a valid base register must belong in order to be used in a
4246
+ * base plus index register address.  You should define this macro if base plus
4247
+ * index addresses have different requirements than other base register uses.
4248
+ *
4249
+ * Zip CPU does not support the base plus index addressing mode, thus ...
4250
+ */
4251 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
4252
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
4253 102 dgisselq
+
4254
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
4255
+ * which a valid index register must belong.  An index register is one used in
4256
+ * an address where its value is either multiplied by a scale factor or added
4257
+ * to another register (as well as added to a displacement).
4258
+ *
4259
+ * ZipCPU -- Has no index registers.
4260
+ */
4261
+#undef INDEX_REG_CLASS
4262
+#define        INDEX_REG_CLASS NO_REGS
4263
+
4264
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
4265
+ * number num is suitable for use as a base register in operand addresses.
4266
+ */
4267
+#undef REGNO_OK_FOR_BASE_P
4268 127 dgisselq
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM>=FIRST_PSEUDO_REGISTER)||(NUM != zip_CC))
4269 102 dgisselq
+
4270
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
4271
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
4272 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
4273 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
4274
+ *
4275
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
4276
+ */
4277
+
4278
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
4279
+ * addresses, accessing memory in mode mode.
4280
+ *
4281
+ * Use of this macro is deprecated.
4282
+ */
4283
+
4284 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
4285 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
4286
+ * operand addresses, accessing memory in mode M in address space AS.  This is
4287
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
4288
+ * the context in which the register appears in the memory reference.
4289
+ *
4290
+ * ZipCPU---We aren't specific in how we use our registers.
4291
+ */
4292
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
4293
+
4294
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
4295
+ * num is suitable for use as an index register in opernad addressess.  It may
4296
+ * be either a suitable hard register or a pseudo register that has been
4297 111 dgisselq
+ * allocated such as a hard register.
4298 102 dgisselq
+ *
4299
+ * ZipCPU has no index registers, therefore we declare this to be zero.
4300
+ */
4301
+#undef REGNO_OK_FOR_INDEX_P
4302
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
4303
+
4304
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
4305
+ * additional preference on the register class to use when it is necessary to
4306
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
4307
+ * preferred register class is found or hook preferred_rename_class is not
4308
+ * implemented.  SOmething returning a more restrictive class makes better code.
4309
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
4310
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
4311
+ * preferred_rename_class, code size can be reduced.
4312
+ */
4313
+// #undef TARGET_PREFERRED_RENAME_CLASS
4314
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
4315
+
4316
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
4317
+ * restri tions on the register class to use when it is necessary to copy value
4318
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
4319
+ * perhaps a smaller class.
4320
+ *
4321
+ * The default fversion of this hook always returns value of RC argument, which
4322
+ * sounds quite appropriate for the ZipCPU.
4323
+ */
4324
+
4325
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
4326
+ * restrictions on the register class to use when it is necessary to copy
4327
+ * value X into a register in class CLASS.  On many machines, the following
4328
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
4329
+ * Sometimes returning a more restrictive class makes better code.  For example,
4330
+ * on the 68k, when x is an integer constant that is in range for a moveq
4331
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
4332 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
4333 102 dgisselq
+ * 'moveq' will be used.
4334
+ *
4335
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
4336
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
4337
+ * Hence, we only allow loads into the GENERAL_REG class.
4338
+ */
4339
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
4340
+
4341
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
4342
+ * RELOAD_CLASS, but for output instead of input reloads.
4343
+ *
4344
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
4345
+ */
4346
+
4347
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
4348
+ *
4349
+ * Don't define this macro unless the target machine has limitations which
4350
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
4351
+ */
4352
+
4353
+/* TARGET_SECONDARY_RELOAD
4354
+ * SECONDARY_ ...
4355
+ * Don't think we need these ...
4356
+ */
4357
+
4358
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
4359
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
4360
+ *
4361
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
4362
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
4363
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
4364
+ *
4365
+ * This macro helps control the handling of multiple word values in the reload
4366
+ * pass.
4367
+ *
4368
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
4369
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
4370
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
4371
+ */
4372
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
4373
+
4374
+/* CANNOT_CHANGE_MODE_CLASS
4375
+ * ???
4376
+ */
4377
+
4378
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
4379
+ */
4380
+
4381
+/* TARRGET_LRA_P
4382
+ * Default looks good.
4383
+ */
4384
+
4385
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
4386 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
4387 102 dgisselq
+ * number
4388
+ *
4389
+ * The default version of this target hook returns always zero---good enough for
4390
+ * the ZipCPU.
4391
+ */
4392
+
4393
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4394
+ * if we need register usage leveling.  That means if a few hard registers are
4395
+ * equally good for the assignment, we choose the least used hard register.  The
4396
+ * register usage leveling may be profitable for some targets.  Don't use usage
4397
+ * leveling for targets with conditional execution or targets with big register
4398
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4399
+ * version of this target hook returns always false.
4400
+ *
4401
+ * ZipCPU --- Default is the right answer.
4402
+ */
4403
+
4404
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4405
+ * Default looks good.
4406
+ */
4407
+
4408
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4409
+ * Default looks good.
4410
+ */
4411
+
4412
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4413
+ */
4414
+
4415
+/* TARGET_SPILL_CLASS
4416
+ *
4417
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4418
+ * user set of registers.  However, we're not building for that mode (now),
4419
+ * so we'll leave this at the default of NO_REGS.
4420
+ */
4421
+
4422
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4423
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4424
+ * instruction code for the cstore being performed.  Not defining this hook is
4425
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4426
+ * patterns.
4427
+ *
4428
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4429
+ * default therefore.
4430
+ */
4431
+
4432
+/* 17.09 Stack Layout and Calling Conventions */
4433
+
4434
+
4435
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4436
+ * moves the stack pointer to a smaller address, and false otherwise.
4437
+ *
4438
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4439
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4440
+ * is our convention, we'll define it as such.
4441
+ */
4442
+#undef STACK_GROWS_DOWNWARD
4443
+#define        STACK_GROWS_DOWNWARD    1
4444
+
4445
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4446
+ * pushed on the stack.  In RTL, a push operation will be
4447
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4448
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4449
+ * direction and on whether the stack pointer points to the last item on the
4450 <