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[/] [zx_ula/] [branches/] [xilinx/] [spectrum_48k_spartan3a_for_gameduino_mod_vga_timex_hicolor_ulaplus/] [sp48k_for_mod_vga.ucf] - Blame information for rev 29

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Line No. Rev Author Line
1 29 mcleod_ide
NET "clk25" LOC = "P83" | IOSTANDARD = LVCMOS33;
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# Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
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# NET "clk50" PERIOD = 20.0ns HIGH 40%;
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NET "reset" LOC = "P78" | IOSTANDARD = LVCMOS33;
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# I/O
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#NET "r<2>" LOC = "P19" | IOSTANDARD = LVCMOS33;
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#NET "r<1>" LOC = "P16" | IOSTANDARD = LVCMOS33;
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NET "r" LOC = "P15" | IOSTANDARD = LVCMOS33;
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#NET "g<2>" LOC = "P10" | IOSTANDARD = LVCMOS33;
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#NET "g<1>" LOC = "P12" | IOSTANDARD = LVCMOS33;
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NET "g" LOC = "P13" | IOSTANDARD = LVCMOS33;
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#NET "b<2>" LOC = "P5"  | IOSTANDARD = LVCMOS33;
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#NET "b<1>" LOC = "P6"  | IOSTANDARD = LVCMOS33;
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NET "b" LOC = "P9"  | IOSTANDARD = LVCMOS33;
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#NET "i" LOC = "D7"  | IOSTANDARD = LVCMOS33;
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NET "csync" LOC = "P4" | IOSTANDARD = LVCMOS33;
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NET "audio_out" LOC = "P98" | IOSTANDARD = LVCMOS33;
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NET "ear" LOC = "P3" | IOSTANDARD = LVCMOS33;
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# Keyboard connections
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NET "clkps2" LOC = "P84" | IOSTANDARD = LVTTL | PULLUP;
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#NET "clkps2" CLOCK_DEDICATED_ROUTE = FALSE;
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NET "dataps2" LOC = "P85" | IOSTANDARD = LVTTL | PULLUP;
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# External SRAM
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NET "sa<17>" LOC = "P60" | IOSTANDARD = LVCMOS33;
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NET "sa<16>" LOC = "P59" | IOSTANDARD = LVCMOS33;
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NET "sa<15>" LOC = "P89" | IOSTANDARD = LVCMOS33;
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NET "sa<14>" LOC = "P25" | IOSTANDARD = LVCMOS33;
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NET "sa<13>" LOC = "P94" | IOSTANDARD = LVCMOS33;
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NET "sa<12>" LOC = "P93" | IOSTANDARD = LVCMOS33;
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NET "sa<11>" LOC = "P90" | IOSTANDARD = LVCMOS33;
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NET "sa<10>" LOC = "P77" | IOSTANDARD = LVCMOS33;
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NET "sa<9>" LOC = "P73" | IOSTANDARD = LVCMOS33;
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NET "sa<8>" LOC = "P72" | IOSTANDARD = LVCMOS33;
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NET "sa<7>" LOC = "P71" | IOSTANDARD = LVCMOS33;
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NET "sa<6>" LOC = "P70" | IOSTANDARD = LVCMOS33;
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NET "sa<5>" LOC = "P65" | IOSTANDARD = LVCMOS33;
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NET "sa<4>" LOC = "P62" | IOSTANDARD = LVCMOS33;
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NET "sa<3>" LOC = "P61" | IOSTANDARD = LVCMOS33;
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NET "sa<2>" LOC = "P57" | IOSTANDARD = LVCMOS33;
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NET "sa<1>" LOC = "P56" | IOSTANDARD = LVCMOS33;
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NET "sa<0>" LOC = "P52" | IOSTANDARD = LVCMOS33;
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NET "sd1<7>" LOC = "P35" | IOSTANDARD = LVCMOS33;
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NET "sd1<6>" LOC = "P34" | IOSTANDARD = LVCMOS33;
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NET "sd1<5>" LOC = "P33" | IOSTANDARD = LVCMOS33;
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NET "sd1<4>" LOC = "P32" | IOSTANDARD = LVCMOS33;
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NET "sd1<3>" LOC = "P31" | IOSTANDARD = LVCMOS33;
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NET "sd1<2>" LOC = "P30" | IOSTANDARD = LVCMOS33;
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NET "sd1<1>" LOC = "P29" | IOSTANDARD = LVCMOS33;
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NET "sd1<0>" LOC = "P28" | IOSTANDARD = LVCMOS33;
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#NET "sramce1" LOC = "P7" | IOSTANDARD = LVCMOS33;
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#NET "sramub1" LOC = "T4" | IOSTANDARD = LVCMOS33;
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#NET "sramlb1" LOC = "P6" | IOSTANDARD = LVCMOS33;
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NET "sramwe" LOC = "P64" | IOSTANDARD = LVCMOS33;
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NET "sramoe" LOC = "P20" | IOSTANDARD = LVCMOS33;

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