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URL https://opencores.org/ocsvn/System09/System09/trunk

Subversion Repositories System09

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  • This comparison shows the changes necessary to convert path
    /System09/trunk/rtl
    from Rev 213 to Rev 214
    Reverse comparison

Rev 213 → Rev 214

/VHDL/vdu8_hdmi.vhd
283,16 → 283,19
);
end component;
 
component ram_2k
port (
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector (10 downto 0);
data_in : in std_logic_vector (7 downto 0);
data_out : out std_logic_vector (7 downto 0)
);
component block_spram
generic (
dwidth : integer := 8; -- parameterized data width
awidth : integer := 16 -- parameterized address width
);
port (
clk : in std_logic;
cs : in std_logic; -- chip-select/enable
addr : in std_logic_vector(awidth-1 downto 0);
rw : in std_logic;
data_in : in std_logic_vector(dwidth-1 downto 0);
data_out : out std_logic_vector(dwidth-1 downto 0)
);
end component;
 
component RGB2HDMI_encoder
329,9 → 332,10
--
-- Character buffer RAM
--
char_buff_ram : ram_2k port map(
char_buff_ram : block_spram
generic map( dwidth => 8, awidth => 11) -- 2k bytes
port map(
clk => hdmi_clk,
rst => vdu_rst,
cs => vga_cs,
rw => vga_rw,
addr => vga_addr,
339,12 → 343,14
data_out => vga_data_out
);
 
 
--
-- Attribute buffer RAM
--
attr_buff_ram : ram_2k port map(
attr_buff_ram : block_spram
generic map( dwidth => 8, awidth => 11) -- 2k bytes
port map(
clk => hdmi_clk,
rst => vdu_rst,
cs => vga_cs,
rw => vga_rw,
addr => vga_addr,

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