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Rev 46 → Rev 47

/branches/mkfiles_rev1/src/upld/upld_cf8.asm
0,0 → 1,797
*
** FLEX 9 DISK DRIVERS
*
* FOR SYS09BUG ON THE DIGILENT SPARTAN 3 STARTER BOARD
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE DIGILENT SPARTAN 3 STARTER BOARD HAS 1MBYTE OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 128K IS USED AS A ROM DISK
* THE REMAINING RAM IS USED FOR A RAM DISK
*
*
CFLAG EQU $01 CARRY FLAG
VFLAG EQU $02 OVERFLOW FLAG
ZFLAG EQU $04 ZERO FLAG
NFLAG EQU $08 NEGATIVE FLAG
IFLAG EQU $10 IRQ MASK CC
HFLAG EQU $20 HALF CARRY
FFLAG EQU $40 FIRQ MASK CC
EFLAG EQU $80 ENTIRE FLAG
*
MAPPAG EQU $00 PAGE $0000 DAT ADDRESS
*
* Serial Port
*
ACIAS EQU $E000
ACIAC1 EQU ACIAS
ACIAD1 EQU ACIAS+1
DELCON EQU 1250 Delay (Processor clock in MHz * 50)
*
* XMODEM Control characters
*
SOH EQU $01
EOT EQU $04
ACK EQU $06
NAK EQU $15
CAN EQU $18
*
* Some dummy Constants
*
RMAXTRK EQU 48
RMAXSEC EQU 14
RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
*
* Start
*
ORG $0100
START LBSR UXSUB
JMP [$F800] Jump to monitor on Completion.
*
*
* RAM SPACE
*
DRVNUM FCB 0
TRACK FCB 0
SECTOR FCB 0
CHKSUM FCB 0
BLKNUM FCB 0 Xmodem block number
BYTCNT FCB 0 Xmodem byte count
XSTATE FDB 0 Xmodem State Vector
DELCNT FCB $00,$00,$00 Xmodem Poll timer
MAXTRK FCB 0
MAXSEC FCB 0
ORG $0200
*
* SECTOR BUFFER
*
BUFFER RMB 256
*
* ACIA INPUT TEST
*
INTEST LDA ACIAC1
BITA #$01
RTS
*
* RESET ACIA
*
ACIRST LDA #$03 master reset
STA ACIAC1
LDA #$11
STA ACIAC1
RTS
*
* ACIA INPUT
*
INTER LDA #16
STA DELCNT+0
CLR DELCNT+1
CLR DELCNT+2
INTER0 LDA ACIAC1
BITA #$01
BNE INTER1
BITA #$78
BEQ INTER2
BSR ACIRST
BRA INTER
*
INTER1 LDA ACIAD1
ANDCC #$FF-VFLAG
RTS
*
INTER2 DEC DELCNT+2
BNE INTER0
DEC DELCNT+1
BNE INTER0
DEC DELCNT+0
BNE INTER0
CLRA
ORCC #VFLAG
RTS
*
* ACIA OUTPUT
*
OUTTER PSHS A
*
OUTTE1 LDA ACIAC1
BITA #$02
BNE OUTTE2
BITA #$78
BEQ OUTTE1
BSR ACIRST
BRA OUTTE1
*
OUTTE2 PULS A
STA ACIAD1
RTS
*
* Print Data
*
PDATA0 BSR OUTTER
PDATA1 LDA ,X+
CMPA #$04
BNE PDATA0
RTS
*
** 'UX' Xmodem ROM Disk upload
*
UXMES0 FCB $0D,$0A
FCC 'Xmodem ROM Disk Upload'
FCB 4
UXMES1 FCB $0D,$0A
FCC 'Upload Complete'
FCB 4
UXMES2 FCB $0D,$0A
FCC 'Upload Error'
FCB 4
UXMSG3 FCB $0D,$0A
FCC 'Drive Number :'
FCB 4
UXMSG4 FCB $0D,$0A
FCC 'Are You Sure ? (Y/N)'
FCB 4
*
* Print Banner
*
UXSUB LDX #UXMES0
LBSR PDATA1
*
* Prompt for Disk drive number (0 to 3)
*
LDX #UXMSG3
LBSR PDATA1
UXSUB1 LBSR INTER
BVS UXSUB1
LBSR OUTTER
CMPA #'0
LBLO UXEXIT
CMPA #'3
LBHI UXEXIT
SUBA #'0
STA DRVNUM
*
* Report selected drive
*
LDX #UXMSG3
LBSR PDATA1
LDA DRVNUM
ADDA #'0
LBSR OUTTER
*
* Ask for confirmation (Y/N)
*
LDX #UXMSG4
LBSR PDATA1
UXSUB2 LBSR INTER
BVS UXSUB2
LBSR OUTTER
ANDA #$5F
CMPA #'N
LBEQ UXEXIT
CMPA #'Y
BNE UXSUB
*
* We have confirmation ... now load the disk image
*
LBSR INITDR
LDU #XSTST
STU XSTATE
LDA #1
STA BLKNUM
*
* Sector1
*
LDX #BUFFER
*
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
LBSR XACK
*
* Sector 2
*
LDX #BUFFER
*
LDA TRACK
LDB SECTOR
INCB
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
*
LBSR XACK
*
* Sector 3 - SIR
*
LDX #BUFFER
*
LDA TRACK
LDB SECTOR
INCB
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA 38,X
INCA
STA MAXTRK
LDB 39,X
INCB
STB MAXSEC
LDA TRACK
LDB SECTOR
LBSR WRITSC
*
LBSR XACK
*
* Sector 4 to Last Track & Sector
*
*
LDA TRACK
LDB SECTOR
INCB
*
UXLOOP LDX #BUFFER
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
LBSR XACK
*
LDA TRACK
LDB SECTOR
INCB
CMPB MAXSEC
BNE UXLOOP
LDB #1
INCA
CMPA MAXTRK
BNE UXLOOP
*
*
* Write Boot sector
*
LDX #$C000
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
LBSR WRITSC
*
UXEXIT LDX #UXMES1
JMP PDATA1
*
UXERR LDX #UXMES2
LBRA PDATA1
*
* Get a Byte using XModem protocol
* Carry clear => no errors
* Carry set => errors
*
XREAD PSHS U
LDU XSTATE
*
XBYTE0 LBSR INTER
BVC XBYTE1
LDA #NAK
LBSR OUTTER
LDU #XSTST
BRA XBYTE0
*
XBYTE1 JSR ,U
BNE XBYTE0
STU XSTATE
PULS U,PC
*
* START - LOOK FOR SOH (START OF HEADER) = $01
*
XSTST CMPA #SOH
BNE XSTST1
LDU #XSTBL
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
XSTST1 CMPA #EOT
BNE XSTST2
LDA #ACK
LBSR OUTTER
ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
RTS
*
XSTST2 CMPA #CAN
BNE XSTST3
ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
RTS
*
XSTST3 ANDCC #$FF-CFLAG-ZFLAG
RTS
*
* Got SOH
* Now get block number
*
XSTBL CMPA BLKNUM
BNE XSTBLE
LDU #XSTCOM
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Error in block number
*
XSTBLE LDA #NAK
LBSR OUTTER
LDU #XSTST
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Get complement of block number
*
XSTCOM COMA
CMPA BLKNUM
BNE XSTBLE
CLR CHKSUM
LDA #128
STA BYTCNT
LDU #XSTDA
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Get data bytes
*
XSTDA PSHS A
ADDA CHKSUM
STA CHKSUM
PULS A
DEC BYTCNT
BNE XSTDA1
LDU #XSTCK
XSTDA1 STA ,X+
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
* Byte count reached zero
* Check checksum byte
*
XSTCK CMPA CHKSUM
BNE XSTCK1 retry if wrong checksum
*
* Checksum OK ...
* increment block number
* Don't send ACK until data written to CF
*
INC BLKNUM
LDU #XSTST
ANDCC #$FF-CFLAG No abort
ORCC #ZFLAG Valid data (exit)
RTS
*
* Checksum Error detected ...
* Reset Sector counter in ACCB to last 128 byte boundary
* and send NAK
*
XSTCK1 PSHS B
TFR X,D
DECB
ANDB #128
TFR D,X
PULS B
LDA #NAK
XSTCK2 LBSR OUTTER
LDU #XSTST
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
* Acknowledge Data Received
*
XACK PSHS A
LDA #ACK
LBSR OUTTER
PULS A,PC
*
*
** FLEX 9 COMPACT FLASH DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE BURCHED B5-X300
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE BURCHED B5-X300 HAS 256KBYTES OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 192K MAY BE USED AS A RAM DISK
*
*
IMASK EQU $10 IRQ MASK CC
FMASK EQU $40 FIRQ MASK CC
DATREG EQU $FFF0 DAT REGISTERS
*
CF_BASE EQU $E040
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+1 ; read error
CF_FEATURE EQU CF_BASE+1 ; write feature
CF_SCNT EQU CF_BASE+2
CF_SNUM EQU CF_BASE+3
CF_CLO EQU CF_BASE+4
CF_CHI EQU CF_BASE+5
CF_HEAD EQU CF_BASE+6
CF_STATUS EQU CF_BASE+7 ; read status
CF_COMAND EQU CF_BASE+7 ; write command
*
* Command Equates
*
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
CMDFEATURE EQU $EF
FEAT8BIT EQU $01 ; enable 8 bit transfers
HEADLBA EQU $E0
*
* Status bit equates
*
BSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
INITDR BSR WAITRDY
LDA #HEADLBA
STA CF_HEAD
LDA #FEAT8BIT
STA CF_FEATURE
LDA #CMDFEATURE
STA CF_COMAND
BRA WAITRDY
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEKTS DECB
STB CF_SNUM
STA CF_CLO
LDB DRVNUM
STB CF_CHI
LDB #$01
STB CF_SCNT
CLRB
RTS
*
* READ SECTORS FROM CF
*
*
READSC BSR SEEKTS
LDA #CMDREAD ; IDE READ MULTIPLE
STA CF_COMAND
BSR WAITRDY
*
* READ LOOP
*
CLRB
RDLP1 BSR WAITDRQ
LDA CF_DATA
STA ,X+
DECB
BNE RDLP1
*
CLRB
RDLP2 BSR WAITDRQ
LDA CF_DATA
DECB
BNE RDLP2
*
BSR WAITRDY
CLRB
RTS
*
* WRITE SECTOR TO CF
*
WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR
LDA #CMDWRITE ; IDE WRITE MULTIPLE
STA CF_COMAND
BSR WAITRDY
*
* WRITE LOOP
*
CLRB
WRTLP1 BSR WAITDRQ
LDA ,X+
STA CF_DATA
DECB
BNE WRTLP1
*
CLRB
WRTLP2 BSR WAITDRQ
CLRA
STA CF_DATA
DECB
BNE WRTLP2
*
BSR WAITRDY
CLRB
RTS
*
* CHECK FOR BUSY
* Doubles as VERIFY
*
BUSY CLRB Never busy
RTS
*
* DRIVE SELECT DISK DRIVER
*
DRVSEL LDA 3,X GET DRIVE # FROM FCB
CMPA #3
BLS DRVS2 IF > 3, SET IT TO 0
CLRA
DRVS2 STA DRVNUM
CLRB ; SET Z, CLEAR C
RTS
*
* CHECK DRIVE READY DISK DRIVER
*
CHKDRV LDA 3,X
CLRB ; CLEAR C, SET Z
RTS
*
* WAIT UNTIL READY
*
WAITRDY LDA CF_STATUS
BITA #BSY
BNE WAITRDY
LDA CF_STATUS
BITA #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDA CF_STATUS
BITA #DRQ
BEQ WAITDRQ
RTS
*
*******************************************************
*
* Bootstrap FLEX Loader
*
* SBUG1.8 loads the bootstap loader at $C000
* however the Flex adaption manual has the
* bootstrap loader residing at $C100
*
******************************************************
*
* Equates
*
STACK EQU $C0FF
SCTBUF EQU $C300
*
* Start of Utility
*
ORG $C000
BOOT BRA LOAD0
FCB 0,0,0
TRK FCB 0 File start track
SCT FCB 0 File start sector
DNS FCB 0 Density Flag (not used)
TADR FDB $C000 Transfer address
LADR FDB 0 Load Address
DRNUM FCB 0 Drive number 0
*
LOAD0 LDS #STACK Set up stack
LDD TRK Set up start track and sector
STD SCTBUF
LDY #SCTBUF+256
*
* Perform actual file load
*
LOAD1 BSR GETCH Get acharcater
CMPA #$02 Data record hearder ?
BEQ LOAD2 Skip, is so
CMPA #$16 Xfr address hearder ?
BNE LOAD1 Loop if neither
*
* Get transfer address
*
BSR GETCH
STA TADR
BSR GETCH
STA TADR+1
BRA LOAD1
*
* Load data record
*
LOAD2 BSR GETCH Get load address
STA LADR
BSR GETCH
STA LADR+1
BSR GETCH Get Bytes count
TFR A,B
TSTB
BEQ LOAD1 Loop if count = 0
LDX LADR Get load address
LOAD3 PSHS B,X
BSR GETCH Get data character
PULS B,X
STA ,X+ Store at load address
DECB
BNE LOAD3 Loop until count = 0
BRA LOAD1
*
* Get Character routine
* Reads a sector if needed
*
GETCH CMPY #SCTBUF+256 out of data ?
BNE GETCH4 Go read Character if not
GETCH2 LDX #SCTBUF Point to buffer
LDD 0,X Get forward Link
BEQ GO if zero, file is loaded
BSR READ Read next sector
BNE BOOT start over if error
LDY #SCTBUF+4 Point past link
GETCH4 LDA ,Y+ Else, get a character
RTS
*
* File is loaded, Jump to it
*
GO JMP [TADR] Jump to transfer address
 
*
** FLEX 9 COMPACT FLASH DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE BURCHED B5-X300
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE BURCHED B5-X300 HAS 256KBYTES OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 192K MAY BE USED AS A RAM DISK
*
*
*IMASK EQU $10 IRQ MASK CC
*FMASK EQU $40 FIRQ MASK CC
*DATREG EQU $FFF0 DAT REGISTERS
*
*CF_BASE EQU $E040
*CF_DATA EQU CF_BASE+0
*CF_ERROR EQU CF_BASE+1 ; read error
*CF_FEATURE EQU CF_BASE+1 ; write feature
*CF_SCNT EQU CF_BASE+2
*CF_SNUM EQU CF_BASE+3
*CF_CLO EQU CF_BASE+4
*CF_CHI EQU CF_BASE+5
*CF_HEAD EQU CF_BASE+6
*CF_STATUS EQU CF_BASE+7 ; read status
*CF_COMAND EQU CF_BASE+7 ; write command
*
* Command Equates
*
*CMDREAD EQU $20 ; Read Single sector
*CMDWRITE EQU $30 ; Write Single sector
*CMDFEATURE EQU $EF
*FEAT8BIT EQU $01 ; enable 8 bit transfers
*HEADLBA EQU $E0
*
* Status bit equates
*
*BSY EQU $80
*DRDY EQU $40
*DRQ EQU $08
*ERR EQU $01
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEK DECB
STB CF_SNUM
STA CF_CLO
LDB DRNUM
STB CF_CHI
LDB #$01
STB CF_SCNT
CLRB
RTS
*
* READ SECTORS FROM CF
*
*
READ BSR SEEK
LDA #CMDREAD ; IDE READ MULTIPLE
STA CF_COMAND
BSR WTRDY
*
* READ LOOP
*
CLRB
READ1 BSR WTDRQ
LDA CF_DATA
STA ,X+
DECB
BNE READ1
*
CLRB
READ2 BSR WTDRQ
LDA CF_DATA
DECB
BNE READ2
*
BSR WTRDY
CLRB
RTS
*
* WAIT UNTIL READY
*
WTRDY LDA CF_STATUS
BITA #BSY
BNE WTRDY
LDA CF_STATUS
BITA #DRDY
BEQ WTRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WTDRQ LDA CF_STATUS
BITA #DRQ
BEQ WTDRQ
RTS
*
END START
/branches/mkfiles_rev1/src/upld/upld_ide.asm
0,0 → 1,865
*
** FLEX 9 DISK DRIVERS
*
* FOR SYS09BUG ON THE DIGILENT SPARTAN 3 STARTER BOARD
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE DIGILENT SPARTAN 3 STARTER BOARD HAS 1MBYTE OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 128K IS USED AS A ROM DISK
* THE REMAINING RAM IS USED FOR A RAM DISK
*
*
CFLAG EQU $01 CARRY FLAG
VFLAG EQU $02 OVERFLOW FLAG
ZFLAG EQU $04 ZERO FLAG
NFLAG EQU $08 NEGATIVE FLAG
IFLAG EQU $10 IRQ MASK CC
HFLAG EQU $20 HALF CARRY
FFLAG EQU $40 FIRQ MASK CC
EFLAG EQU $80 ENTIRE FLAG
*
MAPPAG EQU $00 PAGE $0000 DAT ADDRESS
*
* Serial Port
*
ACIAS EQU $E000
ACIAC1 EQU ACIAS
ACIAD1 EQU ACIAS+1
DELCON EQU 1250 Delay (Processor clock in MHz * 50)
*
* XMODEM Control characters
*
SOH EQU $01
EOT EQU $04
ACK EQU $06
NAK EQU $15
CAN EQU $18
*
* Some dummy Constants
*
RMAXTRK EQU 64
RMAXSEC EQU 255
RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
*
* Start
*
ORG $0100
START LBSR UXSUB
JMP [$F800] Jump to monitor on Completion.
*
*
* RAM SPACE
*
DRVNUM FCB 0
TRACK FCB 0
SECTOR FCB 0
CHKSUM FCB 0
BLKNUM FCB 0 Xmodem block number
BYTCNT FCB 0 Xmodem byte count
XSTATE FDB 0 Xmodem State Vector
DELCNT FCB $00,$00,$00 Xmodem Poll timer
MAXTRK FCB 0
MAXSEC FCB 0
ORG $0200
*
* SECTOR BUFFER
*
BUFFER RMB 256
*
*
* recieve char from remote drive.
* timeout if no response for approx 1s.
* Entry: no parameters
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
RCHAR PSHS X,Y
*
LDX #1000 1000x inner loop
RCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
RCHAR2 LDA ACIAC1 test for recieved char
ASRA
BCS RCHAR3 get character
LEAY -1,Y else, continue to count delay
BNE RCHAR2
LEAX -1,X
BNE RCHAR1
PULS X,Y,PC return with error if timed out
*
RCHAR3 LDA ACIAD1 return data (carry bit still set)
PULS X,Y,PC
*
*
* transmit char to remote drive.
* timeout if no response for approx 1s. (allows for use of hardware flow control)
* Entry: (A) = char to transmit
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
SCHAR PSHS X,Y
PSHS A
*
LDX #1000 1000x inner loop
SCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
SCHAR2 LDA ACIAC1 test for space in transmit FIFO
ASRA
ASRA
BCS SCHAR3 send character
LEAY -1,Y else, continue to count delay
BNE SCHAR2
LEAX -1,X
BNE SCHAR1
PULS A
PULS X,Y,PC return with error if timed out
*
SCHAR3 PULS A
STA ACIAD1 send data (carry bit still set)
PULS X,Y,PC
*
* Read a byte from the serial port
*
LRBYTE PSHS B
BSR LRHEX Get hex digit.
ASLA
ASLA Shift to msb.
ASLA
ASLA
TFR A,B Save in B.
BSR LRHEX Get next digit.
PSHS B
ADDA 0,S+ Add together bytes.
PULS B,PC
*
LRHEX JSR INTER
BVS LRHEX
SUBA #$30 Remove ascii bias.
BMI LRHEX
CMPA #$09 Number?
BLE LRHEX1 Yes.
CMPA #$11 Keep testing.
BMI LRHEX
CMPA #$16
BGT LRHEX
SUBA #$07
LRHEX1 RTS
*
* ACIA INPUT TEST
*
INTEST LDA ACIAC1
BITA #$01
RTS
*
* RESET ACIA
*
ACIRST LDA #$03 master reset
STA ACIAC1
LDA #$11
STA ACIAC1
RTS
*
* ACIA INPUT
*
INTER LDA #16
STA DELCNT+0
CLR DELCNT+1
CLR DELCNT+2
INTER0 LDA ACIAC1
BITA #$01
BNE INTER1
BITA #$78
BEQ INTER2
BSR ACIRST
BRA INTER
*
INTER1 LDA ACIAD1
ANDCC #$FF-VFLAG
RTS
*
INTER2 DEC DELCNT+2
BNE INTER0
DEC DELCNT+1
BNE INTER0
DEC DELCNT+0
BNE INTER0
CLRA
ORCC #VFLAG
RTS
*
* ACIA OUTPUT
*
OUTTER PSHS A
*
OUTTE1 LDA ACIAC1
BITA #$02
BNE OUTTE2
BITA #$78
BEQ OUTTE1
BSR ACIRST
BRA OUTTE1
*
OUTTE2 PULS A
STA ACIAD1
RTS
*
* Print Data
*
PDATA0 BSR OUTTER
PDATA1 LDA ,X+
CMPA #$04
BNE PDATA0
RTS
*
*
** 'UX' Xmodem ROM Disk upload
*
UXMES0 FCB $0D,$0A
FCC 'Xmodem ROM Disk Upload'
FCB 4
UXMES1 FCB $0D,$0A
FCC 'Upload Complete'
FCB 4
UXMES2 FCB $0D,$0A
FCC 'Upload Error'
FCB 4
UXMSG3 FCB $0D,$0A
FCC 'Drive Number :'
FCB 4
UXMSG4 FCB $0D,$0A
FCC 'Are You Sure ? (Y/N)'
FCB 4
*
* Print Banner
*
UXSUB LDX #UXMES0
LBSR PDATA1
*
* Prompt for Disk drive number (0 to 3)
*
LDX #UXMSG3
LBSR PDATA1
UXSUB1 LBSR INTER
BVS UXSUB1
LBSR OUTTER
CMPA #'0
LBLO UXEXIT
CMPA #'3
LBHI UXEXIT
SUBA #'0
STA DRVNUM
*
* Report selected drive
*
LDX #UXMSG3
LBSR PDATA1
LDA DRVNUM
ADDA #'0
LBSR OUTTER
*
* Ask for confirmation (Y/N)
*
LDX #UXMSG4
LBSR PDATA1
UXSUB2 LBSR INTER
BVS UXSUB2
LBSR OUTTER
ANDA #$5F
CMPA #'N
LBEQ UXEXIT
CMPA #'Y
BNE UXSUB
*
* We have confirmation ... now load the disk image
*
LBSR INITDR
LDU #XSTST
STU XSTATE
LDA #1
STA BLKNUM
*
* Sector1
*
LDX #BUFFER
*
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
LBSR XACK
*
* Sector 2
*
LDX #BUFFER
*
LDA TRACK
LDB SECTOR
INCB
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
*
LBSR XACK
*
* Sector 3 - SIR
*
LDX #BUFFER
*
LDA TRACK
LDB SECTOR
INCB
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA 38,X
INCA
STA MAXTRK
LDB 39,X
INCB
STB MAXSEC
LDA TRACK
LDB SECTOR
LBSR WRITSC
*
LBSR XACK
*
* Sector 4 to Last Track & Sector
*
*
LDA TRACK
LDB SECTOR
INCB
*
UXLOOP LDX #BUFFER
STA TRACK
STB SECTOR
*
LBSR XREAD
LBCS UXERR
LBSR XACK
LBSR XREAD
LBCS UXERR
*
LDX #BUFFER
LDA TRACK
LDB SECTOR
LBSR WRITSC
LBSR XACK
*
LDA TRACK
LDB SECTOR
INCB
CMPB MAXSEC
BNE UXLOOP
LDB #1
INCA
CMPA MAXTRK
BNE UXLOOP
*
*
* Write Boot sector
*
LDX #$C000
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
LBSR WRITSC
*
UXEXIT LDX #UXMES1
JMP PDATA1
*
UXERR LDX #UXMES2
LBRA PDATA1
*
* Get a Byte using XModem protocol
* Carry clear => no errors
* Carry set => errors
*
XREAD PSHS U
LDU XSTATE
*
XBYTE0 LBSR INTER
BVC XBYTE1
LDA #NAK
LBSR OUTTER
LDU #XSTST
BRA XBYTE0
*
XBYTE1 JSR ,U
BNE XBYTE0
STU XSTATE
PULS U,PC
*
* START - LOOK FOR SOH (START OF HEADER) = $01
*
XSTST CMPA #SOH
BNE XSTST1
LDU #XSTBL
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
XSTST1 CMPA #EOT
BNE XSTST2
LDA #ACK
LBSR OUTTER
ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
RTS
*
XSTST2 CMPA #CAN
BNE XSTST3
ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
RTS
*
XSTST3 ANDCC #$FF-CFLAG-ZFLAG
RTS
*
* Got SOH
* Now get block number
*
XSTBL CMPA BLKNUM
BNE XSTBLE
LDU #XSTCOM
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Error in block number
*
XSTBLE LDA #NAK
LBSR OUTTER
LDU #XSTST
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Get complement of block number
*
XSTCOM COMA
CMPA BLKNUM
BNE XSTBLE
CLR CHKSUM
LDA #128
STA BYTCNT
LDU #XSTDA
ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
RTS
*
* Get data bytes
*
XSTDA PSHS A
ADDA CHKSUM
STA CHKSUM
PULS A
DEC BYTCNT
BNE XSTDA1
LDU #XSTCK
XSTDA1 STA ,X+
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
* Byte count reached zero
* Check checksum byte
*
XSTCK CMPA CHKSUM
BNE XSTCK1 retry if wrong checksum
*
* Checksum OK ...
* increment block number
* Don't send ACK until data written to CF
*
INC BLKNUM
LDU #XSTST
ANDCC #$FF-CFLAG No abort
ORCC #ZFLAG Valid data (exit)
RTS
*
* Checksum Error detected ...
* Reset Sector counter in ACCB to last 128 byte boundary
* and send NAK
*
XSTCK1 PSHS B
TFR X,D
DECB
ANDB #128
TFR D,X
PULS B
LDA #NAK
XSTCK2 LBSR OUTTER
LDU #XSTST
ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
RTS
*
* Acknowledge Data Received
*
XACK PSHS A
LDA #ACK
LBSR OUTTER
PULS A,PC
*
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*
IMASK EQU $10 IRQ MASK CC
FMASK EQU $40 FIRQ MASK CC
*
CF_BASE EQU $E100
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+2 ; read error
CF_FEATURE EQU CF_BASE+2 ; write feature
CF_SCNT EQU CF_BASE+4
CF_SNUM EQU CF_BASE+6
CF_CLO EQU CF_BASE+8
CF_CHI EQU CF_BASE+10
CF_HEAD EQU CF_BASE+12
CF_STATUS EQU CF_BASE+14 ; read status
CF_COMAND EQU CF_BASE+14 ; write command
CF_AUX EQU CF_BASE+30
*
* Command Equates
*
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
AUXRESET EQU $06
AUXRSTREL EQU $02
HEADLBA EQU $E0
*
* Status bit equates
*
BSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
INITDR LDD #AUXRESET
STD CF_AUX
LDD #AUXRSTREL
STD CF_AUX
LDD #HEADLBA
STD CF_HEAD
BRA WAITRDY
*
* RESTORE DISK DRIVER (SEEK TRACK 00)
*
RESTR1 BSR DRVSEL
CLRA ; Track 0
LDB #$01 ; Sector 1
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEKTS PSHS A
CLRA
DECB
STD CF_SNUM
LDB ,S
STD CF_CLO
LDB DRVNUM
STD CF_CHI
LDB #$01
STD CF_SCNT
CLRB
PULS A,PC
*
* READ SECTORS FROM CF
*
*
READSC BSR SEEKTS
LDD #CMDREAD ; IDE READ MULTIPLE
STD CF_COMAND
BSR WAITRDY
*
* READ LOOP
*
PSHS Y
LDY #256
RDLP1 BSR WAITDRQ
LDD CF_DATA
STB ,X+
LEAY -1,Y
BNE RDLP1
PULS Y
*
BSR WAITRDY
CLRB
RTS
*
* WRITE SECTOR TO CF
*
WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR
LDD #CMDWRITE ; IDE WRITE MULTIPLE
STD CF_COMAND
BSR WAITRDY
*
* WRITE LOOP
*
PSHS Y
LDY #256
CLRA
WRTLP1 BSR WAITDRQ
LDB ,X+
STD CF_DATA
LEAY -1,Y
BNE WRTLP1
PULS Y
*
BSR WAITRDY
CLRB
RTS
*
* CHECK FOR BUSY
* Doubles as VERIFY
*
BUSY CLRB Never busy
RTS
*
* DRIVE SELECT DISK DRIVER
*
DRVSEL LDA 3,X GET DRIVE # FROM FCB
CMPA #3
BLS DRVS2 IF > 3, SET IT TO 0
CLRA
DRVS2 STA DRVNUM
CLRB ; SET Z, CLEAR C
RTS
*
* CHECK DRIVE READY DISK DRIVER
*
CHKDRV LDA 3,X
CLRB ; CLEAR C, SET Z
RTS
*
* WAIT UNTIL READY
*
WAITRDY LDD CF_STATUS
BITB #BSY
BNE WAITRDY
LDD CF_STATUS
BITB #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDD CF_STATUS
BITB #DRQ
BEQ WAITDRQ
RTS
*
*******************************************************
*
* Bootstrap FLEX Loader
*
* SBUG1.8 loads the bootstap loader at $C000
* however the Flex adaption manual has the
* bootstrap loader residing at $C100
*
******************************************************
*
* Equates
*
STACK EQU $C0FF
SCTBUF EQU $C300
*
* Start of Utility
*
ORG $C000
BOOT BRA LOAD0
FCB 0,0,0
TRK FCB 0 File start track
SCT FCB 0 File start sector
DNS FCB 0 Density Flag (not used)
TADR FDB $C000 Transfer address
LADR FDB 0 Load Address
DRNUM FCB 0 Drive number 0
*
LOAD0 LDS #STACK Set up stack
LDD TRK Set up start track and sector
STD SCTBUF
LDY #SCTBUF+256
*
* Perform actual file load
*
LOAD1 BSR GETCH Get acharcater
CMPA #$02 Data record hearder ?
BEQ LOAD2 Skip, is so
CMPA #$16 Xfr address hearder ?
BNE LOAD1 Loop if neither
*
* Get transfer address
*
BSR GETCH
STA TADR
BSR GETCH
STA TADR+1
BRA LOAD1
*
* Load data record
*
LOAD2 BSR GETCH Get load address
STA LADR
BSR GETCH
STA LADR+1
BSR GETCH Get Bytes count
TFR A,B
TSTB
BEQ LOAD1 Loop if count = 0
LDX LADR Get load address
LOAD3 PSHS B,X
BSR GETCH Get data character
PULS B,X
STA ,X+ Store at load address
DECB
BNE LOAD3 Loop until count = 0
BRA LOAD1
*
* Get Character routine
* Reads a sector if needed
*
GETCH CMPY #SCTBUF+256 out of data ?
BNE GETCH4 Go read Character if not
GETCH2 LDX #SCTBUF Point to buffer
LDD 0,X Get forward Link
BEQ GO if zero, file is loaded
BSR READ Read next sector
BNE BOOT start over if error
LDY #SCTBUF+4 Point past link
GETCH4 LDA ,Y+ Else, get a character
RTS
*
* File is loaded, Jump to it
*
GO JMP [TADR] Jump to transfer address
 
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*IMASK EQU $10 IRQ MASK CC
*FMASK EQU $40 FIRQ MASK CC
*
*CF_BASE EQU $E100
*CF_DATA EQU CF_BASE+0
*CF_ERROR EQU CF_BASE+2 ; read error
*CF_FEATURE EQU CF_BASE+2 ; write feature
*CF_SCNT EQU CF_BASE+4
*CF_SNUM EQU CF_BASE+6
*CF_CLO EQU CF_BASE+8
*CF_CHI EQU CF_BASE+10
*CF_HEAD EQU CF_BASE+12
*CF_STATUS EQU CF_BASE+14 ; read status
*CF_COMAND EQU CF_BASE+14 ; write command
*CF_AUX EQU CF_BASE+30
*
* Command Equates
*
*CMDREAD EQU $20 ; Read Single sector
*CMDWRITE EQU $30 ; Write Single sector
*HEADLBA EQU $E0
*AUXRESET EQU $06
*AUXRSTREL EQU $02
*
* Status bit equates
*
*BSY EQU $80
*DRDY EQU $40
*DRQ EQU $08
*ERR EQU $01
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEK PSHS A
CLRA
DECB
STD CF_SNUM
LDB ,S
STD CF_CLO
LDB DRNUM
STD CF_CHI
LDB #$01
STD CF_SCNT
CLRB
PULS A,PC
*
* READ SECTORS FROM CF
*
*
READ BSR SEEK
LDD #CMDREAD ; IDE READ MULTIPLE
STD CF_COMAND
BSR WTRDY
*
* READ LOOP
*
PSHS Y
LDY #256
READ1 BSR WTDRQ
LDD CF_DATA
STB ,X+
LEAY -1,Y
BNE READ1
PULS Y
*
BSR WTRDY
CLRB
RTS
*
* WAIT UNTIL READY
*
WTRDY LDD CF_STATUS
BITB #BSY
BNE WTRDY
LDD CF_STATUS
BITB #DRDY
BEQ WTRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WTDRQ LDD CF_STATUS
BITB #DRQ
BEQ WTDRQ
RTS
*
END START
/branches/mkfiles_rev1/src/upld/upld_cf8.sh
1,0 → 1,865
../../Tools/as09/as09.exe cf8load.txt -l > cf8load.lst
../../Tools/as09/as09.exe upld_cf8.asm -l > upld_cf8.lst
/branches/mkfiles_rev1/src/upld/Makefile
0,0 → 1,47
#-----------------------------------------------------------------
# File: Makefile
# Author: David Burnette
# Date: April 7, 2008
#
# Description:
# This makefile generates the S19 record file .S19 from the
# assembler source.
#
# This particular makefile handles generating
#
# Usage:
# The targets generated by this makefile are:
#
# make - makes all
# make all - makes all
# make upld_cf8.S19 -
# make upld_ide.S19 -
#
# Target Descriptions:
# The first file listed is the source file passed to assembler.
# Remaining files are the dependencies.
#
# Dependencies:
# This makefile depends on def_rules.mk.
#
# Revision History:
# dgb 2008-04-07 Original version
#
#-----------------------------------------------------------------
 
ifeq "$(MKFRAGS)" ""
MKFRAGS := ../../mkfiles
endif
 
include $(MKFRAGS)/def_rules.mk
 
all: upld_cf8.S19 upld_ide.S19
 
upld_cf8.S19: upld_cf8.asm
 
upld_ide.S19: upld_ide.asm
 
.PHONY: clean
clean:
-$(RM) *.S19
-$(RM) *.lst
/branches/mkfiles_rev1/src/upld/upld_ide.sh
0,0 → 1,47
../../Tools/as09/as09.exe upld_ide.asm -l > upld_ide.lst
/branches/mkfiles_rev1/src/dump/dump_ide.sh
1,2 → 1,2
../../Tools/as09/as09.exe dump_ide.txt -l > dump_ide.lst
../../Tools/as09/as09.exe dump_ide.asm -l > dump_ide.lst
 
/branches/mkfiles_rev1/src/dump/dump_cf8.asm
0,0 → 1,605
*
* Sector Dump Utility
* For Compact Flash Driver
* for the 6809
* Configured in 8 bit mode
*
* John Kent
* 21 May 2007
*
* Register Equates
*
CF_BASE EQU $E040
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+1 ; read error
CF_FEATURE EQU CF_BASE+1 ; write feature
CF_SECCNT EQU CF_BASE+2
CF_SECNUM EQU CF_BASE+3
CF_CYLLO EQU CF_BASE+4
CF_CYLHI EQU CF_BASE+5
CF_HEAD EQU CF_BASE+6
CF_STATUS EQU CF_BASE+7 ; read status
CF_COMAND EQU CF_BASE+7 ; write command
*
* Command Equates
*
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
CMDFEATURE EQU $EF
FEAT8BIT EQU $01 ; enable 8 bit transfers
HEADLBA EQU $E0
*
* Status bit equates
*
BUSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
* Start of Program
*
ORG $0100
START LBRA START1
*
* DATA STORAGE
*
SECNUM FCB $00,$00,$00
CPORT FDB $E000
ECHO FCB $FF
*
* SECTOR BUFFER
*
SECBUF RMB 512
*
* PROGRAM STACK
*
RMB 64
STACK EQU *
*
* Initialization
*
START1 LDS #STACK
*
* Clear sector buffer
*
LDX #SECBUF
LDY #512
ZEROLP CLR ,X+
LEAY -1,Y
BNE ZEROLP
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
JSR WAITRDY
LDA #HEADLBA
STA CF_HEAD
JSR WAITRDY
LDA #FEAT8BIT
STA CF_FEATURE
LDA #CMDFEATURE
STA CF_COMAND
JSR WAITRDY
*
* DISPLAY TITTLE BANNER
*
LDX #TTLMSG
JSR PDATA
*
* COMMAND LOOP
* R - READ
* W - WRITE
* N - NEXT
* P - PREV
* M - MODIFY
* Q - QUIT
*
CMDLP LDX #CMDMSG
JSR PDATA
JSR ECHON
CMPA #'R'
BEQ READ
CMPA #'N'
BEQ NEXT
CMPA #'P'
BEQ PREV
CMPA #'W'
LBEQ WRITE
CMPA #'M'
BEQ MODIFY
CMPA #'Q'
BEQ QUIT
LDX #WOTMSG
JSR PSTRNG
BRA CMDLP
*
* QUIT
*
QUIT JMP [$F800]
*
* MODIFY SECTOR
*
MODIFY JSR MEMCHG
BRA CMDLP
*
* NEXT SECTOR (READ)
* INCREMENT SECTOR NUMBER
* WRAPS AROUND TO ZERO ON $FFFFFF
*
NEXT LDX SECNUM+1
LEAX 1,X
STX SECNUM+1
BNE READS
INC SECNUM
BRA READS
*
* PREVIOUS SECTOR (READ)
* DECREMENT SECTOR NUMBER
* DON'T DECREMENT PAST $000000
*
PREV LDX SECNUM+1
BNE PREV1
TST SECNUM
BEQ READS
DEC SECNUM
PREV1 LEAX -1,X
STX SECNUM+1
BRA READS
*
* READ SECTORS FROM CF
*
READ LDX #SECPMT
JSR PSTRNG
JSR IN6HEX
BVS RDEXIT
STB SECNUM
STX SECNUM+1
*
READS LDA #$01
STA CF_SECCNT
LDA SECNUM+2
STA CF_SECNUM
LDA SECNUM+1
STA CF_CYLLO
LDA SECNUM+0
STA CF_CYLHI
*
LDA #CMDREAD ; IDE READ MULTIPLE
STA CF_COMAND
JSR WAITRDY
*
LDX #SECBUF
LDY #512
*
* READ LOOP
*
RDLOOP JSR WAITDRQ
LDA CF_DATA
STA ,X+
LEAY -1,Y
BNE RDLOOP
*
JSR WAITRDY
JSR MEMDUMP
RDEXIT JMP CMDLP
*
* WRITE SECTOR TO CF
*
WRITE LDX #SECPMT
JSR PSTRNG
JSR IN6HEX
BVS WREXIT
STB SECNUM
STX SECNUM+1
*
LDA #$01
STA CF_SECCNT
LDA SECNUM+2
STA CF_SECNUM
LDA SECNUM+1
STA CF_CYLLO
LDA SECNUM+0
STA CF_CYLHI
*
LDA #CMDWRITE; IDE WRITE MULTIPLE
STA CF_COMAND
JSR WAITRDY
*
LDX #SECBUF
LDY #512
*
* WRITE LOOP
*
WRLOOP JSR WAITDRQ
LDA ,X+
STA CF_DATA
LEAY -1,Y
BNE WRLOOP
*
JSR WAITRDY
WREXIT JMP CMDLP
*
* WAIT UNTIL READY
*
WAITRDY LDA CF_STATUS
BITA #BUSY
BNE WAITRDY
LDA CF_STATUS
BITA #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDA CF_STATUS
BITA #DRQ
BEQ WAITDRQ
RTS
*
* DUMP SECTOR IN MEMORY
*
MEMDUMP LDX #SECMSG
JSR PSTRNG
LDA SECNUM
JSR OUT2H
LDX SECNUM+1
JSR OUT4H
JSR PCRLF
LDY #$0000
LEAX #$1FF,Y
*
* ADJUST LOWER AND UPPER ADDRESS LIMITS
* TO EVEN 16 BYTE BOUNDRIES.
*
* IF LOWER ADDR = $4532
* LOWER BOUNDS WILL BE ADJUSTED TO = $4530.
*
* IF UPPER ADDR = $4567
* UPPER BOUNDS WILL BE ADJUSTED TO = $4570.
*
* ENTER WITH LOWER ADDRESS IN X-REG.
* -UPPER ADDRESS ON TOP OF STACK.
*
AJDUMP TFR X,D GET UPPER ADDR IN D-REG
ADDD #$10 ADD 16 TO UPPER ADDRESS
ANDB #$F0 MASK TO EVEN 16 BYTE BOUNDRY
PSHS A,B SAVE ON STACK AS UPPER DUMP LIMIT
TFR Y,D $F9A5 GET LOWER ADDRESS IN D-REG
ANDB #$F0 MASK TO EVEN 16 BYTE BOUNDRY
TFR D,X PUT IN X-REG AS LOWER DUMP LIMIT
NXTLIN CMPX ,S COMPARE LOWER TO UPPER LIMIT
BEQ SKPDMP IF EQUAL SKIP HEX-ASCII DUMP
LBSR INCHEK CHECK FOR INPUT FROM KEYBOARD
BEQ EDUMP
SKPDMP LEAS 2,S READJUST STACK IF NOT DUMPING
RTS ;
*
* PRINT 16 HEX BYTES FOLLOWED BY 16 ASCII CHARACTERS
* FOR EACH LINE THROUGHOUT ADDRESS LIMITS.
*
EDUMP PSHS X PUSH LOWER ADDR LIMIT ON STACK
LDX #MSG5 POINT TO MSG " - "
LBSR PSTRNG PRINT MSG
LDX ,S LOAD LOWER ADDR FROM TOP OF STACK
LBSR OUT4H PRINT THE ADDRESS
LBSR OUT2S 2 SPACES
LDB #$10 LOAD COUNT OF 16 BYTES TO DUMP
ELOOP LDA SECBUF,X GET FROM MEMORY HEX BYTE TO PRINT
LEAX 1,X
LBSR OUT2H OUTPUT HEX BYTE AS ASCII
LBSR OUT1S OUTPUT SPACE
DECB $F9D1 DECREMENT BYTE COUNT
BNE ELOOP CONTINUE TIL 16 HEX BYTES PRINTED
*
* PRINT 16 ASCII CHARACTERS
* IF NOT PRINTABLE OR NOT VALID
* ASCII PRINT A PERIOD (.)
LBSR OUT2S 2 SPACES
LDX ,S++ GET LOW LIMIT FRM STACK - ADJ STACK
LDB #$10 SET ASCII CHAR TO PRINT = 16
EDPASC LDA SECBUF,X GET CHARACTER FROM MEMORY
LEAX 1,X
CMPA #$20 IF LESS THAN $20, NON-PRINTABLE?
BCS PERIOD IF SO, PRINT PERIOD INSTEAD
CMPA #$7E IS IT VALID ASCII?
BLS PRASC IF SO PRINT IT
PERIOD LDA #'. LOAD A PERIOD (.)
PRASC LBSR OUTCH PRINT ASCII CHARACTER
DECB DECREMENT COUNT
BNE EDPASC
BRA NXTLIN
*
*
***** "M" MEMORY EXAMINE AND CHANGE *****
*
* RESTRICT ADDRESSING RANGE TO 512 BYTES ($000 - $1FF)
*
MEMCHG LDX #MEMMSG
JSR PSTRNG
LBSR IN3HEX INPUT ADDRESS
BVS CHRTN IF NOT HEX, RETURN
CMPX #$0200
BHS CHRTN
TFR X,Y SAVE ADDR IN "Y"
MEMC2 LDX #MSG5 POINT TO MSG " - "
LBSR PSTRNG PRINT MSG
TFR Y,X FETCH ADDRESS
LBSR OUT4H PRINT ADDR IN HEX
LBSR OUT1S OUTPUT SPACE
LDA SECBUF,Y GET CONTENTS OF CURRENT ADDR.
LBSR OUT2H OUTPUT CONTENTS IN ASCII
LBSR OUT1S OUTPUT SPACE
LBSR BYTE LOOP WAITING FOR OPERATOR INPUT
BVC CHANGE IF VALID HEX GO CHANGE MEM. LOC.
CMPA #8 IS IT A BACKSPACE (CNTRL H)?
BEQ MEMC2 PROMPT OPERATOR AGAIN
CMPA #$18 IS IT A CANCEL (CNTRL X)?
BEQ MEMC2 PROMPT OPERATOR AGAIN
CMPA #'^ IS IT AN UP ARROW?
BEQ BACK DISPLAY PREVIOUS BYTE
CMPA #$D IS IT A CR?
BNE FORWRD DISPLAY NEXT BYTE
CHRTN RTS EXIT ROUTINE
*
*
CHANGE STA SECBUF,Y CHANGE BYTE IN MEMORY
CMPA SECBUF,Y DID MEMORY BYTE CHANGE?
BEQ FORWRD $F972
LBSR OUT1S OUTPUT SPACE
LDA #'? LOAD QUESTION MARK
LBSR OUTCH PRINT IT
FORWRD CMPY #$01FF
BEQ MEMC2
LEAY 1,Y POINT TO NEXT HIGHER MEM LOCATION
BRA MEMC2 PRINT LOCATION & CONTENTS
BACK CMPY #$0000
BEQ MEMC2
LEAY -1,Y POINT TO LAST MEM LOCATION
BRA MEMC2 PRINT LOCATION & CONTENTS
*
* THE FOLLOWING ROUTINE LOOPS WAITING FOR THE
* OPERATOR TO INPUT ONE VALID HEX ADDRESS. THE
* ADDRESS IS RETURNED IN THE "X" REGISTER.
*
* IN6HEX - MS BYTE IN ACCB
* LS WORD IN X REG
*
IN6HEX LEAS -3,S
BSR BYTE
BVS NOTHEX
STA 0,S
BSR BYTE
BVS NOTHEX
STA 1,S
BSR BYTE
BVS NOTHEX
STA 2,S
CLRA
PULS B,X,PC
*
* INPUT 3 HEX DIGITS
* RESULT RETURNED IN X
*
IN3HEX BSR INHEX INPUT HEX (1 HEX CHAR)
BVS NOTHEX EXIT IF NOT VALID HEX
TFR D,X
BSR BYTE INPUT BYTE (2 HEX CHAR)
BVS NOTHEX
PSHS X
STA 1,S
PULS X,PC
*
***** INPUT BYTE (2 HEX CHAR.) *****
*
BYTE BSR INHEX GET HEX LEFT
BVS NOTHEX EXIT IF NOT VALID HEX
ASLA ;
ASLA ;
ASLA ; SHIFT INTO LEFT NIBBLE
ASLA ;
TFR A,B PUT HEXL IN "B"
BSR INHEX GET HEX RIGHT
BVS NOTHEX EXIT IF NOT VALID HEX
PSHS B PUSH HEXL ON STACK
ADDA ,S+ ADD HEXL TO HEXR AND ADJ. STK
RTS RETURN WITH HEX L&R IN "A"
*
*
INHEX BSR ECHON INPUT ASCII CHAR.
CMPA #'0 IS IT > OR = "0" ?
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'9 IS IT < OR = "9" ?
BHI INHEXA IF > MAYBE IT'S ALPHA
SUBA #$30 ASCII ADJ. NUMERIC
RTS ;
*
*
INHEXA CMPA #'A IS IT > OR = "A"
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'F IS IT < OR = "F" ?
BHI INHEXL IF > IT AIN'T HEX
SUBA #$37 ASCII ADJ. ALPHA
RTS ;
*
INHEXL CMPA #'a IS IT > OR = "a"
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'f IS IT < "f"
BHI NOTHEX IF > IT AIN'T HEX
SUBA #$57 ADJUST TO LOWER CASE
RTS ;
*
*
NOTHEX ORCC #2 SET (V) FLAG IN C-CODES REGISTER
RTS ;
*
*
OUT4H PSHS X PUSH X-REG. ON THE STACK
PULS A POP MS BYTE OF X-REG INTO A-ACC.
BSR OUTHL OUTPUT HEX LEFT
PULS A POP LS BYTE OF X-REG INTO A-ACC.
OUTHL EQU *
OUT2H PSHS A SAVE IT BACK ON STACK
LSRA CONVERT UPPER HEX NIBBLE TO ASCII
LSRA ;
LSRA ;
LSRA ;
BSR XASCII PRINT HEX NIBBLE AS ASCII
OUTHR PULS A CONVERT LOWER HEX NIBBLE TO ASCII
ANDA #$0F STRIP LEFT NIBBLE
XASCII ADDA #$30 ASCII ADJ
CMPA #$39 IS IT < OR = "9" ?
BLE OUTC IF LESS, OUTPUT IT
ADDA #7 IF > MAKE ASCII LETTER
OUTC BRA OUTCH OUTPUT CHAR
*
* BINARY / ASCII --- THIS ROUTINE
* OUTPUTS A BYTE IN ENHANCED
* BINARY FORMAT. THE ENHANCEMENT
* IS DONE BY SUBSTITUTING ASCII
* LETTERS FOR THE ONES IN THE BYTE.
* THE ASCII ENHANCEMENT LETTERS
* ARE OBTAINED FROM THE STRING
* POINTED TO BY THE INDEX REG. "X".
*
BIASCI PSHS A SAVE "A" ON STACK
LDB #8 PRESET LOOP# TO BITS PER BYTE
OUTBA LDA ,X+ GET LETTER FROM STRING
ASL ,S TEST BYTE FOR "1" IN B7
BCS PRTBA IF ONE PRINT LETTER
LDA #'- IF ZERO PRINT "-"
PRTBA BSR OUTCH PRINT IT
BSR OUT1S PRINT SPACE
DECB SUB 1 FROM #BITS YET TO PRINT
BNE OUTBA
PULS A,PC
*
* PRINT STRING PRECEEDED BY A CR & LF.
*
PSTRNG BSR PCRLF PRINT CR/LF
BRA PDATA PRINT STRING POINTED TO BY IX
*
* PCRLF
*
PCRLF PSHS X SAVE IX
LDX #MSG2+1 POINT TO MSG CR/LF + 3 NULS
BSR PDATA PRINT MSG
PULS X,PC RESTORE IX
PRINT BSR OUTCH
*
* PDATA
*
PDATA LDA ,X+ GET 1st CHAR. TO PRINT
CMPA #4 IS IT EOT?
BNE PRINT IF NOT EOT PRINT IT
RTS ;
*
*
ECHON TST ECHO IS ECHO REQUIRED ?
BEQ INCH ECHO NOT REQ. IF CLEAR
*
* INCHE
*
* ---GETS CHARACTER FROM TERMINAL AND
* ECHOS SAME. THE CHARACTER IS RETURNED
* IN THE "A" ACCUMULATOR WITH THE PARITY
* BIT MASKED OFF. ALL OTHER REGISTERS
* ARE PRESERVED.
*
INCHE BSR INCH GET CHAR FROM TERMINAL
ANDA #$7F STRIP PARITY FROM CHAR.
BRA OUTCH ECHO CHAR TO TERMINAL
*
* INCH
*
* GET CHARACTER FROM TERMINAL. RETURN
* CHARACTER IN "A" ACCUMULATOR AND PRESERVE
* ALL OTHER REGISTERS. THE INPUT CHARACTER
* IS 8 BITS AND IS NOT ECHOED.
*
*
INCH PSHS X SAVE IX
GETSTA LDX CPORT POINT TO TERMINAL PORT
LDA ,X FETCH PORT STATUS
BITA #1 TEST READY BIT, RDRF ?
BEQ GETSTA IF NOT RDY, THEN TRY AGAIN
GETST1 LDA 1,X FETCH CHAR
PULS X,PC RESTORE IX
*
* INCHEK
*
* CHECK FOR A CHARACTER AVAILABLE FROM
* THE TERMINAL. THE SERIAL PORT IS CHECKED
* FOR READ READY. ALL REGISTERS ARE
* PRESERVED, AND THE "Z" BIT WILL BE
* CLEAR IF A CHARACTER CAN BE READ.
*
*
INCHEK PSHS A SAVE A ACCUM.
LDA [CPORT] FETCH PORT STATUS
BITA #1 TEST READY BIT, RDRF ?
INCHEK1 PULS A,PC RESTORE A ACCUM.
*
OUT2S BSR OUT1S OUTPUT 2 SPACES
OUT1S LDA #$20 OUTPUT 1 SPACE
*
*
* OUTCH
*
* OUTPUT CHARACTER TO TERMINAL.
* THE CHAR. TO BE OUTPUT IS
* PASSED IN THE A REGISTER.
* ALL REGISTERS ARE PRESERVED.
*
OUTCH PSHS A,X SAVE A ACCUM AND IX
LDX CPORT GET ADDR. OF TERMINAL
FETSTA LDA ,X FETCH PORT STATUS
BITA #2 TEST TDRE, OK TO XMIT ?
BEQ FETSTA IF NOT LOOP UNTIL RDY
PULS A GET CHAR. FOR XMIT
STA 1,X XMIT CHAR.
PULS X,PC RESTORE IX
*
*
ACINIZ LDX CPORT POINT TO CONTROL PORT ADDRESS
LDA #3 RESET ACIA PORT CODE
STA ,X STORE IN CONTROL REGISTER
LDA #$11 SET 8 DATA, 2 STOP AN 0 PARITY
STA ,X STORE IN CONTROL REGISTER
TST 1,X ANYTHING IN DATA REGISTER?
LDA #$FF TURN ON ECHO FLAG
STA ECHO
RTS
*
* MESSAGE STRINGS
*
TTLMSG FCB $0A,$0D
FCC "COMPACT FLASH SECTOR READ/WRITE UTILITY"
FCB $04
CMDMSG FCB $0A,$0D
FCC "(R) READ SECTOR"
FCB $0A,$0D
FCC "(W) WRITE SECTOR"
FCB $0A,$0D
FCC "(N) NEXT SECTOR"
FCB $0A,$0D
FCC "(P) PREV SECTOR"
FCB $0A,$0D
FCC "(M) MODIFY SECTOR"
FCB $0A,$0D
FCC "(Q) QUIT"
FCB $0A,$0D
FCC ": "
FCB $04
SECPMT FCC "SECTOR NUMBER (6 HEX) : "
FCB $04
SECMSG FCC "SECTOR NUMBER - $"
FCB $04
MEMMSG FCB $0D,$0A
FCC "MEMORY ADDRESS (3 HEX): "
FCB $04
MSG5 FCC " - "
FCB $04
MSG2 FCB $00,$00,$0A,$0D,$00,$00,$00,$04
WOTMSG FCC "What ?"
FCB $0D,$0A,$04
*
END START
/branches/mkfiles_rev1/src/dump/dump_ide.asm
0,0 → 1,619
*
* Sector Dump Utility
* for IDE Drives or Compact Flash
* for the 6809
* revised for 16 bit peripheral bus
* on XESS XSA-3S1000 / XST-3.0
*
* John Kent
* 1 Feb 2008
*
* SYS09BUG
*
MON_BASE EQU $F800
MONV EQU MON_BASE+0
NEXTCV EQU MON_BASE+2
INCHV EQU MON_BASE+4
INCHEV EQU MON_BASE+6
INCHEKV EQU MON_BASE+8
OUTCHV EQU MON_BASE+10
PDATAV EQU MON_BASE+12
PCRLFV EQU MON_BASE+14
PSTRGV EQU MON_BASE+16
*
* Register Equates
*
CF_BASE EQU $E100
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+2 ; read error
CF_FEATURE EQU CF_BASE+2 ; write feature
CF_SECCNT EQU CF_BASE+4
CF_SECNUM EQU CF_BASE+6
CF_CYLLO EQU CF_BASE+8
CF_CYLHI EQU CF_BASE+10
CF_HEAD EQU CF_BASE+12
CF_STATUS EQU CF_BASE+14 ; read status
CF_COMAND EQU CF_BASE+14 ; write command
CF_AUX EQU CF_BASE+30
*
* Command Equates
*
AUXRESET EQU $06 ; CF_AUX Reset command
AUXRELEA EQU $02
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
HEADLBA EQU $E0
*
* Status bit equates
*
BUSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
* Start of Program
*
ORG $0100
START LBRA START1
*
* DATA STORAGE
*
SECNUM FCB $00,$00,$00
CPORT FDB $E000
ECHO FCB $FF
*
* SECTOR BUFFER
*
SECBUF RMB 512
*
* PROGRAM STACK
*
RMB 64
STACK EQU *
*
* Initialization
*
START1 LDS #STACK
*
* Clear sector buffer
*
LDX #SECBUF
LDY #0
LDB #0
ZEROLP STY ,X++
DECB
BNE ZEROLP
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
LDD #AUXRESET
STD CF_AUX
LDD #AUXRELEA
STD CF_AUX
JSR WAITRDY
LDD #HEADLBA
STD CF_HEAD
JSR WAITRDY
*
* DISPLAY TITTLE BANNER
*
LDX #TTLMSG
JSR PDATA
*
* COMMAND LOOP
* R - READ
* W - WRITE
* N - NEXT
* P - PREV
* M - MODIFY
* Q - QUIT
*
CMDLP LDX #CMDMSG
JSR PDATA
JSR ECHON
CMPA #'R'
BEQ READ
CMPA #'N'
BEQ NEXT
CMPA #'P'
BEQ PREV
CMPA #'W'
LBEQ WRITE
CMPA #'M'
BEQ MODIFY
CMPA #'Q'
BEQ QUIT
CMPA #'r'
BEQ READ
CMPA #'n'
BEQ NEXT
CMPA #'p'
BEQ PREV
CMPA #'w'
LBEQ WRITE
CMPA #'m'
BEQ MODIFY
CMPA #'q'
BEQ QUIT
LDX #WOTMSG
JSR PSTRNG
BRA CMDLP
*
* QUIT
*
QUIT JMP [MONV]
*
* MODIFY SECTOR
*
MODIFY JSR MEMCHG
BRA CMDLP
*
* NEXT SECTOR (READ)
* INCREMENT SECTOR NUMBER
* WRAPS AROUND TO ZERO ON $FFFFFF
*
NEXT LDX SECNUM+1
LEAX 1,X
STX SECNUM+1
BNE READS
INC SECNUM
BRA READS
*
* PREVIOUS SECTOR (READ)
* DECREMENT SECTOR NUMBER
* DON'T DECREMENT PAST $000000
*
PREV LDX SECNUM+1
BNE PREV1
TST SECNUM
BEQ READS
DEC SECNUM
PREV1 LEAX -1,X
STX SECNUM+1
BRA READS
*
* READ SECTORS FROM CF
*
READ LDX #SECPMT
JSR PSTRNG
JSR IN6HEX
BVS RDEXIT
STB SECNUM
STX SECNUM+1
*
READS CLRA
LDB #$01
STD CF_SECCNT
*
LDB SECNUM+2
STD CF_SECNUM
*
LDB SECNUM+1
STD CF_CYLLO
*
LDB SECNUM+0
STD CF_CYLHI
*
LDB #CMDREAD ; IDE READ MULTIPLE
STD CF_COMAND
JSR WAITRDY
*
LDX #SECBUF
LDY #256
*
* READ LOOP
*
RDLOOP JSR WAITDRQ
LDD CF_DATA ; reverse order of bytes
STB ,X+
STA ,X+
LEAY -1,Y
BNE RDLOOP
*
JSR WAITRDY
JSR MEMDUMP
RDEXIT JMP CMDLP
*
* WRITE SECTOR TO CF
*
WRITE LDX #SECPMT
JSR PSTRNG
JSR IN6HEX
BVS WREXIT
STB SECNUM
STX SECNUM+1
*
CLRA
LDB #$01
STD CF_SECCNT
*
LDB SECNUM+2
STD CF_SECNUM
*
LDB SECNUM+1
STD CF_CYLLO
*
LDB SECNUM+0
STD CF_CYLHI
*
LDD #CMDWRITE; IDE WRITE MULTIPLE
STD CF_COMAND
JSR WAITRDY
*
LDX #SECBUF
LDY #256
*
* WRITE LOOP
*
WRLOOP JSR WAITDRQ
LDB ,X+ ; reverse order of bytes
LDA ,X+
STD CF_DATA
LEAY -1,Y
BNE WRLOOP
*
JSR WAITRDY
WREXIT JMP CMDLP
*
* WAIT UNTIL READY
*
WAITRDY LDD CF_STATUS
BITB #BUSY
BNE WAITRDY
LDD CF_STATUS
BITB #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDD CF_STATUS
BITB #DRQ
BEQ WAITDRQ
RTS
*
* DUMP SECTOR IN MEMORY
*
MEMDUMP LDX #SECMSG
JSR PSTRNG
LDA SECNUM
JSR OUT2H
LDX SECNUM+1
JSR OUT4H
JSR PCRLF
*
* Dump first 256 bytes
*
LDY #$0000
LEAX #$0FF,Y
JSR AJDUMP
*
* Prompt to continue
*
LDX #PAGMSG
JSR PSTRNG
JSR INCH
*
* Dump second 256 bytes
*
LDY #$0100
LEAX #$0FF,Y
*
* ADJUST LOWER AND UPPER ADDRESS LIMITS
* TO EVEN 16 BYTE BOUNDRIES.
*
* IF LOWER ADDR = $4532
* LOWER BOUNDS WILL BE ADJUSTED TO = $4530.
*
* IF UPPER ADDR = $4567
* UPPER BOUNDS WILL BE ADJUSTED TO = $4570.
*
* ENTER WITH LOWER ADDRESS IN X-REG.
* -UPPER ADDRESS ON TOP OF STACK.
*
AJDUMP TFR X,D GET UPPER ADDR IN D-REG
ADDD #$10 ADD 16 TO UPPER ADDRESS
ANDB #$F0 MASK TO EVEN 16 BYTE BOUNDRY
PSHS A,B SAVE ON STACK AS UPPER DUMP LIMIT
TFR Y,D $F9A5 GET LOWER ADDRESS IN D-REG
ANDB #$F0 MASK TO EVEN 16 BYTE BOUNDRY
TFR D,X PUT IN X-REG AS LOWER DUMP LIMIT
NXTLIN CMPX ,S COMPARE LOWER TO UPPER LIMIT
BEQ SKPDMP IF EQUAL SKIP HEX-ASCII DUMP
LBSR INCHEK CHECK FOR INPUT FROM KEYBOARD
BEQ EDUMP
SKPDMP LEAS 2,S READJUST STACK IF NOT DUMPING
RTS ;
*
* PRINT 16 HEX BYTES FOLLOWED BY 16 ASCII CHARACTERS
* FOR EACH LINE THROUGHOUT ADDRESS LIMITS.
*
EDUMP PSHS X PUSH LOWER ADDR LIMIT ON STACK
LDX #MSG5 POINT TO MSG " - "
LBSR PSTRNG PRINT MSG
LDX ,S LOAD LOWER ADDR FROM TOP OF STACK
LBSR OUT4H PRINT THE ADDRESS
LBSR OUT2S 2 SPACES
LDB #$10 LOAD COUNT OF 16 BYTES TO DUMP
ELOOP LDA SECBUF,X GET FROM MEMORY HEX BYTE TO PRINT
LEAX 1,X
LBSR OUT2H OUTPUT HEX BYTE AS ASCII
LBSR OUT1S OUTPUT SPACE
DECB $F9D1 DECREMENT BYTE COUNT
BNE ELOOP CONTINUE TIL 16 HEX BYTES PRINTED
*
* PRINT 16 ASCII CHARACTERS
* IF NOT PRINTABLE OR NOT VALID
* ASCII PRINT A PERIOD (.)
LBSR OUT2S 2 SPACES
LDX ,S++ GET LOW LIMIT FRM STACK - ADJ STACK
LDB #$10 SET ASCII CHAR TO PRINT = 16
EDPASC LDA SECBUF,X GET CHARACTER FROM MEMORY
LEAX 1,X
CMPA #$20 IF LESS THAN $20, NON-PRINTABLE?
BCS PERIOD IF SO, PRINT PERIOD INSTEAD
CMPA #$7E IS IT VALID ASCII?
BLS PRASC IF SO PRINT IT
PERIOD LDA #'. LOAD A PERIOD (.)
PRASC LBSR OUTCH PRINT ASCII CHARACTER
DECB DECREMENT COUNT
BNE EDPASC
BRA NXTLIN
*
*
***** "M" MEMORY EXAMINE AND CHANGE *****
*
* RESTRICT ADDRESSING RANGE TO 512 BYTES ($000 - $1FF)
*
MEMCHG LDX #MEMMSG
JSR PSTRNG
LBSR IN3HEX INPUT ADDRESS
BVS CHRTN IF NOT HEX, RETURN
CMPX #$0200
BHS CHRTN
TFR X,Y SAVE ADDR IN "Y"
MEMC2 LDX #MSG5 POINT TO MSG " - "
LBSR PSTRNG PRINT MSG
TFR Y,X FETCH ADDRESS
LBSR OUT4H PRINT ADDR IN HEX
LBSR OUT1S OUTPUT SPACE
LDA SECBUF,Y GET CONTENTS OF CURRENT ADDR.
LBSR OUT2H OUTPUT CONTENTS IN ASCII
LBSR OUT1S OUTPUT SPACE
LBSR BYTE LOOP WAITING FOR OPERATOR INPUT
BVC CHANGE IF VALID HEX GO CHANGE MEM. LOC.
CMPA #8 IS IT A BACKSPACE (CNTRL H)?
BEQ MEMC2 PROMPT OPERATOR AGAIN
CMPA #$18 IS IT A CANCEL (CNTRL X)?
BEQ MEMC2 PROMPT OPERATOR AGAIN
CMPA #'^ IS IT AN UP ARROW?
BEQ BACK DISPLAY PREVIOUS BYTE
CMPA #$D IS IT A CR?
BNE FORWRD DISPLAY NEXT BYTE
CHRTN RTS EXIT ROUTINE
*
*
CHANGE STA SECBUF,Y CHANGE BYTE IN MEMORY
CMPA SECBUF,Y DID MEMORY BYTE CHANGE?
BEQ FORWRD $F972
LBSR OUT1S OUTPUT SPACE
LDA #'? LOAD QUESTION MARK
LBSR OUTCH PRINT IT
FORWRD CMPY #$01FF
BEQ MEMC2
LEAY 1,Y POINT TO NEXT HIGHER MEM LOCATION
BRA MEMC2 PRINT LOCATION & CONTENTS
BACK CMPY #$0000
BEQ MEMC2
LEAY -1,Y POINT TO LAST MEM LOCATION
BRA MEMC2 PRINT LOCATION & CONTENTS
*
* THE FOLLOWING ROUTINE LOOPS WAITING FOR THE
* OPERATOR TO INPUT ONE VALID HEX ADDRESS. THE
* ADDRESS IS RETURNED IN THE "X" REGISTER.
*
* IN6HEX - MS BYTE IN ACCB
* LS WORD IN X REG
*
IN6HEX LEAS -3,S
BSR BYTE
BVS NOTHEX
STA 0,S
BSR BYTE
BVS NOTHEX
STA 1,S
BSR BYTE
BVS NOTHEX
STA 2,S
CLRA
PULS B,X,PC
*
* INPUT 3 HEX DIGITS
* RESULT RETURNED IN X
*
IN3HEX BSR INHEX INPUT HEX (1 HEX CHAR)
BVS NOTHEX EXIT IF NOT VALID HEX
TFR D,X
BSR BYTE INPUT BYTE (2 HEX CHAR)
BVS NOTHEX
PSHS X
STA 1,S
PULS X,PC
*
***** INPUT BYTE (2 HEX CHAR.) *****
*
BYTE BSR INHEX GET HEX LEFT
BVS NOTHEX EXIT IF NOT VALID HEX
ASLA ;
ASLA ;
ASLA ; SHIFT INTO LEFT NIBBLE
ASLA ;
TFR A,B PUT HEXL IN "B"
BSR INHEX GET HEX RIGHT
BVS NOTHEX EXIT IF NOT VALID HEX
PSHS B PUSH HEXL ON STACK
ADDA ,S+ ADD HEXL TO HEXR AND ADJ. STK
RTS RETURN WITH HEX L&R IN "A"
*
*
INHEX BSR ECHON INPUT ASCII CHAR.
CMPA #'0 IS IT > OR = "0" ?
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'9 IS IT < OR = "9" ?
BHI INHEXA IF > MAYBE IT'S ALPHA
SUBA #$30 ASCII ADJ. NUMERIC
RTS ;
*
*
INHEXA CMPA #'A IS IT > OR = "A"
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'F IS IT < OR = "F" ?
BHI INHEXL IF > IT AIN'T HEX
SUBA #$37 ASCII ADJ. ALPHA
RTS ;
*
INHEXL CMPA #'a IS IT > OR = "a"
BCS NOTHEX IF LESS IT AIN'T HEX
CMPA #'f IS IT < "f"
BHI NOTHEX IF > IT AIN'T HEX
SUBA #$57 ADJUST TO LOWER CASE
RTS ;
*
*
NOTHEX ORCC #2 SET (V) FLAG IN C-CODES REGISTER
RTS ;
*
*
OUT4H PSHS X PUSH X-REG. ON THE STACK
PULS A POP MS BYTE OF X-REG INTO A-ACC.
BSR OUTHL OUTPUT HEX LEFT
PULS A POP LS BYTE OF X-REG INTO A-ACC.
OUTHL EQU *
OUT2H PSHS A SAVE IT BACK ON STACK
LSRA CONVERT UPPER HEX NIBBLE TO ASCII
LSRA ;
LSRA ;
LSRA ;
BSR XASCII PRINT HEX NIBBLE AS ASCII
OUTHR PULS A CONVERT LOWER HEX NIBBLE TO ASCII
ANDA #$0F STRIP LEFT NIBBLE
XASCII ADDA #$30 ASCII ADJ
CMPA #$39 IS IT < OR = "9" ?
BLE OUTC IF LESS, OUTPUT IT
ADDA #7 IF > MAKE ASCII LETTER
OUTC BRA OUTCH OUTPUT CHAR
*
* BINARY / ASCII --- THIS ROUTINE
* OUTPUTS A BYTE IN ENHANCED
* BINARY FORMAT. THE ENHANCEMENT
* IS DONE BY SUBSTITUTING ASCII
* LETTERS FOR THE ONES IN THE BYTE.
* THE ASCII ENHANCEMENT LETTERS
* ARE OBTAINED FROM THE STRING
* POINTED TO BY THE INDEX REG. "X".
*
BIASCI PSHS A SAVE "A" ON STACK
LDB #8 PRESET LOOP# TO BITS PER BYTE
OUTBA LDA ,X+ GET LETTER FROM STRING
ASL ,S TEST BYTE FOR "1" IN B7
BCS PRTBA IF ONE PRINT LETTER
LDA #'- IF ZERO PRINT "-"
PRTBA BSR OUTCH PRINT IT
BSR OUT1S PRINT SPACE
DECB SUB 1 FROM #BITS YET TO PRINT
BNE OUTBA
PULS A,PC
*
* PRINT STRING PRECEEDED BY A CR & LF.
*
PSTRNG JMP [PSTRGV] PRINT CR/LF
*
* PCRLF
*
PCRLF JMP [PCRLFV]
*
* PDATA
*
PDATA JMP [PDATAV]
*
ECHON TST ECHO IS ECHO REQUIRED ?
BEQ INCH ECHO NOT REQ. IF CLEAR
*
* INCHE
*
* ---GETS CHARACTER FROM TERMINAL AND
* ECHOS SAME. THE CHARACTER IS RETURNED
* IN THE "A" ACCUMULATOR WITH THE PARITY
* BIT MASKED OFF. ALL OTHER REGISTERS
* ARE PRESERVED.
*
INCHE JMP [INCHEV]
*
* INCH
*
* GET CHARACTER FROM TERMINAL. RETURN
* CHARACTER IN "A" ACCUMULATOR AND PRESERVE
* ALL OTHER REGISTERS. THE INPUT CHARACTER
* IS 8 BITS AND IS NOT ECHOED.
*
*
INCH JMP [INCHV]
*
* INCHEK
*
* CHECK FOR A CHARACTER AVAILABLE FROM
* THE TERMINAL. THE SERIAL PORT IS CHECKED
* FOR READ READY. ALL REGISTERS ARE
* PRESERVED, AND THE "Z" BIT WILL BE
* CLEAR IF A CHARACTER CAN BE READ.
*
*
INCHEK JMP [INCHEKV]
*
OUT2S BSR OUT1S OUTPUT 2 SPACES
OUT1S LDA #$20 OUTPUT 1 SPACE
*
*
* OUTCH
*
* OUTPUT CHARACTER TO TERMINAL.
* THE CHAR. TO BE OUTPUT IS
* PASSED IN THE A REGISTER.
* ALL REGISTERS ARE PRESERVED.
*
OUTCH JMP [OUTCHV]
*
* MESSAGE STRINGS
*
TTLMSG FCB $0A,$0D
FCC "COMPACT FLASH SECTOR READ/WRITE UTILITY"
FCB $04
CMDMSG FCB $0D,$0A
FCC "(R) READ SECTOR "
FCC "(W) WRITE SECTOR "
FCB $0D,$0A
FCC "(N) NEXT SECTOR "
FCC "(P) PREV SECTOR "
FCB $0D,$0A
FCC "(M) MODIFY SECTOR "
FCC "(Q) QUIT "
FCB $0D,$0A
FCC ": "
FCB $04
SECPMT FCC "SECTOR NUMBER (6 HEX) : "
FCB $04
SECMSG FCC "SECTOR NUMBER - $"
FCB $04
MEMMSG FCB $0D,$0A
FCC "MEMORY ADDRESS (3 HEX): "
FCB $04
MSG5 FCC " - "
FCB $04
MSG2 FCB $00,$00,$0A,$0D,$00,$00,$00,$04
WOTMSG FCC "What ?"
FCB $0D,$0A,$04
PAGMSG FCB $0D,$0A
FCC "Hit any key to continue"
FCB $04
*
END START
/branches/mkfiles_rev1/src/dump/Makefile
0,0 → 1,47
#-----------------------------------------------------------------
# File: Makefile
# Author: David Burnette
# Date: April 7, 2008
#
# Description:
# This makefile generates the S19 record file .S19 from the
# assembler source.
#
# This particular makefile handles generating
#
# Usage:
# The targets generated by this makefile are:
#
# make - makes all
# make all - makes all
# make dump_cf8.S19 -
# make dump_ide.S19 -
#
# Target Descriptions:
# The first file listed is the source file passed to assembler.
# Remaining files are the dependencies.
#
# Dependencies:
# This makefile depends on def_rules.mk.
#
# Revision History:
# dgb 2008-04-07 Original version
#
#-----------------------------------------------------------------
 
ifeq "$(MKFRAGS)" ""
MKFRAGS := ../../mkfiles
endif
 
include $(MKFRAGS)/def_rules.mk
 
all: dump_cf8.S19 dump_ide.S19
 
dump_cf8.S19: dump_cf8.asm
 
dump_ide.S19: dump_ide.asm
 
.PHONY: clean
clean:
-$(RM) *.S19
-$(RM) *.lst
/branches/mkfiles_rev1/src/dump/dump_cf8.sh
1,2 → 1,2
../../Tools/as09/as09.exe dump_cf8.txt -l > dump_cf8.lst
../../Tools/as09/as09.exe dump_cf8.asm -l > dump_cf8.lst
 
/branches/mkfiles_rev1/src/fmt/fmt_cf8.sh
1,2 → 0,2
../../Tools/as09/as09.exe cf8fmt.txt -l > cf8fmt.lst
../../Tools/as09/as09.exe cf8fmt.asm -l > cf8fmt.lst
/branches/mkfiles_rev1/src/fmt/fmt_ide.sh
1,2 → 0,2
../../Tools/as09/as09.exe cf8fmt.txt -l > cf8fmt.lst
../../Tools/as09/as09.exe cf8fmt.asm -l > cf8fmt.lst
/branches/mkfiles_rev1/src/fmt/fmt_cf8.asm
0,0 → 1,626
*
** FLEX 9 COMPACT FLASH FORMAT PROGRAM
*
* FOR B5-X300 and CF with 8 Bit Transfer interface
*
*
CFLAG EQU $01 CARRY FLAG
VFLAG EQU $02 OVERFLOW FLAG
ZFLAG EQU $04 ZERO FLAG
NFLAG EQU $08 NEGATIVE FLAG
IFLAG EQU $10 IRQ MASK CC
HFLAG EQU $20 HALF CARRY
FFLAG EQU $40 FIRQ MASK CC
EFLAG EQU $80 ENTIRE FLAG
*
MAPPAG EQU $00 PAGE $0000 DAT ADDRESS
*
* Serial Port
*
ACIAS EQU $E000
ACIAC1 EQU ACIAS
ACIAD1 EQU ACIAS+1
DELCON EQU 1250 Delay (Processor clock in MHz * 50)
*
* XMODEM Control characters
*
SOH EQU $01
EOT EQU $04
ACK EQU $06
NAK EQU $15
CAN EQU $18
*
* Some dummy Constants
*
RMAXTRK EQU 64
RMAXSEC EQU 255
RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
*
* Start
*
ORG $0100
START LBSR UFSUB
JMP [$F800] Jump to monitor on Completion.
*
*
* RAM SPACE
*
DRVNUM FCB 0
TRACK FCB 0
SECTOR FCB 0
CHKSUM FCB 0
BLKNUM FCB 0 Xmodem block number
BYTCNT FCB 0 Xmodem byte count
XSTATE FDB 0 Xmodem State Vector
DELCNT FCB $00,$00,$00 Xmodem Poll timer
MAXTRK FCB 0
MAXSEC FCB 0
ORG $0200
*
* SECTOR BUFFER
*
BUFFER RMB 256
*
*
* recieve char from remote drive.
* timeout if no response for approx 1s.
* Entry: no parameters
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
RCHAR PSHS X,Y
*
LDX #1000 1000x inner loop
RCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
RCHAR2 LDA ACIAC1 test for recieved char
ASRA
BCS RCHAR3 get character
LEAY -1,Y else, continue to count delay
BNE RCHAR2
LEAX -1,X
BNE RCHAR1
PULS X,Y,PC return with error if timed out
*
RCHAR3 LDA ACIAD1 return data (carry bit still set)
PULS X,Y,PC
*
*
* transmit char to remote drive.
* timeout if no response for approx 1s. (allows for use of hardware flow control)
* Entry: (A) = char to transmit
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
SCHAR PSHS X,Y
PSHS A
*
LDX #1000 1000x inner loop
SCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
SCHAR2 LDA ACIAC1 test for space in transmit FIFO
ASRA
ASRA
BCS SCHAR3 send character
LEAY -1,Y else, continue to count delay
BNE SCHAR2
LEAX -1,X
BNE SCHAR1
PULS A
PULS X,Y,PC return with error if timed out
*
SCHAR3 PULS A
STA ACIAD1 send data (carry bit still set)
PULS X,Y,PC
*
* Print Data
*
PDATA0 BSR SCHAR
PDATA1 LDA ,X+
CMPA #$04
BNE PDATA0
RTS
*
** 'UF' Format RAMdisc to FLEX standard.
*
DISFOS FCB $0A,$0D
FCC 'Formating RAMdisk... '
FCB $0A,$0D
FCC 'Drive Number ?'
FCB 4
MESS6 FCB $0A,$0D,4
FCC 'Ramdisk not allocated! '
FCB 4
UFMSG1 FCB $0A,$0D
FCC 'Format Complete'
FCB 4
*
UFSUB JSR INITDR
LDX #DISFOS
JSR PDATA1
UFSUB1 LBSR RCHAR
BCC UFSUB1
LBSR SCHAR
CMPA #'0'
LBLO UFEXIT
CMPA #'3'
LBHI UFEXIT
SUBA #'0'
TFR A,B
STB DRVNUM
LDX #DRVNUM-3
JSR DRVSEL
*
* set up free chain
*
LDX #BUFFER clear out buffer
CLRA
CLRB
DFL1 STA 0,X+
DECB
BNE DFL1
*
CLR TRACK
LDA #1
STA SECTOR
DFL2 LDX #BUFFER
LDA TRACK
STA 0,X
LDA SECTOR
INCA
CMPA #RMAXSEC+1 last sector on track?
BNE DFL3
INC 0,X
LDA #1
DFL3 STA 1,X
LDA TRACK
LDB SECTOR
JSR WRITSC
INC SECTOR
LDA SECTOR
CMPA #RMAXSEC+1
BNE DFL2
LDA #1
STA SECTOR
INC TRACK
LDA TRACK
CMPA #RMAXTRK
BNE DFL2
* break free chain at last track/sector
LDX #BUFFER
LDA #RMAXTRK-1
LDB #RMAXSEC
JSR READSC
LDX #BUFFER
CLR 0,X
CLR 1,X
LDA #RMAXTRK-1
LDB #RMAXSEC
JSR WRITSC
* set up sector structure, SIR, directory etc
LDX #BUFFER
CLRA
LDB #RMAXSEC
JSR READSC
LDX #BUFFER
CLR 0,X break end of directory chain
CLR 1,X
CLRA
LDB #RMAXSEC
JSR WRITSC
*
LDX #BUFFER
CLRA
LDB #3 set up SIR
JSR READSC
LDX #BUFFER
CLR 0,X break forward link
CLR 1,X
LDD #$5241 set volume name (RAMDISK )
STD 16,X
LDD #$4D44
STD 18,X
LDD #$4953
STD 20,X
LDD #$4B20
STD 22,X
LDD #1 volume number
STD 27,X
LDD #$0101 first trk/sec 01-01
STD 29,X
LDA #RMAXTRK-1
LDB #RMAXSEC
STD 31,X
STD 38,X
LDD #RTOTSEC total DATA sectors (2912-14)
STD 33,X
*
LDA #01 month set default creation date (SYS09's birthday!)
STA 35,X
LDA #07 day
STA 36,X
LDA #07 year
STA 37,X
*
RF3 CLRA
LDB #3
JSR WRITSC
*
* LDX #BUFFER
* CLRA
* LDB #1
* JSR READSC
* LDX #BUFFER
* LDA #$AA set the init flag
* STA 0,X
* LDA #$55
* STA 1,X
* CLRA
* LDB #1
* JSR WRITSC
*
* Write Boot sector
*
LDX #$C000
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
LBSR WRITSC
*
UFEXIT LDX #UFMSG1
JMP PDATA1
*
*
** FLEX 9 COMPACT FLASH DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE BURCHED B5-X300
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE BURCHED B5-X300 HAS 256KBYTES OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 192K MAY BE USED AS A RAM DISK
*
*
IMASK EQU $10 IRQ MASK CC
FMASK EQU $40 FIRQ MASK CC
DATREG EQU $FFF0 DAT REGISTERS
*
CF_BASE EQU $E040
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+1 ; read error
CF_FEATURE EQU CF_BASE+1 ; write feature
CF_SCNT EQU CF_BASE+2
CF_SNUM EQU CF_BASE+3
CF_CLO EQU CF_BASE+4
CF_CHI EQU CF_BASE+5
CF_HEAD EQU CF_BASE+6
CF_STATUS EQU CF_BASE+7 ; read status
CF_COMAND EQU CF_BASE+7 ; write command
*
* Command Equates
*
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
CMDFEATURE EQU $EF
FEAT8BIT EQU $01 ; enable 8 bit transfers
HEADLBA EQU $E0
*
* Status bit equates
*
BSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
INITDR BSR WAITRDY
LDA #HEADLBA
STA CF_HEAD
LDA #FEAT8BIT
STA CF_FEATURE
LDA #CMDFEATURE
STA CF_COMAND
BRA WAITRDY
*
* RESTORE DISK DRIVER (SEEK TRACK 00)
*
RESTR1 BSR DRVSEL
CLRA ; Track 0
LDB #$01 ; Sector 1
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEKTS DECB
STB CF_SNUM
STA CF_CLO
LDB DRVNUM
STB CF_CHI
LDB #$01
STB CF_SCNT
CLRB
RTS
*
* READ SECTORS FROM CF
*
*
READSC BSR SEEKTS
LDA #CMDREAD ; IDE READ MULTIPLE
STA CF_COMAND
BSR WAITRDY
*
* READ LOOP
*
CLRB
RDLP1 BSR WAITDRQ
LDA CF_DATA
STA ,X+
DECB
BNE RDLP1
*
CLRB
RDLP2 BSR WAITDRQ
LDA CF_DATA
DECB
BNE RDLP2
*
BSR WAITRDY
CLRB
RTS
*
* WRITE SECTOR TO CF
*
WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR
LDA #CMDWRITE ; IDE WRITE MULTIPLE
STA CF_COMAND
BSR WAITRDY
*
* WRITE LOOP
*
CLRB
WRTLP1 BSR WAITDRQ
LDA ,X+
STA CF_DATA
DECB
BNE WRTLP1
*
CLRB
WRTLP2 BSR WAITDRQ
CLRA
STA CF_DATA
DECB
BNE WRTLP2
*
BSR WAITRDY
CLRB
RTS
*
* CHECK FOR BUSY
* Doubles as VERIFY
*
BUSY CLRB Never busy
RTS
*
* DRIVE SELECT DISK DRIVER
*
DRVSEL LDA 3,X GET DRIVE # FROM FCB
CMPA #3
BLS DRVS2 IF > 3, SET IT TO 0
CLRA
DRVS2 STA DRVNUM
CLRB ; SET Z, CLEAR C
RTS
*
* CHECK DRIVE READY DISK DRIVER
*
CHKDRV LDA 3,X
CLRB ; CLEAR C, SET Z
RTS
*
* WAIT UNTIL READY
*
WAITRDY LDA CF_STATUS
BITA #BSY
BNE WAITRDY
LDA CF_STATUS
BITA #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDA CF_STATUS
BITA #DRQ
BEQ WAITDRQ
RTS
*
*******************************************************
*
* Bootstrap FLEX Loader
*
* SBUG1.8 loads the bootstap loader at $C000
* however the Flex adaption manual has the
* bootstrap loader residing at $C100
*
******************************************************
*
* Equates
*
STACK EQU $C0FF
SCTBUF EQU $C300
*
* Start of Utility
*
ORG $C000
BOOT BRA LOAD0
FCB 0,0,0
TRK FCB 0 File start track
SCT FCB 0 File start sector
DNS FCB 0 Density Flag (not used)
TADR FDB $C000 Transfer address
LADR FDB 0 Load Address
DRNUM FCB 0 Drive number 0
*
LOAD0 LDS #STACK Set up stack
LDD TRK Set up start track and sector
STD SCTBUF
LDY #SCTBUF+256
*
* Perform actual file load
*
LOAD1 BSR GETCH Get acharcater
CMPA #$02 Data record hearder ?
BEQ LOAD2 Skip, is so
CMPA #$16 Xfr address hearder ?
BNE LOAD1 Loop if neither
*
* Get transfer address
*
BSR GETCH
STA TADR
BSR GETCH
STA TADR+1
BRA LOAD1
*
* Load data record
*
LOAD2 BSR GETCH Get load address
STA LADR
BSR GETCH
STA LADR+1
BSR GETCH Get Bytes count
TFR A,B
TSTB
BEQ LOAD1 Loop if count = 0
LDX LADR Get load address
LOAD3 PSHS B,X
BSR GETCH Get data character
PULS B,X
STA ,X+ Store at load address
DECB
BNE LOAD3 Loop until count = 0
BRA LOAD1
*
* Get Character routine
* Reads a sector if needed
*
GETCH CMPY #SCTBUF+256 out of data ?
BNE GETCH4 Go read Character if not
GETCH2 LDX #SCTBUF Point to buffer
LDD 0,X Get forward Link
BEQ GO if zero, file is loaded
BSR READ Read next sector
BNE BOOT start over if error
LDY #SCTBUF+4 Point past link
GETCH4 LDA ,Y+ Else, get a character
RTS
*
* File is loaded, Jump to it
*
GO JMP [TADR] Jump to transfer address
 
*
** FLEX 9 COMPACT FLASH DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE BURCHED B5-X300
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE BURCHED B5-X300 HAS 256KBYTES OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 192K MAY BE USED AS A RAM DISK
*
*
*IMASK EQU $10 IRQ MASK CC
*FMASK EQU $40 FIRQ MASK CC
*DATREG EQU $FFF0 DAT REGISTERS
*
*CF_BASE EQU $E040
*CF_DATA EQU CF_BASE+0
*CF_ERROR EQU CF_BASE+1 ; read error
*CF_FEATURE EQU CF_BASE+1 ; write feature
*CF_SCNT EQU CF_BASE+2
*CF_SNUM EQU CF_BASE+3
*CF_CLO EQU CF_BASE+4
*CF_CHI EQU CF_BASE+5
*CF_HEAD EQU CF_BASE+6
*CF_STATUS EQU CF_BASE+7 ; read status
*CF_COMAND EQU CF_BASE+7 ; write command
*
* Command Equates
*
*CMDREAD EQU $20 ; Read Single sector
*CMDWRITE EQU $30 ; Write Single sector
*CMDFEATURE EQU $EF
*FEAT8BIT EQU $01 ; enable 8 bit transfers
*HEADLBA EQU $E0
*
* Status bit equates
*
*BSY EQU $80
*DRDY EQU $40
*DRQ EQU $08
*ERR EQU $01
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEK DECB
STB CF_SNUM
STA CF_CLO
LDB DRNUM
STB CF_CHI
LDB #$01
STB CF_SCNT
CLRB
RTS
*
* READ SECTORS FROM CF
*
*
READ BSR SEEK
LDA #CMDREAD ; IDE READ MULTIPLE
STA CF_COMAND
BSR WTRDY
*
* READ LOOP
*
CLRB
READ1 BSR WTDRQ
LDA CF_DATA
STA ,X+
DECB
BNE READ1
*
CLRB
READ2 BSR WTDRQ
LDA CF_DATA
DECB
BNE READ2
*
BSR WTRDY
CLRB
RTS
*
* WAIT UNTIL READY
*
WTRDY LDA CF_STATUS
BITA #BSY
BNE WTRDY
LDA CF_STATUS
BITA #DRDY
BEQ WTRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WTDRQ LDA CF_STATUS
BITA #DRQ
BEQ WTDRQ
RTS
*
END START
/branches/mkfiles_rev1/src/fmt/fmt_ide.asm
0,0 → 1,705
*
** FLEX 9 DISK DRIVERS
*
* FOR SYS09BUG ON THE DIGILENT SPARTAN 3 STARTER BOARD
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
* THE DIGILENT SPARTAN 3 STARTER BOARD HAS 1MBYTE OF SRAM
* THE FIRST 64K IS USED BY FLEX,
* THE SECOND 128K IS USED AS A ROM DISK
* THE REMAINING RAM IS USED FOR A RAM DISK
*
*
CFLAG EQU $01 CARRY FLAG
VFLAG EQU $02 OVERFLOW FLAG
ZFLAG EQU $04 ZERO FLAG
NFLAG EQU $08 NEGATIVE FLAG
IFLAG EQU $10 IRQ MASK CC
HFLAG EQU $20 HALF CARRY
FFLAG EQU $40 FIRQ MASK CC
EFLAG EQU $80 ENTIRE FLAG
*
MAPPAG EQU $00 PAGE $0000 DAT ADDRESS
*
* Serial Port
*
ACIAS EQU $E000
ACIAC1 EQU ACIAS
ACIAD1 EQU ACIAS+1
DELCON EQU 1250 Delay (Processor clock in MHz * 50)
*
* XMODEM Control characters
*
SOH EQU $01
EOT EQU $04
ACK EQU $06
NAK EQU $15
CAN EQU $18
*
* Some dummy Constants
*
RMAXTRK EQU 64
RMAXSEC EQU 255
RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
*
* Start
*
ORG $0100
START LBSR UFSUB
JMP [$F800] Jump to monitor on Completion.
*
*
* RAM SPACE
*
DRVNUM FCB 0
TRACK FCB 0
SECTOR FCB 0
CHKSUM FCB 0
BLKNUM FCB 0 Xmodem block number
BYTCNT FCB 0 Xmodem byte count
XSTATE FDB 0 Xmodem State Vector
DELCNT FCB $00,$00,$00 Xmodem Poll timer
MAXTRK FCB 0
MAXSEC FCB 0
ORG $0200
*
* SECTOR BUFFER
*
BUFFER RMB 256
*
*
* recieve char from remote drive.
* timeout if no response for approx 1s.
* Entry: no parameters
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
RCHAR PSHS X,Y
*
LDX #1000 1000x inner loop
RCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
RCHAR2 LDA ACIAC1 test for recieved char
ASRA
BCS RCHAR3 get character
LEAY -1,Y else, continue to count delay
BNE RCHAR2
LEAX -1,X
BNE RCHAR1
PULS X,Y,PC return with error if timed out
*
RCHAR3 LDA ACIAD1 return data (carry bit still set)
PULS X,Y,PC
*
*
* transmit char to remote drive.
* timeout if no response for approx 1s. (allows for use of hardware flow control)
* Entry: (A) = char to transmit
* Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
*
SCHAR PSHS X,Y
PSHS A
*
LDX #1000 1000x inner loop
SCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
SCHAR2 LDA ACIAC1 test for space in transmit FIFO
ASRA
ASRA
BCS SCHAR3 send character
LEAY -1,Y else, continue to count delay
BNE SCHAR2
LEAX -1,X
BNE SCHAR1
PULS A
PULS X,Y,PC return with error if timed out
*
SCHAR3 PULS A
STA ACIAD1 send data (carry bit still set)
PULS X,Y,PC
*
** 'UF' Format IDE Drive to FLEX standard.
*
DISFOS FCB $0A,$0D
FCC 'Formating IDE disk... '
FCB $0A,$0D
FCC 'Drive Number ?'
FCB 4
MESS6 FCB $0A,$0D,4
FCC 'IDE drive not allocated! '
FCB 4
UFMSG1 FCB $0A,$0D
FCC 'Format Complete'
FCB 4
*
UFSUB JSR INITDR
LDX #DISFOS
JSR PDATA1
UFSUB1 LBSR RCHAR
BCC UFSUB1
LBSR SCHAR
CMPA #'0'
LBLO UFEXIT
CMPA #'3'
LBHI UFEXIT
SUBA #'0'
TFR A,B
STB DRVNUM
LDX #DRVNUM-3
JSR DRVSEL
*
* set up free chain
*
LDX #BUFFER clear out buffer
CLRA
CLRB
DFL1 STA 0,X+
DECB
BNE DFL1
*
CLR TRACK
LDA #1
STA SECTOR
DFL2 LDX #BUFFER
LDA TRACK
STA 0,X
LDA SECTOR
INCA
CMPA #RMAXSEC+1 last sector on track?
BNE DFL3
INC 0,X
LDA #1
DFL3 STA 1,X
LDA TRACK
LDB SECTOR
JSR WRITSC
INC SECTOR
LDA SECTOR
CMPA #RMAXSEC+1
BNE DFL2
LDA #1
STA SECTOR
INC TRACK
LDA TRACK
CMPA #RMAXTRK
BNE DFL2
* break free chain at last track/sector
LDX #BUFFER
LDA #RMAXTRK-1
LDB #RMAXSEC
JSR READSC
LDX #BUFFER
CLR 0,X
CLR 1,X
LDA #RMAXTRK-1
LDB #RMAXSEC
JSR WRITSC
* set up sector structure, SIR, directory etc
LDX #BUFFER
CLRA
LDB #RMAXSEC
JSR READSC
LDX #BUFFER
CLR 0,X break end of directory chain
CLR 1,X
CLRA
LDB #RMAXSEC
JSR WRITSC
*
LDX #BUFFER
CLRA
LDB #3 set up SIR
JSR READSC
LDX #BUFFER
CLR 0,X break forward link
CLR 1,X
LDD #$5241 set volume name (RAMDISK )
STD 16,X
LDD #$4D44
STD 18,X
LDD #$4953
STD 20,X
LDD #$4B20
STD 22,X
LDD #1 volume number
STD 27,X
LDD #$0101 first trk/sec 01-01
STD 29,X
LDA #RMAXTRK-1
LDB #RMAXSEC
STD 31,X
STD 38,X
LDD #RTOTSEC total DATA sectors (2912-14)
STD 33,X
*
LDA #01 month set default creation date (SYS09's birthday!)
STA 35,X
LDA #07 day
STA 36,X
LDA #07 year
STA 37,X
*
RF3 CLRA
LDB #3
JSR WRITSC
*
* Not sure what this is about
* put bootstrap on track 0 sector 1
*
* LDX #BUFFER
* CLRA
* LDB #1
* JSR READSC
* LDX #BUFFER
* LDA #$AA set the init flag
* STA 0,X
* LDA #$55
* STA 1,X
* CLRA
* LDB #1
* JSR WRITSC
*
* Write Boot sector
*
LDX #$C000
CLRA TRACK 0
LDB #$01 SECTOR 1
STA TRACK
STB SECTOR
LBSR WRITSC
*
UFEXIT LDX #UFMSG1
JMP PDATA1
*
* Read a byte from the serial port
*
LRBYTE PSHS B
BSR LRHEX Get hex digit.
ASLA
ASLA Shift to msb.
ASLA
ASLA
TFR A,B Save in B.
BSR LRHEX Get next digit.
PSHS B
ADDA 0,S+ Add together bytes.
PULS B,PC
*
LRHEX JSR INTER
BVS LRHEX
SUBA #$30 Remove ascii bias.
BMI LRHEX
CMPA #$09 Number?
BLE LRHEX1 Yes.
CMPA #$11 Keep testing.
BMI LRHEX
CMPA #$16
BGT LRHEX
SUBA #$07
LRHEX1 RTS
*
* ACIA INPUT TEST
*
INTEST LDA ACIAC1
BITA #$01
RTS
*
* RESET ACIA
*
ACIRST LDA #$03 master reset
STA ACIAC1
LDA #$11
STA ACIAC1
RTS
*
* ACIA INPUT
*
INTER LDA #16
STA DELCNT+0
CLR DELCNT+1
CLR DELCNT+2
INTER0 LDA ACIAC1
BITA #$01
BNE INTER1
BITA #$78
BEQ INTER2
BSR ACIRST
BRA INTER
*
INTER1 LDA ACIAD1
ANDCC #VFLAG
RTS
*
INTER2 DEC DELCNT+2
BNE INTER0
DEC DELCNT+1
BNE INTER0
DEC DELCNT+0
BNE INTER0
CLRA
ORCC #VFLAG
RTS
*
* ACIA OUTPUT
*
OUTTER PSHS A
*
OUTTE1 LDA ACIAC1
BITA #$02
BNE OUTTE2
BITA #$78
BEQ OUTTE1
BSR ACIRST
BRA OUTTE1
*
OUTTE2 PULS A
STA ACIAD1
RTS
*
* Print Data
*
PDATA0 BSR OUTTER
PDATA1 LDA ,X+
CMPA #$04
BNE PDATA0
RTS
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*
IMASK EQU $10 IRQ MASK CC
FMASK EQU $40 FIRQ MASK CC
*
CF_BASE EQU $E100
CF_DATA EQU CF_BASE+0
CF_ERROR EQU CF_BASE+2 ; read error
CF_FEATURE EQU CF_BASE+2 ; write feature
CF_SCNT EQU CF_BASE+4
CF_SNUM EQU CF_BASE+6
CF_CLO EQU CF_BASE+8
CF_CHI EQU CF_BASE+10
CF_HEAD EQU CF_BASE+12
CF_STATUS EQU CF_BASE+14 ; read status
CF_COMAND EQU CF_BASE+14 ; write command
CF_AUX EQU CF_BASE+30
*
* Command Equates
*
CMDREAD EQU $20 ; Read Single sector
CMDWRITE EQU $30 ; Write Single sector
AUXRESET EQU $06
AUXRSTREL EQU $02
HEADLBA EQU $E0
*
* Status bit equates
*
BSY EQU $80
DRDY EQU $40
DRQ EQU $08
ERR EQU $01
*
*
* INITIALIZE CF CARD FOR 8 BIT LBA MODE
*
INITDR LDD #AUXRESET
STD CF_AUX
LDD #AUXRSTREL
STD CF_AUX
LDD #HEADLBA
STD CF_HEAD
BRA WAITRDY
*
* RESTORE DISK DRIVER (SEEK TRACK 00)
*
RESTR1 BSR DRVSEL
CLRA ; Track 0
LDB #$01 ; Sector 1
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEKTS PSHS A
CLRA
DECB
STD CF_SNUM
LDB ,S
STD CF_CLO
LDB DRVNUM
STD CF_CHI
LDB #$01
STD CF_SCNT
CLRB
PULS A,PC
*
* READ SECTORS FROM CF
*
*
READSC BSR SEEKTS
LDD #CMDREAD ; IDE READ MULTIPLE
STD CF_COMAND
BSR WAITRDY
*
* READ LOOP
*
PSHS Y
LDY #256
RDLP1 BSR WAITDRQ
LDD CF_DATA
STB ,X+
LEAY -1,Y
BNE RDLP1
PULS Y
*
BSR WAITRDY
CLRB
RTS
*
* WRITE SECTOR TO CF
*
WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR
LDD #CMDWRITE ; IDE WRITE MULTIPLE
STD CF_COMAND
BSR WAITRDY
*
* WRITE LOOP
*
PSHS Y
LDY #256
CLRA
WRTLP1 BSR WAITDRQ
LDB ,X+
STD CF_DATA
LEAY -1,Y
BNE WRTLP1
PULS Y
*
BSR WAITRDY
CLRB
RTS
*
* CHECK FOR BUSY
* Doubles as VERIFY
*
BUSY CLRB Never busy
RTS
*
* DRIVE SELECT DISK DRIVER
*
DRVSEL LDA 3,X GET DRIVE # FROM FCB
CMPA #3
BLS DRVS2 IF > 3, SET IT TO 0
CLRA
DRVS2 STA DRVNUM
CLRB ; SET Z, CLEAR C
RTS
*
* CHECK DRIVE READY DISK DRIVER
*
CHKDRV LDA 3,X
CLRB ; CLEAR C, SET Z
RTS
*
* WAIT UNTIL READY
*
WAITRDY LDD CF_STATUS
BITB #BSY
BNE WAITRDY
LDD CF_STATUS
BITB #DRDY
BEQ WAITRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WAITDRQ LDD CF_STATUS
BITB #DRQ
BEQ WAITDRQ
RTS
*
*******************************************************
*
* Bootstrap FLEX Loader
*
* SBUG1.8 loads the bootstap loader at $C000
* however the Flex adaption manual has the
* bootstrap loader residing at $C100
*
******************************************************
*
* Equates
*
STACK EQU $C0FF
SCTBUF EQU $C300
*
* Start of Utility
*
ORG $C000
BOOT BRA LOAD0
FCB 0,0,0
TRK FCB 0 File start track
SCT FCB 0 File start sector
DNS FCB 0 Density Flag (not used)
TADR FDB $C000 Transfer address
LADR FDB 0 Load Address
DRNUM FCB 0 Drive number 0
*
LOAD0 LDS #STACK Set up stack
LDD TRK Set up start track and sector
STD SCTBUF
LDY #SCTBUF+256
*
* Perform actual file load
*
LOAD1 BSR GETCH Get acharcater
CMPA #$02 Data record hearder ?
BEQ LOAD2 Skip, is so
CMPA #$16 Xfr address hearder ?
BNE LOAD1 Loop if neither
*
* Get transfer address
*
BSR GETCH
STA TADR
BSR GETCH
STA TADR+1
BRA LOAD1
*
* Load data record
*
LOAD2 BSR GETCH Get load address
STA LADR
BSR GETCH
STA LADR+1
BSR GETCH Get Bytes count
TFR A,B
TSTB
BEQ LOAD1 Loop if count = 0
LDX LADR Get load address
LOAD3 PSHS B,X
BSR GETCH Get data character
PULS B,X
STA ,X+ Store at load address
DECB
BNE LOAD3 Loop until count = 0
BRA LOAD1
*
* Get Character routine
* Reads a sector if needed
*
GETCH CMPY #SCTBUF+256 out of data ?
BNE GETCH4 Go read Character if not
GETCH2 LDX #SCTBUF Point to buffer
LDD 0,X Get forward Link
BEQ GO if zero, file is loaded
BSR READ Read next sector
BNE BOOT start over if error
LDY #SCTBUF+4 Point past link
GETCH4 LDA ,Y+ Else, get a character
RTS
*
* File is loaded, Jump to it
*
GO JMP [TADR] Jump to transfer address
 
*
** FLEX 9 IDE DISK DRIVERS
*
* FOR SYS09BUG 1.2 ON THE XSA-3S1000
* WITH I/O MAPPED AT $XE000
* AND ROM MAPPED AT $XF000
*
*IMASK EQU $10 IRQ MASK CC
*FMASK EQU $40 FIRQ MASK CC
*
*CF_BASE EQU $E100
*CF_DATA EQU CF_BASE+0
*CF_ERROR EQU CF_BASE+2 ; read error
*CF_FEATURE EQU CF_BASE+2 ; write feature
*CF_SCNT EQU CF_BASE+4
*CF_SNUM EQU CF_BASE+6
*CF_CLO EQU CF_BASE+8
*CF_CHI EQU CF_BASE+10
*CF_HEAD EQU CF_BASE+12
*CF_STATUS EQU CF_BASE+14 ; read status
*CF_COMAND EQU CF_BASE+14 ; write command
*CF_AUX EQU CF_BASE+30
*
* Command Equates
*
*CMDREAD EQU $20 ; Read Single sector
*CMDWRITE EQU $30 ; Write Single sector
*HEADLBA EQU $E0
*AUXRESET EQU $06
*AUXRSTREL EQU $02
*
* Status bit equates
*
*BSY EQU $80
*DRDY EQU $40
*DRQ EQU $08
*ERR EQU $01
*
* Seek track and sector
* A holds track number (0 - ??)
* B holds sector number (1 - ??)
* Sector numbers starts from 1
* subtract 1 to start from sector 0 on CF
*
SEEK PSHS A
CLRA
DECB
STD CF_SNUM
LDB ,S
STD CF_CLO
LDB DRNUM
STD CF_CHI
LDB #$01
STD CF_SCNT
CLRB
PULS A,PC
*
* READ SECTORS FROM CF
*
*
READ BSR SEEK
LDD #CMDREAD ; IDE READ MULTIPLE
STD CF_COMAND
BSR WTRDY
*
* READ LOOP
*
PSHS Y
LDY #256
READ1 BSR WTDRQ
LDD CF_DATA
STB ,X+
LEAY -1,Y
BNE READ1
PULS Y
*
BSR WTRDY
CLRB
RTS
*
* WAIT UNTIL READY
*
WTRDY LDD CF_STATUS
BITB #BSY
BNE WTRDY
LDD CF_STATUS
BITB #DRDY
BEQ WTRDY
RTS
*
* WAIT FOR DATA REQUEST
*
WTDRQ LDD CF_STATUS
BITB #DRQ
BEQ WTDRQ
RTS
*
END START
/branches/mkfiles_rev1/src/fmt/Makefile
0,0 → 1,47
#-----------------------------------------------------------------
# File: Makefile
# Author: David Burnette
# Date: April 7, 2008
#
# Description:
# This makefile generates the S19 record file .S19 from the
# assembler source.
#
# This particular makefile handles generating
#
# Usage:
# The targets generated by this makefile are:
#
# make - makes all
# make all - makes all
# make fmt_cf8.S19 -
# make fmt_ide.S19 -
#
# Target Descriptions:
# The first file listed is the source file passed to assembler.
# Remaining files are the dependencies.
#
# Dependencies:
# This makefile depends on def_rules.mk.
#
# Revision History:
# dgb 2008-04-07 Original version
#
#-----------------------------------------------------------------
 
ifeq "$(MKFRAGS)" ""
MKFRAGS := ../../mkfiles
endif
 
include $(MKFRAGS)/def_rules.mk
 
all: fmt_cf8.S19 fmt_ide.S19
 
fmt_cf8.S19: fmt_cf8.asm
 
fmt_ide.S19: fmt_ide.asm
 
.PHONY: clean
clean:
-$(RM) *.S19
-$(RM) *.lst

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