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Rev 217 → Rev 218

/src/sys09bug/Makefile
26,6 → 26,7
# make sys09s3s.vhd - For Digilent Spartan 3 starter board with RAM disk
# make sys09s3e.vhd - For Digilent Spartan 3E starter board
# make sys09xes.vhd - For XSA-3S100/XST-3.0 with 16 Bit IDE interface
# make sys09atl.vhd - For Digilent Atlys with HDMI, USBUART and (soon) SDCard
#
# Target Descriptions:
# The first file listed is the source file passed to assembler.
49,7 → 50,7
 
include $(MKFRAGS)/def_rules.mk
 
all: sys09swt.vhd sys09ads.vhd sys09b3s.vhd sys09b5x.vhd sys09s3s.vhd sys09s3e.vhd sys09xes.vhd
all: sys09swt.vhd sys09ads.vhd sys09b3s.vhd sys09b5x.vhd sys09s3s.vhd sys09s3e.vhd sys09xes.vhd sys09atl.vhd
 
sys09swt.vhd: sys09swt.asm opt_swt.asm sys09equ.asm sys09bug.asm
sys09swt.vhd: ADDRS=F000 F800
86,7 → 87,13
sys09xes.vhd: ENTITY=SYS09BUG
sys09xes.vhd: TOP_RAM=mon_rom_vhd
 
sys09atl.vhd: sys09atl.asm opt_atl.asm sys09equ.asm sys09ide.asm sys09bug.asm
sys09atl.vhd: ADDRS=F000 F800
sys09atl.vhd: ENTITY=SYS09BUG
sys09atl.vhd: TOP_RAM=mon_rom_vhd
 
 
 
.PHONY: clean
clean:
-$(RM) *.S19
/src/sys09bug/opt_atl.asm
0,0 → 1,20
*
***************************************************
* OPTION SWITCHES
***************************************************
*
*
** THE CONTROL PORT CAN ONLY BE ONE OF THESE
** NOTE THAT THE ACIA WILL ALWAYS BE PRESET
** FOR LOADING AND SAVING S1 RECORDS
*
*SWTOPT EQU $FF SWTP ACIA SERIAL CONTROL PORT
*ADSOPT EQU $FF ADS6809 & DG640 VIDEO DISPAY
*B3SOPT EQU $FF B3-SPARTAN2 FPGA VIDEO & PS2 KEYBOARD
*B5XOPT EQU $FF B5-X300 FPGA VIDEO & PS2 KEYBOARD
*S3SOPT EQU $FF SPARTAN3 STARTER FPGA VIDEO & PS2 KEYBOARD
*S3EOPT EQU $FF SPARTAN3E STARTER
*XESOPT EQU $FF XESS XSA-3S100 & XST-3.0
ATLOPT EQU $FF Digilent Atlys
*
END
/src/sys09bug/sys09atl.lst
0,0 → 1,4209
Assembler release DWC_2.0 version 2.11
May 6, 2004 (c) Motorola (free ware)
0001 NAM SYS09BUG FOR ATLYS
0000 INCLUDE "opt_atl.asm"
0001 *
0002 ***************************************************
0003 * OPTION SWITCHES
0004 ***************************************************
0005 *
0006 *
0007 ** THE CONTROL PORT CAN ONLY BE ONE OF THESE
0008 ** NOTE THAT THE ACIA WILL ALWAYS BE PRESET
0009 ** FOR LOADING AND SAVING S1 RECORDS
0010 *
0011 *SWTOPT EQU $FF SWTP ACIA SERIAL CONTROL PORT
0012 *ADSOPT EQU $FF ADS6809 & DG640 VIDEO DISPAY
0013 *B3SOPT EQU $FF B3-SPARTAN2 FPGA VIDEO & PS2 KEYBOARD
0014 *B5XOPT EQU $FF B5-X300 FPGA VIDEO & PS2 KEYBOARD
0015 *S3SOPT EQU $FF SPARTAN3 STARTER FPGA VIDEO & PS2 KEYBOARD
0016 *S3EOPT EQU $FF SPARTAN3E STARTER
0017 *XESOPT EQU $FF XESS XSA-3S100 & XST-3.0
0018 00FF ATLOPT EQU $FF Digilent Atlys
0019 *
0002 END
0000 INCLUDE "sys09equ.asm"
0001 *
0002 ***************************************************
0003 * MEMORY MAP EQUATES *
0004 ***************************************************
0005 E000 MONIO EQU $E000 I/O SPACE
0006 IFD B3SOPT
0007 MONEXT EQU $F000 START OF EXTENDED COMMANDS
0008 EXTCMD EQU $00 EXTENDED OFFSET
0009 ENDIF B3SOPT
0009 ENDIF B3SOPT
0010 IFD S3EOPT
0011 MONRAM EQU $7FC0
0012 ELSE
0013 DFC0 MONRAM EQU $DFC0 STACK SPACE
0014 ENDIF S3EOPT
0015 F800 MONROM EQU $F800 START OF ROM
0016 IFD S3SOPT
0017 MONEXT EQU $F000 START OF EXTENDED COMMANDS
0018 EXTCMD EQU $00 EXTENDED OFFSET
0019 ENDIF S3SOPT
0019 ENDIF S3SOPT
0020 IFD XESOPT
0021 MONEXT EQU $F000 START OF EXTENDED COMMANDS
0022 EXTCMD EQU $00 EXTENDED OFFSET
0023 ENDIF XESOPT
0023 ENDIF XESOPT
0024 IFD DE270OPT
0025 MONEXT EQU $F000 START OF EXTENDED COMMANDS
0026 EXTCMD EQU $00 EXTENDED OFFSET
0027 ENDIF DE270OPT
0027 ENDIF DE270OPT
0028 **************************************************
0029 **************************************************
0030
0031 IFD SWTOPT
0032 *
0033 * SOUTH WEST TECHNICAL PRODUCTS COMPUTER
0034 *
0035 ACIAOPT EQU $FF ACIA AT PORT 0
0036 DMAFOPT EQU $FF DMAF2 8" FLOPPY DISK BOOT
0037 MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT
0038 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0039 ENDIF
0039 ENDIF
0040 *
0041 IFD ADSOPT
0042 *
0043 * ACKERMAN DIGITAL ADS6809
0044 *
0045 DG640OPT EQU $FF DG640 VDU AT $E800
0046 *RTCOPT EQU $FF REAL TIME CLOCK
0047 PRTOPT EQU $FF PRINTER DRIVERS
0048 MFDCOPT EQU $FF MINIFLOPPY 5.25" DISK BOOT
0049 ENDIF ADSOPT
0049 ENDIF ADSOPT
0050 *
0051 IFD B3SOPT
0052 *
0053 * BURCHED SPARTAN 2 B3+
0054 *
0055 ACIAOPT EQU $FF ACIA AT PORT 0
0056 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0057 VDUOPT EQU $FF VDU AT $E030
0058 IDEOPT EQU $FF IDE AT $E100
0059 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0060 HFCOPT EQU $FF HARDWARE FLOW CONTROL
0061 ENDIF B3SOPT
0061 ENDIF B3SOPT
0062 *
0063 IFD B5XOPT
0064 *
0065 * BURCHED SPARTAN 2 B5-X300
0066 *
0067 ACIAOPT EQU $FF ACIA AT PORT 0
0068 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0069 VDUOPT EQU $FF VDU AT $E030
0070 CF8OPT EQU $FF COMPACT FLASH AT $E040
0071 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0072 HFCOPT EQU $FF HARDWARE FLOW CONTROL
0073 ENDIF B5XOPT
0073 ENDIF B5XOPT
0074 *
0075 IFD S3SOPT
0076 *
0077 * DIGILENT SPARTAN 3 STARTER
0078 *
0079 ACIAOPT EQU $FF ACIA AT PORT 0
0080 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0081 VDUOPT EQU $FF VDU AT $E030
0082 CF8OPT EQU $FF COMPACT FLASH AT $E040
0083 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0084 EXTOPT EQU $FF EXTENDED COMMANDS
0085 ENDIF S3SOPT
0085 ENDIF S3SOPT
0086 *
0087 IFD S3EOPT
0088 *
0089 * DIGILENT SPARTAN 3E STARTER
0090 *
0091 ACIAOPT EQU $FF ACIA AT PORT 0
0092 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0093 VDUOPT EQU $FF VDU AT $E030
0094 TRAOPT EQU $FF PIA TRACE TIMER
0095 ENDIF S3EOPT
0095 ENDIF S3EOPT
0096 *
0097 IFD XESOPT
0098 *
0099 * XESS SPARTAN 3 XSA-3S1000 & XST-3.0
0100 *
0101 ACIAOPT EQU $FF ACIA AT PORT 0
0102 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0103 VDUOPT EQU $FF VDU AT $E030
0104 IDEOPT EQU $FF IDE AT $E100
0105 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0106 HFCOPT EQU $FF HARDWARE FLOW CONTROL
0107 EXTOPT EQU $FF EXTENDED COMMANDS
0108 ENDIF XESOPT
0108 ENDIF XESOPT
0109 *
0110 IFD DE270OPT
0111 *
0112 * TERASIC CYCLONE 2 DE2-70
0113 *
0114 ACIAOPT EQU $FF ACIA AT PORT 0
0115 PS2OPT EQU $FF PS2 KEYBOARD AT $E020
0116 VDUOPT EQU $FF VDU AT $E030
0117 CF8OPT EQU $FF COMPACT FLASH AT $E040
0118 DATOPT EQU $FF DYNAMIC ADDRESS TRANSLATION
0119 EXTOPT EQU $FF EXTENDED COMMANDS
0120 ENDIF DE270OPT
0120 ENDIF DE270OPT
0121 *
0122 *
0123 IFD ACIAOPT
0124 *
0125 ***************************************************
0126 * SERIAL PORT *
0127 ***************************************************
0128 *
0129 ** ACIA SITS ON PORT 0
0130 *
0131 ACIAS EQU MONIO+$00 CONTROL PORT
0132 *
0133 ENDIF ACIAOPT
0133 ENDIF ACIAOPT
0134 IFD MFDCOPT
0135 *
0136 ***************************************************
0137 * MINIFLOPPY DRIVE *
0138 ***************************************************
0139 *
0140 ** FLOPPY DISK CONTROLLER SITS ON PORT 1
0141 *
0142 DRVFDC EQU MONIO+$14
0143 CMDFDC EQU MONIO+$18
0144 SECFDC EQU MONIO+$1A
0145 DATFDC EQU MONIO+$1B
0146 ENDIF MFDCOPT
0146 ENDIF MFDCOPT
0147 IFD PS2OPT
0148 *
0149 ***************************************************
0150 * VDU8 PS/2 KEYBOARD PORT *
0151 ***************************************************
0152 *
0153 ** KEYBOARD SITS ON PORT 2
0154 *
0155 PS2KBD EQU MONIO+$20 PS/2 KEYBOARD PORT
0156 ENDIF PS2OPT
0156 ENDIF PS2OPT
0157 IFD VDUOPT
0158 *
0159 ***************************************************
0160 * VDU8 DISPLAY DRIVER EQUATES *
0161 ***************************************************
0162 *
0163 ** VDU8 DISPLAY SITS ON PORT 3
0164 *
0165 VDU EQU MONIO+$30
0166 VDUCHR EQU 0 CHARACTER REGISTER
0167 VDUATT EQU 1 ATTRIBUTE REGISTER
0168 VDUCOL EQU 2 CURSOR COLUMN
0169 VDUROW EQU 3 CURSOR ROW
0170 VDUOFF EQU 4 ROW OFFSET
0171 *
0172 LINLEN EQU 80 LENGTH OF A LINE
0173 NUMLIN EQU 25 NUMBER OF LINES
0174 ENDIF VDUOPT
0174 ENDIF VDUOPT
0175 *
0176 IFD CF8OPT
0177 *
0178 ***************************************************
0179 * COMPACT FLASH EQUATES 8 BIT TRANSFER *
0180 ***************************************************
0181 *
0182 ** COMPACT FLASH SITS AT PORT 4
0183 *
0184 CF_BASE EQU MONIO+$40
0185 CF_DATA EQU CF_BASE+0
0186 CF_ERROR EQU CF_BASE+1 ; read error
0187 CF_FEATURE EQU CF_BASE+1 ; write feature
0188 CF_SECCNT EQU CF_BASE+2
0189 CF_SECNUM EQU CF_BASE+3
0190 CF_CYLLO EQU CF_BASE+4
0191 CF_CYLHI EQU CF_BASE+5
0192 CF_HEAD EQU CF_BASE+6
0193 CF_STATUS EQU CF_BASE+7 ; read status
0194 CF_COMAND EQU CF_BASE+7 ; write command
0195 *
0196 * Command Equates
0197 *
0198 CMDREAD EQU $20 ; Read Single sector
0199 CMDWRITE EQU $30 ; Write Single sector
0200 CMDFEATURE EQU $EF
0201 FEAT8BIT EQU $01 ; enable 8 bit transfers
0202 HEADLBA EQU $E0
0203 *
0204 * Status bit equates
0205 *
0206 BUSY EQU $80
0207 DRDY EQU $40
0208 DRQ EQU $08
0209 ERR EQU $01
0210 *
0211 ENDIF CF8OPT
0211 ENDIF CF8OPT
0212 *
0213 IFD IDEOPT
0214 *
0215 ***************************************************
0216 * COMPACT FLASH EQUATES 16 BIT TRANSFER (XESS) *
0217 ***************************************************
0218 *
0219 ** COMPACT FLASH SITS AT PORT 4
0220 *
0221 CF_BASE EQU MONIO+$0100
0222 CF_DATA EQU CF_BASE+0
0223 CF_ERROR EQU CF_BASE+2 ; read error
0224 CF_FEATURE EQU CF_BASE+2 ; write feature
0225 CF_SECCNT EQU CF_BASE+4
0226 CF_SECNUM EQU CF_BASE+6
0227 CF_CYLLO EQU CF_BASE+8
0228 CF_CYLHI EQU CF_BASE+10
0229 CF_HEAD EQU CF_BASE+12
0230 CF_STATUS EQU CF_BASE+14 ; read status
0231 CF_COMAND EQU CF_BASE+14 ; write command
0232 CF_AUX EQU CF_BASE+30
0233 *
0234 * Command Equates
0235 *
0236 CMDREAD EQU $20 ; Read Single sector
0237 CMDWRITE EQU $30 ; Write Single sector
0238 AUXRESET EQU $06 ; Reset IDE
0239 AUXRSTREL EQU $02 ; Reset release IRQ masked
0240 HEADLBA EQU $E0
0241 *
0242 * Status bit equates
0243 *
0244 BUSY EQU $80
0245 DRDY EQU $40
0246 DRQ EQU $08
0247 ERR EQU $01
0248 *
0249 ENDIF CF8OPT
0249 ENDIF CF8OPT
0250 *
0251 IFD RTCOPT
0252 *
0253 **************************************************
0254 * MM58167A REAL TIME CLOCK MEMORY MAP:
0255 **************************************************
0256 *
0257 ** REAL TIME CLOCK SITS ON PORT 4 AND PORT 5
0258 *
0259 CLOCK EQU MONIO+$40 CLOCK BASE ADDRESS AND REGISTERS
0260 *
0261 * COUNTER AND COMPARITOR REGISTERS:
0262 *
0263 * Both the Clock Counter and Clock Comparitor
0264 * consist of 8 registers for holding the time.
0265 * The register offsets from the Counter and
0266 * Comparitor registers are listed above.
0267 *
0268 COUNTR EQU CLOCK+0
0269 CMPRAM EQU CLOCK+8 COMPARITOR REGISTERS
0270 *
0271 * CLOCK REGISTER OFFSETS:
0272 * These register offsets are used for the CLOCK
0273 * and comparitor ram CMPRAM.
0274 *
0275 S10000 EQU 0 TEN THOUNSANDTHS OF SECONDS
0276 S100 EQU 1 HUNDRETHS AND TENTHS OF SECONDS
0277 SECOND EQU 2
0278 MINUIT EQU 3
0279 HOUR EQU 4
0280 WKDAY EQU 5
0281 MTHDAY EQU 6
0282 MONTH EQU 7
0283 *
0284 * INTERRUPT OUTPUT REGISTERS:
0285 *
0286 * An interrupt output may be generated at the
0287 * following rates by setting the appropriate bit
0288 * in the Interrupt Control Register (CINTCR).
0289 * The Interrupt Status Register (CINTSR) must be
0290 * read to clear the interrupt and will return
0291 * the source of the interrupt.
0292 *
0293 * 1/Month Bit 7
0294 * 1/Week Bit 6
0295 * 1/Day Bit 5
0296 * 1/Hour Bit 4
0297 * 1/Minuite Bit 3
0298 * 1/Second Bit 2
0299 * 10/Second Bit 1
0300 * Comparitor Bit 0
0301 *
0302 CINTSR EQU CLOCK+16 INTERRUPT STATUS REGISTER
0303 CINTCR EQU CLOCK+17 INTERRUPT CONTROL REGISTER
0304 *
0305 * COUNTER AND RAM RESETS; GO COMMAND.
0306 *
0307 * The counter and comparitor may be reset
0308 * by writing $FF into CTRRES and CMPRES
0309 * respectivly.
0310 * A write to the Go command register (GOCMND)
0311 * will reset the 1/1000ths, 1/100ths and 1/10ths
0312 * of a second counter.
0313 *
0314 CTRRES EQU CLOCK+18 COUNTER RESET
0315 CMPRES EQU CLOCK+19 COMPARITOR RAM RESET
0316 GOCMND EQU CLOCK+21 GO COMMAND
0317 *
0318 * CLOCK STATUS REGISTER.
0319 *
0320 * The counter takes 61 usec. to rollover for
0321 * every 1KHz clock pulse. If the Status bit is
0322 * set after reading the counter, the counter
0323 * should be re-read to ensure the time is correct.
0324 *
0325 CLKSTA EQU CLOCK+20 STATUS BIT
0326 SBYINT EQU CLOCK+22 STANDBY INTERRUPT
0327 TSTMOD EQU CLOCK+31 TEST MODE REGISTER
0328 ENDIF RTCOPT
0328 ENDIF RTCOPT
0329 *
0330 IFD TRAOPT
0331 *
0332 **************************************************
0333 * PIA INTERRUPT TIMER
0334 **************************************************
0335 *
0336 ** PIA INTERRUPT TIMER SITS ON PORT 7
0337 *
0338 ** PIA TIMER FOR SINGLE STEP / TRACE
0339 *
0340 * TADATA = Output = Timer preset register
0341 * TACTRL - CA1 = input = rising edge = NMI
0342 * - CA2 = Output = Timer Reset (Active High)
0343 * TBDATA = Input = Timer read back register
0344 * TBCTRL - CB1 = input = rising edge = FIRQ
0345 * - CB2 = output = strobe low on write to TBDATA = Timer Preset
0346 *
0347 * CRA0 = 0 CA1 IRQ DISAB, CRA0 = 1 CA1 IRQ ENAB
0348 * CRA1 = 1 CA1 Rising edge IRQ
0349 * CRA2 = 0 TADATA = Data Direction, CRA2 = 1 TADATA = I/O Register
0350 * CRA3 = 0 CA2 = 0 output, CRA3 = 1 CA2 = 1
0351 * CRA4 = 1 ] CA2 = Set/Reset output
0352 * CRA5 = 1 ]
0353 * CRA6 = X CA2 Input Interrupt Flag
0354 * CRA7 = X CA1 Interrupt Flag
0355 *
0356 * CRB0 = 0 CB1 IRQ DISAB, CRB0 = 1 CA1 IRQ ENAB
0357 * CRB1 = 1 CB1 Rising edge IRQ
0358 * CRB2 = 0 TBDATA = Data Direction, CRB2 = 1 TBDATA = I/O Register
0359 * CRB3 = 0 CB2 = 0 output, CRB3 = 1 CB2 = 1
0360 * CRB4 = 1 ] CB2 = Set/Reset output
0361 * CRB5 = 1 ]
0362 * CRB6 = X CB2 Input Interrupt Flag
0363 * CRB7 = X CB1 Interrupt Flag
0364 *
0365 * DDRA = 0 TADATA = Input, DDRA = 1 TADATA = Output
0366 * DDRB = 0 TBDATA = Input, DDRB = 1 TBDATA = Output
0367 *
0368 TADATA EQU MONIO+$70 Timer preset port
0369 TACTRL EQU MONIO+$71
0370 TBDATA EQU MONIO+$72 Timer read back port
0371 TBCTRL EQU MONIO+$73
0372 *
0373 TRADEL EQU 13 Number of E cycles for RTI (May need to be fudged)
0374 *
0375 ENDIF TRAOPT
0375 ENDIF TRAOPT
0376 IFD ADSOPT
0377 *
0378 ***************************************************
0379 * SERIAL PORT FOR DG640 *
0380 ***************************************************
0381 *
0382 ** SET UP FOR ACKERMAN DIGITAL ADS6809
0383 ** THE ADS6809 S100 BOAD HAS AN ON BOARD ACIA
0384 *
0385 ACIAS EQU MONIO+$400 CONTROL PORT
0386 *
0387 ENDIF ADSOPT
0387 ENDIF ADSOPT
0388 IFD PRTOPT
0389 *
0390 ***************************************************
0391 * PRINTER INTERFACE *
0392 ***************************************************
0393 *
0394 PADATA EQU MONIO+$404
0395 PACTRL EQU MONIO+$405
0396 PBDATA EQU MONIO+$406
0397 PBCTRL EQU MONIO+$407
0398 *
0399 ** CB1 ACK. I/P
0400 ** CB2 STB. O/P
0401 ** PB0 - PB7 DATA 1 - 8 O/P
0402 ** PORT A BIT ASSIGNMENT
0403 *
0404 PBUSY EQU $80 I/P
0405 PEMPTY EQU $40 I/P
0406 SELECT EQU $20 I/P
0407 PERROR EQU $10 I/P
0408 PRESET EQU %00000100 O/P PA3 = 0
0409 AUTOFD EQU %00001000 O/P PA2 = 0
0410 DIRMSK EQU %00001100
0411 ENDIF PRTOPT
0411 ENDIF PRTOPT
0412 IFD DG640OPT
0413 *
0414 ***************************************************
0415 * DG640 MEMORY MAPPED DISPLAY DRIVER VARIABLES *
0416 ***************************************************
0417 *
0418 ** VIDEO DISPLAY DEFINITIONS
0419 *
0420 SCREEN EQU MONIO+$0800 START OF SCREEN MEMORY
0421 LINLEN EQU 64 LENGTH OF A LINE
0422 NUMLIN EQU 16 NUMBER OF LINES
0423 SCNLEN EQU $400 LENGTH OF SCREEN
0424 ENDIF DG640OPT
0424 ENDIF DG640OPT
0425 *
0426 IFD DMAFOPT
0427 *
0428 ***************************************************
0429 * DMAF2 8" DRIVE *
0430 ***************************************************
0431 *
0432 ADDREG EQU $F000 ADDRESS REGISTER
0433 CNTREG EQU $F002 COUNT REGISTER
0434 CCREG EQU $F010 CHANNEL CONTROL REGISTER
0435 PRIREG EQU $F014 DMA PRIORITY REGISTER
0436 AAAREG EQU $F015 ???
0437 BBBREG EQU $F016 ???
0438 COMREG EQU $F020 1791 COMMAND REGISTER
0439 SECREG EQU $F022 SECTOR REGISTER
0440 DRVREG EQU $F024 DRIVE SELECT LATCH
0441 CCCREG EQU $F040 ???
0442 ENDIF DMAFOPT
0442 ENDIF DMAFOPT
0443 IFD DATOPT
0444 **************************************************
0445 * DYNAMIC ADDRESS TRANSLATION REGISTERS *
0446 **************************************************
0447 *
0448 IC11 EQU $FFF0 DAT RAM CHIP
0449 TSTPAT EQU $55AA TEST PATTERN
0450 ENDIF DATOPT
0450 ENDIF DATOPT
0451 *
0003 END
0000 INCLUDE "sys09nul.asm"
0001 *
0002 ** SYS09BUG MONITOR EXTENSIONS
0003 *
0004 * FOR GENERIC SYS09BUG
0005 * WITH I/O MAPPED AT $XE000
0006 * AND ROM MAPPED AT $XF000
0007 * (JUST A COPY OF SYS09IDE.ASM
0008 * TO FILL THE MEMORY AT F000)
0009 *
0010 *
 
sys09nul.asm page 2
0012 *
0013 ***************************************************
0014 * Serial PROM register
0015 ***************************************************
0016 *
0017 ** CONFIGURATION PROM DEFINITIONS
0018 *
0019 E0C0 PROMREG EQU MONIO+$C0
0020 0001 PCLKHI EQU $01 Toggle PROM Clock High
0021 0000 PCLKLO EQU $00 Toggle PROM Clock Low
0022 0002 PRSTHI EQU $02 Toggle PROM Reset High
0023 0000 PRSTLO EQU $00 Toggle PROM Reset Low
0024 AA55 SYNCHI EQU $AA55 Synch Pattern High Word
0025 FF00 SYNCLO EQU $FF00 Synch Pattern Low Word
0026 *
0027 *
0028 ***************************************************
0029 * START OF ROM *
0030 ***************************************************
0031 *
0032 F800 MONITV EQU MONROM+0 FDB MONITOR
0033 F802 NXTCMV EQU MONROM+2 FDB NEXTCMD
0034 F804 INCHV EQU MONROM+4 FDB INCH
0035 F806 INCHEV EQU MONROM+6 FDB INCHE
0036 F808 INCHKV EQU MONROM+8 FDB INCHEK
0037 F80A OUTCHV EQU MONROM+10 FDB OUTCH
0038 F80C PDATAV EQU MONROM+12 FDB PDATA
0039 F80E PCRLFV EQU MONROM+14 FDB PCRLF
0040 F810 PSTRGV EQU MONROM+16 FDB PSTRNG
0041 F812 LRAV EQU MONROM+18 FDB LRA
0042 *
0043 * Condition code flags
0044 *
0045 0001 CFLAG EQU $01 CARRY FLAG
0046 0002 VFLAG EQU $02 OVERFLOW FLAG
0047 0004 ZFLAG EQU $04 ZERO FLAG
0048 0008 NFLAG EQU $08 NEGATIVE FLAG
0049 0010 IFLAG EQU $10 IRQ MASK CC
0050 0020 HFLAG EQU $20 HALF CARRY
0051 0040 FFLAG EQU $40 FIRQ MASK CC
0052 0080 EFLAG EQU $80 ENTIRE FLAG
0053 *
0054 * Serial Port
0055 *
Symbol 'ACIAS' undefined Pass 20056 0000 ACIAC1 EQU ACIAS
Symbol 'ACIAS' undefined Pass 20057 0001 ACIAD1 EQU ACIAS+1
0058 04E2 DELCON EQU 1250 Delay (Processor clock in MHz * 50)
0059 *
0060 * XMODEM Control characters
0061 *
0062 0001 SOH EQU $01
0063 0004 EOT EQU $04
0064 0006 ACK EQU $06
0065 0015 NAK EQU $15
0066 0018 CAN EQU $18
0067 *
0068 * Some Disk Constants
0069 *
0070 0100 RMAXTRK EQU 256
0071 00FF RMAXSEC EQU 255
0072 FE01 RTOTSEC EQU RMAXTRK*RMAXSEC-RMAXSEC
0073 *
0074 * RAM SPACE
0075 *
0076 * PUT THIS DOWN THE BOTTOM OF MEMORY
0077 *
0078 0100 ORG $0100
0079 0100 DRVNUM RMB 1
0080 0101 TRACK RMB 1
0081 0102 SECTOR RMB 1
0082 0103 CHKSUM RMB 1
0083 0104 BLKNUM RMB 1 Xmodem block number
0084 0105 BYTCNT RMB 1 Xmodem byte count
0085 0106 XSTATE RMB 2 Xmodem State Vector
0086 0108 DELCNT RMB 3 $00,$00,$00 Xmodem Poll timer
0087 010B MAXTRK RMB 1
0088 010C MAXSEC RMB 1
0089 0200 ORG $0200
0090 *
0091 * SECTOR BUFFER
0092 *
0093 0200 BUFFER RMB 256
0094 *
0095 ****************************************
0096 *
0097 * START OF EXTENSION COMMANDS
0098 *
0099 ****************************************
0100 *
Symbol 'MONEXT' undefined Pass 20101 0000 ORG MONEXT
0102 0000 00 02 FDB NEXTEXT Jump to next extended command
0103 *
0104 ***** NEXTCMD *****
0105 *
0106 0002 AD 9F F8 06 NEXTEXT JSR [INCHEV] GET ONE CHAR. FROM TERMINAL
0107 0006 84 7F ANDA #$7F STRIP PARITY FROM CHAR.
0108 0008 1F 89 TFR A,B
0109 000A 86 20 LDA #$20
0110 000C AD 9F F8 0A JSR [OUTCHV] PRNT SPACE
0111 0010 C1 60 CMPB #$60
0112 0012 2F 02 BLE NXTEX0
0113 0014 C0 20 SUBB #$20
0114 *
0115 ***** DO TABLE LOOKUP *****
0116 * FOR COMMAND FUNCTIONS
0117 *
0118 0016 8E 00 2C NXTEX0 LDX #EXTTAB POINT TO JUMP TABLE
0119 0019 E1 80 NXTEX1 CMPB ,X+ DOES COMMAND MATCH TABLE ENTRY ?
0120 001B 27 0D BEQ JMPEXT BRANCH IF MATCH FOUND
0121 001D 30 02 LEAX 2,X POINT TO NEXT ENTRY IN TABLE
0122 001F 8C 00 35 CMPX #EXTEND REACHED END OF TABLE YET ?
0123 0022 26 F5 BNE NXTEX1 IF NOT END, CHECK NEXT ENTRY
0124 0024 8E 00 35 LDX #MSGWHAT POINT TO MSG "WHAT?"
0125 0027 16 02 1E LBRA PDATA1 PRINT MSG AND RETURN
0126 002A 6E 94 JMPEXT JMP [,X] JUMP TO COMMAND ROUTINE
0127 *
0128 * EXTENDED COMMAND JUMP TABLE
0129 *
0130 002C EXTTAB EQU *
0131 002C 42 FCC 'B' BOOT FLEX
0132 002D 00 3E FDB UBSUB
0133 002F 46 FCC 'F' FORMAT IDE DISK
0134 0030 00 E6 FDB UFSUB
0135 0032 58 FCC 'X' XMODEM ROM DISK UPLOAD
0136 0033 02 B1 FDB UXSUB
0137 *
0138 0035 EXTEND EQU *
0139 *
0140 0035 57 48 41 54 20 3F MSGWHAT FCC "WHAT ?"
0141 003B 0A 0D 04 FCB $0A,$0D,$04
0142 *
0143 * GO TO FLEX RESIDENT IN MEMORY
0144 *
0145 003E 8E CD 00 UBSUB LDX #$CD00
0146 0041 AF 4A STX 10,U
0147 0043 1F 34 TFR U,S
0148 0045 3B RTI
0149 *
0150 * recieve char from remote drive.
0151 * timeout if no response for approx 1s.
0152 * Entry: no parameters
0153 * Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
0154 *
0155 0046 34 30 RCHAR PSHS X,Y
0156 *
0157 0048 8E 03 E8 LDX #1000 1000x inner loop
0158 004B 10 8E 04 E2 RCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
0159 004F 96 00 RCHAR2 LDA ACIAC1 test for recieved char
0160 0051 47 ASRA
0161 0052 25 0A BCS RCHAR3 get character
0162 0054 31 3F LEAY -1,Y else, continue to count delay
0163 0056 26 F7 BNE RCHAR2
0164 0058 30 1F LEAX -1,X
0165 005A 26 EF BNE RCHAR1
0166 005C 35 B0 PULS X,Y,PC return with error if timed out
0167 *
0168 005E 96 01 RCHAR3 LDA ACIAD1 return data (carry bit still set)
0169 0060 35 B0 PULS X,Y,PC
0170 *
0171 *
0172 * transmit char to remote drive.
0173 * timeout if no response for approx 1s. (allows for use of hardware flow control)
0174 * Entry: (A) = char to transmit
0175 * Exit: (A) = recieved char, (C)=1 if valid char, (C)=0 if timeout.
0176 *
0177 0062 34 30 SCHAR PSHS X,Y
0178 0064 34 02 PSHS A
0179 *
0180 0066 8E 03 E8 LDX #1000 1000x inner loop
0181 0069 10 8E 04 E2 SCHAR1 LDY #DELCON delay constant for inner loop (approx 1ms).
0182 006D 96 00 SCHAR2 LDA ACIAC1 test for space in transmit FIFO
0183 006F 47 ASRA
0184 0070 47 ASRA
0185 0071 25 0C BCS SCHAR3 send character
0186 0073 31 3F LEAY -1,Y else, continue to count delay
0187 0075 26 F6 BNE SCHAR2
0188 0077 30 1F LEAX -1,X
0189 0079 26 EE BNE SCHAR1
0190 007B 35 02 PULS A
0191 007D 35 B0 PULS X,Y,PC return with error if timed out
0192 *
0193 007F 35 02 SCHAR3 PULS A
0194 0081 97 01 STA ACIAD1 send data (carry bit still set)
0195 0083 35 B0 PULS X,Y,PC
0196 *
0197 ** 'UF' Format IDE Drive to FLEX standard.
0198 *
0199 0085 0A 0D DISFOS FCB $0A,$0D
0200 0087 46 6F 72 6D 61 74 FCC 'Formating IDE disk... '
69 6E 67 20 49 44
45 20 64 69 73 6B
2E 2E 2E 20
0201 009D 0A 0D FCB $0A,$0D
0202 009F 44 72 69 76 65 20 FCC 'Drive Number ?'
4E 75 6D 62 65 72
20 3F
0203 00AD 04 FCB 4
0204 00AE 0A 0D 04 MESS6 FCB $0A,$0D,4
0205 00B1 49 44 45 20 64 72 FCC 'IDE drive not allocated! '
69 76 65 20 6E 6F
74 20 61 6C 6C 6F
63 61 74 65 64 21
20
0206 00CA 04 FCB 4
0207 00CB 0A 0D UFMSG1 FCB $0A,$0D
0208 00CD 46 6F 72 6D 61 74 FCC 'Format Complete'
20 43 6F 6D 70 6C
65 74 65
0209 00DC 04 FCB 4
0210 00DD 49 44 45 44 49 53 VOLMSG FCC 'IDEDISK '
4B 20
0211 00E5 04 FCB 4
0212 *
0213 00E6 BD 04 B2 UFSUB JSR INITDR
0214 00E9 8E 00 85 LDX #DISFOS
0215 00EC BD 02 48 JSR PDATA1
0216 00EF 17 FF 54 UFSUB1 LBSR RCHAR
0217 00F2 24 FB BCC UFSUB1
0218 00F4 17 FF 6B LBSR SCHAR
0219 00F7 81 30 CMPA #'0'
0220 00F9 10 25 00 EF LBLO UFEXIT
0221 00FD 81 33 CMPA #'3'
0222 00FF 10 22 00 E9 LBHI UFEXIT
0223 0103 80 30 SUBA #'0'
0224 0105 1F 89 TFR A,B
0225 0107 F7 01 00 STB DRVNUM
0226 010A 8E 00 FD LDX #DRVNUM-3
0227 010D BD 05 2F JSR DRVSEL
0228 *
0229 * set up free chain
0230 *
0231 0110 8E 02 00 LDX #BUFFER clear out buffer
0232 0113 4F CLRA
0233 0114 5F CLRB
0234 0115 A7 80 DFL1 STA 0,X+
0235 0117 5A DECB
0236 0118 26 FB BNE DFL1
0237 *
0238 011A 7F 01 01 CLR TRACK
0239 011D 86 01 LDA #1
0240 011F B7 01 02 STA SECTOR
0241 0122 8E 02 00 DFL2 LDX #BUFFER
0242 0125 B6 01 01 LDA TRACK
0243 0128 A7 84 STA 0,X
0244 012A B6 01 02 LDA SECTOR
0245 012D 4C INCA
0246 012E 81 00 CMPA #RMAXSEC+1 last sector on track?
0247 0130 26 04 BNE DFL3
0248 0132 6C 84 INC 0,X
0249 0134 86 01 LDA #1
0250 0136 A7 01 DFL3 STA 1,X
0251 0138 B6 01 01 LDA TRACK
0252 013B F6 01 02 LDB SECTOR
0253 013E BD 05 0A JSR WRITSC
0254 0141 7C 01 02 INC SECTOR
0255 0144 B6 01 02 LDA SECTOR
0256 0147 81 00 CMPA #RMAXSEC+1
0257 0149 26 D7 BNE DFL2
0258 014B 86 01 LDA #1
0259 014D B7 01 02 STA SECTOR
0260 0150 7C 01 01 INC TRACK
0261 0153 B6 01 01 LDA TRACK
0262 0156 81 00 CMPA #RMAXTRK
0263 0158 26 C8 BNE DFL2
0264 * break free chain at last track/sector
0265 015A 8E 02 00 LDX #BUFFER
0266 015D 86 FF LDA #RMAXTRK-1
0267 015F C6 FF LDB #RMAXSEC
0268 0161 BD 04 E6 JSR READSC
0269 0164 8E 02 00 LDX #BUFFER
0270 0167 6F 84 CLR 0,X
0271 0169 6F 01 CLR 1,X
0272 016B 86 FF LDA #RMAXTRK-1
0273 016D C6 FF LDB #RMAXSEC
0274 016F BD 05 0A JSR WRITSC
0275 * set up sector structure, SIR, directory etc
0276 0172 8E 02 00 LDX #BUFFER
0277 0175 4F CLRA
0278 0176 C6 FF LDB #RMAXSEC
0279 0178 BD 04 E6 JSR READSC
0280 017B 8E 02 00 LDX #BUFFER
0281 017E 6F 84 CLR 0,X break end of directory chain
0282 0180 6F 01 CLR 1,X
0283 0182 4F CLRA
0284 0183 C6 FF LDB #RMAXSEC
0285 0185 BD 05 0A JSR WRITSC
0286 *
0287 0188 8E 02 00 LDX #BUFFER
0288 018B 4F CLRA
0289 018C C6 03 LDB #3 set up SIR
0290 018E BD 04 E6 JSR READSC
0291 0191 8E 02 00 LDX #BUFFER
0292 0194 6F 84 CLR 0,X break forward link
0293 0196 6F 01 CLR 1,X
0294 *
0295 0198 34 20 PSHS Y
0296 019A 10 8E 00 DD LDY #VOLMSG
0297 019E C6 10 LDB #16
0298 01A0 A6 A0 DFL4 LDA ,Y+
0299 01A2 A7 85 STA B,X
0300 01A4 5C INCB
0301 01A5 C1 18 CMPB #24
0302 01A7 26 F7 BNE DFL4
0303 01A9 35 20 PULS Y
0304 *
0305 01AB 4F CLRA
0306 01AC F6 01 00 LDB DRVNUM volume number
0307 01AF ED 88 1B STD 27,X
0308 *
0309 01B2 CC 01 01 LDD #$0101 first trk/sec 01-01
0310 01B5 ED 88 1D STD 29,X
0311 01B8 86 FF LDA #RMAXTRK-1
0312 01BA C6 FF LDB #RMAXSEC
0313 01BC ED 88 1F STD 31,X
0314 01BF ED 88 26 STD 38,X
0315 01C2 CC FE 01 LDD #RTOTSEC total DATA sectors (2912-14)
0316 01C5 ED 88 21 STD 33,X
0317 *
0318 01C8 86 01 LDA #01 month set default creation date (SYS09's birthday!)
0319 01CA A7 88 23 STA 35,X
0320 01CD 86 07 LDA #07 day
0321 01CF A7 88 24 STA 36,X
0322 01D2 86 07 LDA #07 year
0323 01D4 A7 88 25 STA 37,X
0324 *
0325 01D7 4F RF3 CLRA
0326 01D8 C6 03 LDB #3
0327 01DA BD 05 0A JSR WRITSC
0328 *
0329 * Not sure what this is about
0330 * put bootstrap on track 0 sector 1
0331 *
0332 * LDX #BUFFER
0333 * CLRA
0334 * LDB #1
0335 * JSR READSC
0336 * LDX #BUFFER
0337 * LDA #$AA set the init flag
0338 * STA 0,X
0339 * LDA #$55
0340 * STA 1,X
0341 * CLRA
0342 * LDB #1
0343 * JSR WRITSC
0344 *
0345 * Write Boot sector
0346 *
0347 01DD 8E 07 00 LDX #BOOT
0348 01E0 4F CLRA TRACK 0
0349 01E1 C6 01 LDB #$01 SECTOR 1
0350 01E3 B7 01 01 STA TRACK
0351 01E6 F7 01 02 STB SECTOR
0352 01E9 17 03 1E LBSR WRITSC
0353 *
0354 01EC 8E 00 CB UFEXIT LDX #UFMSG1
0355 01EF 7E 02 48 JMP PDATA1
0356 *
0357 * ACIA INPUT TEST
0358 *
0359 01F2 96 00 INTEST LDA ACIAC1
0360 01F4 85 01 BITA #$01
0361 01F6 39 RTS
0362 *
0363 * RESET ACIA
0364 *
0365 01F7 86 03 ACIRST LDA #$03 master reset
0366 01F9 97 00 STA ACIAC1
0367 01FB 86 11 LDA #$11
0368 01FD 97 00 STA ACIAC1
0369 01FF 39 RTS
0370 *
0371 * ACIA INPUT
0372 *
0373 0200 86 10 INTER LDA #16
0374 0202 B7 01 08 STA DELCNT+0
0375 0205 7F 01 09 CLR DELCNT+1
0376 0208 7F 01 0A CLR DELCNT+2
0377 020B 96 00 INTER0 LDA ACIAC1
0378 020D 85 01 BITA #$01
0379 020F 26 08 BNE INTER1
0380 0211 85 78 BITA #$78
0381 0213 27 09 BEQ INTER2
0382 0215 8D E0 BSR ACIRST
0383 0217 20 E7 BRA INTER
0384 *
0385 0219 96 01 INTER1 LDA ACIAD1
0386 021B 1C FD ANDCC #$FF-VFLAG
0387 021D 39 RTS
0388 *
0389 021E 7A 01 0A INTER2 DEC DELCNT+2
0390 0221 26 E8 BNE INTER0
0391 0223 7A 01 09 DEC DELCNT+1
0392 0226 26 E3 BNE INTER0
0393 0228 7A 01 08 DEC DELCNT+0
0394 022B 26 DE BNE INTER0
0395 022D 4F CLRA
0396 022E 1A 02 ORCC #VFLAG
0397 0230 39 RTS
0398 *
0399 * ACIA OUTPUT
0400 *
0401 0231 34 02 OUTTER PSHS A
0402 *
0403 0233 96 00 OUTTE1 LDA ACIAC1
0404 0235 85 02 BITA #$02
0405 0237 26 08 BNE OUTTE2
0406 0239 85 78 BITA #$78
0407 023B 27 F6 BEQ OUTTE1
0408 023D 8D B8 BSR ACIRST
0409 023F 20 F2 BRA OUTTE1
0410 *
0411 0241 35 02 OUTTE2 PULS A
0412 0243 97 01 STA ACIAD1
0413 0245 39 RTS
0414 *
0415 * Print Data
0416 *
0417 0246 8D E9 PDATA0 BSR OUTTER
0418 0248 A6 80 PDATA1 LDA ,X+
0419 024A 81 04 CMPA #$04
0420 024C 26 F8 BNE PDATA0
0421 024E 39 RTS
0422 *
0423 *
0424 ** 'UX' Xmodem IDE Disk upload
0425 *
0426 024F 0D 0A UXMES0 FCB $0D,$0A
0427 0251 58 6D 6F 64 65 6D FCC 'Xmodem IDE Disk Upload'
20 49 44 45 20 44
69 73 6B 20 55 70
6C 6F 61 64
0428 0267 04 FCB 4
0429 0268 0D 0A UXMES1 FCB $0D,$0A
0430 026A 55 70 6C 6F 61 64 FCC 'Upload Complete'
20 43 6F 6D 70 6C
65 74 65
0431 0279 04 FCB 4
0432 027A 0D 0A UXMES2 FCB $0D,$0A
0433 027C 55 70 6C 6F 61 64 FCC 'Upload Error'
20 45 72 72 6F 72
0434 0288 04 FCB 4
0435 0289 0D 0A UXMSG3 FCB $0D,$0A
0436 028B 44 72 69 76 65 20 FCC 'Drive Number :'
4E 75 6D 62 65 72
20 3A
0437 0299 04 FCB 4
0438 029A 0D 0A UXMSG4 FCB $0D,$0A
0439 029C 41 72 65 20 59 6F FCC 'Are You Sure ? (Y/N)'
75 20 53 75 72 65
20 3F 20 28 59 2F
4E 29
0440 02B0 04 FCB 4
0441 *
0442 * Print Banner
0443 *
0444 02B1 8E 02 4F UXSUB LDX #UXMES0
0445 02B4 17 FF 91 LBSR PDATA1
0446 *
0447 * Prompt for Disk drive number (0 to 3)
0448 *
0449 02B7 8E 02 89 LDX #UXMSG3
0450 02BA 17 FF 8B LBSR PDATA1
0451 02BD 17 FF 40 UXSUB1 LBSR INTER
0452 02C0 29 FB BVS UXSUB1
0453 02C2 17 FF 6C LBSR OUTTER
0454 02C5 81 30 CMPA #'0
0455 02C7 10 25 01 2E LBLO UXEXIT
0456 02CB 81 33 CMPA #'3
0457 02CD 10 22 01 28 LBHI UXEXIT
0458 02D1 80 30 SUBA #'0
0459 02D3 B7 01 00 STA DRVNUM
0460 *
0461 * Report selected drive
0462 *
0463 02D6 8E 02 89 LDX #UXMSG3
0464 02D9 17 FF 6C LBSR PDATA1
0465 02DC B6 01 00 LDA DRVNUM
0466 02DF 8B 30 ADDA #'0
0467 02E1 17 FF 4D LBSR OUTTER
0468 *
0469 * Ask for confirmation (Y/N)
0470 *
0471 02E4 8E 02 9A LDX #UXMSG4
0472 02E7 17 FF 5E LBSR PDATA1
0473 02EA 17 FF 13 UXSUB2 LBSR INTER
0474 02ED 29 FB BVS UXSUB2
0475 02EF 17 FF 3F LBSR OUTTER
0476 02F2 84 5F ANDA #$5F
0477 02F4 81 4E CMPA #'N
0478 02F6 10 27 00 FF LBEQ UXEXIT
0479 02FA 81 59 CMPA #'Y
0480 02FC 26 B3 BNE UXSUB
0481 *
0482 * We have confirmation ... now load the disk image
0483 *
0484 02FE 17 01 B1 LBSR INITDR
0485 0301 CE 04 22 LDU #XSTST
0486 0304 FF 01 06 STU XSTATE
0487 0307 86 01 LDA #1
0488 0309 B7 01 04 STA BLKNUM
0489 *
0490 * Sector1
0491 *
0492 030C 8E 02 00 LDX #BUFFER
0493 *
0494 030F 4F CLRA TRACK 0
0495 0310 C6 01 LDB #$01 SECTOR 1
0496 0312 B7 01 01 STA TRACK
0497 0315 F7 01 02 STB SECTOR
0498 *
0499 0318 17 00 EA LBSR XREAD
0500 031B 10 25 00 E0 LBCS UXERR
0501 031F 17 01 87 LBSR XACK
0502 0322 17 00 E0 LBSR XREAD
0503 0325 10 25 00 D6 LBCS UXERR
0504 *
0505 0329 8E 02 00 LDX #BUFFER
0506 032C B6 01 01 LDA TRACK
0507 032F F6 01 02 LDB SECTOR
0508 0332 17 01 D5 LBSR WRITSC
0509 0335 17 01 71 LBSR XACK
0510 *
0511 * Sector 2
0512 *
0513 0338 8E 02 00 LDX #BUFFER
0514 *
0515 033B B6 01 01 LDA TRACK
0516 033E F6 01 02 LDB SECTOR
0517 0341 5C INCB
0518 0342 B7 01 01 STA TRACK
0519 0345 F7 01 02 STB SECTOR
0520 *
0521 0348 17 00 BA LBSR XREAD
0522 034B 10 25 00 B0 LBCS UXERR
0523 034F 17 01 57 LBSR XACK
0524 0352 17 00 B0 LBSR XREAD
0525 0355 10 25 00 A6 LBCS UXERR
0526 *
0527 0359 8E 02 00 LDX #BUFFER
0528 035C B6 01 01 LDA TRACK
0529 035F F6 01 02 LDB SECTOR
0530 0362 17 01 A5 LBSR WRITSC
0531 *
0532 0365 17 01 41 LBSR XACK
0533 *
0534 * Sector 3 - SIR
0535 *
0536 0368 8E 02 00 LDX #BUFFER
0537 *
0538 036B B6 01 01 LDA TRACK
0539 036E F6 01 02 LDB SECTOR
0540 0371 5C INCB
0541 0372 B7 01 01 STA TRACK
0542 0375 F7 01 02 STB SECTOR
0543 *
0544 0378 17 00 8A LBSR XREAD
0545 037B 10 25 00 80 LBCS UXERR
0546 037F 17 01 27 LBSR XACK
0547 0382 17 00 80 LBSR XREAD
0548 0385 10 25 00 76 LBCS UXERR
0549 *
0550 0389 8E 02 00 LDX #BUFFER
0551 038C A6 88 26 LDA 38,X
0552 038F 4C INCA
0553 0390 B7 01 0B STA MAXTRK
0554 0393 E6 88 27 LDB 39,X
0555 0396 5C INCB
0556 0397 F7 01 0C STB MAXSEC
0557 039A B6 01 01 LDA TRACK
0558 039D F6 01 02 LDB SECTOR
0559 03A0 17 01 67 LBSR WRITSC
0560 *
0561 03A3 17 01 03 LBSR XACK
0562 *
0563 * Sector 4 to Last Track & Sector
0564 *
0565 *
0566 03A6 B6 01 01 LDA TRACK
0567 03A9 F6 01 02 LDB SECTOR
0568 03AC 5C INCB
0569 *
0570 03AD 8E 02 00 UXLOOP LDX #BUFFER
0571 03B0 B7 01 01 STA TRACK
0572 03B3 F7 01 02 STB SECTOR
0573 *
0574 03B6 17 00 4C LBSR XREAD
0575 03B9 10 25 00 42 LBCS UXERR
0576 03BD 17 00 E9 LBSR XACK
0577 03C0 17 00 42 LBSR XREAD
0578 03C3 10 25 00 38 LBCS UXERR
0579 *
0580 03C7 8E 02 00 LDX #BUFFER
0581 03CA B6 01 01 LDA TRACK
0582 03CD F6 01 02 LDB SECTOR
0583 03D0 17 01 37 LBSR WRITSC
0584 03D3 17 00 D3 LBSR XACK
0585 *
0586 03D6 B6 01 01 LDA TRACK
0587 03D9 F6 01 02 LDB SECTOR
0588 03DC 5C INCB
0589 03DD F1 01 0C CMPB MAXSEC
0590 03E0 26 CB BNE UXLOOP
0591 03E2 C6 01 LDB #1
0592 03E4 4C INCA
0593 03E5 B1 01 0B CMPA MAXTRK
0594 03E8 26 C3 BNE UXLOOP
0595 *
0596 *
0597 * Write Boot sector
0598 *
0599 03EA 8E 07 00 LDX #BOOT
0600 03ED 4F CLRA TRACK 0
0601 03EE C6 01 LDB #$01 SECTOR 1
0602 03F0 B7 01 01 STA TRACK
0603 03F3 F7 01 02 STB SECTOR
0604 03F6 17 01 11 LBSR WRITSC
0605 *
0606 03F9 8E 02 68 UXEXIT LDX #UXMES1
0607 03FC 7E 02 48 JMP PDATA1
0608 *
0609 03FF 8E 02 7A UXERR LDX #UXMES2
0610 0402 16 FE 43 LBRA PDATA1
0611 *
0612 * Get a Byte using XModem protocol
0613 * Carry clear => no errors
0614 * Carry set => errors
0615 *
0616 0405 34 40 XREAD PSHS U
0617 0407 FE 01 06 LDU XSTATE
0618 *
0619 040A 17 FD F3 XBYTE0 LBSR INTER
0620 040D 28 0A BVC XBYTE1
0621 040F 86 15 LDA #NAK
0622 0411 17 FE 1D LBSR OUTTER
0623 0414 CE 04 22 LDU #XSTST
0624 0417 20 F1 BRA XBYTE0
0625 *
0626 0419 AD C4 XBYTE1 JSR ,U
0627 041B 26 ED BNE XBYTE0
0628 041D FF 01 06 STU XSTATE
0629 0420 35 C0 PULS U,PC
0630 *
0631 * START - LOOK FOR SOH (START OF HEADER) = $01
0632 *
0633 0422 81 01 XSTST CMPA #SOH
0634 0424 26 06 BNE XSTST1
0635 0426 CE 04 42 LDU #XSTBL
0636 0429 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
0637 042B 39 RTS
0638 *
0639 042C 81 04 XSTST1 CMPA #EOT
0640 042E 26 08 BNE XSTST2
0641 0430 86 06 LDA #ACK
0642 0432 17 FD FC LBSR OUTTER
0643 0435 1A 05 ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
0644 0437 39 RTS
0645 *
0646 0438 81 18 XSTST2 CMPA #CAN
0647 043A 26 03 BNE XSTST3
0648 043C 1A 05 ORCC #CFLAG+ZFLAG Set (c)=1 abort & exit
0649 043E 39 RTS
0650 *
0651 043F 1C FA XSTST3 ANDCC #$FF-CFLAG-ZFLAG
0652 0441 39 RTS
0653 *
0654 * Got SOH
0655 * Now get block number
0656 *
0657 0442 B1 01 04 XSTBL CMPA BLKNUM
0658 0445 26 06 BNE XSTBLE
0659 0447 CE 04 58 LDU #XSTCOM
0660 044A 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
0661 044C 39 RTS
0662 *
0663 * Error in block number
0664 *
0665 044D 86 15 XSTBLE LDA #NAK
0666 044F 17 FD DF LBSR OUTTER
0667 0452 CE 04 22 LDU #XSTST
0668 0455 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
0669 0457 39 RTS
0670 *
0671 * Get complement of block number
0672 *
0673 0458 43 XSTCOM COMA
0674 0459 B1 01 04 CMPA BLKNUM
0675 045C 26 EF BNE XSTBLE
0676 045E 7F 01 03 CLR CHKSUM
0677 0461 86 80 LDA #128
0678 0463 B7 01 05 STA BYTCNT
0679 0466 CE 04 6C LDU #XSTDA
0680 0469 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, No valid data (no exit)
0681 046B 39 RTS
0682 *
0683 * Get data bytes
0684 *
0685 046C 34 02 XSTDA PSHS A
0686 046E BB 01 03 ADDA CHKSUM
0687 0471 B7 01 03 STA CHKSUM
0688 0474 35 02 PULS A
0689 0476 7A 01 05 DEC BYTCNT
0690 0479 26 03 BNE XSTDA1
0691 047B CE 04 83 LDU #XSTCK
0692 047E A7 80 XSTDA1 STA ,X+
0693 0480 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
0694 0482 39 RTS
0695 *
0696 * Byte count reached zero
0697 * Check checksum byte
0698 *
0699 0483 B1 01 03 XSTCK CMPA CHKSUM
0700 0486 26 0B BNE XSTCK1 retry if wrong checksum
0701 *
0702 * Checksum OK ...
0703 * increment block number
0704 * Don't send ACK until data written to CF
0705 *
0706 0488 7C 01 04 INC BLKNUM
0707 048B CE 04 22 LDU #XSTST
0708 048E 1C FE ANDCC #$FF-CFLAG No abort
0709 0490 1A 04 ORCC #ZFLAG Valid data (exit)
0710 0492 39 RTS
0711 *
0712 * Checksum Error detected ...
0713 * Reset Sector counter in ACCB to last 128 byte boundary
0714 * and send NAK
0715 *
0716 0493 34 04 XSTCK1 PSHS B
0717 0495 1F 10 TFR X,D
0718 0497 5A DECB
0719 0498 C4 80 ANDB #128
0720 049A 1F 01 TFR D,X
0721 049C 35 04 PULS B
0722 049E 86 15 LDA #NAK
0723 04A0 17 FD 8E XSTCK2 LBSR OUTTER
0724 04A3 CE 04 22 LDU #XSTST
0725 04A6 1C FA ANDCC #$FF-CFLAG-ZFLAG No abort, no valid data (no exit)
0726 04A8 39 RTS
0727 *
0728 * Acknowledge Data Received
0729 *
0730 04A9 34 02 XACK PSHS A
0731 04AB 86 06 LDA #ACK
0732 04AD 17 FD 81 LBSR OUTTER
0733 04B0 35 82 PULS A,PC
0734 *
0735 *
0736 ** FLEX 9 IDE DISK DRIVERS
0737 *
0738 * FOR SYS09BUG 1.2 ON THE XSA-3S1000
0739 * WITH I/O MAPPED AT $XE000
0740 * AND ROM MAPPED AT $XF000
0741 *
0742 *
0743 * INITIALIZE CF CARD FOR 8 BIT LBA MODE
0744 *
Symbol 'AUXRESET' undefined Pass 20745 04B2 CC 00 00 INITDR LDD #AUXRESET
Symbol 'CF_AUX' undefined Pass 20746 04B5 FD 00 00 STD CF_AUX
Symbol 'AUXRSTREL' undefined Pass 20747 04B8 CC 00 00 LDD #AUXRSTREL
Symbol 'CF_AUX' undefined Pass 20748 04BB FD 00 00 STD CF_AUX
Symbol 'HEADLBA' undefined Pass 20749 04BE CC 00 00 LDD #HEADLBA
Symbol 'CF_HEAD' undefined Pass 20750 04C1 FD 00 00 STD CF_HEAD
0751 04C4 16 02 E1 LBRA WTRDY
0752 *
0753 * RESTORE DISK DRIVER (SEEK TRACK 00)
0754 *
0755 04C7 8D 66 RESTR1 BSR DRVSEL
0756 04C9 4F CLRA ; Track 0
0757 04CA C6 01 LDB #$01 ; Sector 1
0758 *
0759 * Seek track and sector
0760 * A holds track number (0 - ??)
0761 * B holds sector number (1 - ??)
0762 * Sector numbers starts from 1
0763 * subtract 1 to start from sector 0 on CF
0764 *
0765 04CC 34 02 SEEKTS PSHS A
0766 04CE 4F CLRA
0767 04CF 5A DECB
Symbol 'CF_SECNUM' undefined Pass 20768 04D0 FD 00 00 STD CF_SECNUM
0769 04D3 E6 E4 LDB ,S
Symbol 'CF_CYLLO' undefined Pass 20770 04D5 FD 00 00 STD CF_CYLLO
0771 04D8 F6 01 00 LDB DRVNUM
Symbol 'CF_CYLHI' undefined Pass 20772 04DB FD 00 00 STD CF_CYLHI
0773 04DE C6 01 LDB #$01
Symbol 'CF_SECCNT' undefined Pass 20774 04E0 FD 00 00 STD CF_SECCNT
0775 04E3 5F CLRB
0776 04E4 35 82 PULS A,PC
0777 *
0778 * READ SECTORS FROM CF
0779 *
0780 *
0781 04E6 8D E4 READSC BSR SEEKTS
Symbol 'CMDREAD' undefined Pass 20782 04E8 CC 00 00 LDD #CMDREAD ; IDE READ MULTIPLE
Symbol 'CF_COMAND' undefined Pass 20783 04EB FD 00 00 STD CF_COMAND
0784 04EE 17 02 B7 LBSR WTRDY
0785 *
0786 * READ LOOP
0787 *
0788 04F1 34 20 PSHS Y
0789 04F3 10 8E 01 00 LDY #256
0790 04F7 17 02 BD RDLP1 LBSR WTDRQ
Symbol 'CF_DATA' undefined Pass 20791 04FA FC 00 00 LDD CF_DATA
0792 04FD E7 80 STB ,X+
0793 04FF 31 3F LEAY -1,Y
0794 0501 26 F4 BNE RDLP1
0795 0503 35 20 PULS Y
0796 *
0797 0505 17 02 A0 LBSR WTRDY
0798 0508 5F CLRB
0799 0509 39 RTS
0800 *
0801 * WRITE SECTOR TO CF
0802 *
0803 050A 8D C0 WRITSC BSR SEEKTS ; SEEK TRACK & SECTOR
Symbol 'CMDWRITE' undefined Pass 20804 050C CC 00 00 LDD #CMDWRITE ; IDE WRITE MULTIPLE
Symbol 'CF_COMAND' undefined Pass 20805 050F FD 00 00 STD CF_COMAND
0806 0512 17 02 93 LBSR WTRDY
0807 *
0808 * WRITE LOOP
0809 *
0810 0515 34 20 PSHS Y
0811 0517 10 8E 01 00 LDY #256
0812 051B 4F CLRA
0813 051C 17 02 98 WRTLP1 LBSR WTDRQ
0814 051F E6 80 LDB ,X+
Symbol 'CF_DATA' undefined Pass 20815 0521 FD 00 00 STD CF_DATA
0816 0524 31 3F LEAY -1,Y
0817 0526 26 F4 BNE WRTLP1
0818 0528 35 20 PULS Y
0819 *
0820 052A 17 02 7B LBSR WTRDY
0821 052D 5F CLRB
0822 052E 39 RTS
0823 *
0824 * DRIVE SELECT DISK DRIVER
0825 *
0826 052F A6 03 DRVSEL LDA 3,X GET DRIVE # FROM FCB
0827 0531 81 03 CMPA #3
0828 0533 23 01 BLS DRVS2 IF > 3, SET IT TO 0
0829 0535 4F CLRA
0830 0536 B7 01 00 DRVS2 STA DRVNUM
0831 0539 5F CLRB ; SET Z, CLEAR C
0832 053A 39 RTS
0833 *
0834 * CHECK DRIVE READY DISK DRIVER
0835 *
0836 053B A6 03 CHKDRV LDA 3,X
0837 053D 5F CLRB ; CLEAR C, SET Z
0838 053E 39 RTS
0839 *******************************************************
0840 *
0841 * Bootstrap FLEX Loader
0842 *
0843 * SBUG1.8 loads the bootstap loader at $C000
0844 * however the Flex adaption manual has the
0845 * bootstrap loader residing at $C100
0846 * Bootstrap Loader is position independent code
0847 *
0848 ******************************************************
0849 *
0850 * Equates
0851 *
0852 C0FF BSSTACK EQU $C0FF
0853 C300 SCTBUF EQU $C300
0854 *
0855 * Start of Utility
0856 *
Symbol 'MONEXT' undefined Pass 20857 0700 ORG MONEXT+$0700
0858 0700 20 0B BOOT BRA BLOAD0
0859 0702 00 00 00 FCB 0,0,0
0860 0705 00 TRK FCB 0 File start track
0861 0706 00 SCT FCB 0 File start sector
0862 0707 00 DNS FCB 0 Density Flag (not used)
0863 0708 C0 00 TADR FDB $C000 Transfer address
0864 070A 00 00 LADR FDB 0 Load Address
0865 070C 00 DRNUM FCB 0 Drive number 0
0866 *
0867 070D 10 CE C0 FF BLOAD0 LDS #BSSTACK Set up Bootstrap stack
0868 0711 EC 8C F1 LDD TRK,PCR Set up start track and sector
0869 0714 FD C3 00 STD SCTBUF
0870 0717 10 8E C4 00 LDY #SCTBUF+256
0871 *
0872 * Perform actual file load
0873 *
0874 071B 8D 35 BLOAD1 BSR GETCH Get acharcater
0875 071D 81 02 CMPA #$02 Data record hearder ?
0876 071F 27 10 BEQ BLOAD2 Skip, is so
0877 0721 81 16 CMPA #$16 Xfr address hearder ?
0878 0723 26 F6 BNE BLOAD1 Loop if neither
0879 *
0880 * Get transfer address
0881 *
0882 0725 8D 2B BSR GETCH
0883 0727 A7 8C DE STA TADR,PCR
0884 072A 8D 26 BSR GETCH
0885 072C A7 8C DA STA TADR+1,PCR
0886 072F 20 EA BRA BLOAD1
0887 *
0888 * Load data record
0889 *
0890 0731 8D 1F BLOAD2 BSR GETCH Get load address
0891 0733 A7 8C D4 STA LADR,PCR
0892 0736 8D 1A BSR GETCH
0893 0738 A7 8C D0 STA LADR+1,PCR
0894 073B 8D 15 BSR GETCH Get Bytes count
0895 073D 1F 89 TFR A,B
0896 073F 5D TSTB
0897 0740 27 D9 BEQ BLOAD1 Loop if count = 0
0898 0742 AE 8C C5 LDX LADR,PCR Get load address
0899 0745 34 14 BLOAD3 PSHS B,X
0900 0747 8D 09 BSR GETCH Get data character
0901 0749 35 14 PULS B,X
0902 074B A7 80 STA ,X+ Store at load address
0903 074D 5A DECB
0904 074E 26 F5 BNE BLOAD3 Loop until count = 0
0905 0750 20 C9 BRA BLOAD1
0906 *
0907 * Get Character routine
0908 * Reads a sector if needed
0909 *
0910 0752 10 8C C4 00 GETCH CMPY #SCTBUF+256 out of data ?
0911 0756 26 0F BNE GETCH4 Go read Character if not
0912 0758 8E C3 00 GETCH2 LDX #SCTBUF Point to buffer
0913 075B EC 84 LDD 0,X Get forward Link
0914 075D 27 0B BEQ GOFLEX if zero, file is loaded
0915 075F 8D 26 BSR READ Read next sector
0916 0761 26 9D BNE BOOT start over if error
0917 0763 10 8E C3 04 LDY #SCTBUF+4 Point past link
0918 0767 A6 A0 GETCH4 LDA ,Y+ Else, get a character
0919 0769 39 RTS
0920 *
0921 * File is loaded, Jump to it
0922 *
0923 076A 6E 9C 9B GOFLEX JMP [TADR,PCR] Jump to transfer address
0924
0925 *
0926 ** FLEX 9 IDE DISK DRIVERS
0927 *
0928 * Seek track and sector
0929 * A holds track number (0 - ??)
0930 * B holds sector number (1 - ??)
0931 * Sector numbers starts from 1
0932 * subtract 1 to start from sector 0 on CF
0933 *
0934 076D 34 02 SEEK PSHS A
0935 076F 4F CLRA
0936 0770 5A DECB
Symbol 'CF_SECNUM' undefined Pass 20937 0771 FD 00 00 STD CF_SECNUM
0938 0774 E6 E4 LDB ,S
Symbol 'CF_CYLLO' undefined Pass 20939 0776 FD 00 00 STD CF_CYLLO
0940 0779 E6 8C 90 LDB DRNUM,PCR
Symbol 'CF_CYLHI' undefined Pass 20941 077C FD 00 00 STD CF_CYLHI
0942 077F C6 01 LDB #$01
Symbol 'CF_SECCNT' undefined Pass 20943 0781 FD 00 00 STD CF_SECCNT
0944 0784 5F CLRB
0945 0785 35 82 PULS A,PC
0946 *
0947 * READ SECTORS FROM CF
0948 *
0949 *
0950 0787 8D E4 READ BSR SEEK
Symbol 'CMDREAD' undefined Pass 20951 0789 CC 00 00 LDD #CMDREAD ; IDE READ MULTIPLE
Symbol 'CF_COMAND' undefined Pass 20952 078C FD 00 00 STD CF_COMAND
0953 078F 8D 17 BSR WTRDY
0954 *
0955 * READ LOOP
0956 *
0957 0791 34 20 PSHS Y
0958 0793 10 8E 01 00 LDY #256
0959 0797 8D 1E READ1 BSR WTDRQ
Symbol 'CF_DATA' undefined Pass 20960 0799 FC 00 00 LDD CF_DATA
0961 079C E7 80 STB ,X+
0962 079E 31 3F LEAY -1,Y
0963 07A0 26 F5 BNE READ1
0964 07A2 35 20 PULS Y
0965 *
0966 07A4 8D 02 BSR WTRDY
0967 07A6 5F CLRB
0968 07A7 39 RTS
0969 *
0970 * WAIT UNTIL READY
0971 *
Symbol 'CF_STATUS' undefined Pass 20972 07A8 FC 00 00 WTRDY LDD CF_STATUS
Symbol 'BUSY' undefined Pass 20973 07AB C5 00 BITB #BUSY
0974 07AD 26 F9 BNE WTRDY
Symbol 'CF_STATUS' undefined Pass 20975 07AF FC 00 00 LDD CF_STATUS
Symbol 'DRDY' undefined Pass 20976 07B2 C5 00 BITB #DRDY
0977 07B4 27 F2 BEQ WTRDY
0978 07B6 39 RTS
0979 *
0980 * WAIT FOR DATA REQUEST
0981 *
Symbol 'CF_STATUS' undefined Pass 20982 07B7 FC 00 00 WTDRQ LDD CF_STATUS
Symbol 'DRQ' undefined Pass 20983 07BA C5 00 BITB #DRQ
0984 07BC 27 F9 BEQ WTDRQ
0985 07BE 39 RTS
0986 *
0004 END
0000 INCLUDE "sys09bug.asm"
0001 * NAM SYS09BUG12 SYSTEM09 MONITOR
0002 OPT l
 
sys09bug.asm page 3
0004 *
0005 * MONITOR PROGRAM FOR THE SOUTHWEST TECHNICAL
0006 * PRODUCTS MP-09 CPU BOARD AS COMMENTED BY....
0007 *
0008 * ALLEN CLARK WALLACE WATSON
0009 * 2502 REGAL OAKS LANE 4815 EAST 97th AVE.
0010 * LUTZ, FLA. 33549 TEMPLE TERRACE, FLA. 33617
0011 * PH. 813-977-0347 PH. 813-985-1359
0012 *
0013 * MODIFIED TO SBUG09 VER 1.8 BY: RANDY JARRETT
0014 * 2561 NANTUCKET DR APT. E
0015 * ATLANTA, GA 30345
0016 * PH. 404-320-1043
0017 *
0018 * MODIFIED TO SYS09BUG VER 1.0
0019 * FOR: SYSTEM09 FPGA SYSTEM
0020 * BY: JOHN KENT
0021 * DATE: 21ST NOVEMBER 2006
0022 * REMOVED: DISK BOOTS
0023 * MEMORY TEST
0024 * ADDED: ADM3A VDU DRIVER
0025 *
0026 * MODIFIED TO SYS09BUG VER 1.1
0027 * BY: JOHN KENT
0028 * DATE: 7TH JANUARY 2007
0029 * ADDED: 'U' USER EXTENTION COMMANDS AT $F000
0030 * CONDITIONAL ASSEMBLY OF FLOPPY BOOTS
0031 * AND REALTIME CLOCK
0032 *
0033 * MODIFIED TO SYS09BUG VER 1.2
0034 * BY: JOHN KENT
0035 * DATE: 21ST MAY 2007
0036 * ADDED: COMPACT FLASH BOOT TO FPGA VERSION
0037 * REMOVED PORT REDIRECTION ON PUNCH & LOAD
0038 *
0039 * Modified to SYS09BUG VER 1.3
0040 * BY: JOHN KENT
0041 * DATE: 8TH JAN 2008
0042 * ADDED: CONDITIONALS FOR SPARTAN3E STARTER BOARD
0043 * WITH ONLY 32K OF RAM
0044 *
0045 * Modified to SYS09BUG VER 1.4
0046 * BY: JOHN KENT
0047 * DATE: 3RD FEB 2008
0048 * ADDED: CONDITIONALS FOR XESS BOARD WITH IDE
0049 * SEPERATE CONDITIONAL FOR S3 STARTER AND B5-X300
0050 * 16 BIT IDE DISK BOOT STRAP ROUTINE
0051 *
0052 * Modified to SYS09BUG VER 1.5
0053 * BY: JOHN KENT
0054 * DATE: 7TH SEP 2008
0055 * ADDED: ADDED "B3-S2+" STRING
0056 *
0057 * Modified to SYS09BUG VER 1.6
0058 * BY: JOHN KENT
0059 * DATE: 2ND DEC 2008
0060 * ADDED: ADDED HARDWARE FLOW CONTROL
0061 *
0062 * CHANGED: SEPARARTED OPTIONS EQUATES AND BODY INTO SEPARATE FILES
0063 *
0064 * Modified to SYS09BUG VER 1.7
0065 * BY: JOHN KENT
0066 * DATE: 16TH OCT 2010
0067 * ADDED: "DE2-70" STRING
0068 *
0069 * *** COMMANDS ***
0070 *
0071 * CONTROL A = ALTER THE "A" ACCUMULATOR
0072 * CONTROL B = ALTER THE "B" ACCUMULATOR
0073 * CONTROL C = ALTER THE CONDITION CODE REGISTER
0074 * CONTROL D = ALTER THE DIRECT PAGE REGISTER
0075 * CONTROL P = ALTER THE PROGRAM COUNTER
0076 * CONTROL U = ALTER USER STACK POINTER
0077 * CONTROL X = ALTER "X" INDEX REGISTER
0078 * CONTROL Y = ALTER "Y" INDEX REGISTER
0079 * B hhhh = SET BREAKPOINT AT LOCATION $hhhh
0080 * D = 5.25" MINIFLOPPY BOOT
0081 * E ssss-eeee = EXAMINE MEMORY
0082 * FROM STARTING ADDRESS ssss
0083 * TO ENDING ADDRESS eeee.
0084 * G = CONTINUE EXECUTION FROM BREAKPOINT OR SWI
0085 * L = LOAD TAPE
0086 * M hhhh = EXAMINE AND CHANGE MEMORY LOCATION hhhh
0087 * P ssss-eeee = PUNCH TAPE, START ssss TO END eeee ADDR.
0088 * R = DISPLAY REGISTER CONTENTS
0089 * S = DISPLAY STACK FROM ssss TO $DFC0
0090 * U = 8" DMAF2 FLOPPY BOOT
0091 * U = USER EXTENSION COMMANDS AT $F000
0092 * X = REMOVE ALL BREAKPOINTS
0093 *
0094 *
0095 ***************************************************
0096 * SYS09BUG VARIABLE SPACE
0097 ***************************************************
0098 *
0099 DFC0 ORG MONRAM
0100 DFC0 STACK EQU * ; TOP OF INTERNAL STACK
0101 DFC0 NMI RMB 2 ; USER NMI VECTOR
0102 DFC2 SWI3 RMB 2 ; SOFTWARE INTERRUPT VECTOR #3
0103 DFC4 SWI2 RMB 2 ; SOFTWARE INTERRUPT VECTOR #2
0104 DFC6 FIRQ RMB 2 ; FAST INTERRUPT VECTOR
0105 DFC8 IRQ RMB 2 ; INTERRUPT VECTOR
0106 DFCA SWI RMB 2 ; SOFTWARE INTERRUPT VECTOR
0107 DFCC SVCVO RMB 2 ; SUPERVISOR CALL VECTOR ORGIN
0108 DFCE SVCVL RMB 2 ; SUPERVISOR CALL VECTOR LIMIT
0109 IFD DATOPT
0110 LRARAM RMB 16 ; LRA ADDRESSES
0111 ENDIF DATOPT
0111 ENDIF DATOPT
0112 DFD0 CPORT RMB 2 ; RE-VECTORABLE CONTROL PORT
0113 DFD2 ECHO RMB 1 ; ECHO FLAG
0114 DFD3 BPTBL RMB 24 ; BREAKPOINT TABLE BASE ADDR
0115 IFD TRAOPT
0116 NMISAV RMB 2 ; NMI Jump Vector Backup
0117 TRACNT RMB 2 ; Trace Count
0118 ENDIF TRAOPT
0118 ENDIF TRAOPT
0119 IFD VDUOPT
0120 *
0121 **************************************************
0122 * VDU8 DISPLAY DRIVER VARIABLES *
0123 **************************************************
0124 *
0125 **** ALWAYS KEEP COLADX AND ROWADX TOGETHER ******
0126 COLADX RMB 1 ; CURSOR COLUMN
0127 ROWADX RMB 1 ; CURSOR ROW
0128 **************************************************
0129 *
0130 NEWROW RMB 1 ; NEW ROW TEMP FOR ESCAPE
0131 ESCFLG RMB 1 ; ESCAPE SEQUENCE ACTIVE
0132 ENDIF VDUOPT
0132 ENDIF VDUOPT
0133 IFD DG640OPT
0134 *
0135 ***************************************************
0136 * DG640 MEMORY MAPPED DISPLAY DRIVER VARIABLES *
0137 ***************************************************
0138 *
0139 ***** ALWAYS KEEP THESE TWO BYTES TOGETHER *****
0140 COLADX RMB 1 ; CURSOR COLUMN
0141 ROWADX RMB 1 ; CURSOR ROW
0142 *************************************************
0143 CURSOR RMB 2 ; ABSOLUTE SCREEN ADDRESS
0144 NEWROW RMB 1 ; NEW ROW TEMP FOR ESCAPE
0145 ESCFLG RMB 1 ; ESCAPE SEQUENCE ACTIVE
0146 ENDIF DG640OPT
0146 ENDIF DG640OPT
0147 *
0148 *
0149 ***************************************************
0150 * START OF ROM *
0151 ***************************************************
0152 *
0153 F800 ORG MONROM
0154 F800 F8 14 FDB MONITOR
0155 F802 F8 48 FDB NEXTCMD
0156 F804 FC 04 FDB INCH
0157 F806 FB FE FDB INCHE
0158 F808 FC 13 FDB INCHEK
0159 F80A FC 21 FDB OUTCH
0160 F80C FA F6 FDB PDATA
0161 F80E FA 85 FDB PCRLF
0162 F810 FA 81 FDB PSTRNG
0163 F812 FC F9 FDB LRA
0164 *
0165 IFD ADSOPT
0166 FDB PCHK ; CHECK FOR PRINTER INPUT
0167 FDB PINIZ ; INITIATE PRINTER
0168 FDB POUTCH ; OUTPUT CH. TO PRINTER
0169 FDB VINIZ
0170 FDB VOUTCH
0171 FDB ACINIZ
0172 FDB AOUTCH
0173 ENDIF ADSOPT
0173 ENDIF ADSOPT
0174 *
0175 * MONITOR
0176 *
0177 * VECTOR ADDRESS STRING IS.....
0178 * $F8A1-$F8A1-$F8A1-$F8A1-$F8A1-$FAB0-$FFFF-$FFFF
0179 *
0180 F814 8E FC 7C MONITOR LDX #RAMVEC ; POINT TO VECTOR ADDR. STRING
0181 F817 10 8E DF C0 LDY #STACK ; POINT TO RAM VECTOR LOCATION
0182 F81B C6 10 LDB #$10 ; BYTES TO MOVE = 16
0183 F81D A6 80 LOOPA LDA ,X+ ; GET VECTOR BYTE
0184 F81F A7 A0 STA ,Y+ ; PUT VECTORS IN RAM / $DFC0-$DFCF
0185 F821 5A DECB ; SUBTRACT 1 FROM NUMBER OF BYTES TO MOVE
0186 F822 26 F9 BNE LOOPA ; CONTINUE UNTIL ALL VECTORS MOVED
0187 *
0188 * CONTENTS FROM TO FUNCTION
0189 * $F8A1 $FE40 $DFC0 USER-V
0190 * $F8A1 $FE42 $DFC2 SWI3-V
0191 * $F8A1 $FE44 $DFC4 SWI2-V
0192 * $F8A1 $FE46 $DFC6 FIRQ-V
0193 * $F8A1 $FE48 $DFC8 IRQ-V
0194 * $FAB0 $FE4A $DFCA SWI-V
0195 * $FFFF $FE4C $DFCC SVC-VO
0196 * $FFFF $FE4E $DFCE SVC-VL
0197 *
Symbol 'ACIAS' undefined Pass 20198 F824 8E 00 00 LDX #ACIAS
0199 F827 BF DF D0 STX CPORT ; STORE ADDR. IN RAM
0200 F82A 17 01 42 LBSR XBKPNT ; CLEAR OUTSTANDING BREAKPOINTS
0201 F82D C6 0C LDB #12 ; CLEAR 12 BYTES ON STACK
0202 F82F 6F E2 CLRSTK CLR ,-S
0203 F831 5A DECB
0204 F832 26 FB BNE CLRSTK
0205 F834 30 8C DD LEAX MONITOR,PCR ; SET PC TO SBUG-E ENTRY
0206 F837 AF 6A STX 10,S ; ON STACK
0207 F839 86 D0 LDA #$D0 ; PRESET CONDITION CODES ON STACK
0208 F83B A7 E4 STA ,S
0209 F83D 1F 43 TFR S,U
0210 F83F 17 03 F4 LBSR IOINIZ ; INITIALIZE CONTROL PORT
0211 F842 8E FC 8C LDX #MSG1 ; POINT TO MONITOR MESSAGE
0212 F845 17 02 AE LBSR PDATA ; PRINT MSG
0213 *
0214 IFD DATOPT
0215 LDX #LRARAM ; POINT TO LRA RAM STORAGE AREA
0216 CLRA START ; TOTAL AT ZERO
0217 LDB #13 ; TOTAL UP ALL ACTIVE RAM MEMORY
0218 FNDREL TST B,X ; TEST FOR RAM AT NEXT LOC.
0219 BEQ RELPAS ; IF NO RAM GO TO NEXT LOC.
0220 ADDA #4 ; ELSE ADD 4K TO TOTAL
0221 DAA ; ADJ. TOTAL FOR DECIMAL
0222 RELPAS DECB ; SUB. 1 FROM LOCS. TO TEST
0223 BPL FNDREL ; PRINT TOTAL OF RAM
0224 LBSR OUT2H ; OUTPUT HEX BYTE AS ASCII
0225 LDX #MSG2 ; POINT TO MSG 'K' CR/LF + 3 NULS
0226 LBSR PDATA ; PRINT MSG
0227 ENDIF DATOPT
0227 ENDIF DATOPT
0228 *
0229 IFD TRAOPT
0230 LBSR TRAINZ
0231 ENDIF TRAOPT
0231 ENDIF TRAOPT
0232 *
0233 ***** NEXTCMD *****
0234 *
0235 F848 8E FC AD NEXTCMD LDX #MSG3 ; POINT TO MSG ">"
0236 F84B 17 02 33 LBSR PSTRNG ; PRINT MSG
0237 F84E 17 03 B3 LBSR INCH ; GET ONE CHAR. FROM TERMINAL
0238 F851 84 7F ANDA #$7F ; STRIP PARITY FROM CHAR.
0239 F853 81 0D CMPA #$0D ; IS IT CARRIAGE RETURN ?
0240 F855 27 F1 BEQ NEXTCMD ; IF CR THEN GET ANOTHER CHAR.
0241 F857 1F 89 TFR A,B ; PUT CHAR. IN "B" ACCUM.
0242 F859 81 20 CMPA #$20 ; IS IT CONTROL OR DATA CHAR ?
0243 F85B 2C 09 BGE PRTCMD ; IF CMD CHAR IS DATA, PRNT IT
0244 F85D 86 5E LDA #'^ ; ELSE CNTRL CHAR CMD SO...
0245 F85F 17 03 BF LBSR OUTCH ; PRINT "^"
0246 F862 1F 98 TFR B,A ; RECALL CNTRL CMD CHAR
0247 F864 8B 40 ADDA #$40 ; CONVERT IT TO ASCII LETTER
0248 F866 17 03 B8 PRTCMD LBSR OUTCH ; PRNT CMD CHAR
0249 F869 17 03 B3 LBSR OUT1S ; PRNT SPACE
0250 F86C C1 60 CMPB #$60
0251 F86E 2F 02 BLE NXTCH0
0252 F870 C0 20 SUBB #$20
0253 *
0254 ***** DO TABLE LOOKUP *****
0255 * FOR COMMAND FUNCTIONS
0256 *
0257 F872 8E FC 49 NXTCH0 LDX #JMPTAB ; POINT TO JUMP TABLE
0258 F875 E1 80 NXTCHR CMPB ,X+ ; DOES COMMAND MATCH TABLE ENTRY ?
0259 F877 27 0F BEQ JMPCMD ; BRANCH IF MATCH FOUND
0260 F879 30 02 LEAX 2,X ; POINT TO NEXT ENTRY IN TABLE
0261 F87B 8C FC 7C CMPX #TABEND ; REACHED END OF TABLE YET ?
0262 F87E 26 F5 BNE NXTCHR ; IF NOT END, CHECK NEXT ENTRY
0263 F880 8E FC AF LDX #MSG4 ; POINT TO MSG "WHAT?"
0264 F883 17 02 70 LBSR PDATA ; PRINT MSG
0265 F886 20 C0 BRA NEXTCMD ; IF NO MATCH, PRMPT FOR NEW CMD
0266 F888 AD 94 JMPCMD JSR [,X] ; JUMP TO COMMAND ROUTINE
0267 F88A 20 BC BRA NEXTCMD ; PROMPT FOR NEW COMMAND
0268 *
0269 * "G" GO OR CONTINUE
0270 *
0271 F88C 1F 34 GO TFR U,S
0272 F88E 3B RTI RTI
0273 *
0274 ***** "M" MEMORY EXAMINE AND CHANGE *****
0275 *
0276 F88F 17 02 EB MEMCHG LBSR IN1ADR ; INPUT ADDRESS
0277 F892 29 2D BVS CHRTN ; IF NOT HEX, RETURN
0278 F894 1F 12 TFR X,Y ; SAVE ADDR IN "Y"
0279 F896 8E FC B5 MEMC2 LDX #MSG5 ; POINT TO MSG " - "
0280 F899 17 01 E5 LBSR PSTRNG ; PRINT MSG
0281 F89C 1F 21 TFR Y,X ; FETCH ADDRESS
0282 F89E 17 03 25 LBSR OUT4H ; PRINT ADDR IN HEX
0283 F8A1 17 03 7B LBSR OUT1S ; OUTPUT SPACE
0284 F8A4 A6 A4 LDA ,Y ; GET CONTENTS OF CURRENT ADDR.
0285 F8A6 17 03 25 LBSR OUT2H ; OUTPUT CONTENTS IN ASCII
0286 F8A9 17 03 73 LBSR OUT1S ; OUTPUT SPACE
0287 F8AC 17 02 DE LBSR BYTE ; LOOP WAITING FOR OPERATOR INPUT
0288 F8AF 28 11 BVC CHANGE ; IF VALID HEX GO CHANGE MEM. LOC.
0289 F8B1 81 08 CMPA #8 ; IS IT A BACKSPACE (CNTRL H)?
0290 F8B3 27 E1 BEQ MEMC2 ; PROMPT OPERATOR AGAIN
0291 F8B5 81 18 CMPA #$18 ; IS IT A CANCEL (CNTRL X)?
0292 F8B7 27 DD BEQ MEMC2 ; PROMPT OPERATOR AGAIN
0293 F8B9 81 5E CMPA #'^ ; IS IT AN UP ARROW?
0294 F8BB 27 17 BEQ BACK ; DISPLAY PREVIOUS BYTE
0295 F8BD 81 0D CMPA #$D ; IS IT A CR?
0296 F8BF 26 0F BNE FORWRD ; DISPLAY NEXT BYTE
0297 F8C1 39 CHRTN RTS ; EXIT ROUTINE
0298 *
0299 *
0300 F8C2 A7 A4 CHANGE STA ,Y ; CHANGE BYTE IN MEMORY
0301 F8C4 A1 A4 CMPA ,Y ; DID MEMORY BYTE CHANGE?
0302 F8C6 27 08 BEQ FORWRD ; $F972
0303 F8C8 17 03 54 LBSR OUT1S ; OUTPUT SPACE
0304 F8CB 86 3F LDA #'? ; LOAD QUESTION MARK
0305 F8CD 17 03 51 LBSR OUTCH ; PRINT IT
0306 F8D0 31 21 FORWRD LEAY 1,Y ; POINT TO NEXT HIGHER MEM LOCATION
0307 F8D2 20 C2 BRA MEMC2 ; PRINT LOCATION & CONTENTS
0308 F8D4 31 3F BACK LEAY -1,Y ; POINT TO LAST MEM LOCATION
0309 F8D6 20 BE BRA MEMC2 ; PRINT LOCATION & CONTENTS
0310 *
0311 * "S" DISPLAY STACK
0312 * HEX-ASCII DISPLAY OF CURRENT STACK CONTENTS FROM
0313 ** CURRENT STACK POINTER TO INTERNAL STACK LIMIT.
0314 *
0315 F8D8 17 02 22 DISSTK LBSR PRTSP ; PRINT CURRENT STACK POINTER
0316 F8DB 1F 32 TFR U,Y
0317 F8DD 8E DF C0 LDX #STACK ; LOAD INTERNAL STACK AS UPPER LIMIT
0318 F8E0 30 1F LEAX -1,X ; POINT TO CURRENT STACK
0319 F8E2 20 05 BRA MDUMP1 ; ENTER MEMORY DUMP OF STACK CONTENTS
0320 *
0321 * "E" DUMP MEMORY FOR EXAMINE IN HEX AND ASCII
0322 * AFTER CALLING 'IN2ADR' LOWER ADDRESS IN Y-REG.
0323 * UPPER ADDRESS IN X-REG.
0324 * IF HEX ADDRESSES ARE INVALID (V)=1.
0325 *
0326 F8E4 17 02 8B MEMDUMP LBSR IN2ADR ; INPUT ADDRESS BOUNDRIES
0327 F8E7 29 06 BVS EDPRTN ; NEW COMMAND IF ILLEGAL HEX
0328 F8E9 34 20 MDUMP1 PSHS Y ; COMPARE LOWER TO UPPER BOUNDS
0329 F8EB AC E1 CMPX ,S++ ; LOWER BOUNDS > UPPER BOUNDS?
0330 F8ED 24 01 BCC AJDUMP ; IF NOT, DUMP HEX AND ASCII
0331 F8EF 39 EDPRTN RTS ;
0332 *
0333 * ADJUST LOWER AND UPPER ADDRESS LIMITS
0334 * TO EVEN 16 BYTE BOUNDRIES.
0335 *
0336 * IF LOWER ADDR = $4532
0337 * LOWER BOUNDS WILL BE ADJUSTED TO = $4530.
0338 *
0339 * IF UPPER ADDR = $4567
0340 * UPPER BOUNDS WILL BE ADJUSTED TO = $4570.
0341 *
0342 * ENTER WITH LOWER ADDRESS IN X-REG.
0343 * -UPPER ADDRESS ON TOP OF STACK.
0344 *
0345 F8F0 1F 10 AJDUMP TFR X,D ; GET UPPER ADDR IN D-REG
0346 F8F2 C3 00 10 ADDD #$10 ; ADD 16 TO UPPER ADDRESS
0347 F8F5 C4 F0 ANDB #$F0 ; MASK TO EVEN 16 BYTE BOUNDRY
0348 F8F7 34 06 PSHS A,B ; SAVE ON STACK AS UPPER DUMP LIMIT
0349 F8F9 1F 20 TFR Y,D ; $F9A5 GET LOWER ADDRESS IN D-REG
0350 F8FB C4 F0 ANDB #$F0 ; MASK TO EVEN 16 BYTE BOUNDRY
0351 F8FD 1F 01 TFR D,X ; PUT IN X-REG AS LOWER DUMP LIMIT
0352 F8FF AC E4 NXTLIN CMPX ,S ; COMPARE LOWER TO UPPER LIMIT
0353 F901 27 05 BEQ SKPDMP ; IF EQUAL SKIP HEX-ASCII DUMP
0354 F903 17 03 0D LBSR INCHEK ; CHECK FOR INPUT FROM KEYBOARD
0355 F906 27 03 BEQ EDUMP
0356 F908 32 62 SKPDMP LEAS 2,S ; READJUST STACK IF NOT DUMPING
0357 F90A 39 RTS ;
0358 *
0359 * PRINT 16 HEX BYTES FOLLOWED BY 16 ASCII CHARACTERS
0360 * FOR EACH LINE THROUGHOUT ADDRESS LIMITS.
0361 *
0362 F90B 34 10 EDUMP PSHS X ; PUSH LOWER ADDR LIMIT ON STACK
0363 F90D 8E FC B5 LDX #MSG5 ; POINT TO MSG " - "
0364 F910 17 01 6E LBSR PSTRNG ; PRINT MSG
0365 F913 AE E4 LDX ,S ; LOAD LOWER ADDR FROM TOP OF STACK
0366 F915 17 02 AE LBSR OUT4H ; PRINT THE ADDRESS
0367 F918 17 03 02 LBSR OUT2S ; 2 SPACES
0368 F91B C6 10 LDB #$10 ; LOAD COUNT OF 16 BYTES TO DUMP
0369 F91D A6 80 ELOOP LDA ,X+ ; GET FROM MEMORY HEX BYTE TO PRINT
0370 F91F 17 02 AC LBSR OUT2H ; OUTPUT HEX BYTE AS ASCII
0371 F922 17 02 FA LBSR OUT1S ; OUTPUT SPACE
0372 F925 5A DECB ; $F9D1 DECREMENT BYTE COUNT
0373 F926 26 F5 BNE ELOOP ; CONTINUE TIL 16 HEX BYTES PRINTED
0374 *
0375 * PRINT 16 ASCII CHARACTERS
0376 * IF NOT PRINTABLE OR NOT VALID
0377 * ASCII PRINT A PERIOD (.)
0378 F928 17 02 F2 LBSR OUT2S ; 2 SPACES
0379 F92B AE E1 LDX ,S++ ; GET LOW LIMIT FRM STACK - ADJ STACK
0380 F92D C6 10 LDB #$10 ; SET ASCII CHAR TO PRINT = 16
0381 F92F A6 80 EDPASC LDA ,X+ ; GET CHARACTER FROM MEMORY
0382 F931 81 20 CMPA #$20 ; IF LESS THAN $20, NON-PRINTABLE?
0383 F933 25 04 BCS PERIOD ; IF SO, PRINT PERIOD INSTEAD
0384 F935 81 7E CMPA #$7E ; IS IT VALID ASCII?
0385 F937 23 02 BLS PRASC ; IF SO PRINT IT
0386 F939 86 2E PERIOD LDA #'. ; LOAD A PERIOD (.)
0387 F93B 17 02 E3 PRASC LBSR OUTCH ; PRINT ASCII CHARACTER
0388 F93E 5A DECB ; DECREMENT COUNT
0389 F93F 26 EE BNE EDPASC
0390 F941 20 BC BRA NXTLIN
0391 *
0392 ***** "B" SET BREAKPOINT *****
0393 *
0394 F943 17 02 37 BRKPNT LBSR IN1ADR ; GET BREAKPOINT ADDRESS
0395 F946 29 1E BVS EXITBP ; EXIT IF INVALID HEX ADDR.
0396 F948 8C DF C0 CMPX #STACK ; ADDRESS ILLEGAL IF >=$DFC0
0397 F94B 24 1A BCC BPERR ; IF ERROR PRINT (?), EXIT
0398 F94D 34 10 PSHS X ; $FA82 PUSH BP ADDRESS ON STACK
0399 F94F 8E FF FF LDX #$FFFF ; LOAD DUMMY ADDR TO TEST BP TABLE
0400 F952 8D 55 BSR BPTEST ; TEST BP TABLE FOR FREE SPACE
0401 F954 35 10 PULS X ; POP BP ADDRESS FROM STACK
0402 F956 27 0F BEQ BPERR ; (Z) SET, OUT OF BP TABLE SPACE
0403 F958 A6 84 LDA ,X ; GET DATA AT BREAKPOINT ADDRESS
0404 F95A 81 3F CMPA #$3F ; IS IT A SWI?
0405 F95C 27 09 BEQ BPERR ; IF SWI ALREADY, INDICATE ERROR
0406 F95E A7 A0 STA ,Y+ ; SAVE DATA BYTE IN BP TABLE
0407 F960 AF A4 STX ,Y ; SAVE BP ADDRESS IN BP TABLE
0408 F962 86 3F LDA #$3F ; LOAD A SWI ($3F)
0409 F964 A7 84 STA ,X ; SAVE SWI AT BREAKPOINT ADDRESS
0410 F966 39 EXITBP RTS ;
0411 *
0412 * INDICATE ERROR SETTING BREAKPOINT
0413 *
0414 F967 17 02 B5 BPERR LBSR OUT1S ; OUTPUT SPACE
0415 F96A 86 3F LDA #'? ; LOAD (?), INDICATE BREAKPOINT ERROR
0416 F96C 16 02 B2 LBRA OUTCH ; PRINT "?"
0417 *
0418 *** "X" CLEAR OUTSTANDING BREAKPOINTS ***
0419 *
0420 F96F 10 8E DF D3 XBKPNT LDY #BPTBL ; POINT TO BREAKPOINT TABLE
0421 F973 C6 08 LDB #8 ; LOAD BREAKPOINT COUNTER
0422 F975 8D 18 XBPLP BSR RPLSWI ; REMOVE USED ENTRY IN BP TABLE
0423 F977 5A DECB $FAAC ; DECREMENT BP COUNTER
0424 F978 26 FB BNE XBPLP ; END OF BREAKPOINT TABLE?
0425 F97A 39 RTS
0426 *
0427 ***** SWI ENTRY POINT *****
0428 *
0429 F97B 1F 43 SWIE TFR S,U ; TRANSFER STACK TO USER POINTER
0430 F97D AE 4A LDX 10,U ; LOAD PC FROM STACK INTO X-REG
0431 F97F 30 1F LEAX -1,X ; ADJUST ADDR DOWN 1 BYTE.
0432 F981 8D 26 BSR BPTEST ; FIND BREAKPOINT IN BP TABLE
0433 F983 27 04 BEQ REGPR ; IF FOUND, REPLACE DATA AT BP ADDR
0434 F985 AF 4A STX 10,U ; SAVE BREAKPOINT ADDR IN STACK
0435 F987 8D 06 BSR RPLSWI ; GO REPLACE SWI WITH ORIGINAL DATA
0436 F989 17 01 C8 REGPR LBSR REGSTR ; GO PRINT REGISTERS
0437 *
0438 IFD TRAOPT
0439 LDX #0
0440 STX TRACNT
0441 ENDIF TRAOPT
0441 ENDIF TRAOPT
0442 *
0443 F98C 16 FE B9 LBRA NEXTCMD ; GET NEXT COMMAND
0444 *
0445 F98F AE 21 RPLSWI LDX 1,Y ; LOAD BP ADDRESS FROM BP TABLE
0446 F991 8C DF C0 CMPX #STACK ; COMPARE TO TOP AVAILABLE USER MEMORY
0447 F994 24 0A BCC FFSTBL ; GO RESET TABLE ENTRY TO $FF'S
0448 F996 A6 84 LDA ,X ; GET DATA FROM BP ADDRESS
0449 F998 81 3F CMPA #$3F ; IS IT SWI?
0450 F99A 26 04 BNE FFSTBL ; IF NOT, RESET TABLE ENTRY TO $FF'S
0451 F99C A6 A4 LDA ,Y ; GET ORIGINAL DATA FROM BP TABLE
0452 F99E A7 84 STA ,X ; $FAD3 RESTORE DATA AT BP ADDRESS
0453 F9A0 86 FF FFSTBL LDA #$FF ; LOAD $FF IN A-ACC
0454 F9A2 A7 A0 STA ,Y+ ; RESET BREAKPOINT TABLE DATA TO $FF'S
0455 F9A4 A7 A0 STA ,Y+ ; RESET BREAKPOINT TABLE ADDR TO $FF'S
0456 F9A6 A7 A0 STA ,Y+
0457 F9A8 39 RTS
0458 *
0459 ** SEARCH BREAKPOINT TABLE FOR MATCH **
0460 *
0461 F9A9 10 8E DF D3 BPTEST LDY #BPTBL ; POINT TO BREAKPOINT TABLE
0462 F9AD C6 08 LDB #8 ; LOAD BREAKPOINT COUNTER
0463 F9AF A6 A0 FNDBP LDA ,Y+ ; LOAD DATA BYTE
0464 F9B1 AC A1 CMPX ,Y++ ; COMPARE ADDRESS, IS IT SAME?
0465 F9B3 27 04 BEQ BPADJ ; IF SO, ADJUST POINTER FOR TABLE ENTRY
0466 F9B5 5A DECB ; IF NOT, DECREMENT BREAKPOINT COUNTER
0467 F9B6 26 F7 BNE FNDBP ; AND LOOK FOR NEXT POSSIBLE MATCH
0468 F9B8 39 RTS ;
0469 *
0470 *
0471 F9B9 31 3D BPADJ LEAY -3,Y ; MOVE POINTER TO BEGIN OF BP ENTRY
0472 F9BB 39 RTS
0473 *
0474 IFD TRAOPT
0475 *
0476 ** TRACE from address AAAA BB bytes
0477 *
0478 TRACE LBSR ALTPC1 ; SET UP NEW PC
0479 BVS TREXIT ; ADDRESS ERROR, EXIT
0480 LBSR OUT1S
0481 LBSR IN1ADR ; Fetch Byte Count
0482 BVS TREXIT ; Byte Count error, EXIT
0483 STX TRACNT
0484 *
0485 LDX NMI ; Save NMI Vector
0486 STX NMISAV
0487 LDX #NMIE ; Set up NMI for Tracing
0488 STX NMI
0489 LBSR TRAINZ ; Initialise Hardware
0490 BRA TRACEG ; Start Trace
0491 TREXIT RTS
0492 *
0493 * CRA0 = 0 CA1 IRQ DISAB, CRA0 = 1 CA1 IRQ ENAB
0494 * CRA1 = 1 CA1 Rising edge IRQ
0495 * CRA2 = 0 TADATA = Data Direction, CRA2 = 1 TADATA = I/O Register
0496 * CRA3 = 0 CA2 = 0 output, CRA3 = 1 CA2 = 1
0497 * CRA4 = 1 ] CA2 = Set/Reset output
0498 * CRA5 = 1 ]
0499 * CRA6 = X CA2 Input Interrupt Flag
0500 * CRA7 = X CA1 Interrupt Flag
0501 *
0502 * CRB0 = 0 CB1 IRQ DISAB, CRB0 = 1 CA1 IRQ ENAB
0503 * CRB1 = 1 CB1 Rising edge IRQ
0504 * CRB2 = 0 TBDATA = Data Direction, CRB2 = 1 TBDATA = I/O Register
0505 * CRB3 = 0 CB2 = 0 output, CRB3 = 1 CB2 = 1
0506 * CRB4 = 1 ] CB2 = Set/Reset output
0507 * CRB5 = 1 ]
0508 * CRB6 = X CB2 Input Interrupt Flag
0509 * CRB7 = X CB1 Interrupt Flag
0510 *
0511 *
0512 ** TRACE NMI ENTRY POINT
0513 *
0514 NMIE TFR S,U
0515 LDA #$36 ; Disable Interrupt, CA2 Low
0516 STA TACTRL
0517 LDA TADATA ; Clear Interrupt flag by reading data port
0518 *
0519 LBSR REGSTR ; DUMP REGISTERS
0520 *
0521 LDX 10,U ; TEST IF NEXT INSTRUCTION IS A SWI
0522 LDA ,X
0523 CMPA #$3F
0524 BEQ TRACEX ; EXIT ON SWI
0525 *
0526 LDX TRACNT ; CHECK IF TRACE COUNT EXPIRED
0527 BEQ TRACEX ; YES, GO BACK TO THE MONITOR
0528 LEAX -1,X ; ECREMENT TRACE COUNT
0529 STX TRACNT
0530 *
0531 ** TRACE GO (RESUME SINGLE STEP)
0532 *
0533 TRACEG TFR U,S ; SET UP PROGRAM STACK POINTER
0534 LDA #TRADEL ; SET UP TIMER DELAY (NUMB CYCLES FOR RTI+1)
0535 STA TADATA
0536 LDA #$36 ; LOAD STROBE LOW
0537 STA TACTRL
0538 LDA TADATA ; CLEAR INTERRUPT
0539 LDA #$36 ; RELEASE RESET
0540 STA TBCTRL
0541 LDA #$3F ; RELEASE LOAD, ENABLE CA1 NMI, CA1 RISING EDGE
0542 STA TACTRL
0543 RTI ; GO EXECUTE INSTRUCTION
0544 *
0545 TRACEX LDX NMISAV ; Restore NMI vector
0546 STX NMI
0547 LBRA NEXTCMD ; Jump back to the command loop.
0548 *
0549 ** TRACE HARDWARE INITIALISATION
0550 *
0551 TRAINZ LDA #$32 ; SELECT DDRA, CA2 LOW, NMI DISABLED
0552 STA TACTRL
0553 LDA #$3A ; SELECT DDRB, CB2 HIGH, FIRQ DISABLED
0554 STA TBCTRL
0555 LDA #$FF ; PORTA = OUTPUT
0556 STA TADATA
0557 LDA #$00 ; PORTB = INPUT
0558 STA TBDATA
0559 LDA #$36 ; SELECT OUTPUT REGISTER A, CA2 LOW
0560 STA TACTRL
0561 LDA #$3E ; SELECT OUTPUT REGISTER B, CB2 HIGH
0562 STA TBCTRL
0563 RTS
0564 *
0565 ENDIF TRAOPT
0565 ENDIF TRAOPT
0566 IFD MFDCOPT
0567 *
0568 ** "U" MINI DISK BOOT
0569 *
0570 MINBOOT TST CMDFDC
0571 CLR DRVFDC
0572 LDX #$0000
0573 LOOP LEAX $01,X
0574 CMPX #$0000
0575 BNE LOOP
0576 LDA #$0F
0577 STA CMDFDC
0578 BSR DELAY
0579 LOOP1 LDB CMDFDC
0580 BITB #$01
0581 BNE LOOP1
0582 LDA #$01
0583 STA SECFDC
0584 BSR DELAY
0585 LDA #$8C
0586 STA CMDFDC
0587 BSR DELAY
0588 LDX #$C000
0589 BRA LOOP3
0590 LOOP2 BITB #$02
0591 BEQ LOOP3
0592 LDA DATFDC
0593 STA ,X+
0594 LOOP3 LDB CMDFDC
0595 BITB #$01
0596 BNE LOOP2
0597 BITB #$2C
0598 BEQ LOOP4
0599 RTS
0600 *
0601 LOOP4 LDX #$C000
0602 STX $0A,U
0603 TFR U,S
0604 RTI
0605 *
0606 DELAY LDB #$04
0607 LOOP5 DECB
0608 BNE LOOP5
0609 RTS
0610 ENDIF MFDCOPT
0610 ENDIF MFDCOPT
0611 *
0612 IFD DMAFOPT
0613 *
0614 *** "D" DISK BOOT FOR DMAF2 ***
0615 *
0616 DBOOT LDA #$DE
0617 STA DRVREG
0618 LDA #$FF
0619 STA PRIREG ; $FAF8
0620 STA CCREG
0621 STA AAAREG
0622 STA BBBREG
0623 TST CCREG
0624 LDA #$D8
0625 STA COMREG
0626 LBSR DLY
0627 DBOOT0 LDA COMREG
0628 BMI DBOOT0
0629 LDA #$09
0630 STA COMREG
0631 LBSR DLY
0632 *
0633 DISKWT LDA COMREG ; FETCH DRIVE STATUS
0634 BITA #1 ; TEST BUSY BIT
0635 BNE DISKWT ; LOOP UNTIL NOT BUSY
0636 *
0637 BITA #$10
0638 BNE DBOOT
0639 *
0640 LDX #$C000 ; LOGICAL ADDR. = $C000
0641 BSR LRA ; GET 20 BIT PHYSICAL ADDR. OF LOG. ADDR.
0642 ORA #$10
0643 STA CCCREG
0644 TFR X,D
0645 COMA ;
0646 COMB ;
0647 STD ADDREG
0648 LDX #$FEFF ; LOAD DMA BYTE COUNT = $100
0649 STX CNTREG ; STORE IN COUNT REGISTER
0650 LDA #$FF ; LOAD THE CHANNEL REGISTER
0651 STA CCREG
0652 LDA #$FE ; SET CHANNEL 0
0653 STA PRIREG
0654 LDA #1 ; SET SECTOR TO "1"
0655 STA SECREG ; ISSUE COMMAND
0656 LDA #$8C ; SET SINGLE SECTOR READ
0657 STA COMREG ; ISSUE COMMAND
0658 BSR DLY
0659 *
0660 * THE FOLLOWING CODE TESTS THE STATUS OF THE
0661 * CHANNEL CONTROL REGISTER. IF "D7" IS NOT
0662 * ZERO THEN IT WILL LOOP WAITING FOR "D7"
0663 * TO GO TO ZERO. IF AFTER 65,536 TRIES IT
0664 * IS STILL A ONE THE BOOT OPERATION WILL
0665 * BE STARTED OVER FROM THE BEGINING.
0666 *
0667 CLRB ;
0668 DBOOT1 PSHS B ; $FB55
0669 CLRB ;
0670 DBOOT2 TST CCREG
0671 BPL DBOOT3
0672 DECB ;
0673 BNE DBOOT2
0674 PULS B
0675 DECB
0676 BNE DBOOT1
0677 BRA DBOOT
0678 DBOOT3 PULS B
0679 LDA COMREG
0680 BITA #$1C
0681 BEQ DBOOT4
0682 RTS ;
0683 *
0684 *
0685 DBOOT4 LDB #$DE
0686 STB DRVREG
0687 LDX #$C000
0688 STX 10,U
0689 TFR U,S ; $FB7B
0690 RTI ;
0691 ENDIF DMAFOPT
0691 ENDIF DMAFOPT
0692 *
0693 IFD CF8OPT
0694 *
0695 * COMPACT FLASH BOOT
0696 *
0697 CFBOOT BSR WAITRDY
0698 LDA #HEADLBA
0699 STA CF_HEAD
0700 BSR WAITRDY
0701 LDA #FEAT8BIT
0702 STA CF_FEATURE
0703 LDA #CMDFEATURE
0704 STA CF_COMAND
0705 BSR WAITRDY
0706 *
0707 * READ SECTORS FROM CF
0708 *
0709 CFREAD LDA #$01
0710 STA CF_SECCNT
0711 CLRA
0712 STA CF_SECNUM
0713 STA CF_CYLLO
0714 STA CF_CYLHI
0715 *
0716 LDA #CMDREAD ; IDE READ MULTIPLE
0717 STA CF_COMAND
0718 BSR WAITRDY
0719 LDX #$C000
0720 *
0721 * READ LOOP
0722 *
0723 RDLOOP BSR WAITDRQ
0724 LDA CF_DATA
0725 STA ,X+
0726 CMPX #$C200
0727 BNE RDLOOP
0728 *
0729 LDX #$C000
0730 STX $0A,U
0731 TFR U,S
0732 RTI
0733 *
0734 * WAIT UNTIL READY
0735 *
0736 WAITRDY LDA CF_STATUS
0737 BITA #BUSY
0738 BNE WAITRDY
0739 LDA CF_STATUS
0740 BITA #DRDY
0741 BEQ WAITRDY
0742 RTS
0743 *
0744 * WAIT FOR DATA REQUEST
0745 *
0746 WAITDRQ LDA CF_STATUS
0747 BITA #DRQ
0748 BEQ WAITDRQ
0749 RTS
0750 ENDIF CF8OPT
0750 ENDIF CF8OPT
0751 *
0752 IFD IDEOPT
0753 *
0754 * XESS 16 BIT IDE BOOT
0755 *
0756 IDEBOOT LDD #AUXRESET
0757 STD CF_AUX
0758 LDD #AUXRSTREL
0759 STD CF_AUX
0760 LDD #HEADLBA
0761 STD CF_HEAD
0762 BSR WAITRDY
0763 *
0764 * READ SECTORS FROM CF
0765 *
0766 LDD #$01
0767 STD CF_SECCNT
0768 CLRB
0769 STD CF_SECNUM
0770 STD CF_CYLLO
0771 STD CF_CYLHI
0772 *
0773 LDB #CMDREAD ; IDE READ MULTIPLE
0774 STD CF_COMAND
0775 BSR WAITRDY
0776 LDX #$C000
0777 *
0778 * READ LOOP
0779 *
0780 RDLOOP BSR WAITDRQ
0781 LDD CF_DATA
0782 STB ,X+
0783 CMPX #$C100
0784 BNE RDLOOP
0785 *
0786 LDX #$C000
0787 STX $0A,U
0788 TFR U,S
0789 RTI
0790 *
0791 * WAIT UNTIL READY
0792 *
0793 WAITRDY LDD CF_STATUS
0794 BITB #BUSY
0795 BNE WAITRDY
0796 LDD CF_STATUS
0797 BITB #DRDY
0798 BEQ WAITRDY
0799 RTS
0800 *
0801 * WAIT FOR DATA REQUEST
0802 *
0803 WAITDRQ LDD CF_STATUS
0804 BITB #DRQ
0805 BEQ WAITDRQ
0806 RTS
0807 ENDIF IDEOPT
0807 ENDIF IDEOPT
0808 *
0809 IFD RTCOPT
0810 *
0811 * CLOCK INTER FACE UTILITY
0812 *
0813 * TIME <Hours> <Minuits> <Seconds>
0814 * If no argument is specified, the current time
0815 * will be displayed.
0816 *
0817 * READ A REGISTER FROM THE COUNTER.
0818 * The X Index rgister points to the register
0819 * to be read. The Status Register is checked
0820 * before and after the register is read before
0821 * returning a value in accumulator A
0822 *
0823 RDCLK TST CLKSTA
0824 BNE RDCLK
0825 RDCLK1 LDA 0,X
0826 TST CLKSTA
0827 BNE RDCLK1
0828 RTS
0829 *
0830 * MAIN PROGRAM:
0831 *
0832 TIMSET LDX #COUNTR ; POINT TO TIMER
0833 LBSR BYTE ; READ HOURS
0834 BVS SHOWTM ; NO ARG, DISP TIME
0835 STA HOUR,X
0836 LBSR OUT1S
0837 LBSR BYTE ; READ MINUITES
0838 BVS SHOWTM
0839 STA MINUIT,X
0840 LBSR OUT1S
0841 LBSR BYTE ; SECONDS.
0842 BVS SHOWTM
0843 STA SECOND,X
0844 *
0845 * DISPLAY CURRENT TIME
0846 *
0847 SHOWTM LBSR PCRLF
0848 LDX #COUNTR+HOUR
0849 LDB #3
0850 SHOWLP BSR RDCLK
0851 LBSR OUT2H
0852 LDA #':
0853 LBSR OUTCH
0854 LEAX -1,X
0855 DECB
0856 BNE SHOWLP
0857 RTS
0858 *
0859 * INITIATE CLOCK.
0860 * MASK INTERRUPTS.
0861 *
0862 CLKINZ CLR CINTCR ; MASK ALL INTERRUPTS
0863 TST CINTSR ; CLEAR ANY INTERRUPTS
0864 RTS
0865 ENDIF RTCOPT
0865 ENDIF RTCOPT
0866 IFD DATOPT
0867 *
0868 ***** LRA LOAD REAL ADDRESS *****
0869 *
0870 * THE FOLLOWING CODE LOADS THE 20-BIT
0871 * PHYSICAL ADDRESS OF A MEMORY BYTE
0872 * INTO THE "A" AND "X" REGISTERS. THIS
0873 * ROUTINE IS ENTERED WITH THE LOGICAL
0874 * ADDRESS OF A MEMORY BYTE IN THE "IX"
0875 * REGISTER. EXIT IS MADE WITH THE HIGH-
0876 * ORDER FOUR BITS OF THE 20-BIT PHYSICAL
0877 * ADDRESS IN THE "A" REGISTER, AND THE
0878 * LOW-ORDER 16-BITS OF THE 20-BIT
0879 * PHYSICAL ADDRESS IN THE "IX" REGISTER.
0880 * ALL OTHER REGISTERS ARE PRESERVED.
0881 * THIS ROUTINE IS REQUIRED SINCE THE
0882 * DMAF1 AND DMAF2 DISK CONTROLLERS MUST
0883 * PRESENT PHYSICAL ADDRESSES ON THE
0884 * SYSTEM BUS.
0885 *
0886 LRA PSHS A,B,X,Y ; PUSH REGISTERS ON STACK
0887 LDA 2,S ; GET MSB LOGICAL ADDR FRM X REG ON STACK
0888 LSRA ;
0889 LSRA ; ADJ FOR INDEXED INTO
0890 LSRA ; CORRESPONDING LOCATION
0891 LSRA ; IN LRA TABLE
0892 LDY #LRARAM ; LOAD LRA TABLE BASE ADDRESS
0893 LDB A,Y ; GET PHYSICAL ADDR. DATA FROM LRA TABLE
0894 LSRB ; ADJ. REAL ADDR. TO REFLECT EXTENDED
0895 LSRB ; PHYSICAL ADDRESS.
0896 LSRB ; EXTENDED MS 4-BITS ARE RETURNED
0897 LSRB ; IN THE "A" ACCUMULATOR
0898 STB ,S ; MS 4 BITS IN A ACCUM. STORED ON STACK
0899 LDB A,Y ; LOAD REAL ADDRESS DATA FROM LRA TABLE
0900 COMB ; COMP TO ADJ FOR PHYSICAL ADDR. IN X REG
0901 ASLB ; ADJ DATA FOR RELOCATION IN X REG
0902 ASLB ;
0903 ASLB ; $FB97
0904 ASLB ;
0905 LDA 2,S ; GET MS BYTE OF LOGICAL ADDR.
0906 ANDA #$0F ; MASK MS NIBBLE OF LOGICAL ADDRESS
0907 STA 2,S ; SAVE IT IN X REG ON STACK
0908 ORB 2,S ; SET MS BYTE IN X REG TO ADJ PHY ADDR.
0909 *
0910 * PLUS LS NIBBLE OF LOGICAL ADDRESS
0911 *
0912 STB 2,S ; SAVE AS LS 16 BITS OF PHY ADDR IN X REG ON STACK
0913 PULS A,B,X,Y,PC ; POP REGS. FROM STACK
0914 ENDIF DATOPT
0914 ENDIF DATOPT
0915 *
0916 * DELAY LOOP
0917 *
0918 F9BC 34 04 DLY PSHS B ; SAVE CONTENTS OF "B"
0919 F9BE C6 20 LDB #$20 ; GET LOOP DELAY VALUE
0920 F9C0 5A SUB1 DECB ; SUBTRACT ONE FROM VALUE
0921 F9C1 26 FD BNE SUB1 ; LOOP UNTIL ZERO
0922 F9C3 35 84 PULS B,PC ; RESTORE CONTENTS OF "B"
0923 * RTS ;
0924 *
0925 ***** "L" LOAD MIKBUG TAPE *****
0926 *
0927 F9C5 BD FC 36 LOAD JSR ACINIZ
0928 F9C8 86 11 LDA #$11 ; LOAD 'DC1' CASS. READ ON CODE
0929 F9CA 17 02 54 LBSR OUTCH ; OUTPUT IT TO TERMINAL PORT
0930 F9CD 7F DF D2 CLR ECHO ; TURN OFF ECHO FLAG
0931 F9D0 17 02 26 LOAD1 LBSR ECHON ; INPUT 8 BIT BYTE WITH NO ECHO
0932 F9D3 81 53 LOAD2 CMPA #'S ; IS IT AN "S", START CHARACTER ?
0933 F9D5 26 F9 BNE LOAD1 ; IF NOT, DISCARD AND GET NEXT CHAR.
0934 F9D7 17 02 1F LBSR ECHON
0935 F9DA 81 39 CMPA #'9 ; IS IT A "9" , END OF FILE CHAR ?
0936 F9DC 27 3D BEQ LOAD21 ; IF SO, EXIT LOAD
0937 F9DE 81 31 CMPA #'1 ; IS IT A "1" , FILE LOAD CHAR ?
0938 F9E0 26 F1 BNE LOAD2 ; IF NOT, LOOK FOR START CHAR.
0939 F9E2 17 01 A8 LBSR BYTE ; INPUT BYTE COUNT
0940 F9E5 34 02 PSHS A ; PUSH COUNT ON STACK
0941 F9E7 29 26 BVS LODERR ; (V) C-CODE SET, ILLEGAL HEX
0942 F9E9 17 01 91 LBSR IN1ADR ; INPUT LOAD ADDRESS
0943 F9EC 29 21 BVS LODERR ; (V) C-CODE SET, ADDR NOT HEX
0944 F9EE 34 10 PSHS X ; PUSH ADDR ON STACK
0945 F9F0 E6 E0 LDB ,S+ ; LOAD MSB OF ADDR AS CHECKSUM BYTE
0946 F9F2 EB E0 ADDB ,S+ ; ADD LSB OF ADDR TO CHECKSUM
0947 F9F4 EB E4 ADDB ,S ; ADD BYTE COUNT BYTE TO CHECKSUM
0948 F9F6 6A E4 DEC ,S ; $FC37 DECREMENT BYTE COUNT 2 TO BYPASS
0949 F9F8 6A E4 DEC ,S ; ADDRESS BYTES.
0950 F9FA 34 04 LOAD10 PSHS B ; PUSH CHECKSUM ON STACK
0951 F9FC 17 01 8E LBSR BYTE ; INPUT DATA BYTE (2 HEX CHAR)
0952 F9FF 35 04 PULS B ; POP CHECKSUM FROM STACK
0953 FA01 29 0C BVS LODERR ; (V) SET, DATA BYTE NOT HEX
0954 FA03 34 02 PSHS A ; PUSH DATA BYTE ON STACK
0955 FA05 EB E0 ADDB ,S+ ; ADD DATA TO CHECKSUM, AUTO INC STACK
0956 FA07 6A E4 DEC ,S ; DECREMENT BYTE COUNT 1
0957 FA09 27 05 BEQ LOAD16 ; IF BYTE COUNT ZERO, TEST CHECKSUM
0958 FA0B A7 80 STA ,X+ ; SAVE DATA BYTE IN MEMORY
0959 FA0D 20 EB BRA LOAD10 ; GET NEXT DATA BYTE
0960 FA0F 5F LODERR CLRB ; ERROR CONDITION, ZERO CHECKSUM ;
0961 FA10 35 02 LOAD16 PULS A ; ADJUST STACK (REMOVE BYTE COUNT)
0962 FA12 C1 FF CMPB #$FF ; CHECKSUM OK?
0963 FA14 27 BA BEQ LOAD1 ; IF SO, LOAD NEXT LINE
0964 FA16 86 3F LDA #'? ; LOAD (?) ERROR INDICATOR
0965 FA18 17 02 06 LBSR OUTCH ; OUTPUT IT TO TERMINAL
0966 FA1B 73 DF D2 LOAD21 COM ECHO ; TURN ECHO ON
0967 FA1E 86 13 LDA #$13 ; $FC5F LOAD 'DC3' CASS. READ OFF CODE
0968 FA20 16 01 FE LBRA OUTCH ; OUTPUT IT
0969 *
0970 ***** "P" PUNCH MIKBUG TAPE *****
0971 *
0972 FA23 6F E2 PUNCH CLR ,-S ; CLEAR RESERVED BYTE ON STACK
0973 FA25 17 01 4A LBSR IN2ADR ; GET BEGIN AND END ADDRESS
0974 FA28 34 30 PSHS X,Y ; SAVE ADDRESSES ON STACK
0975 FA2A 29 4D BVS PUNEXT ; (V) C-CODE SET, EXIT PUNCH
0976 FA2C AC 62 CMPX 2,S ; COMPARE BEGIN TO END ADDR
0977 FA2E 25 49 BCS PUNEXT ; IF BEGIN GREATER THAN END, EXIT PUNCH
0978 FA30 30 01 LEAX 1,X ; INCREMENT END ADDRESS
0979 FA32 AF E4 STX ,S ; STORE END ADDR ON STACK
0980 FA34 BD FC 36 JSR ACINIZ
0981 FA37 86 12 LDA #$12 ; LOAD 'DC2' PUNCH ON CODE
0982 FA39 17 01 E5 LBSR OUTCH ; OUTPUT IT TO TERMINAL
0983 FA3C EC E4 PUNCH2 LDD ,S ; LOAD END ADDR IN D-ACC
0984 FA3E A3 62 SUBD 2,S ; SUBTRACT BEGIN FROM END
0985 FA40 27 06 BEQ PUNCH3 ; SAME, PUNCH 32 BYTES DEFAULT
0986 FA42 10 83 00 20 CMPD #$20 ; LESS THAN 32 BYTES?
0987 FA46 23 02 BLS PUNCH4 ; PUNCH THAT MANY BYTES
0988 FA48 C6 20 PUNCH3 LDB #$20 ; LOAD BYTE COUNT OF 32.
0989 FA4A E7 64 PUNCH4 STB 4,S ; STORE ON STACK AS BYTE COUNT
0990 FA4C 8E FC F6 LDX #MSG20 ; POINT TO MSG "S1"
0991 FA4F 17 00 2F LBSR PSTRNG ; PRINT MSG
0992 FA52 CB 03 ADDB #3 ; ADD 3 BYTES TO BYTE COUNT
0993 FA54 1F 98 TFR B,A ; GET BYTE COUNT IN A-ACC TO PUNCH
0994 FA56 17 01 75 LBSR OUT2H ; OUTPUT BYTE COUNT
0995 FA59 AE 62 LDX 2,S ; LOAD BEGIN ADDRESS
0996 FA5B 17 01 68 LBSR OUT4H ; PUNCH ADDRESS
0997 FA5E EB 62 ADDB 2,S ; ADD ADDR MSB TO CHECKSUM
0998 FA60 EB 63 ADDB 3,S ; ADD ADDR LSB TO CHECKSUM
0999 FA62 EB 84 PUNCHL ADDB ,X ; ADD DATA BYTE TO CHECKSUM
1000 FA64 A6 80 LDA ,X+ ; LOAD DATA BYTE TO PUNCH
1001 FA66 17 01 65 LBSR OUT2H ; OUTPUT DATA BYTE
1002 FA69 6A 64 DEC 4,S ; DECREMENT BYTE COUNT
1003 FA6B 26 F5 BNE PUNCHL ; NOT DONE, PUNCH NEXT BYTE
1004 FA6D 53 COMB 1's ; COMPLIMENT CHECKSUM BYTE
1005 FA6E 1F 98 TFR B,A ; GET IT IN A-ACC TO PUNCH
1006 FA70 17 01 5B LBSR OUT2H ; OUTPUT CHECKSUM BYTE
1007 FA73 AF 62 STX 2,S ; SAVE X-REG IN STACK AS NEW PUNCH ADDR
1008 FA75 AC E4 CMPX ,S ; COMPARE IT TO END ADDR
1009 FA77 26 C3 BNE PUNCH2 ; $FCB5 PUNCH NOT DONE, CONT.
1010 FA79 86 14 PUNEXT LDA #$14 ; LOAD 'DC4' PUNCH OFF CODE
1011 FA7B 17 01 A3 LBSR OUTCH ; OUTPUT IT
1012 FA7E 32 65 LEAS 5,S ; READJUST STACK POINTER
1013 FA80 39 RTS ;
1014 *
1015 * PRINT STRING PRECEEDED BY A CR & LF.
1016 *
1017 FA81 8D 02 PSTRNG BSR PCRLF ; PRINT CR/LF
1018 FA83 20 71 BRA PDATA ; PRINT STRING POINTED TO BY IX
1019 *
1020 * PCRLF
1021 *
1022 FA85 34 10 PCRLF PSHS X ; SAVE IX
1023 FA87 8E FC A7 LDX #MSG2+1 ; POINT TO MSG CR/LF + 3 NULS
1024 FA8A 17 00 69 LBSR PDATA ; PRINT MSG
1025 FA8D 35 90 PULS X,PC ; RESTORE IX & RETURN
1026 *
1027 * LONG BRANCHES TO COMMON ROUTINES
1028 *
1029 FA8F 16 01 8D JOUT1S LBRA OUT1S
1030 FA92 16 00 F8 JBYTE LBRA BYTE
1031 FA95 16 00 E5 JIN1ADR LBRA IN1ADR
1032 *
1033 * ALTER "PC" PROGRAM COUNTER
1034 *
1035 FA98 17 00 91 ALTRPC LBSR PRTPC ; $FCF5 PRINT MSG " PC = "
1036 FA9B 8D F2 ALTPC1 BSR JOUT1S ; OUTPUT SPACE
1037 FA9D 8D F6 BSR JIN1ADR ; GET NEW CONTENTS FOR "PC"
1038 FA9F 29 02 BVS ALTPCD ; EXIT IF INVALID HEX
1039 FAA1 AF 4A STX 10,U ; POKE IN NEW CONTENTS
1040 FAA3 39 ALTPCD RTS ;
1041 *
1042 * ALTER "U" USER STACK POINTER
1043 *
1044 FAA4 8D 61 ALTRU BSR PRTUS ; $FCCA PRINT MSG " US = "
1045 FAA6 8D E7 BSR JOUT1S ; OUTPUT SPACE
1046 FAA8 8D EB BSR JIN1ADR ; GET NEW CONTENTS FOR "US"
1047 FAAA 29 02 BVS ALTUD ; EXIT IF INVALID HEX
1048 FAAC AF 48 STX 8,U ; POKE IN NEW CONTENTS
1049 FAAE 39 ALTUD RTS ;
1050 *
1051 * ALTER "Y" INDEX REGISTER
1052 *
1053 FAAF 8D 72 ALTRY BSR PRTIY ; PRINT MSG " IY = "
1054 FAB1 8D DC BSR JOUT1S ; OUTPUT SPACE
1055 FAB3 8D E0 BSR JIN1ADR ; GET NEW CONTENTS FOR "IY"
1056 FAB5 29 02 BVS ALTYD ; EXIT IF INVALID HEX
1057 FAB7 AF 46 STX 6,U ; $F8F0 POKE IN NEW CONTENTS
1058 FAB9 39 ALTYD RTS ;
1059 *
1060 * ALTER "X" INDEX REGISTER
1061 *
1062 FABA 8D 5E ALTRX BSR PRTIX ; $FCE0 PRINT MSG " IX = "
1063 FABC 8D D1 BSR JOUT1S ; OUTPUT SPACE
1064 FABE 8D D5 BSR JIN1ADR
1065 FAC0 29 02 BVS ALTXD
1066 FAC2 AF 44 STX 4,U
1067 FAC4 39 ALTXD RTS ;
1068 *
1069 * ALTER "DP" DIRECT PAGE REGISTER
1070 *
1071 FAC5 8D 49 ALTRDP BSR PRTDP ; $FCD5 PRINT MSG " DP = "
1072 FAC7 8D C6 BSR JOUT1S ; OUTPUT SPACE
1073 FAC9 8D C7 BSR JBYTE ; INPUT BYTE (2 HEX CHAR)
1074 FACB 29 02 BVS ALTDPD
1075 FACD A7 43 STA 3,U
1076 FACF 39 ALTDPD RTS ;
1077 *
1078 * ALTER "B" ACCUMULATOR
1079 *
1080 FAD0 8D 6C ALTRB BSR PRTB ; $FD09 PRINT MSG " B = "
1081 FAD2 8D BB BSR JOUT1S ; OUTPUT SPACE
1082 FAD4 8D BC BSR JBYTE ; INPUT BYTE (2 HEX CHAR)
1083 FAD6 29 02 BVS ALTBD
1084 FAD8 A7 42 STA 2,U
1085 FADA 39 ALTBD RTS ; $F91C
1086 *
1087 * ALTER "A" ACCUMULATOR
1088 *
1089 FADB 8D 58 ALTRA BSR PRTA ; $FCFF RINT MSG " A = "
1090 FADD 8D B0 BSR JOUT1S ; OUTPUT SPACE
1091 FADF 8D B1 BSR JBYTE ; INPUT BYTE (2 HEX CHAR)
1092 FAE1 29 02 BVS ALTAD
1093 FAE3 A7 41 STA 1,U
1094 FAE5 39 ALTAD RTS ;
1095 *
1096 * ALTER "CC" REGISTER
1097 *
1098 FAE6 8D 5F ALTRCC BSR PRTCC ; $FD13 PRINT MSG " CC: "
1099 FAE8 8D A5 BSR JOUT1S ; OUTPUT SPACE
1100 FAEA 8D A6 BSR JBYTE ; INPUT BYTE (2 HEX CHAR)
1101 FAEC 29 04 BVS ALTCCD
1102 FAEE 8A 80 ORA #$80 ; SETS "E" FLAG IN PRINT LIST
1103 FAF0 A7 C4 STA ,U
1104 FAF2 39 ALTCCD RTS ;
1105 *
1106 * PDATA
1107 *
1108 FAF3 17 01 2B PRINT LBSR OUTCH
1109 FAF6 A6 80 PDATA LDA ,X+ ; GET 1st CHAR. TO PRINT
1110 FAF8 81 04 CMPA #4 ; IS IT EOT?
1111 FAFA 26 F7 BNE PRINT ; IF NOT EOT PRINT IT
1112 FAFC 39 RTS ;
1113 *
1114 * PRINT REGISTERS
1115 *
1116 FAFD 8E FC B9 PRTSP LDX #MSG10 ; POINT TO MSG "SP="
1117 FB00 8D F4 BSR PDATA ; PRINT MSG
1118 FB02 1F 31 TFR U,X
1119 FB04 16 00 BF JOUT4H LBRA OUT4H
1120 *
1121 FB07 8E FC C5 PRTUS LDX #MSG12 ; POINT TO MSG "US="
1122 FB0A 8D EA BSR PDATA ; PRINT MSG
1123 FB0C AE 48 LDX 8,U
1124 FB0E 20 F4 BRA JOUT4H
1125 *
1126 FB10 8E FC D7 PRTDP LDX #MSG15 ; POINT TO MSG "DP="
1127 FB13 8D E1 BSR PDATA ; PRINT MSG
1128 FB15 A6 43 LDA 3,U
1129 FB17 16 00 B4 JOUT2H LBRA OUT2H ; OUTPUT HEX BYTE AS ASCII
1130 *
1131 FB1A 8E FC D1 PRTIX LDX #MSG14 ; POINT TO MSG "IX="
1132 FB1D 8D D7 BSR PDATA ; PRINT MSG
1133 FB1F AE 44 LDX 4,U ; $FCE6
1134 FB21 20 E1 BRA JOUT4H
1135 *
1136 FB23 8E FC CB PRTIY LDX #MSG13 ; POINT TO MSG "IY="
1137 FB26 8D CE BSR PDATA ; PRINT MSG
1138 FB28 AE 46 LDX 6,U
1139 FB2A 20 D8 BRA JOUT4H
1140 *
1141 FB2C 8E FC BF PRTPC LDX #MSG11 ; POINT TO MSG "PC="
1142 FB2F 8D C5 BSR PDATA ; PRINT MSG
1143 FB31 AE 4A LDX 10,U
1144 FB33 20 CF BRA JOUT4H
1145 *
1146 FB35 8E FC DD PRTA LDX #MSG16 ; POINT TO MSG "A="
1147 FB38 8D BC BSR PDATA ; PRINT MSG
1148 FB3A A6 41 LDA 1,U
1149 FB3C 20 D9 BRA JOUT2H ; OUTPUT HEX BYTE AS ASCII
1150 *
1151 FB3E 8E FC E2 PRTB LDX #MSG17 ; POINT TO MSG "B="
1152 FB41 8D B3 BSR PDATA ; PRINT MSG
1153 FB43 A6 42 LDA 2,U
1154 FB45 20 D0 BRA JOUT2H ; OUTPUT HEX BYTE AS ASCII
1155 *
1156 FB47 8E FC E7 PRTCC LDX #MSG18 ; POINT TO MSG "CC:"
1157 FB4A 8D AA BSR PDATA ; PRINT MSG
1158 FB4C A6 C4 LDA ,U
1159 FB4E 8E FC EE LDX #MSG19 ; POINT TO MSG "EFHINZVC"
1160 FB51 16 00 90 LBRA BIASCI ; OUTPUT IN BINARY/ASCII FORMAT
1161 *
1162 * "R" DISPLAY REGISTERS
1163 *
1164 FB54 8E FC B5 REGSTR LDX #MSG5 ; POINT TO MSG " - "
1165 FB57 17 FF 27 LBSR PSTRNG ; PRINT MSG
1166 FB5A 8D A1 BSR PRTSP ; $FCBF
1167 FB5C 8D A9 BSR PRTUS ; $FCCA
1168 FB5E 8D B0 BSR PRTDP ; $FCD5
1169 FB60 8D B8 BSR PRTIX ; $FCE0
1170 FB62 8D BF BSR PRTIY ; $FCEB
1171 FB64 8E FC B5 LDX #MSG5 ; POINT TO MSG " - "
1172 FB67 17 FF 17 LBSR PSTRNG ; PRINT MSG
1173 FB6A 8D C0 BSR PRTPC ; $FCF5
1174 FB6C 8D C7 BSR PRTA ; $FCFF
1175 FB6E 8D CE BSR PRTB ; $FD09
1176 FB70 20 D5 BRA PRTCC ; $FD13
1177 *
1178 * THE FOLLOWING ROUTINE LOOPS WAITING FOR THE
1179 * OPERATOR TO INPUT TWO VALID HEX ADDRESSES.
1180 * THE FIRST ADDRESS INPUT IS RETURNED IN "IY".
1181 * THE SECOND IS RETURNED IN "IX". THE "V" BIT
1182 * IN THE C-CODE REG. IS SET IF AN INVALID HEX
1183 * ADDRESS IS INPUT.
1184 *
1185 FB72 8D 09 IN2ADR BSR IN1ADR ; GET FIRST ADDRESS
1186 FB74 29 4D BVS NOTHEX ; EXIT IF NOT VALID HEX
1187 FB76 1F 12 TFR X,Y ; SAVE FIRST ADDR. IN "IY"
1188 FB78 86 2D LDA #'-
1189 FB7A 17 00 A4 LBSR OUTCH ; PRINT " - "
1190 *
1191 * THE FOLLOWING ROUTINE LOOPS WAITING FOR THE
1192 * OPERATOR TO INPUT ONE VALID HEX ADDRESS. THE
1193 * ADDRESS IS RETURNED IN THE "X" REGISTER.
1194 *
1195 FB7D 8D 0E IN1ADR BSR BYTE ; INPUT BYTE (2 HEX CHAR)
1196 FB7F 29 42 BVS NOTHEX ; EXIT IF NOT VALID HEX
1197 FB81 1F 01 TFR D,X
1198 FB83 8D 08 BSR BYTE ; INPUT BYTE (2 HEX CHAR)
1199 FB85 29 3C BVS NOTHEX
1200 FB87 34 10 PSHS X
1201 FB89 A7 61 STA 1,S
1202 FB8B 35 90 PULS X,PC
1203 *
1204 ***** INPUT BYTE (2 HEX CHAR.) *****
1205 *
1206 FB8D 8D 11 BYTE BSR INHEX ; GET HEX LEFT
1207 FB8F 29 32 BVS NOTHEX ; EXIT IF NOT VALID HEX
1208 FB91 48 ASLA ;
1209 FB92 48 ASLA ;
1210 FB93 48 ASLA ; SHIFT INTO LEFT NIBBLE
1211 FB94 48 ASLA ;
1212 FB95 1F 89 TFR A,B ; PUT HEXL IN "B"
1213 FB97 8D 07 BSR INHEX ; GET HEX RIGHT
1214 FB99 29 28 BVS NOTHEX ; EXIT IF NOT VALID HEX
1215 FB9B 34 04 PSHS B ; PUSH HEXL ON STACK
1216 FB9D AB E0 ADDA ,S+ ; ADD HEXL TO HEXR AND ADJ. STK
1217 FB9F 39 RTS ; RETURN WITH HEX L&R IN "A"
1218 *
1219 *
1220 FBA0 8D 57 INHEX BSR ECHON ; INPUT ASCII CHAR.
1221 FBA2 81 30 CMPA #'0 ; IS IT > OR = "0" ?
1222 FBA4 25 1D BCS NOTHEX ; IF LESS IT AIN'T HEX
1223 FBA6 81 39 CMPA #'9 ; IS IT < OR = "9" ?
1224 FBA8 22 03 BHI INHEXA ; IF > MAYBE IT'S ALPHA
1225 FBAA 80 30 SUBA #$30 ; ASCII ADJ. NUMERIC
1226 FBAC 39 RTS ;
1227 *
1228 *
1229 FBAD 81 41 INHEXA CMPA #'A ; IS IT > OR = "A"
1230 FBAF 25 12 BCS NOTHEX ; IF LESS IT AIN'T HEX
1231 FBB1 81 46 CMPA #'F ; IS IT < OR = "F" ?
1232 FBB3 22 03 BHI INHEXL ; IF > IT AIN'T HEX
1233 FBB5 80 37 SUBA #'A-10 ; ($37) ASCII ADJ. ALPHA
1234 FBB7 39 RTS ;
1235 *
1236 FBB8 81 61 INHEXL CMPA #'a ; IS IT > OR = "a"
1237 FBBA 25 07 BCS NOTHEX ; IF LESS IT AIN'T HEX
1238 FBBC 81 66 CMPA #'f ; IS IT < "f"
1239 FBBE 22 03 BHI NOTHEX ; IF > IT AIN'T HEX
1240 FBC0 80 57 SUBA #'a-10 ; ($57) ADJUST TO LOWER CASE
1241 FBC2 39 RTS ;
1242 *
1243 *
1244 FBC3 1A 02 NOTHEX ORCC #2 ; SET (V) FLAG IN C-CODES REGISTER
1245 FBC5 39 RTS ;
1246 *
1247 *
1248 FBC6 34 10 OUT4H PSHS X ; PUSH X-REG. ON THE STACK
1249 FBC8 35 02 PULS A ; POP MS BYTE OF X-REG INTO A-ACC.
1250 FBCA 8D 02 BSR OUTHL ; OUTPUT HEX LEFT
1251 FBCC 35 02 PULS A ; POP LS BYTE OF X-REG INTO A-ACC.
1252 FBCE OUTHL EQU *
1253 FBCE 34 02 OUT2H PSHS A ; SAVE IT BACK ON STACK
1254 FBD0 44 LSRA ; CONVERT UPPER HEX NIBBLE TO ASCII
1255 FBD1 44 LSRA ;
1256 FBD2 44 LSRA ;
1257 FBD3 44 LSRA ;
1258 FBD4 8D 04 BSR XASCII ; PRINT HEX NIBBLE AS ASCII
1259 FBD6 35 02 OUTHR PULS A ; CONVERT LOWER HEX NIBBLE TO ASCII
1260 FBD8 84 0F ANDA #$0F ; STRIP LEFT NIBBLE
1261 FBDA 8B 30 XASCII ADDA #$30 ; ASCII ADJ
1262 FBDC 81 39 CMPA #$39 ; IS IT < OR = "9" ?
1263 FBDE 2F 02 BLE OUTC ; IF LESS, OUTPUT IT
1264 FBE0 8B 07 ADDA #7 ; IF > MAKE ASCII LETTER
1265 FBE2 20 3D OUTC BRA OUTCH ; OUTPUT CHAR
1266 *
1267 * BINARY / ASCII --- THIS ROUTINE
1268 * OUTPUTS A BYTE IN ENHANCED
1269 * BINARY FORMAT. THE ENHANCEMENT
1270 * IS DONE BY SUBSTITUTING ASCII
1271 * LETTERS FOR THE ONES IN THE BYTE.
1272 * THE ASCII ENHANCEMENT LETTERS
1273 * ARE OBTAINED FROM THE STRING
1274 * POINTED TO BY THE INDEX REG. "X".
1275 *
1276 FBE4 34 02 BIASCI PSHS A ; SAVE "A" ON STACK
1277 FBE6 C6 08 LDB #8 ; PRESET LOOP# TO BITS PER BYTE
1278 FBE8 A6 80 OUTBA LDA ,X+ ; GET LETTER FROM STRING
1279 FBEA 68 E4 ASL ,S ; TEST BYTE FOR "1" IN B7
1280 FBEC 25 02 BCS PRTBA ; IF ONE PRINT LETTER
1281 FBEE 86 2D LDA #'- ; IF ZERO PRINT "-"
1282 FBF0 8D 2F PRTBA BSR OUTCH ; PRINT IT
1283 FBF2 8D 2B BSR OUT1S ; PRINT SPACE
1284 FBF4 5A DECB ; SUB 1 FROM #BITS YET TO PRINT
1285 FBF5 26 F1 BNE OUTBA
1286 FBF7 35 82 PULS A,PC
1287 *
1288 IFD EXTOPT
1289 *
1290 * EXTENDED USER COMMANDS
1291 *
1292 USRCMD JMP [MONEXT+EXTCMD]
1293 ENDIF EXTOPT
1293 ENDIF EXTOPT
1294 *
1295 *
1296 FBF9 7D DF D2 ECHON TST ECHO ; IS ECHO REQUIRED ?
1297 FBFC 27 06 BEQ INCH ; ECHO NOT REQ. IF CLEAR
1298 *
1299 * INCHE
1300 *
1301 * GETS CHARACTER FROM TERMINAL AND
1302 * ECHOS SAME. THE CHARACTER IS RETURNED
1303 * IN THE "A" ACCUMULATOR WITH THE PARITY
1304 * BIT MASKED OFF. ALL OTHER REGISTERS
1305 * ARE PRESERVED.
1306 *
1307 FBFE 8D 04 INCHE BSR INCH ; GET CHAR FROM TERMINAL
1308 FC00 84 7F ANDA #$7F ; STRIP PARITY FROM CHAR.
1309 FC02 20 1D BRA OUTCH ; ECHO CHAR TO TERMINAL
1310 *
1311 * INCH
1312 *
1313 * GET CHARACTER FROM TERMINAL. RETURN
1314 * CHARACTER IN "A" ACCUMULATOR AND PRESERVE
1315 * ALL OTHER REGISTERS. THE INPUT CHARACTER
1316 * IS 8 BITS AND IS NOT ECHOED.
1317 *
1318 *
1319 FC04 34 10 INCH PSHS X ; SAVE IX
1320 IFD HFCOPT
1321 LDA #$11 ; SET RTS* LOW, REQUEST FAR END TO TX
1322 STA [CPORT]
1323 ENDIF HFCOPT
1323 ENDIF HFCOPT
1324 FC06 BE DF D0 GETSTA LDX CPORT ; POINT TO TERMINAL PORT
1325 FC09 A6 84 LDA ,X ; FETCH PORT STATUS
1326 FC0B 85 01 BITA #1 ; TEST READY BIT, RDRF ?
1327 IFD PS2OPT
1328 BNE GETST1
1329 LDX #PS2KBD
1330 LDA ,X
1331 BITA #1
1332 ENDIF PS2OPT
1332 ENDIF PS2OPT
1333 FC0D 27 F7 BEQ GETSTA ; IF NOT RDY, THEN TRY AGAIN
1334 FC0F GETST1 EQU *
1335 IFD HFCOPT
1336 LDA #$51 ; SET RTS* HIGH, STOP FAR END FROM TXING, UNTIL NEXT INPUT
1337 STA [CPORT]
1338 ENDIF HFCOPT
1338 ENDIF HFCOPT
1339 FC0F A6 01 LDA 1,X ; FETCH CHAR
1340 FC11 35 90 PULS X,PC ; RESTORE IX
1341 *
1342 * INCHEK
1343 *
1344 * CHECK FOR A CHARACTER AVAILABLE FROM
1345 * THE TERMINAL. THE SERIAL PORT IS CHECKED
1346 * FOR READ READY. ALL REGISTERS ARE
1347 * PRESERVED, AND THE "Z" BIT WILL BE
1348 * CLEAR IF A CHARACTER CAN BE READ.
1349 *
1350 *
1351 FC13 34 02 INCHEK PSHS A ; SAVE A ACCUM
1352 IFD HFCOPT
1353 LDA #$11 ; SET RTS* LOW, REQUEST FAR END TO TX
1354 STA [CPORT]
1355 ENDIF HFCOPT
1355 ENDIF HFCOPT
1356 FC15 A6 9F DF D0 LDA [CPORT] ; FETCH PORT STATUS
1357 FC19 85 01 BITA #1 ; TEST READY BIT, RDRF ?
1358 IFD PS2OPT
1359 BNE INCHEK1
1360 LDA PS2KBD
1361 BITA #1 ; TEST READY BIT< RDRF ?
1362 ENDIF PS2OPT
1362 ENDIF PS2OPT
1363 FC1B 35 82 INCHEK1 PULS A,PC ; RESTORE A ACCUM.
1364 *
1365 FC1D 8D 00 OUT2S BSR OUT1S ; OUTPUT 2 SPACES
1366 FC1F 86 20 OUT1S LDA #$20 ; OUTPUT 1 SPACE
1367 *
1368 *
1369 * OUTCH
1370 *
1371 * OUTPUT CHARACTER TO TERMINAL.
1372 * THE CHAR. TO BE OUTPUT IS
1373 * PASSED IN THE A REGISTER.
1374 * ALL REGISTERS ARE PRESERVED.
1375 *
1376 OUTCH IFD VDUOPT
1377 BSR VOUTCH
1378 ENDIF VDUOPT
1378 ENDIF VDUOPT
1379 IFD DG640OPT
1380 BSR VOUTCH
1381 ENDIF DG640OPT
1381 ENDIF DG640OPT
1382 FC21 34 12 AOUTCH PSHS A,X ; SAVE A ACCUM AND IX
1383 FC23 BE DF D0 LDX CPORT ; GET ADDR. OF TERMINAL
1384 FC26 A6 84 FETSTA LDA ,X ; FETCH PORT STATUS
1385 FC28 85 02 BITA #2 ; TEST TDRE, OK TO XMIT ?
1386 FC2A 27 FA BEQ FETSTA ; IF NOT LOOP UNTIL RDY
1387 FC2C 85 08 BITA #8 ; CLEAR TO SEND ?
1388 FC2E 26 F6 BNE FETSTA ; NO, LOOP UNTIL CLEAR
1389 FC30 35 02 PULS A ; GET CHAR. FOR XMIT
1390 FC32 A7 01 STA 1,X ; XMIT CHAR.
1391 FC34 35 90 PULS X,PC ; RESTORE IX
1392 *
1393 * IO INITIALIZATION
1394 *
1395 FC36 IOINIZ EQU *
1396 IFD VDUOPT
1397 BSR VINIZ
1398 ENDIF VDUOPT
1398 ENDIF VDUOPT
1399 IFD DG640OPT
1400 BSR VINIZ
1401 ENDIF DG640OPT
1401 ENDIF DG640OPT
1402 FC36 BE DF D0 ACINIZ LDX CPORT ; POINT TO CONTROL PORT ADDRESS
1403 FC39 86 03 LDA #3 ; RESET ACIA PORT CODE
1404 FC3B A7 84 STA ,X ; STORE IN CONTROL REGISTER
1405 FC3D 86 51 LDA #$51 ; SET 8 DATA, 2 STOP AN 0 PARITY RTS* HIGH
1406 FC3F A7 84 STA ,X ; STORE IN CONTROL REGISTER
1407 FC41 6D 01 TST 1,X ; ANYTHING IN DATA REGISTER?
1408 FC43 86 FF LDA #$FF ; TURN ON ECHO FLAG
1409 FC45 B7 DF D2 STA ECHO
1410 FC48 39 RTS
1411 *
1412 IFD VDUOPT
1413 *
1414 ***************************************************
1415 * VDU8 ADM3A REGISTER-MAPPED EMULATOR *
1416 * *
1417 * 80 x 25 Characters
1418 *
1419 ***************************************************
1420 *
1421 ***************************************************
1422 * INITIALIZE EMULATOR *
1423 ***************************************************
1424 *
1425 VINIZ LDX #VDU
1426 LDD #0
1427 STD COLADX ; AND ROWADX
1428 STA VDUCOL,X
1429 STB VDUROW,X
1430 STB VDUOFF,X
1431 STD NEWROW ; AND ESCFLG
1432 LDB #$02
1433 STB VDUATT,X
1434 CLR ESCFLG
1435 LDA #$1B ; SEND ESCAPE
1436 BSR VOUTCH
1437 LDA #'Y ; CLEAR TO END OF SCREEN
1438 *
1439 ** VIDEO OUTPUT ROUTINE
1440 *
1441 VOUTCH PSHS A,B,X ; SAVE REGISTERS
1442 LDX #VDU ; POINT TO VDU REGISTERS
1443 *
1444 ** CHECK FOR ESCAPE SEQUENCE
1445 *
1446 TST ESCFLG ; ESCAPE ACTIVE?
1447 BEQ SOROU1 ; BRANCH IF NOT
1448 BSR ESCAPE ; ELSE DO ESCAPE
1449 BRA RETURN ; AND RETURN
1450 *
1451 ** CHECK FOR CONTROL CHARACTERS
1452 *
1453 SOROU1 CMPA #$20 ; CONTROL CODES?
1454 BHS SOROU2
1455 BSR CONTRL ; BRANCH IF SO
1456 BRA RETURN
1457 *
1458 ** OUTPUT TEXT CHARACTER
1459 *
1460 SOROU2 STA VDUCHR,X ; DISPLAY CHARACTER
1461 LBSR NEWCOL ; UPDATE COLUMN
1462 *
1463 ** DISPLAY CURSOR AND RETURN
1464 *
1465 RETURN PULS A,B,X,PC ; RESTORE REGISTERS AND RETURN
1466 *
1467 ***************************************************
1468 * CONTROL CODE HANDLERS *
1469 ***************************************************
1470 *
1471 CONTRL CMPA #$08 ; CTRL H - BACKSPACE ?
1472 BEQ BACKSP
1473 CMPA #$1B ; ESCAPE SEQUENCE?
1474 BEQ SETESC
1475 CMPA #$1A ; CTRL Z - Clear Screen
1476 LBEQ CLRSCR
1477 CMPA #$16 ; CTRL ^ - Home
1478 BEQ HOME
1479 CMPA #$0D ; CTRL M - RETURN?
1480 LBEQ CRETN
1481 CMPA #$0C ; CTRL L - CHAR RIGHT
1482 BEQ CHRIGHT
1483 CMPA #$0B ; CTRL K - MOVE UP ONE LINE
1484 BEQ LINEUP
1485 CMPA #$0A ; CTRL J - LINE FEED
1486 BNE RETESC ; NONE OF THESE, RETURN
1487 *
1488 ***************************************** LINE FEED
1489 *
1490 LINEFD LDD COLADX ; GET CURRENT COLUMN AND ROW
1491 INCB ; BUMP ROW
1492 CMPB #NUMLIN ; SCROLL TIME?
1493 BNE NEWCUR ; POSITION CURSOR IF NOT
1494 LBRA SCROLL ; ELSE SCROLL IT
1495 *
1496 ***************************************** LINE FEED
1497 *
1498 LINEUP LDD COLADX ; GET CURRENT COLUMN AND ROW
1499 TSTB ; AT TOP OF SCREEN ?
1500 BEQ RETESC ; Yes, Ignore
1501 DECB ; No, Decrement ROW
1502 BRA NEWCUR ; POSITION CURSOR
1503 *
1504 *********************************** BACK SPACE
1505 *
1506 BACKSP LDA COLADX
1507 BEQ RETESC ; RETURN
1508 DECA
1509 BRA POSCOL ; POSITION CURSOR
1510 *
1511 *********************************** CURSOR RIGHT
1512 *
1513 CHRIGHT LDA COLADX
1514 INCA
1515 CMPA #LINLEN
1516 BEQ RETESC
1517 BRA POSCOL
1518 *
1519 *********************************** CURSOR RIGHT
1520 *
1521 HOME LDD #0 ; HOME - POSITION TOP OF SCREEN
1522 BRA NEWCUR
1523 *
1524 ***************************************************
1525 * ESCAPE HANDLERS *
1526 ***************************************************
1527 *
1528 ESCAPE LDB ESCFLG ; GET FLAG
1529 CMPB #'= ; SETTING CURSOR?
1530 BEQ ESCCUR ; BRANCH IF SO
1531 CMPA #'Y ; CLEAR TO END OF SCREEN?
1532 BEQ ESCCLS
1533 CMPA #'T ; CLEAR TO END OF LINE?
1534 BEQ ESCCLL
1535 CMPA #'= ; STARTING CURSOR SET?
1536 BNE CLRESC ; BRANCH IF NOT
1537 *
1538 ***************************** START ESCAPE SEQUENCE
1539 *
1540 SETESC STA ESCFLG ; ELSE START CURSORING
1541 RTS ; AND RETURN
1542 *
1543 CLRESC CLR ESCFLG ; NO OTHERS SUPPORTED
1544 RETESC RTS ; SO RETURN
1545 *
1546 ********************************* SET SCREEN CURSOR
1547 *
1548 ESCCUR TST NEWROW ; ROW SET?
1549 BNE ESCCU1 ; BRANCH IF SO
1550 STA NEWROW ; ELSE SET NEW ROW
1551 RTS ; AND RETURN
1552 *
1553 ESCCU1 CLR ESCFLG
1554 SUBA #$20 ; ADJUST COLUMN ADDRESS
1555 CMPA #LINLEN-1 ;CHECK FOR ACCEPTABLE COLUM
1556 BHI RETESC ; NOT OK, DO NOTHING
1557 *
1558 ESCCU2 LDB NEWROW
1559 CLR NEWROW
1560 SUBB #$20 ; ADJUST TO ROW ADDRESS
1561 CMPB #NUMLIN-1 ; CHECK FOR ACCEPTABLE ROW
1562 BHI RETESC ; ELSE RETURN DOING NOTHING
1563 BRA NEWCUR ; GO SET NEW CURSOR IF SO
1564 *
1565 ****************** CLEAR FROM CURSOR TO END OF LINE
1566 *
1567 CLRSCR LDD #0 ; CLEAR FROM TOP OF SCREEN
1568 BSR NEWCUR
1569 ESCCLL LDA COLADX
1570 LDB #$20 ; AND CLEAR CHAR
1571 ESCCL1 STB VDUCHR,X ; DISPLAY TEXT
1572 INCA
1573 STA VDUCOL,X
1574 CMPA #LINLEN ; UNTIL END OF LINE
1575 BNE ESCCL1
1576 CLR ESCFLG
1577 RTS
1578 *
1579 *********************************** CARRIAGE RETURN
1580 *
1581 CRETN CLRA ; SET COLUMN ZERO
1582 POSCOL LDB ROWADX ; GET CURRENT ROW
1583 *
1584 *********** GENERATE NEW CURSOR POSITION AND RETURN
1585 *
1586 NEWCUR STD COLADX ; SAVE NEW ROW AND COLUMN
1587 STA VDUCOL,X ; SET NEW COLUMN
1588 STB VDUROW,X ; SET NEW ROW
1589 RTS ; AND RETURN
1590 *
1591 ********************* UPDATE CURRENT COLUMN AND ROW
1592 *
1593 NEWCOL LDD COLADX ; GET ROW AND COLUMN
1594 INCA ; BUMP COLUMN
1595 CMPA #LINLEN ; ROLL?
1596 BNE NEWCUR ; BRANCH IF NOT
1597 CLRA ; ELSE RESET TO ZERO
1598 INCB ; AND BUMP ROW
1599 CMPB #NUMLIN
1600 BNE NEWCUR
1601 DECB ; BOTTOM ROW
1602 BSR NEWCUR
1603 *
1604 ********************************* SCROLL THE SCREEN
1605 *
1606 SCROLL LDB VDUOFF,X
1607 INCB
1608 CMPB #NUMLIN
1609 BLO SCROL1
1610 CLRB
1611 SCROL1 STB VDUOFF,X
1612 *
1613 **************** CLEAR FROM CURSOR TO END OF SCREEN
1614 *
1615 ESCCLS LDB COLADX ; GET CURSOR
1616 LDA #$20 ; GET A SPACE
1617 ESCCLS1 STB COLADX
1618 STB VDUCOL,X
1619 STA VDUCHR,X
1620 INCB
1621 CMPB #LINLEN
1622 BNE ESCCLS1
1623 *
1624 LDB ROWADX
1625 INCB
1626 CMPB #NUMLIN
1627 BEQ ESCCLS2
1628 STB ROWADX
1629 STB VDUROW,X
1630 CLRB
1631 BRA ESCCLS1
1632 *
1633 ESCCLS2 CLRB
1634 STB COLADX
1635 STB VDUCOL,X
1636 STB ESCFLG
1637 RTS
1638 ENDIF VDUOPT
1638 ENDIF VDUOPT
1639 *
1640 IFD DG640OPT
1641 ***************************************************
1642 * TELEVIDEO-TYPE MEMORY-MAPPED EMULATOR *
1643 * *
1644 * FOR HARD-WIRED MEMORY-MAPPED DISPLAYS USING THE *
1645 * HIGH ORDER BIT OF EACH BYTE FOR REVERSE VIDEO *
1646 * CURSORING (SUCH AS THE THOMAS INSTRUMENTATION *
1647 * 16x64 BOARD). *
1648 ***************************************************
1649 *
1650 ***************************************************
1651 * INITIALIZE EMULATOR *
1652 ***************************************************
1653 *
1654 VINIZ LDX #0
1655 STX COLADX ; AND ROWADX
1656 STX NEWROW ; AND ESCFLG
1657 LDX #SCREEN ; POINT TO SCREEN
1658 STX CURSOR ; SET PROGRAM CURSOR
1659 LDA #$1B ; SEND ESCAPE
1660 BSR VOUTCH
1661 LDA #'Y ; CLEAR TO END OF SCREEN
1662 *
1663 ** VIDEO OUTPUT ROUTINE
1664 *
1665 VOUTCH PSHS A,B,X ; SAVE REGISTERS
1666 *
1667 ** CLEAR CURSOR
1668 *
1669 LDX CURSOR
1670 LDB 0,X
1671 ANDB #$7F
1672 STB 0,X
1673 *
1674 ** CHECK FOR ESCAPE SEQUENCE
1675 *
1676 TST ESCFLG ; ESCAPE ACTIVE?
1677 BEQ SOROU1 ; BRANCH IF NOT
1678 BSR ESCAPE ; ELSE DO ESCAPE
1679 BRA RETURN ; AND RETURN
1680 *
1681 ** CHECK FOR CONTROL CHARACTERS
1682 *
1683 SOROU1 CMPA #$20 ; CONTROL CODES?
1684 BHS SOROU2
1685 BSR CONTRL ; BRANCH IF SO
1686 BRA RETURN
1687 *
1688 ** OUTPUT TEXT CHARACTER
1689 *
1690 SOROU2 LDX CURSOR ; ELSE GET CURSOR
1691 STA 0,X ; DISPLAY CHARACTER
1692 LBSR NEWCOL ; UPDATE COLUMN
1693 *
1694 ** DISPLAY CURSOR AND RETURN
1695 *
1696 RETURN LDX CURSOR ; AND DISPLAY IT
1697 LDB ,X
1698 ORB #$80 ; WITH REVID
1699 STB ,X
1700 PULS A,B,X,PC ; RESTORE REGISTERS AND RETURN
1701 *
1702 ***************************************************
1703 * CONTROL CODE HANDLERS *
1704 ***************************************************
1705 *
1706 CONTRL CMPA #$08 ; CTRL H - BACKSPACE ?
1707 LBEQ BACKSP
1708 CMPA #$1B ; ESCAPE SEQUENCE?
1709 LBEQ SETESC
1710 CMPA #$D ; CTRL M - RETURN?
1711 LBEQ CRETN
1712 CMPA #$0A ; CTRL J - LINE FEED
1713 BNE RETESC ; NONE OF THESE, RETURN
1714 *
1715 ***************************************** LINE FEED
1716 *
1717 LINEFD LDD COLADX ; GET CURRENT COLUMN AND ROW
1718 INCB ; BUMP ROW
1719 CMPB #NUMLIN ; SCROLL TIME?
1720 LBNE NEWCUR ; POSITION CURSOR IF NOT
1721 LBRA SCROLL ; ELSE SCROLL IT
1722 *
1723 ***************************************** LINE FEED
1724 *
1725 LINEUP LDD COLADX ; GET CURRENT COLUMN AND ROW
1726 TSTB ; AT TOP OF SCREEN ?
1727 BEQ RETESC ; YES, RETURN
1728 DECB ; NO, DECREMENT ROW
1729 LBRA NEWCUR ; POSITION CURSOR
1730 *
1731 *********************************** BACK SPACE
1732 *
1733 BACKSP LDA COLADX ; GET CURRENT COLUMN AND ROW
1734 BEQ RETESC ; IF AT TOP LEFT CORNER RETURN
1735 DECA ; OTHERWISE BACK STEP ONE CHARACTER
1736 LBRA POSCOL ; POSITION CURSOR
1737 *
1738 *********************************** CURSOR RIGHT
1739 *
1740 CHRIGHT LDA COLADX ; GET CURRENT COLUMN AND ROW
1741 INCA ; MOVE RIGHT ONE CHARACTER
1742 CMPA #LINLEN ; ARE WE AT THE END OF THE LINE ?
1743 BEQ RETESC ; YES, RETURN
1744 LBRA POSCOL ; NO, POSITION CURSOR
1745 *
1746 ***************************************************
1747 * ESCAPE HANDLERS *
1748 ***************************************************
1749 *
1750 ESCAPE LDB ESCFLG ; ARE WE IN AN ESCAPE SEQUENCE ?
1751 CMPB #'= ; ARE WE SETTING CURSOR?
1752 BEQ ESCCUR ; YES BRANCH TO SET CURSOR
1753 CMPA #'Y ; CLEAR TO END OF SCREEN?
1754 LBEQ ESCCLS ; YES, CLEAR SCREEN
1755 CMPA #'T ; CLEAR TO END OF LINE?
1756 BEQ ESCCLL ; YES, CLEAR LINE
1757 CMPA #'E ; INSERT LINE?
1758 BEQ ESCINL
1759 CMPA #'R ; DELETE LINE?
1760 BEQ ESCDLL
1761 CMPA #'= ; STARTING CURSOR SET?
1762 BNE CLRESC ; BRANCH IF NOT
1763 *
1764 ***************************** START ESCAPE SEQUENCE
1765 *
1766 SETESC STA ESCFLG ; ELSE START CURSORING
1767 RTS ; AND RETURN
1768 *
1769 CLRESC CLR ESCFLG ; NO OTHERS SUPPORTED
1770 RETESC RTS ; SO RETURN
1771 *
1772 ********************************* SET SCREEN CURSOR
1773 *
1774 ESCCUR TST NEWROW ; ROW SET?
1775 BNE ESCCU1 ; BRANCH IF SO
1776 STA NEWROW ; ELSE SET NEW ROW
1777 RTS ; AND RETURN
1778 *
1779 ESCCU1 CLR ESCFLG
1780 SUBA #$20 ; ADJUST COLUMN ADDRESS
1781 CMPA #LINLEN-1 ; CHECK FOR ACCEPTABLE COLUM
1782 BHI RETESC ; NOT OK, DO NOTHING
1783 *
1784 ESCCU2 LDB NEWROW
1785 CLR NEWROW
1786 SUBB #$20 ; ADJUST TO ROW ADDRESS
1787 CMPB #NUMLIN-1 ; CHECK FOR ACCEPTABLE ROW
1788 BHI RETESC ; ELSE RETURN DOING NOTHING
1789 BRA NEWCUR ; GO SET NEW CURSOR IF SO
1790 *
1791 *************************** DELETE LINE FROM SCREEN
1792 *
1793 ESCDLL BSR CRETN ; GO COL. ZERO
1794 LDB ROWADX
1795 CMPB #NUMLIN-1
1796 BEQ SCROL3
1797 BRA SCROL1 ; AND DELETE THIS LINE
1798 *
1799 *************************** INSERT LINE INTO SCREEN
1800 *
1801 ESCINL BSR CRETN ; GO TO COL. ZERO
1802 LDB ROWADX
1803 CMPB #NUMLIN-1
1804 BEQ ESCCLL
1805 *
1806 ** SCROLL SCREEN DOWN FROM CURSOR
1807 *
1808 LDX #SCREEN+SCNLEN-LINLEN
1809 ESCIN0 LDA ,-X
1810 STA LINLEN,X
1811 LDA SCNLEN,X
1812 STA SCNLEN+LINLEN,X
1813 CMPX CURSOR
1814 BNE ESCIN0
1815 *
1816 ****************** CLEAR FROM CURSOR TO END OF LINE
1817 *
1818 ESCCLL LDA COLADX ; GET CURRENT COLUMN
1819 LDX CURSOR ; GET CURSOR
1820 LDB #$20 ; AND CLEAR CHAR
1821 ESCLL1 STB SCNLEN,X ; CLEAR ATTRIBUTE
1822 STB ,X+ ; CLEAR TEXT
1823 INCA
1824 CMPA #LINLEN ; UNTIL END OF LINE
1825 BNE ESCLL1
1826 CLR ESCFLG
1827 RTS
1828 *
1829 *********************************** CARRIAGE RETURN
1830 *
1831 CRETN CLRA ; SET COLUMN ZERO
1832 POSCOL LDB ROWADX ; GET CURRENT ROW
1833 *
1834 *********** GENERATE NEW CURSOR POSITION AND RETURN
1835 *
1836 NEWCUR STD COLADX ; SAVE NEW ROW AND COLUMN
1837 LDA #LINLEN ; ELSE ADD A LINE
1838 MUL ; LINLEN * ROWADX
1839 ADDB COLADX
1840 ADCA #0
1841 ADDD #SCREEN ; ADD SCREEN BASE.
1842 STD CURSOR ; SAVE NEW CURSOR
1843 TFR D,X ; GET CURSOR IN X
1844 RTS ; AND RETURN
1845 *
1846 ********************* UPDATE CURRENT COLUMN AND ROW
1847 *
1848 NEWCOL LDD COLADX ; GET ROW AND COLUMN
1849 INCA ; BUMP COLUMN
1850 CMPA #LINLEN ; ROLL?
1851 BNE NEWCUR ; BRANCH IF NOT
1852 CLRA ; ELSE RESET TO ZERO
1853 INCB ; AND BUMP ROW
1854 CMPB #NUMLIN
1855 BNE NEWCUR
1856 DECB ; BOTTOM ROW
1857 BSR NEWCUR
1858 *
1859 ********************************* SCROLL THE SCREEN
1860 *
1861 SCROLL LDX #SCREEN ; POINT TO SCREEN
1862 SCROL1 LDA SCNLEN+LINLEN,X
1863 STA SCNLEN,X
1864 LDA LINLEN,X ; MOVE TWO BYTES
1865 STA ,X+ ; UP ONE LINE
1866 CMPX #SCREEN+SCNLEN-LINLEN
1867 BNE SCROL1 ; LOOP UNTIL DONE
1868 BRA SCROL3
1869 *
1870 **************** CLEAR FROM CURSOR TO END OF SCREEN
1871 *
1872 ESCCLS LDX CURSOR ; GET CURSOR
1873 SCROL3 LDA #$20 ; GET A SPACE
1874 SCROL2 STA SCNLEN,X ; CLEAR ATTRIBUTES
1875 STA ,X+ ; AND TEXT
1876 CMPX #SCREEN+SCNLEN
1877 BNE SCROL2 ; UNTIL DONE
1878 CLR ESCFLG
1879 RTS
1880 ENDIF DG640OPT
1880 ENDIF DG640OPT
1881 *
1882 IFD PRTOPT
1883 *************************************
1884 *
1885 ** PRINTER DRIVER ROUTINES
1886 *
1887 *************************************
1888 *
1889 ** PINIZ - INITIATE PRINTER PORT
1890 *
1891 PINIZ PSHS B
1892 LDD #DIRMSK*256+$04 ; ACCA=DIRMSK ACCB=$04
1893 STD PADATA ; SET DDR AND SELECT DATA
1894 *
1895 ** RESET PRINTER
1896 *
1897 LDB #PRESET
1898 STB PADATA
1899 RESTLP INCB ; DELAY FOR RESET
1900 BNE RESTLP
1901 STA PADATA ; ACCA=DIRMSK
1902 *
1903 ** INITALIZE PORT B (DATA PORT)
1904 *
1905 LDA #$2A
1906 STA PBCTRL
1907 LDD #$FF2E ; ACCA=$FF ACCB =%00101110
1908 STD PBDATA ; PBDREG PBCTRL
1909 *
1910 ** SELECT 66 LINES/PAGE
1911 *
1912 LDA #$1B
1913 BSR POUTCH
1914 LDA #'C
1915 BSR POUTCH
1916 LDA #66
1917 PULS B
1918 *************************************
1919 *
1920 ** OUTPUT A CHARACTER TO THE PRINTER
1921 *
1922 *************************************
1923 POUTCH PSHS B
1924 LDB PBDATA ; CLEAR INTERRUPT BIT
1925 *
1926 ** WAIT TILL NOT BUSY
1927 *
1928 BUSYLP LDB PADATA
1929 BITB #PERROR
1930 BEQ PEXIT
1931 TSTB
1932 BMI BUSYLP
1933 *
1934 ** NOW OUTPUT CHARACTER
1935 *
1936 STA PBDATA
1937 PEXIT PULS B,PC
1938 *************************************
1939 *
1940 ** PCHK TEST IFD PRINTER READY
1941 *
1942 *************************************
1943 PCHK TST PBCTRL ; TEST STATE OF CRB7
1944 RTS ; SET ON ACKNOWLEDGE
1945 ENDIF PRTOPT
1945 ENDIF PRTOPT
1946 *************************************
1947 *
1948 * MONITOR KEYBOARD COMMAND JUMP TABLE
1949 *
1950 *************************************
1951 *
1952 FC49 JMPTAB EQU *
1953 FC49 01 FCB 1 " ^A "
1954 FC4A FA DB FDB ALTRA
1955 FC4C 02 FCB 2 " ^B "
1956 FC4D FA D0 FDB ALTRB
1957 FC4F 03 FCB 3 " ^C "
1958 FC50 FA E6 FDB ALTRCC
1959 FC52 04 FCB 4 " ^D "
1960 FC53 FA C5 FDB ALTRDP
1961 FC55 10 FCB $10 " ^P "
1962 FC56 FA 98 FDB ALTRPC
1963 FC58 15 FCB $15 " ^U "
1964 FC59 FA A4 FDB ALTRU
1965 FC5B 18 FCB $18 " ^X "
1966 FC5C FA BA FDB ALTRX
1967 FC5E 19 FCB $19 " ^Y "
1968 FC5F FA AF FDB ALTRY
1969 *
1970 FC61 42 FCC 'B'
1971 FC62 F9 43 FDB BRKPNT
1972 FC64 45 FCC 'E'
1973 FC65 F8 E4 FDB MEMDUMP
1974 FC67 47 FCC 'G'
1975 FC68 F8 8C FDB GO
1976 FC6A 4C FCC 'L'
1977 FC6B F9 C5 FDB LOAD
1978 FC6D 50 FCC 'P'
1979 FC6E FA 23 FDB PUNCH
1980 FC70 4D FCC 'M'
1981 FC71 F8 8F FDB MEMCHG
1982 FC73 52 FCC 'R'
1983 FC74 FB 54 FDB REGSTR
1984 FC76 53 FCC 'S'
1985 FC77 F8 D8 FDB DISSTK
1986 FC79 58 FCC 'X'
1987 FC7A F9 6F FDB XBKPNT
1988 IFD MFDCOPT
1989 FCC 'D' ; *** SWTPC USES 'U' FOR MINIBOOT
1990 FDB MINBOOT
1991 ENDIF MFDCOPT
1991 ENDIF MFDCOPT
1992 IFD CF8OPT
1993 FCC 'D' ; *** FPGA 8 BIT USES 'D' FOR CFBOOT
1994 FDB CFBOOT
1995 ENDIF CF8OPT
1995 ENDIF CF8OPT
1996 IFD IDEOPT
1997 FCC 'D' ; *** XESS FPGA 16 BIT IDE USES 'D' FOR IDEBOOT
1998 FDB IDEBOOT
1999 ENDIF IDEOPT
1999 ENDIF IDEOPT
2000 IFD DMAFOPT
2001 FCC 'U' ; *** SWTPC USES 'D' FOR DMAF2 BOOT
2002 FDB DBOOT
2003 ENDIF DMAFOPT
2003 ENDIF DMAFOPT
2004 IFD EXTOPT
2005 FCC 'U' ; *** IF FPGA, 'U' IS FOR USER
2006 FDB USRCMD
2007 ENDIF EXTOPT
2007 ENDIF EXTOPT
2008 IFD RTCOPT
2009 FCC 'T'
2010 FDB TIMSET
2011 ENDIF RTCOPT
2011 ENDIF RTCOPT
2012 IFD TRAOPT
2013 FCC "T"
2014 FDB TRACE
2015 ENDIF TRAOPT
2015 ENDIF TRAOPT
2016 *
2017 FC7C TABEND EQU *
2018 *
2019 * ** 6809 VECTOR ADDRESSES **
2020 *
2021 * FOLLOWING ARE THE ADDRESSES OF THE VECTOR ROUTINES
2022 * FOR THE 6809 PROCESSOR. DURING INITIALIZATION THEY
2023 * ARE RELOCATED TO RAM FROM $DFC0 TO $DFCF. THEY ARE
2024 * RELOCATED TO RAM SO THAT THE USER MAY REVECTOR TO
2025 * HIS OWN ROUTINES IF HE SO DESIRES.
2026 *
2027 *
2028 FC7C F9 7B RAMVEC FDB SWIE ; USER-V
2029 FC7E F8 8E FDB RTI ; SWI3-V
2030 FC80 F8 8E FDB RTI ; SWI2-V
2031 FC82 F8 8E FDB RTI ; FIRQ-V
2032 FC84 F8 8E FDB RTI ; IRQ-V
2033 FC86 F9 7B FDB SWIE ; SWI-V
2034 FC88 FF FF FDB $FFFF ; SVC-VO
2035 FC8A FF FF FDB $FFFF ; SVC-VL
2036 *
2037 * PRINTABLE MESSAGE STRINGS
2038 *
2039 FC8C 0D 0A 00 00 00 MSG1 FCB $D,$A,$0,$0,$0 * 0, CR/LF, 0
2040 FC91 53 79 73 30 39 42 FCC 'Sys09Bug 1.7 FOR '
75 67 20 31 2E 37
20 46 4F 52 20
2041 IFD SWTOPT
2042 FCC 'SWTPC'
2043 ENDIF SWTOPT
2043 ENDIF SWTOPT
2044 IFD ADSOPT
2045 FCC 'ADS6809'
2046 ENDIF ADSOPT
2046 ENDIF ADSOPT
2047 IFD B3SOPT
2048 FCC 'B3-S2+'
2049 ENDIF B3SOPT
2049 ENDIF B3SOPT
2050 IFD B5XOPT
2051 FCC 'B5-X300'
2052 ENDIF B5XOPT
2052 ENDIF B5XOPT
2053 IFD S3SOPT
2054 FCC 'S3STARTER'
2055 ENDIF S3SOPT
2055 ENDIF S3SOPT
2056 IFD S3EOPT
2057 FCC 'S3E'
2058 ENDIF S3EOPT
2058 ENDIF S3EOPT
2059 IFD XESOPT
2060 FCC 'XESS'
2061 ENDIF XESOPT
2061 ENDIF XESOPT
2062 IFD ATLYSOPT
2063 FCC 'Atlys'
2064 ENDIF ATLYSOPT
2064 ENDIF ATLYSOPT
2065 IFD DE270OPT
2066 FCC 'DE2-70'
2067 ENDIF DE270OPT
2067 ENDIF DE270OPT
2068 FCA2 20 2D 20 FCC ' - '
2069 FCA5 04 FCB 4
2070 FCA6 4B 0D 0A 00 00 00 MSG2 FCB 'K,$0D,$0A,$00,$00,$00,$04 ; K,<CR>,<LF>,3 NULS,<EOT>
04
2071 FCAD 3E MSG3 FCC '>'
2072 FCAE 04 FCB 4
2073 FCAF 57 48 41 54 3F MSG4 FCC 'WHAT?'
2074 FCB4 04 FCB 4
2075 FCB5 20 2D 20 MSG5 FCC ' - '
2076 FCB8 04 FCB 4'
2077 FCB9 20 20 53 50 3D MSG10 FCC ' SP='
2078 FCBE 04 FCB 4
2079 FCBF 20 20 50 43 3D MSG11 FCC ' PC='
2080 FCC4 04 FCB 4
2081 FCC5 20 20 55 53 3D MSG12 FCC ' US='
2082 FCCA 04 FCB 4
2083 FCCB 20 20 49 59 3D MSG13 FCC ' IY='
2084 FCD0 04 FCB 4
2085 FCD1 20 20 49 58 3D MSG14 FCC ' IX='
2086 FCD6 04 FCB 4
2087 FCD7 20 20 44 50 3D MSG15 FCC ' DP='
2088 FCDC 04 FCB 4
2089 FCDD 20 20 41 3D MSG16 FCC ' A='
2090 FCE1 04 FCB 4
2091 FCE2 20 20 42 3D MSG17 FCC ' B='
2092 FCE6 04 FCB 4
2093 FCE7 20 20 43 43 3A 20 MSG18 FCC ' CC: '
2094 FCED 04 FCB 4
2095 FCEE 45 46 48 49 4E 5A MSG19 FCC 'EFHINZVC'
56 43
2096 FCF6 53 31 MSG20 FCC 'S1'
2097 FCF8 04 FCB 4
2098 IFD DATOPT
2099 *
2100 * POWER UP/ RESET/ NMI ENTRY POINT
2101 *
2102 ORG $FF00
2103 *
2104 *
2105 START LDX #IC11 ; POINT TO DAT RAM IC11
2106 LDA #$0F ; GET COMPLIMENT OF ZERO
2107 *
2108 *
2109 * INITIALIZE DAT RAM --- LOADS $F-$0 IN LOCATIONS $0-$F
2110 * OF DAT RAM, THUS STORING COMPLEMENT OF MSB OF ADDRESS
2111 * IN THE DAT RAM. THE COMPLEMENT IS REQUIRED BECAUSE THE
2112 * OUTPUT OF IC11, A 74S189, IS THE INVERSE OF THE DATA
2113 * STORED IN IT.
2114 *
2115 *
2116 DATLP STA ,X+ ; STORE & POINT TO NEXT RAM LOCATION
2117 DECA ; GET COMP. VALUE FOR NEXT LOCATION
2118 BNE DATLP ; ALL 16 LOCATIONS INITIALIZED ?
2119 *
2120 * NOTE: IX NOW CONTAINS $0000, DAT RAM IS NO LONGER
2121 * ADDRESSED, AND LOGICAL ADDRESSES NOW EQUAL
2122 * PHYSICAL ADDRESSES.
2123 *
2124 LDA #$F0
2125 STA ,X ; STORE $F0 AT $FFFF
2126 LDX #$D0A0 ; ASSUME RAM TO BE AT $D000-$DFFF
2127 LDY #TSTPAT ; LOAD TEST DATA PATTERN INTO "Y"
2128 TSTRAM LDU ,X ; SAVE DATA FROM TEST LOCATION
2129 STY ,X ; STORE TEST PATTERN AT $D0A0
2130 CMPY ,X ; IS THERE RAM AT THIS LOCATION ?
2131 BEQ CNVADR ; IF MATCH THERE'S RAM, SO SKIP
2132 LEAX -$1000,X ; ELSE POINT 4K LOWER
2133 CMPX #$F0A0 ; DECREMENTED PAST ZER0 YET ?
2134 BNE TSTRAM ; IF NOT CONTINUE TESTING FOR RAM
2135 BRA START ; ELSE START ALL OVER AGAIN
2136 *
2137 *
2138 * THE FOLLOWING CODE STORES THE COMPLEMENT OF
2139 * THE MS CHARACTER OF THE FOUR CHARACTER HEX
2140 * ADDRESS OF THE FIRST 4K BLOCK OF RAM LOCATED
2141 * BY THE ROUTINE "TSTRAM" INTO THE DAT RAM. IT
2142 * IS STORED IN RAM IN THE LOCATION THAT IS
2143 * ADDRESSED WHEN THE PROCESSOR ADDRESS IS $D---,
2144 * THUS IF THE FIRST 4K BLOCK OF RAM IS FOUND
2145 * WHEN TESTING LOCATION $70A0, MEANING THERE
2146 * IS NO RAM PHYSICALLY ADDRESSED IN THE RANGE
2147 * $8000-$DFFF, THEN THE COMPLEMENT OF THE
2148 * "7" IN THE $70A0 WILL BE STORED IN
2149 * THE DAT RAM. THUS WHEN THE PROCESSOR OUTPUTS
2150 * AN ADDRESS OF $D---, THE DAT RAM WILL RESPOND
2151 * BY RECOMPLEMENTING THE "7" AND OUTPUTTING THE
2152 * 7 ONTO THE A12-A15 ADDRESS LINES. THUS THE
2153 * RAM THAT IS PHYSICALLY ADDRESSED AT $7---
2154 * WILL RESPOND AND APPEAR TO THE 6809 THAT IT
2155 * IS AT $D--- SINCE THAT IS THE ADDRESS THE
2156 * 6809 WILL BE OUTPUTING WHEN THAT 4K BLOCK
2157 * OF RAM RESPONDS.
2158 *
2159 *
2160 CNVADR STU ,X ; RESTORE DATA AT TEST LOCATION
2161 TFR X,D ; PUT ADDR. OF PRESENT 4K BLOCK IN D
2162 COMA ; COMPLEMENT MSB OF THAT ADDRESS
2163 LSRA ; PUT MS 4 BITS OF ADDRESS IN
2164 LSRA ; LOCATION D0-D3 TO ALLOW STORING
2165 LSRA ; IT IN THE DYNAMIC ADDRESS
2166 LSRA ; TRANSLATION RAM.
2167 STA $FFFD ; STORE XLATION FACTOR IN DAT "D"
2168 *
2169 LDS #STACK ; INITIALIZE STACK POINTER
2170 *
2171 *
2172 * THE FOLLOWING CHECKS TO FIND THE REAL PHYSICAL ADDRESSES
2173 * OF ALL 4K BLKS OF RAM IN THE SYSTEM. WHEN EACH 4K BLK
2174 * OF RAM IS LOCATED, THE COMPLEMENT OF IT'S REAL ADDRESS
2175 * IS THEN STORED IN A "LOGICAL" TO "REAL" ADDRESS XLATION
2176 * TABLE THAT IS BUILT FROM $DFD0 TO $DFDF. FOR EXAMPLE IF
2177 * THE SYSTEM HAS RAM THAT IS PHYSICALLY LOCATED (WIRED TO
2178 * RESPOND) AT THE HEX LOCATIONS $0--- THRU $F---....
2179 *
2180 * 0 1 2 3 4 5 6 7 8 9 A B C D E F
2181 * 4K 4K 4K 4K 4K 4K 4K 4K -- 4K 4K 4K 4K -- -- --
2182 *
2183 * ....FOR A TOTAL OF 48K OF RAM, THEN THE TRANSLATION TABLE
2184 * CREATED FROM $DFD0 TO $DFDF WILL CONSIST OF THE FOLLOWING....
2185 *
2186 * 0 1 2 3 4 5 6 7 8 9 A B C D E F
2187 * 0F 0E 0D 0C 0B 0A 09 08 06 05 00 00 04 03 F1 F0
2188 *
2189 *
2190 * HERE WE SEE THE LOGICAL ADDRESSES OF MEMORY FROM $0000-$7FFF
2191 * HAVE NOT BEEN SELECTED FOR RELOCATION SO THAT THEIR PHYSICAL
2192 * ADDRESS WILL = THEIR LOGICAL ADDRESS; HOWEVER, THE 4K BLOCK
2193 * PHYSICALLY AT $9000 WILL HAVE ITS ADDRESS TRANSLATED SO THAT
2194 * IT WILL LOGICALLY RESPOND AT $8000. LIKEWISE $A,$B, AND $C000
2195 * WILL BE TRANSLATED TO RESPOND TO $9000,$C000, AND $D000
2196 * RESPECTIVELY. THE USER SYSTEM WILL LOGICALLY APPEAR TO HAVE
2197 * MEMORY ADDRESSED AS FOLLOWS....
2198 *
2199 * 0 1 2 3 4 5 6 7 8 9 A B C D E F
2200 * 4K 4K 4K 4K 4K 4K 4K 4K 4K 4K -- -- 4K 4K -- --
2201 *
2202 *
2203 LDY #LRARAM ; POINT TO LOGICAL/REAL ADDR. TABLE
2204 STA 13,Y ; STORE $D--- XLATION FACTOR AT $DFDD
2205 CLR 14,Y ; CLEAR $DFDE
2206 LDA #$F0 ; DESTINED FOR IC8 AN MEM EXPANSION ?
2207 STA 15,Y ; STORE AT $DFDF
2208 LDA #$0C ; PRESET NUMBER OF BYTES TO CLEAR
2209 CLRLRT CLR A,Y ; CLEAR $DFDC THRU $DFD0
2210 DECA ; SUB. 1 FROM BYTES LEFT TO CLEAR
2211 BPL CLRLRT ; CONTINUE IF NOT DONE CLEARING
2212 FNDRAM LEAX -$1000,X ; POINT TO NEXT LOWER 4K OF RAM
2213 CMPX #$F0A0 ; TEST FOR DECREMENT PAST ZERO
2214 BEQ FINTAB ; SKIP IF FINISHED
2215 LDU ,X ; SAVE DATA AT CURRENT TEST LOCATION
2216 LDY #TSTPAT ; LOAD TEST DATA PATTERN INTO Y REG.
2217 STY ,X ; STORE TEST PATT. INTO RAM TEST LOC.
2218 CMPY ,X ; VERIFY RAM AT TEST LOCATION
2219 BNE FNDRAM ; IF NO RAM GO LOOK 4K LOWER
2220 STU ,X ; ELSE RESTORE DATA TO TEST LOCATION
2221 LDY #LRARAM ; POINT TO LOGICAL/REAL ADDR. TABLE
2222 TFR X,D ; PUT ADDR. OF PRESENT 4K BLOCK IN D
2223 LSRA ; PUT MS 4 BITS OF ADDR. IN LOC. D0-D3
2224 LSRA ; TO ALLOW STORING IT IN THE DAT RAM.
2225 LSRA
2226 LSRA
2227 TFR A,B ; SAVE OFFSET INTO LRARAM TABLE
2228 EORA #$0F ; INVERT MSB OF ADDR. OF CURRENT 4K BLK
2229 STA B,Y ; SAVE TRANSLATION FACTOR IN LRARAM TABLE
2230 BRA FNDRAM ; GO TRANSLATE ADDR. OF NEXT 4K BLK
2231 FINTAB LDA #$F1 ; DESTINED FOR IC8 AND MEM EXPANSION ?
2232 LDY #LRARAM ; POINT TO LRARAM TABLE
2233 STA 14,Y ; STORE $F1 AT $DFCE
2234 *
2235 * THE FOLLOWING CHECKS TO SEE IF THERE IS A 4K BLK OF
2236 * RAM LOCATED AT $C000-$CFFF. IF NONE THERE IT LOCATES
2237 * THE NEXT LOWER 4K BLK AN XLATES ITS ADDR SO IT
2238 * LOGICALLY RESPONDS TO THE ADDRESS $C---.
2239 *
2240 *
2241 LDA #$0C ; PRESET NUMBER HEX "C"
2242 FINDC LDB A,Y ; GET ENTRY FROM LRARAM TABLE
2243 BNE FOUNDC ; BRANCH IF RAM THIS PHYSICAL ADDR.
2244 DECA ; ELSE POINT 4K LOWER
2245 BPL FINDC ; GO TRY AGAIN
2246 BRA XFERTF
2247 FOUNDC CLR A,Y ; CLR XLATION FACTOR OF 4K BLOCK FOUND
2248 STB $0C,Y ; GIVE IT XLATION FACTOR MOVING IT TO $C---
2249 *
2250 * THE FOLLOWING CODE ADJUSTS THE TRANSLATION
2251 * FACTORS SUCH THAT ALL REMAINING RAM WILL
2252 * RESPOND TO A CONTIGUOUS BLOCK OF LOGICAL
2253 * ADDRESSES FROM $0000 AND UP....
2254 *
2255 CLRA ; START AT ZERO
2256 TFR Y,X ; START POINTER "X" START OF "LRARAM" TABLE.
2257 COMPRS LDB A,Y ; GET ENTRY FROM "LRARAM" TABLE
2258 BEQ PNTNXT ; IF IT'S ZER0 SKIP
2259 CLR A,Y ; ELSE ERASE FROM TABLE
2260 STB ,X+ ; AND ENTER ABOVE LAST ENTRY- BUMP
2261 PNTNXT INCA ; GET OFFSET TO NEXT ENTRY
2262 CMPA #$0C ; LAST ENTRY YET ?
2263 BLT COMPRS
2264 *
2265 * THE FOLLOWING CODE TRANSFER THE TRANSLATION
2266 * FACTORS FROM THE LRARAM TABLE TO IC11 ON
2267 * THE MP-09 CPU CARD.
2268 *
2269 XFERTF LDX #IC11 ; POINT TO DAT RAM IC11
2270 LDB #$10 ; GET NO. OF BYTES TO MOVE
2271 FETCH LDA ,Y+ ; GET BYTE AND POINT TO NEXT
2272 STA ,X+ ; POKE XLATION FACTOR IN IC11
2273 DECB ; SUB 1 FROM BYTES TO MOVE
2274 BNE FETCH ; CONTINUE UNTIL 16 MOVED
2275 *
2276 ELSE
2277 FCF9 39 LRA RTS
2278 FCFA 10 CE DF C0 START LDS #STACK ; INITIALIZE STACK POINTER
2279 FCFE 5F CLRB
2280 ENDIF DATOPT
2281 *
2282 FCFF 53 COMB ; SET "B" NON-ZERO
2283 FD00 F7 DF D2 STB ECHO ; TURN ON ECHO FLAG
2284 FD03 16 FB 0E LBRA MONITOR ; INITIALIZATION IS COMPLETE
2285 *
2286 ** INTERRUPT JUMP VECTORS
2287 *
2288 FD06 6E 9F DF C0 V1 JMP [STACK]
2289 FD0A 6E 9F DF C4 V2 JMP [SWI2]
2290 FD0E 6E 9F DF C6 V3 JMP [FIRQ]
2291 FD12 6E 9F DF C8 V4 JMP [IRQ]
2292 FD16 6E 9F DF CA V5 JMP [SWI]
2293 *
2294 * SWI3 ENTRY POINT
2295 *
2296 FD1A 1F 43 SWI3E TFR S,U
2297 FD1C AE 4A LDX 10,U *$FFC8
2298 FD1E E6 80 LDB ,X+
2299 FD20 AF 4A STX 10,U
2300 FD22 4F CLRA
2301 FD23 58 ASLB
2302 FD24 49 ROLA
2303 FD25 BE DF CC LDX SVCVO
2304 FD28 8C FF FF CMPX #$FFFF
2305 FD2B 27 0F BEQ SWI3Z
2306 FD2D 30 8B LEAX D,X
2307 FD2F BC DF CE CMPX SVCVL
2308 FD32 22 08 BHI SWI3Z
2309 FD34 34 10 PSHS X
2310 FD36 EC C4 LDD ,U
2311 FD38 AE 44 LDX 4,U
2312 FD3A 6E F1 JMP [,S++]
2313 FD3C 37 1F SWI3Z PULU A,B,X,CC,DP
2314 FD3E EE 42 LDU 2,U
2315 FD40 6E 9F DF C2 JMP [SWI3]
2316 *
2317 * 6809 VECTORS
2318 *
2319 FFF0 ORG $FFF0
2320 FFF0 FD 06 FDB V1 USER-V
2321 FFF2 FD 1A FDB SWI3E SWI3-V
2322 FFF4 FD 0A FDB V2 SWI2-V
2323 FFF6 FD 0E FDB V3 FIRQ-V
2324 FFF8 FD 12 FDB V4 IRQ-V
2325 FFFA FD 16 FDB V5 SWI-V
2326 FFFC FD 06 FDB V1 NMI-V
2327 FFFE FC FA FDB START RESTART-V
0005 END START
0006 END
Program + Init Data = 2898 bytes
Error count = 0
 
ACIAC1 0000
ACIAD1 0001
ACINIZ FC36
ACIRST 01F7
ACK 0006
AJDUMP F8F0
ALTAD FAE5
ALTBD FADA
ALTCCD FAF2
ALTDPD FACF
ALTPC1 FA9B
ALTPCD FAA3
ALTRA FADB
ALTRB FAD0
ALTRCC FAE6
ALTRDP FAC5
ALTRPC FA98
ALTRU FAA4
ALTRX FABA
ALTRY FAAF
ALTUD FAAE
ALTXD FAC4
ALTYD FAB9
AOUTCH FC21
ATLOPT 00FF
BACK F8D4
BIASCI FBE4
BLKNUM 0104
BLOAD0 070D
BLOAD1 071B
BLOAD2 0731
BLOAD3 0745
BOOT 0700
BPADJ F9B9
BPERR F967
BPTBL DFD3
BPTEST F9A9
BRKPNT F943
BSSTACK C0FF
BUFFER 0200
BYTCNT 0105
BYTE FB8D
CAN 0018
CFLAG 0001
CHANGE F8C2
CHKDRV 053B
CHKSUM 0103
CHRTN F8C1
CLRSTK F82F
CPORT DFD0
DELCNT 0108
DELCON 04E2
DFL1 0115
DFL2 0122
DFL3 0136
DFL4 01A0
DISFOS 0085
DISSTK F8D8
DLY F9BC
DNS 0707
DRNUM 070C
DRVNUM 0100
DRVS2 0536
DRVSEL 052F
ECHO DFD2
ECHON FBF9
EDPASC F92F
EDPRTN F8EF
EDUMP F90B
EFLAG 0080
ELOOP F91D
EOT 0004
EXITBP F966
EXTEND 0035
EXTTAB 002C
FETSTA FC26
FFLAG 0040
FFSTBL F9A0
FIRQ DFC6
FNDBP F9AF
FORWRD F8D0
GETCH 0752
GETCH2 0758
GETCH4 0767
GETST1 FC0F
GETSTA FC06
GO F88C
GOFLEX 076A
HFLAG 0020
IFLAG 0010
IN1ADR FB7D
IN2ADR FB72
INCH FC04
INCHE FBFE
INCHEK FC13
INCHEK1 FC1B
INCHEV F806
INCHKV F808
INCHV F804
INHEX FBA0
INHEXA FBAD
INHEXL FBB8
INITDR 04B2
INTER 0200
INTER0 020B
INTER1 0219
INTER2 021E
INTEST 01F2
IOINIZ FC36
IRQ DFC8
JBYTE FA92
JIN1ADR FA95
JMPCMD F888
JMPEXT 002A
JMPTAB FC49
JOUT1S FA8F
JOUT2H FB17
JOUT4H FB04
LADR 070A
LOAD F9C5
LOAD1 F9D0
LOAD10 F9FA
LOAD16 FA10
LOAD2 F9D3
LOAD21 FA1B
LODERR FA0F
LOOPA F81D
LRA FCF9
LRAV F812
MAXSEC 010C
MAXTRK 010B
MDUMP1 F8E9
MEMC2 F896
MEMCHG F88F
MEMDUMP F8E4
MESS6 00AE
MONIO E000
MONITOR F814
MONITV F800
MONRAM DFC0
MONROM F800
MSG1 FC8C
MSG10 FCB9
MSG11 FCBF
MSG12 FCC5
MSG13 FCCB
MSG14 FCD1
MSG15 FCD7
MSG16 FCDD
MSG17 FCE2
MSG18 FCE7
MSG19 FCEE
MSG2 FCA6
MSG20 FCF6
MSG3 FCAD
MSG4 FCAF
MSG5 FCB5
MSGWHAT 0035
NAK 0015
NEXTCMD F848
NEXTEXT 0002
NFLAG 0008
NMI DFC0
NOTHEX FBC3
NXTCH0 F872
NXTCHR F875
NXTCMV F802
NXTEX0 0016
NXTEX1 0019
NXTLIN F8FF
OUT1S FC1F
OUT2H FBCE
OUT2S FC1D
OUT4H FBC6
OUTBA FBE8
OUTC FBE2
OUTCH FC21
OUTCHV F80A
OUTHL FBCE
OUTHR FBD6
OUTTE1 0233
OUTTE2 0241
OUTTER 0231
PCLKHI 0001
PCLKLO 0000
PCRLF FA85
PCRLFV F80E
PDATA FAF6
PDATA0 0246
PDATA1 0248
PDATAV F80C
PERIOD F939
PRASC F93B
PRINT FAF3
PROMREG E0C0
PRSTHI 0002
PRSTLO 0000
PRTA FB35
PRTB FB3E
PRTBA FBF0
PRTCC FB47
PRTCMD F866
PRTDP FB10
PRTIX FB1A
PRTIY FB23
PRTPC FB2C
PRTSP FAFD
PRTUS FB07
PSTRGV F810
PSTRNG FA81
PUNCH FA23
PUNCH2 FA3C
PUNCH3 FA48
PUNCH4 FA4A
PUNCHL FA62
PUNEXT FA79
RAMVEC FC7C
RCHAR 0046
RCHAR1 004B
RCHAR2 004F
RCHAR3 005E
RDLP1 04F7
READ 0787
READ1 0797
READSC 04E6
REGPR F989
REGSTR FB54
RESTR1 04C7
RF3 01D7
RMAXSEC 00FF
RMAXTRK 0100
RPLSWI F98F
RTI F88E
RTOTSEC FE01
SCHAR 0062
SCHAR1 0069
SCHAR2 006D
SCHAR3 007F
SCT 0706
SCTBUF C300
SECTOR 0102
SEEK 076D
SEEKTS 04CC
SKPDMP F908
SOH 0001
STACK DFC0
START FCFA
SUB1 F9C0
SVCVL DFCE
SVCVO DFCC
SWI DFCA
SWI2 DFC4
SWI3 DFC2
SWI3E FD1A
SWI3Z FD3C
SWIE F97B
SYNCHI AA55
SYNCLO FF00
TABEND FC7C
TADR 0708
TRACK 0101
TRK 0705
UBSUB 003E
UFEXIT 01EC
UFMSG1 00CB
UFSUB 00E6
UFSUB1 00EF
UXERR 03FF
UXEXIT 03F9
UXLOOP 03AD
UXMES0 024F
UXMES1 0268
UXMES2 027A
UXMSG3 0289
UXMSG4 029A
UXSUB 02B1
UXSUB1 02BD
UXSUB2 02EA
V1 FD06
V2 FD0A
V3 FD0E
V4 FD12
V5 FD16
VFLAG 0002
VOLMSG 00DD
WRITSC 050A
WRTLP1 051C
WTDRQ 07B7
WTRDY 07A8
XACK 04A9
XASCII FBDA
XBKPNT F96F
XBPLP F975
XBYTE0 040A
XBYTE1 0419
XREAD 0405
XSTATE 0106
XSTBL 0442
XSTBLE 044D
XSTCK 0483
XSTCK1 0493
XSTCK2 04A0
XSTCOM 0458
XSTDA 046C
XSTDA1 047E
XSTST 0422
XSTST1 042C
XSTST2 0438
XSTST3 043F
ZFLAG 0004
/src/sys09bug/sys09atl.vhd
0,0 → 1,328
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
library unisim;
use unisim.vcomponents.all;
 
entity SYS09BUG_F000 is
port(
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector(10 downto 0);
data_out : out std_logic_vector(7 downto 0);
data_in : in std_logic_vector(7 downto 0)
);
end SYS09BUG_F000;
 
architecture rtl of SYS09BUG_F000 is
 
type data_array is array(0 to 0) of std_logic_vector(7 downto 0);
signal xdata : data_array;
signal en : std_logic_vector(0 downto 0);
signal dp : std_logic_vector(0 downto 0);
signal we : std_logic;
 
begin
 
ROM00: RAMB16_S9
generic map (
INIT_00 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_02 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_03 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_04 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_05 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_06 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_07 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_08 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_09 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0a => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0f => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_10 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_11 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_12 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_13 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_14 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_15 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_16 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_17 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_18 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_19 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1a => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1f => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_20 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_21 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_22 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_23 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_24 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_25 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_26 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_27 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_28 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_29 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2a => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2f => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_30 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3a => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3f => x"0000000000000000000000000000000000000000000000000000000000000000"
)
port map (
CLK => clk,
SSR => rst,
EN => en(0),
WE => we,
ADDR => addr(10 downto 0),
DI => data_in,
DIP(0) => dp(0),
DO => xdata(0),
DOP(0) => dp(0)
);
rom_glue: process (cs, rw, addr, xdata)
begin
en(0) <= cs;
data_out <= xdata(0);
we <= not rw;
end process;
end architecture rtl;
 
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
library unisim;
use unisim.vcomponents.all;
 
entity SYS09BUG_F800 is
port(
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector(10 downto 0);
data_out : out std_logic_vector(7 downto 0);
data_in : in std_logic_vector(7 downto 0)
);
end SYS09BUG_F800;
 
architecture rtl of SYS09BUG_F800 is
 
type data_array is array(0 to 0) of std_logic_vector(7 downto 0);
signal xdata : data_array;
signal en : std_logic_vector(0 downto 0);
signal dp : std_logic_vector(0 downto 0);
signal we : std_logic;
 
begin
 
ROM00: RAMB16_S9
generic map (
INIT_00 => x"A780A610C6C0DF8E107CFC8EF9FC81FA85FAF6FA21FC13FCFEFB04FC48F814F8",
INIT_01 => x"17431FE4A7D0866AAFDD8C30FB265AE26F0CC6420117D0DFBF00008EF9265AA0",
INIT_02 => x"175E86092C2081891FF1270D817F84B30317330217ADFC8EAE02178CFC8EF403",
INIT_03 => x"F5267CFC8C02300F2780E149FC8E20C0022F60C1B30317B80317408B981FBF03",
INIT_04 => x"0317211FE50117B5FC8E121F2D29EB02173B341FBC2094ADC020700217AFFC8E",
INIT_05 => x"260D8117275E81DD271881E12708811128DE0217730317250317A4A67B031725",
INIT_06 => x"C0DF8E321F220217BE203F31C22021315103173F865403170827A4A1A4A7390F",
INIT_07 => x"AC011FF0C4201F0634F0C41000C3101F390124E1AC203406298B021705201F30",
INIT_08 => x"1780A610C6020317AE0217E4AE6E0117B5FC8E103439623203270D03170527E4",
INIT_09 => x"265AE302172E8602237E810425208180A610C6E1AEF20217F5265AFA0217AC02",
INIT_0a => x"A0A709273F8184A60F271035558DFFFF8E10341A24C0DF8C1E29370217BC20EE",
INIT_0b => x"304AAE431F39FB265A188D08C6D3DF8E10B202163F86B502173984A73F86A4AF",
INIT_0c => x"84A7A4A604263F8184A60A24C0DF8C21AEB9FE16C80117068D4AAF0427268D1F",
INIT_0d => x"20C60434393D3139F7265A0427A1ACA0A608C6D3DF8E1039A0A7A0A7A0A7FF86",
INIT_0e => x"31813D2739811F0217F9265381260217D2DF7F540217118636FCBD8435FD265A",
INIT_0f => x"358E01170434E46AE46AE4EBE0EBE0E61034212991011726290234A80117F126",
INIT_10 => x"1386D2DF730602173F86BA27FFC102355FEB2080A70527E46AE0EB02340C2904",
INIT_11 => x"62A3E4ECE50117128636FCBDE4AF0130492562AC4D2930344A0117E26FFE0116",
INIT_12 => x"62EB68011762AE750117981F03CB2F0017F6FC8E64E720C60223200083100627",
INIT_13 => x"6532A301171486C326E4AC62AF5B0117981F53F526646A65011780A684EB63EB",
INIT_14 => x"29F68DF28D910017E50016F800168D01169035690017A7FC8E10347120028D39",
INIT_15 => x"D58DD18D5E8D3946AF0229E08DDC8D728D3948AF0229EB8DE78D618D394AAF02",
INIT_16 => x"8DB08D588D3942A70229BC8DBB8D6C8D3943A70229C78DC68D498D3944AF0229",
INIT_17 => x"B9FC8E39F726048180A62B011739C4A7808A0429A68DA58D5F8D3941A70229B1",
INIT_18 => x"AED78DD1FC8EB4001643A6E18DD7FC8EF42048AEEA8DC5FC8EBF0016311FF48D",
INIT_19 => x"FC8ED92041A6BC8DDDFC8ECF204AAEC58DBFFC8ED82046AECE8DCBFC8EE12044",
INIT_1a => x"B08DA98DA18D27FF17B5FC8E900016EEFC8EC4A6AA8DE7FC8ED02042A6B38DE2",
INIT_1b => x"290E8DA400172D86121F4D29098DD520CE8DC78DC08D17FF17B5FC8EBF8DB88D",
INIT_1c => x"39E0AB04342829078D891F484848483229118D903561A710343C29088D011F42",
INIT_1d => x"03226681072561813937800322468112254181393080032239811D253081578D",
INIT_1e => x"022F3981308B0F840235048D4444444402340235028D0235103439021A395780",
INIT_1f => x"048D0627D2DF7D8235F1265A2B8D2F8D2D860225E46880A608C602343D20078B",
INIT_20 => x"86008D82350185D0DF9FA60234903501A6F727018584A6D0DFBE10341D207F84",
INIT_21 => x"A7518684A70386D0DFBE903501A70235F6260885FA27028584A6D0DFBE123420",
INIT_22 => x"FA19BAFA18A4FA1598FA10C5FA04E6FA03D0FA02DBFA0139D2DFB7FF86016D84",
INIT_23 => x"8EF87BF96FF958D8F85354FB528FF84D23FA50C5F94C8CF847E4F84543F942AF",
INIT_24 => x"4F4620372E312067754239307379530000000A0DFFFFFFFF7BF98EF88EF88EF8",
INIT_25 => x"20043D5053202004202D20043F54414857043E040000000A0D4B04202D202052",
INIT_26 => x"412020043D50442020043D58492020043D59492020043D53552020043D435020",
INIT_27 => x"535FC0DFCE103904315343565A4E4948464504203A43432020043D422020043D",
INIT_28 => x"80E64AAE431FCADF9F6EC8DF9F6EC6DF9F6EC4DF9F6EC0DF9F6E0EFB16D2DFF7",
INIT_29 => x"42EE1F37F16E44AEC4EC10340822CEDFBC8B300F27FFFF8CCCDFBE49584F4AAF",
INIT_2a => x"00000000000000000000000000000000000000000000000000000000C2DF9F6E",
INIT_2b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2f => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_30 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3a => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3b => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3c => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3d => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3e => x"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3f => x"FAFC06FD16FD12FD0EFD0AFD1AFD06FD00000000000000000000000000000000"
)
port map (
CLK => clk,
SSR => rst,
EN => en(0),
WE => we,
ADDR => addr(10 downto 0),
DI => data_in,
DIP(0) => dp(0),
DO => xdata(0),
DOP(0) => dp(0)
);
rom_glue: process (cs, rw, addr, xdata)
begin
en(0) <= cs;
data_out <= xdata(0);
we <= not rw;
end process;
end architecture rtl;
 
--
-- SYS09BUG Monitor Program
-- v1.0 - 21 November 2006 - John Knet
--
-- v1.1 - 22 december 2006 - John Kent
-- made into 4K ROM/RAM.
--
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
library unisim;
use unisim.vcomponents.all;
 
entity mon_rom is
Port (
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector (11 downto 0);
data_out : out std_logic_vector (7 downto 0);
data_in : in std_logic_vector (7 downto 0)
);
end mon_rom;
 
architecture rtl of mon_rom is
 
signal we : std_logic;
signal cs0 : std_logic;
signal cs1 : std_logic;
signal dp0 : std_logic;
signal dp1 : std_logic;
signal rdata0 : std_logic_vector(7 downto 0);
signal rdata1 : std_logic_vector(7 downto 0);
 
component SYS09BUG_F000
Port (
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector (10 downto 0);
data_out : out std_logic_vector (7 downto 0);
data_in : in std_logic_vector (7 downto 0)
);
end component;
 
component SYS09BUG_F800
Port (
clk : in std_logic;
rst : in std_logic;
cs : in std_logic;
rw : in std_logic;
addr : in std_logic_vector (10 downto 0);
data_out : out std_logic_vector (7 downto 0);
data_in : in std_logic_vector (7 downto 0)
);
end component;
 
begin
 
addr_f000 : SYS09BUG_F000 port map (
clk => clk,
rst => rst,
cs => cs0,
rw => rw,
addr => addr(10 downto 0),
data_in => data_in,
data_out => rdata0
);
 
addr_f800 : SYS09BUG_F800 port map (
clk => clk,
rst => rst,
cs => cs1,
rw => rw,
addr => addr(10 downto 0),
data_in => data_in,
data_out => rdata1
);
 
my_mon : process ( rw, addr, cs, rdata0, rdata1 )
begin
we <= not rw;
case addr(11) is
when '0' =>
cs0 <= cs;
cs1 <= '0';
data_out <= rdata0;
when '1' =>
cs0 <= '0';
cs1 <= cs;
data_out <= rdata1;
when others =>
null;
end case;
end process;
 
end architecture rtl;
 
/src/sys09bug/sys09bug.asm
2037,7 → 2037,7
* PRINTABLE MESSAGE STRINGS
*
MSG1 FCB $D,$A,$0,$0,$0 * 0, CR/LF, 0
FCC 'SYS09BUG 1.7 FOR '
FCC 'Sys09Bug 1.7 FOR '
IFD SWTOPT
FCC 'SWTPC'
ENDIF SWTOPT
2059,6 → 2059,9
IFD XESOPT
FCC 'XESS'
ENDIF XESOPT
IFD ATLYSOPT
FCC 'Atlys'
ENDIF ATLYSOPT
IFD DE270OPT
FCC 'DE2-70'
ENDIF DE270OPT

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