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Rev 26 → Rev 27

/ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll Property changes : Deleted: svn:executable Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile (nonexistent) @@ -1,20 +0,0 @@ - -SRCDIR=../src/ -CC = gcc - -# The location of the ModelSim installation, used -# to build the C lib for VPI. Must contain a subdir with -# vpi_user.h. -MODEL=/opt/modelsim - - - -default: vpi - -# This is for ModelSim under Linux (x86/32) -# If RH v7.1 or lower, add -noinhibit-exec -jp-io-vpi.so: $(SRCDIR)jp-io-vpi.c Makefile - $(CC) -c -I$(MODEL)/modeltech/include $(SRCDIR)jp-io-vpi.c -o jp-io-vpi.o - $(CC) -shared -Bsymbolic -o jp-io-vpi.so jp-io-vpi.o -lc - -vpi: jp-io-vpi.so Makefile \ No newline at end of file Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/icarus/Makefile =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/icarus/Makefile (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/icarus/Makefile (nonexistent) @@ -1,12 +0,0 @@ - -SRCDIR=../src/ - - - -default: vpi - -# This is for the Icarus simulator. -jp-io-vpi.vpi: $(SRCDIR)jp-io-vpi.c - iverilog-vpi $(SRCDIR)jp-io-vpi.c - -vpi: jp-io-vpi.vpi Makefile \ No newline at end of file Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c (nonexistent) @@ -1,371 +0,0 @@ -/* jp-io-vpi.c -- JTAG communications vpi plugin - Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org - Modifications copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org - - This file is part of OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -/* This plugs into an rtl simulator via vpi */ - -#include -#include -#include -#include -#include - -#ifdef WIN32 -#include -#else -#include -#include -#include -#include -#include -#endif - -#include - -/* The vpi<->jp connection is `mastered' by jp1. Therefore we just sit doing - * `nothing', waiting for jp1 to request or send us some data */ -static uint8_t vpi_out; /* data that the sim gives to us */ - -#ifdef WIN32 -SOCKET jp_comm_m; -SOCKET jp_comm; -char msgbuf[64]; -char * get_ws_error(void); -#define GET_ERR_MSG get_ws_error() -#ifndef EAGAIN -#define EAGAIN WSAEWOULDBLOCK -#endif -#ifndef EWOULDBLOCK -#define EWOULDBLOCK WSAEWOULDBLOCK -#endif -#else -static int jp_comm_m; /* The listening socket */ -static int jp_comm; /* The socket for communitateing with jp1 */ -#define GET_ERR_MSG strerror(errno) -#endif - -#ifndef SOCKET_ERROR -#define SOCKET_ERROR -1 -#endif - - -static int jp_got_con; /* Have we got a connection ? */ - -static int count_comp; /* Has the predetermined cycle-count been reached ? */ -static int jp_waiting; /* Is jp-waiting for count_comp ? */ - -int jp_check_con(); - -/*---------------------------------------------[ VPI interface to the sim ]---*/ -/* Sends a byte from the sim */ -int vpi_jp_out(char *xx) -{ - vpiHandle sys = vpi_handle(vpiSysTfCall, 0); - vpiHandle argv = vpi_iterate(vpiArgument, sys); - s_vpi_value value; - - if(!argv) { - vpi_printf("$jp_out: missing destination argument\n"); - vpi_free_object(argv); - return 0; - } - vpiHandle dat_to = vpi_scan(argv); - if(vpi_get(vpiType, dat_to) != vpiNet) { - vpi_printf("$jp_out: Must have a net as argument!!\n"); - vpi_free_object(argv); - return 0; - } - - value.format = vpiVectorVal; - vpi_get_value(dat_to, &value); - - if((value.value.vector->bval & 1)) { - vpi_free_object(argv); - return 0; - } - vpi_out = value.value.vector->aval & 1; - - vpi_free_object(argv); - - return 0; -} - -/* Sends a byte to the sim */ -int vpi_jp_in(char *xx) -{ - int ret; - uint8_t dat; - s_vpi_vecval vec; - - s_vpi_value value; - vpiHandle sys = vpi_handle(vpiSysTfCall, 0); - vpiHandle argv; - vpiHandle dat_to; - - vpiHandle dat_to_index; - - if(!jp_got_con) { - if(!jp_check_con()) - return 0; - } - - ret = recv(jp_comm, &dat, 1, 0); - if(!ret) - return 0; - if(ret == SOCKET_ERROR) - { -#ifdef WIN32 - if(WSAGetLastError() == WSAEWOULDBLOCK) -#else - if(errno == EAGAIN) -#endif - { - return 0; - } - else { - vpi_printf("Socket recv error: %s\n", GET_ERR_MSG); - return 0; - } - -} - - - if(dat & 0x80) { - switch(dat & 0x7f) { - case 0: - /* jp1 wants the TDO */ - send(jp_comm, &vpi_out, 1, 0); - return 0; - case 1: - /* jp wants a time-out */ - if(count_comp) { - dat = 0xFF; /* A value of 0xFF is expected, but not required */ - send(jp_comm, &dat, 1, 0); - } - else { - jp_waiting = 1; - } - return 0; - } - } - - argv = vpi_iterate(vpiArgument, sys); - - /* We got the data, acknowledge it and send it on to the sim */ - if(!argv) { - vpi_printf("$jp_in: missing destination argument\n"); - vpi_free_object(argv); - return 0; - } - dat_to = vpi_scan(argv); - if(vpi_get(vpiType, dat_to) != vpiReg) { - vpi_printf("$jp_in: Must have a register (vpiReg) as argument (type is %d)!!\n", vpi_get(vpiType, dat_to)); - vpi_free_object(argv); - return 0; - } - - value.format = vpiVectorVal; - - vec.aval = (dat & 0xf) | 0x10; - vec.bval = 0; - value.value.vector = &vec; - vpi_put_value(dat_to, &value, 0, vpiNoDelay); - - vpi_free_object(argv); - - dat |= 0x10; - ret = send(jp_comm, &dat, 1, 0); - - count_comp = 0; - - return 0; -} - -/* tells us that we reached a predetermined cycle count */ -int jp_wait_time(char *xx) -{ - uint8_t dat = 0xFF; - if(jp_waiting) { - send(jp_comm, &dat, 1, 0); - jp_waiting = 0; - } - - count_comp = 1; - return 0; -} - -/*---------------------------------------------------[ VPI<->jp functions ]---*/ -int init_sock(char *xx) -{ - - struct sockaddr_in addr; - int ret; - vpiHandle sys = vpi_handle(vpiSysTfCall, 0); - vpiHandle argv = vpi_iterate(vpiArgument, sys); - s_vpi_value value; - - if(!argv) { - vpi_printf("$jp_init: missing port argument\n"); - return 0; - } - vpiHandle sock = vpi_scan(argv); -/* orig - if(vpi_get(vpiConstType, sock) != vpiStringConst) { - vpi_printf("$jp_init: Must have a string as argument!!\n"); - vpi_free_object(argv); - return 0; - } -*/ - -#ifdef WIN32 - WSADATA wsaData; - ret = WSAStartup(MAKEWORD(2,2), &wsaData); // must be called before all socket operations - if(ret != 0) { - vpi_printf("$jp_init: Winsock startup failed."); - return 0; - } -#endif - - value.format = vpiStringVal; - vpi_get_value(sock, &value); - - addr.sin_family = AF_INET; - addr.sin_port = atoi(value.value.str); - addr.sin_addr.s_addr = INADDR_ANY; - memset(addr.sin_zero, '\0', sizeof(addr.sin_zero)); - - jp_comm_m = socket(PF_INET, SOCK_STREAM, 0); -#ifdef WIN32 - if(jp_comm_m == INVALID_SOCKET) -#else - if(jp_comm_m < 0) -#endif - { - fprintf(stderr, "Unable to create comm socket: %s\n", GET_ERR_MSG); - return 0; - } - - if(bind(jp_comm_m, (struct sockaddr *)&addr, sizeof(addr)) == SOCKET_ERROR) { - fprintf(stderr, "Unable to bind the socket: %s\n", GET_ERR_MSG); - return 0; - } - - if(listen(jp_comm_m, 1) == SOCKET_ERROR) { - fprintf(stderr, "Unable to listen: %s\n", GET_ERR_MSG); - return 0; - } - -#ifdef WIN32 - u_long arg = 1; - ioctlsocket(jp_comm_m, FIONBIO, &arg); -#else - ret = fcntl(jp_comm_m, F_GETFL); - ret |= O_NONBLOCK; - fcntl(jp_comm_m, F_SETFL, ret); -#endif - - jp_got_con = 0; - jp_waiting = 0; - return 0; -} - -/* Checks to see if we got a connection */ -int jp_check_con() -{ - int ret; - - if((jp_comm = accept(jp_comm_m, NULL, NULL)) == SOCKET_ERROR) { -#ifdef WIN32 - if(WSAGetLastError() == WSAEWOULDBLOCK) -#else - if(errno == EAGAIN) -#endif - return 0; - fprintf(stderr, "Unable to accept connection: %s\n", GET_ERR_MSG); - return 0; - } - - - // Set the comm socket to non-blocking. - // Close the server socket, so that the port can be taken again - // if the simulator is reset. -#ifdef WIN32 - u_long arg = 1; - ioctlsocket(jp_comm, FIONBIO, &arg); - closesocket(jp_comm_m); -#else - ret = fcntl(jp_comm, F_GETFL); - ret |= O_NONBLOCK; - fcntl(jp_comm, F_SETFL, ret); - close(jp_comm_m); -#endif - - vpi_printf("JTAG communication connected!\n"); - jp_got_con = 1; - return 1; -} - -/*------------------------------------------------------------[ VPI stuff ]---*/ -static void jtag_register() -{ - s_vpi_systf_data tf_data; - - tf_data.type = vpiSysTask; - tf_data.tfname = "$jp_in"; - tf_data.calltf = vpi_jp_in; - tf_data.compiletf = 0; - tf_data.sizetf = 0; - vpi_register_systf(&tf_data); - - tf_data.type = vpiSysTask; - tf_data.tfname = "$jp_out"; - tf_data.calltf = vpi_jp_out; - tf_data.compiletf = 0; - tf_data.sizetf = 0; - vpi_register_systf(&tf_data); - - tf_data.type = vpiSysTask; - tf_data.tfname = "$jp_init"; - tf_data.calltf = init_sock; - tf_data.compiletf = 0; - tf_data.sizetf = 0; - vpi_register_systf(&tf_data); - - tf_data.type = vpiSysTask; - tf_data.tfname = "$jp_wait_time"; - tf_data.calltf = jp_wait_time; - tf_data.compiletf = 0; - tf_data.sizetf = 0; - vpi_register_systf(&tf_data); -} - -void (*vlog_startup_routines[])() = { - jtag_register, - 0 -}; - - -#ifdef WIN32 -char *get_ws_error(void) -{ - snprintf(msgbuf, 64, "%d", WSAGetLastError()); - return msgbuf; -} -#endif - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_xpc_dlc9.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_xpc_dlc9.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_xpc_dlc9.h (nonexistent) @@ -1,14 +0,0 @@ - -#ifndef _CABLE_XPC_DLC9_H_ -#define _CABLE_XPC_DLC9_H_ - -#include - -int cable_xpcusb_init(); -int cable_xpcusb_out(uint8_t value); -int cable_xpcusb_inout(uint8_t value, uint8_t *inval); -int cable_xpcusb_opt(int c, char *str); -int cable_xpcusb_read_write_bit(uint8_t packet_out, uint8_t *bit_in); - - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_usbblaster.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_usbblaster.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_usbblaster.h (nonexistent) @@ -1,15 +0,0 @@ - -#ifndef _CABLE_USBBLASTER_H_ -#define _CABLE_USBBLASTER_H_ - -#include - -int cable_usbblaster_init(); -int cable_usbblaster_out(uint8_t value); -int cable_usbblaster_inout(uint8_t value, uint8_t *in_bit); -int cable_usbblaster_write_stream(uint32_t *stream, int len_bits, int set_last_bit); -int cable_usbblaster_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); -int cable_usbblaster_opt(int c, char *str); -void cable_usbblaster_wait(); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.c (nonexistent) @@ -1,54 +0,0 @@ -/* errcodes.c - Error code to plaintext translator for the advanced JTAG bridge - Copyright(C) 2008 Nathan Yawn - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - -#include -#include "errcodes.h" - -// We can declare the error string with a fixed size, because it can't -// have more than ALL of the error strings in it. Be sure to expand it -// as more errors are added. Also, put a space at the end of each -// error string, as there may be multiple errors. -char errstr[256]; -char *get_err_string(int err) -{ - errstr[0] = '\0'; - - if(err & APP_ERR_COMM) - strcat(errstr, "\'JTAG comm error\' "); - if(err & APP_ERR_MALLOC) - strcat(errstr, "\'malloc failed\' "); - if(err & APP_ERR_MAX_RETRY) - strcat(errstr, "\'max retries\' "); - if(err & APP_ERR_CRC) - strcat(errstr, "\'CRC mismatch\' "); - if(err & APP_ERR_MAX_BUS_ERR) - strcat(errstr, "\'max WishBone bus errors\' "); - if(err & APP_ERR_CABLE_INVALID) - strcat(errstr, "\'Invalid cable\' "); - if(err & APP_ERR_INIT_FAILED) - strcat(errstr, "\'init failed\' "); - if(err & APP_ERR_BAD_PARAM) - strcat(errstr, "\'bad command line parameter\' "); - if(err & APP_ERR_CONNECT) - strcat(errstr, "\'connection failed\' "); - if(err & APP_ERR_USB) - strcat(errstr, "\'USB\' "); - if(err & APP_ERR_CABLENOTFOUND) - strcat(errstr, "\'cable not found\' "); - return errstr; -} Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/opencores_tap.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/opencores_tap.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/opencores_tap.h (nonexistent) @@ -1,24 +0,0 @@ -#ifndef _OPENCORES_TAP_H_ -#define _OPENCODER_TAP_H_ - - -// Information on the OpenCores JTAG TAP -// Included as a default, in place of a BSDL file -// with the data. - -#define JI_SIZE (4) -enum jtag_instr - { - JI_EXTEST = 0x0, - JI_SAMPLE_PRELOAD = 0x1, - JI_IDCODE = 0x2, - JI_CHAIN_SELECT = 0x3, - JI_INTEST = 0x4, - JI_CLAMP = 0x5, - JI_CLAMPZ = 0x6, - JI_HIGHZ = 0x7, - JI_DEBUG = 0x8, - JI_BYPASS = 0xF - }; - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/errcodes.h (nonexistent) @@ -1,22 +0,0 @@ -#ifndef _ERRCODES_H_ -#define _ERRCODES_H_ - -// Errors in high-level chain transactions -// An error is a 32-bit bit-encoded value -#define APP_ERR_NONE 0x0 -#define APP_ERR_COMM 0x1 -#define APP_ERR_MALLOC 0x2 -#define APP_ERR_MAX_RETRY 0x4 -#define APP_ERR_CRC 0x08 -#define APP_ERR_MAX_BUS_ERR 0x10 -#define APP_ERR_CABLE_INVALID 0x20 -#define APP_ERR_INIT_FAILED 0x40 -#define APP_ERR_BAD_PARAM 0x080 -#define APP_ERR_CONNECT 0x100 -#define APP_ERR_USB 0x200 -#define APP_ERR_CABLENOTFOUND 0x400 -#define APP_ERR_TEST_FAIL 0x0800 - -char *get_err_string(int errval); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.c (nonexistent) @@ -1,358 +0,0 @@ -/* cable_common.c -- Interface to the low-level cable drivers - Copyright (C) 2001 Marko Mlinar, markom@opencores.org - Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org - Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - - -#include -#include - - -#include "cable_common.h" -#include "cable_parallel.h" -#include "cable_sim.h" -#include "cable_usbblaster.h" -#include "cable_ft2232.h" -#include "cable_xpc_dlc9.h" -#include "errcodes.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -static struct jtag_cable { - const char *name; - int (*inout_func)(uint8_t, uint8_t *); - int (*out_func)(uint8_t); - int (*init_func)(); - void (*wait_func)(); - int (*opt_func)(int, char *); - int (*bit_out_func)(uint8_t); - int (*bit_inout_func)(uint8_t, uint8_t *); - int (*stream_out_func)(uint32_t *, int, int); - int (*stream_inout_func)(uint32_t *, uint32_t *, int, int); - int (*flush_func)(); - const char *opts; - const char *help; -} jtag_cables[] = { - { "rtl_sim", - cable_rtl_sim_inout, - cable_rtl_sim_out, - cable_rtl_sim_init, - NULL, - cable_rtl_sim_opt, - cable_common_write_bit, - cable_common_read_write_bit, - cable_common_write_stream, - cable_common_read_stream, - NULL, - "d:", - "-d [directory] Directory in which gdb_in.dat/gdb_out.dat may be found\n" }, - { "vpi", - cable_vpi_inout, - cable_vpi_out, - cable_vpi_init, - cable_vpi_wait, - cable_vpi_opt, - cable_common_write_bit, - cable_common_read_write_bit, - cable_common_write_stream, - cable_common_read_stream, - NULL, - "s:p:", - "-p [port] Port number that the VPI module is listening on\n\t-s [server] Server that the VPI module is running on\n" }, - { "xpc3", - cable_xpc3_inout, - cable_xpc3_out, - cable_parallel_init, - cable_parallel_phys_wait, - cable_parallel_opt, - cable_common_write_bit, - cable_common_read_write_bit, - cable_common_write_stream, - cable_common_read_stream, - NULL, - "p:", - "-p [port] Which port to use when communicating with the parport hardware (eg. 0x378)\n" }, - { "xess", - cable_xess_inout, - cable_xess_out, - cable_parallel_init, - cable_parallel_phys_wait, - cable_parallel_opt, - cable_common_write_bit, - cable_common_read_write_bit, - cable_common_write_stream, - cable_common_read_stream, - NULL, - "p:", - "-p [port] Which port to use when communicating with the parport hardware (eg. 0x378)\n" }, -#ifdef __SUPPORT_USB_CABLES__ - { "usbblaster", - cable_usbblaster_inout, - cable_usbblaster_out, - cable_usbblaster_init, - NULL, - cable_usbblaster_opt, - cable_common_write_bit, - cable_common_read_write_bit, - cable_usbblaster_write_stream, - cable_usbblaster_read_stream, - NULL, - "", - "no options\n" }, - { "xpc_usb", - cable_xpcusb_inout, - cable_xpcusb_out, - cable_xpcusb_init, - NULL, - cable_xpcusb_opt, - cable_common_write_bit, - cable_xpcusb_read_write_bit, - cable_common_write_stream, - cable_common_read_stream, - NULL, - "", - "no options\n" }, -#ifdef __SUPPORT_FTDI_CABLES__ - { "ft2232", - NULL, - NULL, - cable_ftdi_init, - NULL, - cable_ftdi_opt, - cable_ftdi_write_bit, - cable_ftdi_read_write_bit, - cable_ftdi_write_stream, - cable_ftdi_read_stream, - cable_ftdi_flush, - "", - "no options\n" }, -#endif // __SUPPORT_FTDI_CABLES__ -#endif // __SUPPORT_USB_CABLES__ - { NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, NULL } }; - -static struct jtag_cable *jtag_cable_in_use = NULL; /* The currently selected cable */ - - -///////////////////////////////////////////////////////////////////////////////////// -// Cable subsystem / init functions - - -/* Selects a cable for use */ -int cable_select(const char *cable) -{ - int i; - - for(i = 0; jtag_cables[i].name; i++) { - if(!strcmp(cable, jtag_cables[i].name)) { - jtag_cable_in_use = &jtag_cables[i]; - return APP_ERR_NONE; - } - } - - return APP_ERR_CABLE_INVALID; -} - -/* Calls the init function of the cable - */ -int cable_init() -{ - return jtag_cable_in_use->init_func(); -} - -/* Parses command-line options specific to the selected cable */ -int cable_parse_opt(int c, char *str) -{ - return jtag_cable_in_use->opt_func(c, str); -} - -const char *cable_get_args() -{ - if(jtag_cable_in_use != NULL) - return jtag_cable_in_use->opts; - else - return NULL; -} - -/* Prints a (short) useage message for each available cable */ -void cable_print_help() -{ - int i; - printf("Available cables: "); - - for(i = 0; jtag_cables[i].name; i++) { - if(i) - printf(", "); - printf("%s", jtag_cables[i].name); - } - - printf("\n\nOptions availible for the cables:\n"); - for(i = 0; jtag_cables[i].name; i++) { - if(!jtag_cables[i].help) - continue; - printf(" %s:\n %s", jtag_cables[i].name, jtag_cables[i].help); - } -} - - -///////////////////////////////////////////////////////////////////////////////// -// Cable API Functions - -int cable_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { - return jtag_cable_in_use->stream_out_func(stream, len_bits, set_last_bit); -} - -int cable_read_write_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { - return jtag_cable_in_use->stream_inout_func(outstream, instream, len_bits, set_last_bit); -} - -int cable_write_bit(uint8_t packet) { - return jtag_cable_in_use->bit_out_func(packet); -} - -int cable_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { - return jtag_cable_in_use->bit_inout_func(packet_out, bit_in); -} - -int cable_flush(void) { - if(jtag_cable_in_use->flush_func != NULL) - return jtag_cable_in_use->flush_func(); - return APP_ERR_NONE; -} - - -///////////////////////////////////////////////////////////////////////////////////// -// Common functions which may or may not be used by individual drivers - - -/* Note that these make no assumption as to the starting state of the clock, - * and they leave the clock HIGH. But, these need to interface with other routines (like - * the byte-shift mode in the USB-Blaster), which begin by assuming that a new - * data bit is available at TDO, which only happens after a FALLING edge of TCK. - * So, routines which assume new data is available will need to start by dropping - * the clock. - */ -int cable_common_write_bit(uint8_t packet) { - uint8_t data = TRST_BIT; // TRST is active low, don't clear unless /set/ in 'packet' - int err = APP_ERR_NONE; - - /* Write data, drop clock */ - if(packet & TDO) data |= TDI_BIT; - if(packet & TMS) data |= TMS_BIT; - if(packet & TRST) data &= ~TRST_BIT; - - err |= jtag_cable_in_use->out_func(data); - if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); - - /* raise clock, to do write */ - err |= jtag_cable_in_use->out_func(data | TCLK_BIT); - if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); - - return err; -} - -int cable_common_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { - uint8_t data = TRST_BIT; // TRST is active low, don't clear unless /set/ in 'packet' - int err = APP_ERR_NONE; - - /* Write data, drop clock */ - if(packet_out & TDO) data |= TDI_BIT; - if(packet_out & TMS) data |= TMS_BIT; - if(packet_out & TRST) data &= ~TRST_BIT; - - err |= jtag_cable_in_use->out_func(data); // drop the clock to make data available, set the out data - if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); - err |= jtag_cable_in_use->inout_func((data | TCLK_BIT), bit_in); // read in bit, clock high for out bit. - if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); - - return err; -} - - -/* Writes bitstream via bit-bang. Can be used by any driver which does not have a high-speed transfer function. - * Transfers LSB to MSB of stream[0], then LSB to MSB of stream[1], etc. - */ -int cable_common_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { - int i; - int index = 0; - int bits_this_index = 0; - uint8_t out; - int err = APP_ERR_NONE; - - debug("writeSrrm%d(", len_bits); - for(i = 0; i < len_bits - 1; i++) { - out = (stream[index] >> bits_this_index) & 1; - err |= cable_write_bit(out); - debug("%i", out); - bits_this_index++; - if(bits_this_index >= 32) { - index++; - bits_this_index = 0; - } - } - - out = (stream[index] >>(len_bits - 1)) & 0x1; - if(set_last_bit) out |= TMS; - err |= cable_write_bit(out); - debug("%i)\n", out); - return err; -} - -/* Gets bitstream via bit-bang. Can be used by any driver which does not have a high-speed transfer function. - * Transfers LSB to MSB of stream[0], then LSB to MSB of stream[1], etc. - */ -int cable_common_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { - int i; - int index = 0; - int bits_this_index = 0; - uint8_t inval, outval; - int err = APP_ERR_NONE; - - instream[0] = 0; - - debug("readStrm%d(", len_bits); - for(i = 0; i < (len_bits - 1); i++) { - outval = (outstream[index] >> bits_this_index) & 0x1; - err |= cable_read_write_bit(outval, &inval); - debug("%i", inval); - instream[index] |= (inval << bits_this_index); - bits_this_index++; - if(bits_this_index >= 32) { - index++; - bits_this_index = 0; - instream[index] = 0; // It's safe to do this, because there's always at least one more bit - } - } - - if (set_last_bit) - outval = ((outstream[index] >> (len_bits - 1)) & 1) | TMS; - else - outval = (outstream[index] >> (len_bits - 1)) & 1; - - err |= cable_read_write_bit(outval, &inval); - debug("%i", inval); - instream[index] |= (inval << bits_this_index); - - debug(") = 0x%lX\n", instream[0]); - - return err; -} - - - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.c (nonexistent) @@ -1,487 +0,0 @@ -/* bsdl_parse.c - BSDL parser for the advanced JTAG bridge - Copyright(C) 2008 Nathan Yawn - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - -#include -#include -#include // isspace(), etc. -#include // malloc(), strtoul(), etc. -#include "bsdl.h" // has constants - - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -char * strtoupper(char *str); -int get_line(char *filedata, int startpos, char **linedata, int filesize); -char * strchr_s(char *str, char *chars); -void parse_opcodes(char *cmdbuf, uint32_t *debug_cmd, uint32_t *user1_cmd, uint32_t *idcode_cmd); - -// We assume that no value will be more than 128 chars -char tmpbuf[128]; - - - ///////////////////////////////////////////////////////////////// - // API call: extract desired info from 1 BSDL fise - -bsdlinfo *parse_extract_values(char *bsdlfilename) -{ - FILE *fd; - int filesize; - bsdlinfo *ret; - char *filedata; - char *linedata; - char *token; - char *last; - char *cmdbuf; - int filepos = 0; - int i,j; - char done,valid,opens; - - int IR_size = -1; - uint8_t found_IR_size = 0; - uint32_t debug_cmd = TAP_CMD_INVALID; - uint32_t user1_cmd = TAP_CMD_INVALID; - uint32_t idcode_cmd = TAP_CMD_INVALID; - uint8_t found_cmds = 0; - uint32_t idcode = 0; - uint32_t idcode_mask = 0xFFFFFFFF; // 'X' is a valid char in an IDCODE, set 0's here for X's. - uint8_t found_idcode = 0; - char *entityname = NULL; - - // Open the file - fd = fopen(bsdlfilename, "r"); - if(fd == NULL) { - printf("ERROR: failed to open BSDL file %s\n", bsdlfilename); - return NULL; - } - - fseek(fd, 0, SEEK_END); - filesize = ftell(fd); - fseek(fd, 0, SEEK_SET); - - filedata = (char *) malloc(filesize); - if(filedata == NULL) { - printf("ERROR: failed to allocate memory for BSDL file %s\n", bsdlfilename); - return NULL; - } - - if(fread(filedata, 1, filesize, fd) < filesize) { // 1 long read will be faster than many short ones - printf("Warning: failed to read entire BSDL file %s\n", bsdlfilename); - } - - fclose(fd); - - - // while there's more data and not all values have been found - while((filepos < filesize) && (!found_IR_size || !found_cmds || !found_idcode)) - { - // Get a line. Replace any "--" with a \0 char - filepos = get_line(filedata, filepos, &linedata, filesize); - - // look for each value - token = strtok_r(linedata, " \t", &last); - if(token == NULL) { - printf("ERROR: End of file reached before END statement is BSDL file \'%s\'\n", bsdlfilename); - break; - } - - if(!strcmp(strtoupper(token), "ENTITY")) { - // Parse an entity line - token = strtok_r(NULL, " \t", &last); - if(token != NULL) { - entityname = (char *) malloc(strlen(token)); - if(entityname != NULL) strcpy(entityname, token); - debug("Found entity \'%s\'\n", entityname); - } else { - printf("Parse error near ENTITY token in file %s\n", bsdlfilename); - } - } - else if(!strcmp(strtoupper(token), "CONSTANT")) { - // Parse a constant declaration...we ignore them, just get lines until we find a ';' char - // assume nothing else useful comes on the line after the ';' - // Slightly awkward, since we have to search the rest of the line after the strtok, then possible - // new lines as well. - token = strtok_r(NULL, " \t", &last); // debug...don't worry about error, token only used in printf - debug("Ignoring constant \'%s\'\n", token); // debug - while(strchr(last, ';') == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - } - else if(!strcmp(strtoupper(token), "GENERIC")) { - // Parse a generic declaration...we ignore them, just get lines until we find a ';' char - // assume nothing else useful comes on the line after the ';' - // Slightly awkward, since we have to search the rest of the line after the strtok, then possible - // new lines as well. - token = strtok_r(NULL, " \t", &last); // debug...don't worry about error, token only used in printf - debug("Ignoring generic \'%s\'\n", token); // debug - while(strchr(last, ';') == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - } - else if(!strcmp(strtoupper(token), "USE")) { - // Parse a 'use' declaration...we ignore them, just get lines until we find a ';' char - // assume nothing else useful comes on the line after the ';' - // Note that there may be no space after the token, so add ';' to the tokenizing list in the debug bits. - // Slightly awkward, since we have to search the rest of the line after the strtok, then possible - // new lines as well. - token = strtok_r(NULL, " \t;", &last); // debug ...don't worry about error, token only used in printf - debug("Ignoring use \'%s\'\n", token); // debug - while(strchr(last, ';') == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - } - else if(!strcmp(strtoupper(token), "END")) { - // We're done, whether we've found what we want or not. Eject eject eject... - debug("Found END token, stopping parser\n"); - break; - } - else if(!strcmp(strtoupper(token), "PORT")) { - // Parse a port list. Find a '(', find a ')', find a ';'. - // Note that "()" pairs may occur in between. - // 'last' must be set in the first two strchr() calls so that the next strchr() call will - // begin parsing after the previous char position. Otherwise, e.g. a ';' before the ')' but on the same - // line would (incorrectly) satisfy the search. - while((last = strchr(last, '(')) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - opens = 1; - last++; // don't leave 'last' pointing at the '(' char, since we're looking for another - - do { - while((last = strchr_s(last, "()")) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** abort if new line is empty - } - if(*last == '(') opens++; - else if(*last == ')') opens--; - last++; // don't leave last pointing at the same "()" char, since we're looking for another - } while(opens); - - - while(strchr(last, ';') == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - debug("Ignored port statement\n"); - } - else if(!strcmp(strtoupper(token), "ATTRIBUTE")) { - // Parse an attribute - token = strtok_r(NULL, " \t", &last); // *** check for error - if(!strcmp(strtoupper(token), "INSTRUCTION_LENGTH")) { - // Find ':', then "entity", then "is", then take anything before the ';' as the value - while((last = strchr(last, ':')) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "is")) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - - // scan until the end of the line looking for data - j = 0; - done = 0; - while(*last != '\0') { - if(isdigit(*last)) tmpbuf[j++] = *last; - else if(*last == ';') { done = 1; break;} - last++; - } - // May need to go to additional lines - while(!done) { - filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data - while(*linedata != '\0') { - if(isdigit(*linedata)) tmpbuf[j++] = *linedata; - else if(*linedata == ';') { done = 1; break;} - linedata++; - } - } - - tmpbuf[j] = '\0'; - IR_size = strtoul(tmpbuf, NULL, 0); - found_IR_size = 1; - debug("Found IR size %i (%s)\n", IR_size, tmpbuf); - } // end if INSTRUCTION_LENGTH - - else if(!strcmp(strtoupper(token), "INSTRUCTION_OPCODE")) { - // Find ": entity is" - while((last = strchr(last, ':')) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "is")) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - - // We're going to copy the entire attribute (all commands) into a temp. buffer. We need a big enough buffer, - // and we can't just scan for ';' to find out because there's a '\0' at the end of this line. - // But, it can't be bigger than the entire rest of the file, so... - cmdbuf = (char *) malloc(filesize-filepos); - // Parse until ';', and grab everything between each pair of "" found - // Note that 'last' still points at "is" - j = 0; - done = 0; - valid = 0; - while(*last != '\0') { - if(*last == ';') { done = 1; break;} // Put this first in case of badly formed BSDL files - else if(valid && (*last != '\"')) cmdbuf[j++] = *last; - else if(*last == '\"') valid = !valid; - last++; - } - // May need to go to additional lines - while(!done) { - filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data - while(*linedata != '\0') { - if(valid && (*linedata != '\"')) cmdbuf[j++] = *linedata; - else if(*linedata == '\"') valid = !valid; - else if(*linedata == ';') { done = 1; break;} - linedata++; - } - } - cmdbuf[j] = '\0'; - - // Parse the opcodes attribute. This is an exercise unto itself, so do it in another function. - parse_opcodes(cmdbuf, &debug_cmd, &user1_cmd, &idcode_cmd); - found_cmds = 1; - free(cmdbuf); - - } // end if INSTRUCTION_OPCODE - - else if(!strcmp(strtoupper(token), "IDCODE_REGISTER")) { - // Find : entity is - while((last = strchr(last, ':')) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - while((last = strstr(last, "is")) == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? - } - - // Parse until ';', and grab everything between each pair of "" found - // Note that 'last' still points at "is" - j = 0; - done = 0; - valid = 0; - while(*last != '\0') { - if(*last == ';') { done = 1; break;} // Put this first in case of badly formed BSDL files - else if(valid && (*last != '\"')) tmpbuf[j++] = *last; - else if(*last == '\"') valid = !valid; - last++; - } - // May need to go to additional lines - while(!done) { - filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data - while(*linedata != '\0') { - if(valid && (*linedata != '\"')) tmpbuf[j++] = *linedata; - else if(*linedata == '\"') valid = !valid; - else if(*linedata == ';') { done = 1; break;} - linedata++; - } - } - tmpbuf[j] = '\0'; - - // Parse the tmpbuf - if(j != 32) printf("Warning: found %i chars (expected 32) while getting IDCODE in BSDL file %s.\n", j, bsdlfilename); // Sanity check - debug("Got IDCODE string \'%s\'\n", tmpbuf); - for(i = 0; i < j; i++) { - if(tmpbuf[i] == '1') idcode |= 0x1<<(31-i); - else if(toupper(tmpbuf[i]) == 'X') idcode_mask &= ~(0x1<<(31-i)); - } - debug("Found IDCODE 0x%08X (%s), mask is 0x%08X\n", idcode, tmpbuf, idcode_mask); - found_idcode = 1; - - } // end if IDCODE_REGISTER - - else { - debug("Ignoring attribute \'%s\'\n", token); - // Consume chars until ';' found - while(strchr(last, ';') == NULL) { - filepos = get_line(filedata, filepos, &last, filesize); - } - } - } - else { - debug("Unknown token \'%s\' found in BSDL file %s\n", token, bsdlfilename); - } - } - - free(filedata); - - // Put the data in a struct for return and storage - ret = (bsdlinfo *) malloc(sizeof(bsdlinfo)); - if(ret == NULL) { - printf("Error: out of memory, unable to store BSDL info for file %s\n", bsdlfilename); - return NULL; - } - - ret->name = entityname; // this was malloc'd, so it's persistant, this is safe - ret->idcode = idcode; - ret->idcode_mask = idcode_mask; - ret->IR_size = IR_size; - ret->cmd_debug = debug_cmd; - ret->cmd_user1 = user1_cmd; - ret->cmd_idcode = idcode_cmd; - ret->next = NULL; - - return ret; -} - - - -////////////////////////////////////////////////////////////////////////////////////////////// -// Local / helper functions - - -// Returns 1 line from a complete file buffer pointed to by *filedata. Removes leading -// whitespace, ignores comment lines, removes trailing comments (comments denoted by "--") -// startpos: index in filedata[] to start looking for a new line. -// linedata: set to point to the first char of the new line. -// filesize: used so we don't go past the end of filedata[] -// The return value is the first index after the returned line. This may be 1 past the end of the buffer. -int get_line(char *filedata, int startpos, char **linedata, int filesize) -{ - int lineidx = startpos; - unsigned char loop; - char *commentptr; - - do { - loop = 0; - while(isspace(filedata[lineidx]) && (lineidx < filesize)) lineidx++; // burn leading whitespace chars - - if(lineidx >= (filesize-1)) { // We look at the data at lineidx and lineidx+1...don't look at invalid offsets. - lineidx = filesize-1; - break; - } - - if((filedata[lineidx] == '-') && (filedata[lineidx+1] == '-')) - { // then this is a full-line comment, with no useful data - while(((filedata[lineidx] != '\n') && (filedata[lineidx] != '\r')) && (lineidx < filesize)) - lineidx++; // burn comment line up to CR/LF - loop = 1; - } - } while(loop); - - // Set the line pointer - *linedata = &filedata[lineidx]; - - // Put a NULL char at the newline - while(!iscntrl(filedata[lineidx]) && (lineidx < filesize)) lineidx++; - if(lineidx >= filesize) { // Don't write past the end of the array. - lineidx = filesize-1; - } - filedata[lineidx] = '\0'; - - // Put a NULL at the first "--" string, if any - commentptr = strstr(*linedata, "--"); - if(commentptr != NULL) *commentptr = '\0'; - - return lineidx+1; -} - - -// In-place string capitalizer -char * strtoupper(char *str) -{ - int i = 0; - - while(str[i] != '\0') { - str[i] = toupper(str[i]); - i++; - } - - return str; -} - -// Searches a string 'str' for the first occurance of any -// character in the string 'chars'. Returns a pointer to -// the char in 'str' if one is found, returns NULL if -// none of the chars in 'chars' are present in 'str'. -char * strchr_s(char *str, char *chars) -{ - int slen = strlen(chars); - char *ptr = str; - int i; - - while(*ptr != '\0') { - for(i = 0; i < slen; i++) { - if(*ptr == chars[i]) - return ptr; - } - ptr++; - } - - return NULL; -} - - -// Parses a string with command name / opcode pairs of the format -// EXTEST (1111000000),SAMPLE (1111000001), [...] -// There may or may not be a space between the name and the open paren. -// We do not assume a comma after the last close paren. -#define TARGET_DEBUG 1 -#define TARGET_USER1 2 -#define TARGET_IDCODE 3 -void parse_opcodes(char *cmdbuf, uint32_t *debug_cmd, uint32_t *user1_cmd, uint32_t *idcode_cmd) -{ - char *saveptr = NULL; - char *cmd; - char *token; - char *saveptr2; - int target; - int opcode; - - cmd = strtok_r(cmdbuf, ",", &saveptr); - while(cmd != NULL) - { - // 'cmd' should now have one pair in the form "EXTEST (1111000000)" - target = 0; - token = strtok_r(cmd, " \t(", &saveptr2); - if(!strcmp(strtoupper(token), "DEBUG")) { - target = TARGET_DEBUG; - debug("Found DEBUG opcode: "); - } - else if(!strcmp(strtoupper(token), "USER1")) { - target = TARGET_USER1; - debug("Found USER1 opcode:"); - } - else if(!strcmp(strtoupper(token), "IDCODE")) { - target = TARGET_IDCODE; - debug("Found IDCODE opcode: "); - } - - if(target) { // don't parse opcode number unless necessary - token = strtok_r(NULL, " \t()", &saveptr2); - if(token != NULL) { - opcode = strtoul(token, NULL, 2); // *** Test for errors - debug("0x%X (%s)\n", opcode, token); - - if(target == TARGET_DEBUG) *debug_cmd = opcode; - else if(target == TARGET_USER1) *user1_cmd = opcode; - else if(target == TARGET_IDCODE) *idcode_cmd = opcode; - } - else { - printf("Error: failed to find opcode value after identifier.\n"); - } - } - - cmd = strtok_r(NULL, ",", &saveptr); - } - - -} Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.c (nonexistent) @@ -1,259 +0,0 @@ -/* cable_sim.c - Simulation connection drivers for the Advanced JTAG Bridge - Copyright (C) 2001 Marko Mlinar, markom@opencores.org - Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org - - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - - -#include "cable_common.h" -#include "errcodes.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -/* Only used in the vpi */ -static int vpi_comm; -static int vpi_port = 4567; -static char *vpi_server = "localhost"; - -/* Only used for the rtl_sim */ -static char *gdb_in = "gdb_in.dat"; -static char *gdb_out = "gdb_out.dat"; - - - -/*-------------------------------------------[ rtl_sim specific functions ]---*/ -int cable_rtl_sim_init() -{ - FILE *fin = fopen (gdb_in, "wt+"); - if(!fin) { - fprintf(stderr, "Can not open %s\n", gdb_in); - return APP_ERR_INIT_FAILED; - } - fclose(fin); - return APP_ERR_NONE; -} - -int cable_rtl_sim_out(uint8_t value) -{ - FILE *fout; - int num_read; - int r; - debug("O (%x)\n", value); - fout = fopen(gdb_in, "wt+"); - fprintf(fout, "F\n"); - fflush(fout); - fclose(fout); - fout = fopen(gdb_out, "wt+"); - fprintf(fout, "%02X\n", value); - fflush(fout); - fclose(fout); - do { - fout = fopen(gdb_out, "rt"); - r = fscanf(fout,"%x", &num_read); - fclose(fout); - usleep(1000); - debug(" (Ack %x) ", num_read); - } while(!r || (num_read != (0x10 | value))); - debug("\n"); - return APP_ERR_NONE; -} - -uint8_t cable_rtl_sim_inout(uint8_t value, uint8_t *inval) -{ - FILE *fin = 0; - char ch; - uint8_t data; - debug("IO ("); - - while(1) { - fin = fopen(gdb_in, "rt"); - if(!fin) { - usleep(1000); - continue; - } - ch = fgetc(fin); - fclose(fin); - if((ch != '0') && (ch != '1')) { - usleep(1000); - continue; - } - else - break; - } - data = ch == '1' ? 1 : 0; - - debug("%x,", data); - - cable_rtl_sim_out(value); - - debug("%x)\n", value); - - *inval = data; - return APP_ERR_NONE; -} - - -int cable_rtl_sim_opt(int c, char *str) -{ - switch(c) { - case 'd': - if(!(gdb_in = malloc(strlen(str) + 12))) { /* 12 == strlen("gdb_in.dat") + 2 */ - fprintf(stderr, "Unable to allocate enough memory\n"); - return APP_ERR_MALLOC; - } - if(!(gdb_out = malloc(strlen(str) + 13))) { /* 13 == strlen("gdb_out.dat") + 2 */ - fprintf(stderr, "Unable to allocate enough memory\n"); - free(gdb_in); - return APP_ERR_MALLOC; - } - - sprintf(gdb_in, "%s/gdb_in.dat", str); - sprintf(gdb_out, "%s/gdb_out.dat", str); - break; - default: - fprintf(stderr, "Unknown parameter '%c'\n", c); - return APP_ERR_BAD_PARAM; - } - return APP_ERR_NONE; -} - -/*-----------------------------------------------[ VPI specific functions ]---*/ -int cable_vpi_init() -{ - struct sockaddr_in addr; - struct hostent *he; - - if((vpi_comm = socket(PF_INET, SOCK_STREAM, 0)) < 0) { - fprintf(stderr, "Unable to create socket (%s)\n", strerror(errno)); - return APP_ERR_CONNECT; - } - - - if((he = gethostbyname(vpi_server)) == NULL) { - perror("gethostbyname"); - return APP_ERR_CONNECT; - } - - addr.sin_family = AF_INET; - addr.sin_port = vpi_port; - addr.sin_addr = *((struct in_addr *)he->h_addr); - memset(addr.sin_zero, '\0', sizeof(addr.sin_zero)); - - if(connect(vpi_comm, (struct sockaddr *)&addr, sizeof(addr)) == -1) { - fprintf(stderr, "Unable to connect to %s port %d (%s)\n", vpi_server, vpi_port, - strerror(errno)); - return APP_ERR_CONNECT; - } - - debug("VPI connected!"); - - return APP_ERR_NONE; -} - -int cable_vpi_out(uint8_t value) -{ - uint8_t ack; - int ret; - - /* Send the data to the socket */ - ret = send(vpi_comm, &value, 1, 0); - debug("Sent %d, ret %d\n", value, ret); - - do { - /* Ok, read the data */ - ret = recv(vpi_comm, &ack, 1, 0); - if(ret < 0) { - printf("Error during receive (%s)\n", strerror(errno)); - return APP_ERR_CONNECT; - } - } while(ack != (value | 0x10)); - return APP_ERR_NONE; -} - -int cable_vpi_inout(uint8_t value, uint8_t *inval) -{ - uint8_t dat; - - /* ask vpi to send us the out-bit */ - dat = 0x80; - send(vpi_comm, &dat, 1, 0); - - /* Wait and read the data */ - recv(vpi_comm, &dat, 1, 0); - - if(dat > 1) - fprintf(stderr, "Unexpected value: %i\n", dat); - - cable_vpi_out(value); - - *inval = dat; - return APP_ERR_NONE; -} - -void cable_vpi_wait() -{ - uint8_t dat = 0x81; - - /* Get the sim to reply when the timeout has been reached */ - if(send(vpi_comm, &dat, 1, 0) < 1) { - fprintf(stderr, "Failed to send pkt in cable_vpi_wait(): %s\n", strerror(errno)); - } - - /* block, waiting for the data */ - if(recv(vpi_comm, &dat, 1, 0) < 1) { - fprintf(stderr, "Recv failed in cable_vpi_wait(): %s\n", strerror(errno)); - } - - if(dat != 0xFF) - fprintf(stderr, "Warning: got wrong byte waiting for timeout: 0x%X\n", dat); - -} - -int cable_vpi_opt(int c, char *str) -{ - switch(c) { - case 'p': - if((vpi_port = atoi(str)) == 0) { - fprintf(stderr, "Bad port value for VPI sim: %s\n", str); - return APP_ERR_BAD_PARAM; - } - break; - case 's': - vpi_server = strdup(str); - if(vpi_server == NULL) { - fprintf(stderr, "Unable to allocate enough memory for server string\n"); - return APP_ERR_MALLOC; - } - break; - default: - fprintf(stderr, "Unknown parameter '%c'\n", c); - return APP_ERR_BAD_PARAM; - } - return APP_ERR_NONE; -} Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.c (nonexistent) @@ -1,191 +0,0 @@ -/* cable_parallel.c - Parallel cable drivers (XPC3 and XESS) for the Advanced JTAG Bridge - Copyright (C) 2001 Marko Mlinar, markom@opencores.org - Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org - - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - - -#include -#include // for inb(), outb() -#include -#include - -#include "cable_common.h" -#include "errcodes.h" - - -#define LPT_READ (base+1) -#define LPT_WRITE base - -// Common functions used by both cable types -static int cable_parallel_out(uint8_t value); -static int cable_parallel_inout(uint8_t value, uint8_t *inval); - - -static int base = 0x378; - - - -///////////////////////////////////////////////////////////////////////////////// -/*-------------------------------------[ Parallel port specific functions ]---*/ -/////////////////////////////////////////////////////////////////////////////// - -int cable_parallel_init() -{ - - //#ifndef WIN32 - if (ioperm(base, 3, 1)) { - fprintf(stderr, "Couldn't get the port at %x\n", base); - perror("Root privileges are required.\n"); - return APP_ERR_INIT_FAILED; - } - printf("Connected to parallel port at %x\n", base); - printf("Dropping root privileges.\n"); - setreuid(getuid(), getuid()); - //#endif - - return APP_ERR_NONE; -} - - -int cable_parallel_opt(int c, char *str) -{ - switch(c) { - case 'p': - if(!sscanf(str, "%x", &base)) { - fprintf(stderr, "p parameter must have a hex number as parameter\n"); - return APP_ERR_BAD_PARAM; - } - break; - default: - fprintf(stderr, "Unknown parameter '%c'\n", c); - return APP_ERR_BAD_PARAM; - } - return APP_ERR_NONE; -} - -/*-----------------------------------------[ Physical board wait function ]---*/ -void cable_parallel_phys_wait() -{ - usleep(10); -} - -/*----------------------------------------------[ xpc3 specific functions ]---*/ -int cable_xpc3_out(uint8_t value) -{ - uint8_t out = 0; - - /* First convert the bits in value byte to the ones that the cable wants */ - if(value & TCLK_BIT) - out |= 0x02; /* D1 pin 3 */ - if(value & TRST_BIT) - out |= 0x10; /* Not used */ - if(value & TDI_BIT) - out |= 0x01; /* D0 pin 2 */ - if(value & TMS_BIT) - out |= 0x04; /* D2 pin 4 */ - - return cable_parallel_out(out); -} - -int cable_xpc3_inout(uint8_t value, uint8_t *inval) -{ - uint8_t in; - int retval; - uint8_t out = 0; - - /* First convert the bits in value byte to the ones that the cable wants */ - if(value & TCLK_BIT) - out |= 0x02; /* D1 pin 3 */ - if(value & TRST_BIT) - out |= 0x10; /* Not used */ - if(value & TDI_BIT) - out |= 0x01; /* D0 pin 2 */ - if(value & TMS_BIT) - out |= 0x04; /* D2 pin 4 */ - - retval = cable_parallel_inout(out, &in); - - if(in & 0x10) /* S6 pin 13 */ - *inval = 1; - else - *inval = 0; - - return retval; -} - -/*----------------------------------------------[ xess specific functions ]---*/ -int cable_xess_out(uint8_t value) -{ - uint8_t out = 0; - - /* First convert the bits in value byte to the ones that the cable wants */ - if(value & TCLK_BIT) - out |= 0x04; /* D2 pin 4 */ - if(value & TRST_BIT) - out |= 0x08; /* D3 pin 5 */ - if(value & TDI_BIT) - out |= 0x10; /* D4 pin 6 */ - if(value & TMS_BIT) - out |= 0x20; /* D3 pin 5 */ - - return cable_parallel_out(out); -} - -uint8_t cable_xess_inout(uint8_t value, uint8_t *inval) -{ - uint8_t in; - int retval; - uint8_t out = 0; - - /* First convert the bits in value byte to the ones that the cable wants */ - if(value & TCLK_BIT) - out |= 0x04; /* D2 pin 4 */ - if(value & TRST_BIT) - out |= 0x08; /* D3 pin 5 */ - if(value & TDI_BIT) - out |= 0x10; /* D4 pin 6 */ - if(value & TMS_BIT) - out |= 0x20; /* D3 pin 5 */ - - retval = cable_parallel_inout(out, &in); - - if(in & 0x20) /* S5 pin 12*/ - *inval = 1; - else - *inval = 0; - - return retval; -} - - -/*----------------------------------------------[ common helper functions ]---*/ -// 'static' for internal access only - -static int cable_parallel_out(uint8_t value) -{ - outb(value, LPT_WRITE); - return APP_ERR_NONE; -} - -static int cable_parallel_inout(uint8_t value, uint8_t *inval) -{ - *inval = inb(LPT_READ); - outb(value, LPT_WRITE); - - return APP_ERR_NONE; -} Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_common.h (nonexistent) @@ -1,44 +0,0 @@ - -#ifndef _CABLE_COMMON_H_ -#define _CABLE_COMMON_H_ - -#include - -// Defines to use in the 'packet' args of cable_write_bit() -// and cable_read_write_bit(). Note that while TRST is -// active low for JTAG hardware, here the TRST bit -// should be set when you want the TRST wire active -// (JTAG TAP to be reset). -#define TRST (0x04) -#define TMS (0x02) -#define TDO (0x01) - -// These should only be used in the cable_* files. -#define TCLK_BIT (0x01) -#define TRST_BIT (0x02) -#define TDI_BIT (0x04) -#define TMS_BIT (0x08) -#define TDO_BIT (0x20) - -// Cable subsystem / init routines -int cable_select(const char *cable); -int cable_init(); -int cable_parse_opt(int c, char *str); -const char *cable_get_args(); -void cable_print_help(); - - -// Cable API routines -int cable_write_bit(uint8_t packet); -int cable_read_write_bit(uint8_t packet_out, uint8_t *bit_in); -int cable_write_stream(uint32_t *stream, int len_bits, int set_last_bit); -int cable_read_write_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); -int cable_flush(void); - -// Common functions for lower-level drivers to use as desired -int cable_common_write_bit(uint8_t packet); -int cable_common_read_write_bit(uint8_t packet_out, uint8_t *bit_in); -int cable_common_write_stream(uint32_t *stream, int len_bits, int set_last_bit); -int cable_common_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/bsdl_parse.h (nonexistent) @@ -1,9 +0,0 @@ -#ifndef _BSDL_PARSE_H_ -#define _BSDL_PARSE_H_ - -#include "bsdl.h" // need definition of bsdlinfo here - - -bsdlinfo * parse_extract_values(char *bsdlfilename); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_sim.h (nonexistent) @@ -1,20 +0,0 @@ - -#ifndef _CABLE_SIM_H_ -#define _CABLE_SIM_H_ - -#include - -int cable_rtl_sim_init(); -int cable_rtl_sim_out(uint8_t value); -int cable_rtl_sim_inout(uint8_t value, uint8_t *inval); -void cable_rtl_sim_wait(); -int cable_rtl_sim_opt(int c, char *str); - -int cable_vpi_init(); -int cable_vpi_out(uint8_t value); -int cable_vpi_inout(uint8_t value, uint8_t *inval); -void cable_vpi_wait(); -int cable_vpi_opt(int c, char *str); - - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/License_FDL-1.2.txt =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/License_FDL-1.2.txt (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/License_FDL-1.2.txt (nonexistent) @@ -1,397 +0,0 @@ - GNU Free Documentation License - Version 1.2, November 2002 - - - Copyright (C) 2000,2001,2002 Free Software Foundation, Inc. - 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - -0. 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ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/src/adv_jtag_bridge.odt Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/gpl-2.0.txt =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/gpl-2.0.txt (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/doc/gpl-2.0.txt (nonexistent) @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_parallel.h (nonexistent) @@ -1,19 +0,0 @@ - -#ifndef _CABLE_PARALLEL_H_ -#define _CABLE_PARALLEL_H_ - -#include - -int cable_parallel_init(); -int cable_parallel_opt(int c, char *str); -void cable_parallel_phys_wait(); - -int cable_xpc3_inout(uint8_t value, uint8_t *inval); -int cable_xpc3_out(uint8_t value); - -int cable_xess_inout(uint8_t value, uint8_t *inval); -int cable_xess_out(uint8_t value); - - - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/spr-defs.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/spr-defs.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/spr-defs.h (nonexistent) @@ -1,581 +0,0 @@ -/* spr-defs.h -- Defines OR1K architecture specific special-purpose registers - - Copyright (C) 1999 Damjan Lampret, lampret@opencores.org - Copyright (C) 2008 Embecosm Limited - - Contributor Jeremy Bennett - - This file is part of OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 3 of the License, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. - - You should have received a copy of the GNU General Public License along - with this program. If not, see . */ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifndef SPR_DEFS__H -#define SPR_DEFS__H - -/* Definition of special-purpose registers (SPRs). */ - -#define MAX_GRPS (32) -#define MAX_SPRS_PER_GRP_BITS (11) -#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) -#define MAX_SPRS (0x10000) - -/* Base addresses for the groups */ -#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) - -/* System control and status group */ -#define SPR_VR (SPRGROUP_SYS + 0) -#define SPR_UPR (SPRGROUP_SYS + 1) -#define SPR_CPUCFGR (SPRGROUP_SYS + 2) -#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) -#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) -#define SPR_DCCFGR (SPRGROUP_SYS + 5) -#define SPR_ICCFGR (SPRGROUP_SYS + 6) -#define SPR_DCFGR (SPRGROUP_SYS + 7) -#define SPR_PCCFGR (SPRGROUP_SYS + 8) -#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ -#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ -#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ -#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ -#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ -#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) -#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) -#define SPR_ESR_BASE (SPRGROUP_SYS + 64) -#define SPR_ESR_LAST (SPRGROUP_SYS + 79) -#define SPR_GPR_BASE (SPRGROUP_SYS + 1024) -#define SPR_GPR_LAST (SPRGROUP_SYS + 1535) -#define MAX_GPRS 32 // Does this really belong here? No. --NAY - -/* Data MMU group */ -#define SPR_DMMUCR (SPRGROUP_DMMU + 0) -#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) -#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) -#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) -#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) - -/* Instruction MMU group */ -#define SPR_IMMUCR (SPRGROUP_IMMU + 0) -#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) -#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) -#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) -#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) - -/* Data cache group */ -#define SPR_DCCR (SPRGROUP_DC + 0) -#define SPR_DCBPR (SPRGROUP_DC + 1) -#define SPR_DCBFR (SPRGROUP_DC + 2) -#define SPR_DCBIR (SPRGROUP_DC + 3) -#define SPR_DCBWR (SPRGROUP_DC + 4) -#define SPR_DCBLR (SPRGROUP_DC + 5) -#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) -#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) - -/* Instruction cache group */ -#define SPR_ICCR (SPRGROUP_IC + 0) -#define SPR_ICBPR (SPRGROUP_IC + 1) -#define SPR_ICBIR (SPRGROUP_IC + 2) -#define SPR_ICBLR (SPRGROUP_IC + 3) -#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) -#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) - -/* MAC group */ -#define SPR_MACLO (SPRGROUP_MAC + 1) -#define SPR_MACHI (SPRGROUP_MAC + 2) - -/* Debug group */ -#define SPR_DVR(N) (SPRGROUP_D + (N)) -#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) -#define SPR_DMR1 (SPRGROUP_D + 16) -#define SPR_DMR2 (SPRGROUP_D + 17) -#define SPR_DWCR0 (SPRGROUP_D + 18) -#define SPR_DWCR1 (SPRGROUP_D + 19) -#define SPR_DSR (SPRGROUP_D + 20) -#define SPR_DRR (SPRGROUP_D + 21) - -/* Performance counters group */ -#define SPR_PCCR(N) (SPRGROUP_PC + (N)) -#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) - -/* Power management group */ -#define SPR_PMR (SPRGROUP_PM + 0) - -/* PIC group */ -#define SPR_PICMR (SPRGROUP_PIC + 0) -#define SPR_PICPR (SPRGROUP_PIC + 1) -#define SPR_PICSR (SPRGROUP_PIC + 2) - -/* Tick Timer group */ -#define SPR_TTMR (SPRGROUP_TT + 0) -#define SPR_TTCR (SPRGROUP_TT + 1) - -/* - * Bit definitions for the Version Register - * - */ -#define SPR_VR_VER 0xff000000 /* Processor version */ -#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */ -#define SPR_VR_RES 0x00ff0000 /* Reserved */ -#define SPR_VR_REV 0x0000003f /* Processor revision */ - -#define SPR_VR_VER_OFF 24 -#define SPR_VR_CFG_OFF 16 -#define SPR_VR_REV_OFF 0 - -/* - * Bit definitions for the Unit Present Register - * - */ -#define SPR_UPR_UP 0x00000001 /* UPR present */ -#define SPR_UPR_DCP 0x00000002 /* Data cache present */ -#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ -#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ -#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ -#define SPR_UPR_MP 0x00000020 /* MAC present */ -#define SPR_UPR_DUP 0x00000040 /* Debug unit present */ -#define SPR_UPR_PCUP 0x00000080 /* Performance counters unit present */ -#define SPR_UPR_PMP 0x00000100 /* Power management present */ -#define SPR_UPR_PICP 0x00000200 /* PIC present */ -#define SPR_UPR_TTP 0x00000400 /* Tick timer present */ -#define SPR_UPR_RES 0x00fe0000 /* Reserved */ -#define SPR_UPR_CUP 0xff000000 /* Context units present */ - -/* - * JPB: Bit definitions for the CPU configuration register - * - */ -#define SPR_CPUCFGR_NSGF 0x0000000f /* Number of shadow GPR files */ -#define SPR_CPUCFGR_CGF 0x00000010 /* Custom GPR file */ -#define SPR_CPUCFGR_OB32S 0x00000020 /* ORBIS32 supported */ -#define SPR_CPUCFGR_OB64S 0x00000040 /* ORBIS64 supported */ -#define SPR_CPUCFGR_OF32S 0x00000080 /* ORFPX32 supported */ -#define SPR_CPUCFGR_OF64S 0x00000100 /* ORFPX64 supported */ -#define SPR_CPUCFGR_OV64S 0x00000200 /* ORVDX64 supported */ -#define SPR_CPUCFGR_RES 0xfffffc00 /* Reserved */ - -/* - * JPB: Bit definitions for the Debug configuration register and other - * constants. - * - */ - -#define SPR_DCFGR_NDP 0x00000007 /* Number of matchpoints mask */ -#define SPR_DCFGR_NDP1 0x00000000 /* One matchpoint supported */ -#define SPR_DCFGR_NDP2 0x00000001 /* Two matchpoints supported */ -#define SPR_DCFGR_NDP3 0x00000002 /* Three matchpoints supported */ -#define SPR_DCFGR_NDP4 0x00000003 /* Four matchpoints supported */ -#define SPR_DCFGR_NDP5 0x00000004 /* Five matchpoints supported */ -#define SPR_DCFGR_NDP6 0x00000005 /* Six matchpoints supported */ -#define SPR_DCFGR_NDP7 0x00000006 /* Seven matchpoints supported */ -#define SPR_DCFGR_NDP8 0x00000007 /* Eight matchpoints supported */ -#define SPR_DCFGR_WPCI 0x00000008 /* Watchpoint counters implemented */ - -#define MATCHPOINTS_TO_NDP(n) (1 == n ? SPR_DCFGR_NDP1 : \ - 2 == n ? SPR_DCFGR_NDP2 : \ - 3 == n ? SPR_DCFGR_NDP3 : \ - 4 == n ? SPR_DCFGR_NDP4 : \ - 5 == n ? SPR_DCFGR_NDP5 : \ - 6 == n ? SPR_DCFGR_NDP6 : \ - 7 == n ? SPR_DCFGR_NDP7 : SPR_DCFGR_NDP8) -#define MAX_MATCHPOINTS 8 -#define MAX_WATCHPOINTS (MAX_MATCHPOINTS + 2) - -/* - * Bit definitions for the Supervision Register - * - */ -#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ -#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ -#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ -#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ -#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ -#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ -#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ -#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ -#define SPR_SR_CE 0x00000100 /* CID Enable */ -#define SPR_SR_F 0x00000200 /* Condition Flag */ -#define SPR_SR_CY 0x00000400 /* Carry flag */ -#define SPR_SR_OV 0x00000800 /* Overflow flag */ -#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ -#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ -#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */ -#define SPR_SR_FO 0x00008000 /* Fixed one */ -#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */ -#define SPR_SR_RES 0x0ffe0000 /* Reserved */ -#define SPR_SR_CID 0xf0000000 /* Context ID */ - -/* - * Bit definitions for the Data MMU Control Register - * - */ -#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ -#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ -#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ -#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ - -/* - * Bit definitions for the Instruction MMU Control Register - * - */ -#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ -#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ -#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ -#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ - -/* - * Bit definitions for the Data TLB Match Register - * - */ -#define SPR_DTLBMR_V 0x00000001 /* Valid */ -#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ -#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ -#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ -#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ - -/* - * Bit definitions for the Data TLB Translate Register - * - */ -#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ -#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ -#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ -#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ -#define SPR_DTLBTR_A 0x00000010 /* Accessed */ -#define SPR_DTLBTR_D 0x00000020 /* Dirty */ -#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ -#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ -#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ -#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ -#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ - -/* - * Bit definitions for the Instruction TLB Match Register - * - */ -#define SPR_ITLBMR_V 0x00000001 /* Valid */ -#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ -#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ -#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ -#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ - -/* - * Bit definitions for the Instruction TLB Translate Register - * - */ -#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ -#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ -#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ -#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ -#define SPR_ITLBTR_A 0x00000010 /* Accessed */ -#define SPR_ITLBTR_D 0x00000020 /* Dirty */ -#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ -#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ -#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ - -/* - * Bit definitions for Data Cache Control register - * - */ -#define SPR_DCCR_EW 0x000000ff /* Enable ways */ - -/* - * Bit definitions for Insn Cache Control register - * - */ -#define SPR_ICCR_EW 0x000000ff /* Enable ways */ - -/* - * Bit definitions for Data Cache Configuration Register - * - */ - -#define SPR_DCCFGR_NCW 0x00000007 -#define SPR_DCCFGR_NCS 0x00000078 -#define SPR_DCCFGR_CBS 0x00000080 -#define SPR_DCCFGR_CWS 0x00000100 -#define SPR_DCCFGR_CCRI 0x00000200 -#define SPR_DCCFGR_CBIRI 0x00000400 -#define SPR_DCCFGR_CBPRI 0x00000800 -#define SPR_DCCFGR_CBLRI 0x00001000 -#define SPR_DCCFGR_CBFRI 0x00002000 -#define SPR_DCCFGR_CBWBRI 0x00004000 - -#define SPR_DCCFGR_NCW_OFF 0 -#define SPR_DCCFGR_NCS_OFF 3 -#define SPR_DCCFGR_CBS_OFF 7 - -/* - * Bit definitions for Instruction Cache Configuration Register - * - */ -#define SPR_ICCFGR_NCW 0x00000007 -#define SPR_ICCFGR_NCS 0x00000078 -#define SPR_ICCFGR_CBS 0x00000080 -#define SPR_ICCFGR_CCRI 0x00000200 -#define SPR_ICCFGR_CBIRI 0x00000400 -#define SPR_ICCFGR_CBPRI 0x00000800 -#define SPR_ICCFGR_CBLRI 0x00001000 - -#define SPR_ICCFGR_NCW_OFF 0 -#define SPR_ICCFGR_NCS_OFF 3 -#define SPR_ICCFGR_CBS_OFF 7 - -/* - * Bit definitions for Data MMU Configuration Register - * - */ - -#define SPR_DMMUCFGR_NTW 0x00000003 -#define SPR_DMMUCFGR_NTS 0x0000001C -#define SPR_DMMUCFGR_NAE 0x000000E0 -#define SPR_DMMUCFGR_CRI 0x00000100 -#define SPR_DMMUCFGR_PRI 0x00000200 -#define SPR_DMMUCFGR_TEIRI 0x00000400 -#define SPR_DMMUCFGR_HTR 0x00000800 - -#define SPR_DMMUCFGR_NTW_OFF 0 -#define SPR_DMMUCFGR_NTS_OFF 2 - -/* - * Bit definitions for Instruction MMU Configuration Register - * - */ - -#define SPR_IMMUCFGR_NTW 0x00000003 -#define SPR_IMMUCFGR_NTS 0x0000001C -#define SPR_IMMUCFGR_NAE 0x000000E0 -#define SPR_IMMUCFGR_CRI 0x00000100 -#define SPR_IMMUCFGR_PRI 0x00000200 -#define SPR_IMMUCFGR_TEIRI 0x00000400 -#define SPR_IMMUCFGR_HTR 0x00000800 - -#define SPR_IMMUCFGR_NTW_OFF 0 -#define SPR_IMMUCFGR_NTS_OFF 2 - -/* - * Bit definitions for Debug Control registers - * - */ -#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ -#define SPR_DCR_CC 0x0000000e /* Compare condition */ -#define SPR_DCR_SC 0x00000010 /* Signed compare */ -#define SPR_DCR_CT 0x000000e0 /* Compare to */ - -/* Bit results with SPR_DCR_CC mask */ -#define SPR_DCR_CC_MASKED 0x00000000 -#define SPR_DCR_CC_EQUAL 0x00000002 -#define SPR_DCR_CC_LESS 0x00000004 -#define SPR_DCR_CC_LESSE 0x00000006 -#define SPR_DCR_CC_GREAT 0x00000008 -#define SPR_DCR_CC_GREATE 0x0000000a -#define SPR_DCR_CC_NEQUAL 0x0000000c - -/* Bit results with SPR_DCR_CT mask */ -#define SPR_DCR_CT_DISABLED 0x00000000 -#define SPR_DCR_CT_IFEA 0x00000020 -#define SPR_DCR_CT_LEA 0x00000040 -#define SPR_DCR_CT_SEA 0x00000060 -#define SPR_DCR_CT_LD 0x00000080 -#define SPR_DCR_CT_SD 0x000000a0 -#define SPR_DCR_CT_LSEA 0x000000c0 -#define SPR_DCR_CT_LSD 0x000000e0 -/* SPR_DCR_CT_LSD doesn't seem to be implemented anywhere in or1ksim. 2004-1-30 HP */ - -/* - * Bit definitions for Debug Mode 1 register - * - */ -#define SPR_DMR1_CW 0x000fffff /* Chain register pair data */ -#define SPR_DMR1_CW0_AND 0x00000001 -#define SPR_DMR1_CW0_OR 0x00000002 -#define SPR_DMR1_CW0 (SPR_DMR1_CW0_AND | SPR_DMR1_CW0_OR) -#define SPR_DMR1_CW1_AND 0x00000004 -#define SPR_DMR1_CW1_OR 0x00000008 -#define SPR_DMR1_CW1 (SPR_DMR1_CW1_AND | SPR_DMR1_CW1_OR) -#define SPR_DMR1_CW2_AND 0x00000010 -#define SPR_DMR1_CW2_OR 0x00000020 -#define SPR_DMR1_CW2 (SPR_DMR1_CW2_AND | SPR_DMR1_CW2_OR) -#define SPR_DMR1_CW3_AND 0x00000040 -#define SPR_DMR1_CW3_OR 0x00000080 -#define SPR_DMR1_CW3 (SPR_DMR1_CW3_AND | SPR_DMR1_CW3_OR) -#define SPR_DMR1_CW4_AND 0x00000100 -#define SPR_DMR1_CW4_OR 0x00000200 -#define SPR_DMR1_CW4 (SPR_DMR1_CW4_AND | SPR_DMR1_CW4_OR) -#define SPR_DMR1_CW5_AND 0x00000400 -#define SPR_DMR1_CW5_OR 0x00000800 -#define SPR_DMR1_CW5 (SPR_DMR1_CW5_AND | SPR_DMR1_CW5_OR) -#define SPR_DMR1_CW6_AND 0x00001000 -#define SPR_DMR1_CW6_OR 0x00002000 -#define SPR_DMR1_CW6 (SPR_DMR1_CW6_AND | SPR_DMR1_CW6_OR) -#define SPR_DMR1_CW7_AND 0x00004000 -#define SPR_DMR1_CW7_OR 0x00008000 -#define SPR_DMR1_CW7 (SPR_DMR1_CW7_AND | SPR_DMR1_CW7_OR) -#define SPR_DMR1_CW8_AND 0x00010000 -#define SPR_DMR1_CW8_OR 0x00020000 -#define SPR_DMR1_CW8 (SPR_DMR1_CW8_AND | SPR_DMR1_CW8_OR) -#define SPR_DMR1_CW9_AND 0x00040000 -#define SPR_DMR1_CW9_OR 0x00080000 -#define SPR_DMR1_CW9 (SPR_DMR1_CW9_AND | SPR_DMR1_CW9_OR) -#define SPR_DMR1_RES1 0x00300000 /* Reserved */ -#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ -#define SPR_DMR1_BT 0x00800000 /* Branch trace */ -#define SPR_DMR1_RES2 0xff000000 /* Reserved */ - -/* - * Bit definitions for Debug Mode 2 register. AWTC and WGB corrected by JPB - * - */ -#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ -#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ -#define SPR_DMR2_AWTC 0x00000ffc /* Assign watchpoints to counters */ -#define SPR_DMR2_AWTC_OFF 2 /* Bit offset to AWTC field */ -#define SPR_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */ -#define SPR_DMR2_WGB_OFF 12 /* Bit offset to WGB field */ -#define SPR_DMR2_WBS 0xffc00000 /* JPB: Watchpoint status */ -#define SPR_DMR2_WBS_OFF 22 /* Bit offset to WBS field */ - -/* - * Bit definitions for Debug watchpoint counter registers - * - */ -#define SPR_DWCR_COUNT 0x0000ffff /* Count */ -#define SPR_DWCR_MATCH 0xffff0000 /* Match */ -#define SPR_DWCR_MATCH_OFF 16 /* Match bit offset */ - -/* - * Bit definitions for Debug stop register - * - */ -#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ -#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ -#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ -#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ -#define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */ -#define SPR_DSR_AE 0x00000020 /* Alignment exception */ -#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ -#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ -#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ -#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ -#define SPR_DSR_RE 0x00000400 /* Range exception */ -#define SPR_DSR_SCE 0x00000800 /* System call exception */ -#define SPR_DSR_FPE 0x00001000 /* Floating point Exception */ -#define SPR_DSR_TE 0x00002000 /* Trap exception */ - -/* - * Bit definitions for Debug reason register - * - */ -#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ -#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ -#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ -#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ -#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ -#define SPR_DRR_AE 0x00000020 /* Alignment exception */ -#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ -#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ -#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ -#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ -#define SPR_DRR_RE 0x00000400 /* Range exception */ -#define SPR_DRR_SCE 0x00000800 /* System call exception */ -#define SPR_DRR_FPE 0x00001000 /* Floating point exception */ -#define SPR_DRR_TE 0x00002000 /* Trap exception */ - -/* - * Bit definitions for Performance counters mode registers - * - */ -#define SPR_PCMR_CP 0x00000001 /* Counter present */ -#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ -#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ -#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ -#define SPR_PCMR_LA 0x00000010 /* Load access event */ -#define SPR_PCMR_SA 0x00000020 /* Store access event */ -#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ -#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ -#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ -#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ -#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ -#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ -#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ -#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ -#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ -#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ - -/* - * Bit definitions for the Power management register - * - */ -#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ -#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ -#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ -#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ -#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ - -/* - * Bit definitions for PICMR - * - */ -#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ - -/* - * Bit definitions for PICPR - * - */ -#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ - -/* - * Bit definitions for PICSR - * - */ -#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ - -/* - * Bit definitions for Tick Timer Control Register - * - */ -#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ -#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD -#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ -#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ -#define SPR_TTMR_RT 0x40000000 /* Restart tick */ -#define SPR_TTMR_SR 0x80000000 /* Single run */ -#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ -#define SPR_TTMR_M 0xc0000000 /* Tick mode */ - -/* - * l.nop constants - * - */ -#define NOP_NOP 0x0000 /* Normal nop instruction */ -#define NOP_EXIT 0x0001 /* End of simulation */ -#define NOP_REPORT 0x0002 /* Simple report */ -#define NOP_PRINTF 0x0003 /* Simprintf instruction */ -#define NOP_PUTC 0x0004 /* JPB: Simputc instruction */ -#define NOP_CNT_RESET 0x0005 /* Reset statistics counters */ -#define NOP_REPORT_FIRST 0x0400 /* Report with number */ -#define NOP_REPORT_LAST 0x03ff /* Report with number */ - -#endif /* SPR_DEFS__H */ Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.c (nonexistent) @@ -1,532 +0,0 @@ -/* adv_jtag_bridge.c -- JTAG protocol bridge between GDB and Advanced debug module. - Copyright(C) 2001 Marko Mlinar, markom@opencores.org - Code for TCP/IP copied from gdb, by Chris Ziomkowski - Refactoring by Nathan Yawn, nyawn@opencores.org - - This file was part of the OpenRISC 1000 Architectural Simulator. - It is now also used to connect GDB to a running hardware OpenCores / OR1200 - advanced debug unit. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -/* Establishes jtag proxy server and communicates with parallel - port directly. Requires root access. */ - -#include -#include // for exit(), atoi(), strtoul() -#include -#include -#include // for strstr() -#include - - -#include "adv_jtag_bridge.h" -#include "rsp-server.h" -#include "chain_commands.h" -#include "cable_common.h" -#include "or32_selftest.h" -#include "bsdl.h" -#include "errcodes.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -// How many command-line IR length settings to create by default -#define IR_START_SETS 16 - -////////////////////////////////////////////////// -// Command line option flags / values - -/* Which device in the scan chain we want to target. - * 0 is the first device we find, which is nearest the data input of the cable. - */ -unsigned int target_dev_pos = 0; - -// Do test before setting up server? -unsigned char do_selftest = 0; - -// IR register length in TAP of -// Can override autoprobe, or set if IDCODE not supported -typedef struct { - int dev_index; - int ir_length; -} irset; - -#define START_IR_SETS 16 -int reallocs = 0; -int num_ir_sets = 0; -irset * cmd_line_ir_sizes = NULL; - -// DEBUG command for target device TAP -// May actually be USER1, for Xilinx devices using internal BSCAN modules -// Can override autoprobe, or set if unable to find in BSDL files -int cmd_line_cmd_debug = -1; // 0 is a valid debug command, so use -1 - -// TCP port to set up the server for GDB on -char *port; -char default_port[] = "9999"; - -// Force altera virtual jtag mode on(1) or off(-1) -int force_alt_vjtag = 0; - - -// Pointer to the command line arg used as the cable name -char * cable_name = NULL; - -//////////////////////////////////////////////////////// -// List of IDCODES of devices on the JTAG scan chain -// The array is dynamically allocated in chain_commands/jtag_enumerate_chain() - -uint32_t *idcodes = NULL; -int num_devices = 0; - - -const char *name_not_found = "(unknown)"; - -/////////////////////////////////////////////////////////// -// JTAG constants - -// Defines for Altera JTAG constants -#define ALTERA_MANUFACTURER_ID 0x6E - -// Defines for Xilinx JTAG constants -#define XILINX_MANUFACTURER_ID 0x49 - - -/////////////////////////////////////////////////// -// Prototypes for local / helper functions -int get_IR_size(int devidx); -uint32_t get_debug_cmd(int devidx); -void configure_chain(void); -void print_usage(char *func); -void parse_args(int argc, char **argv); -void get_ir_opts(char *optstr, int *idx, int *val); - - -////////////////////////////////////////////////////////////////////////////////////// -/*----------------------------------------------------------------------------------*/ -// Functions -///////////////////////////////////////////////////////////////////////////////////// - -// Resets JTAG, and sets up DEBUG scan chain -void configure_chain(void) -{ - int i; - unsigned int manuf_id; - uint32_t cmd; - const char *name; - int irlen; - int err = APP_ERR_NONE; - - err |= tap_reset(); - err |= jtag_enumerate_chain(&idcodes, &num_devices); - - if(err != APP_ERR_NONE) { - printf("Error %s enumerating JTAG chain, aborting.\n", get_err_string(err)); - exit(1); - } - - printf("\nDevices on JTAG chain:\n"); - printf("Index\tName\t\tID Code\t\tIR Length\n"); - printf("----------------------------------------------------------------\n"); - for(i = 0; i < num_devices; i++) - { - if(idcodes[i] != IDCODE_INVALID) { - name = bsdl_get_name(idcodes[i]); - irlen = bsdl_get_IR_size(idcodes[i]); - if(name == NULL) - name = name_not_found; - } else { - name = name_not_found; - irlen = -1; - } - printf("%d: \t%s \t0x%08X \t%d\n", i, name, idcodes[i], irlen); - } - printf("\n"); - -#ifdef __LEGACY__ -// The legacy debug interface cannot support multi-device chains. If there is more than -// one device on this chain, pull the cord. -if(num_devices > 1) { - fprintf(stderr, "\n*** ERROR: The legacy debug hardware cannot support JTAG chains with\n"); - fprintf(stderr, "*** more than one device. Reconnect the JTAG cable to ONLY the legacy\n"); - fprintf(stderr, "*** debug unit, or change your SoC to use the Advanced Debug Unit.\n"); - exit(0); -} -#endif - - - if(target_dev_pos >= num_devices) { - printf("ERROR: Requested target device (%i) beyond highest device index (%i).\n", target_dev_pos, num_devices-1); - exit(1); - } else { - printf("Target device %i, JTAG ID = 0x%08x\n", target_dev_pos, idcodes[target_dev_pos]); - } - - manuf_id = (idcodes[target_dev_pos] >> 1) & 0x7FF; - - // Use BSDL files to determine prefix bits, postfix bits, debug command, IR length - config_set_IR_size(get_IR_size(target_dev_pos)); - - // Set the IR prefix / postfix bits - int total = 0; - for(i = 0; i < num_devices; i++) { - if(i == target_dev_pos) { - config_set_IR_postfix_bits(total); - //debug("Postfix bits: %d\n", total); - total = 0; - continue; - } - - total += get_IR_size(i); - debug("Adding %i to total for devidx %i\n", get_IR_size(i), i); - } - config_set_IR_prefix_bits(total); - debug("Prefix bits: %d\n", total); - - - // Note that there's a little translation here, since device index 0 is actually closest to the cable data input - config_set_DR_prefix_bits(num_devices - target_dev_pos - 1); // number of devices between cable data out and target device - config_set_DR_postfix_bits(target_dev_pos); // number of devices between target device and cable data in - - // Set the DEBUG command for the IR of the target device. - // If this is a Xilinx device, use USER1 instead of DEBUG - // If we Altera Virtual JTAG mode, we don't care. - if((force_alt_vjtag == -1) || ((force_alt_vjtag == 0) && (manuf_id != ALTERA_MANUFACTURER_ID))) { - cmd = get_debug_cmd(target_dev_pos); - if(cmd == TAP_CMD_INVALID) { - printf("Unable to find DEBUG command, aborting.\n"); - exit(1); - } - config_set_debug_cmd(cmd); // This may have to be USER1 if this is a Xilinx device - } - - // Enable the kludge for Xilinx BSCAN, if necessary. - // Safe, but slower, for non-BSCAN TAPs. - if(manuf_id == XILINX_MANUFACTURER_ID) { - config_set_xilinx_bscan(1); - } - - // Set Altera Virtual JTAG mode on or off. If not forced, then enable - // if the target device has an Altera manufacturer IDCODE - if(force_alt_vjtag == 1) { - config_set_alt_vjtag(1); - } else if(force_alt_vjtag == -1) { - config_set_alt_vjtag(0); - } else { - if(manuf_id == ALTERA_MANUFACTURER_ID) { - config_set_alt_vjtag(1); - } else { - config_set_alt_vjtag(0); - } - } - - // Do a sanity test - cmd = bsdl_get_idcode_cmd(idcodes[target_dev_pos]); - if(cmd != TAP_CMD_INVALID) { - uint32_t id_read; - err |= jtag_get_idcode(cmd, &id_read); - - if(err != APP_ERR_NONE) { - printf("Error %s checking IDCODE, aborting.\n", get_err_string(err)); - exit(1); - } - - if(id_read == idcodes[target_dev_pos]) { - printf("IDCODE sanity test passed, chain OK!\n"); - } else { - printf("Warning: IDCODE sanity test failed. Read IDCODE 0x%08X, expected 0x%08X\n", id_read, idcodes[target_dev_pos]); - } - } - - if(err |= tap_enable_debug_module()) { // Select the debug unit in the TAP. - printf("Error %s enabling debug module, aborting.\n", get_err_string(err)); - exit(1); - } -} - - -void print_usage(char *func) -{ - printf("JTAG connection between GDB and the SoC debug interface.\n"); -#ifdef __LEGACY__ - printf("Compiled with support for the Legacy debug unit (debug_if).\n"); -#else - printf("Compiled with support for the Advanced Debug Interface (adv_dbg_if).\n"); -#endif - printf("Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org\n\n"); - printf("Usage: %s (options) [cable] (cable options)\n", func); - printf("Options:\n"); - printf("\t-g [port] : port number for GDB (default: 9999)\n"); - printf("\t-x [index] : Position of the target device in the scan chain\n"); - printf("\t-a [0 / 1] : force Altera virtual JTAG mode off (0) or on (1)\n"); - printf("\t-l [:] : Specify length of IR register for device\n"); - printf("\t , override autodetect (if any)\n"); - printf("\t-c [hex cmd] : Debug command for target TAP, override autodetect\n"); - printf("\t (ignored for Altera targets)\n"); - printf("\t-v [hex cmd] : VIR command for target TAP, override autodetect\n"); - printf("\t (Altera virtual JTAG targets only)\n"); - printf("\t-r [hex cmd] : VDR for target TAP, override autodetect\n"); - printf("\t (Altera virtual JTAG targets only)\n"); - printf("\t-b [dirname] : Add a directory to search for BSDL files\n"); - printf("\t-t : perform CPU / memory self-test before starting server\n"); - printf("\t-h : show help\n\n"); - cable_print_help(); -} - - -void parse_args(int argc, char **argv) -{ - int c; - int i; - int idx, val; - const char *valid_cable_args = NULL; - port = NULL; - force_alt_vjtag = 0; - cmd_line_cmd_debug = -1; - - /* Parse the global arguments (if-any) */ - while((c = getopt(argc, argv, "+g:x:a:l:c:v:r:b:th")) != -1) { - switch(c) { - case 'h': - print_usage(argv[0]); - exit(0); - break; - case 'g': - port = optarg; - break; - case 'x': - target_dev_pos = atoi(optarg); - break; - case 'l': - get_ir_opts(optarg, &idx, &val); // parse the option - if(num_ir_sets >= (IR_START_SETS< 0) && (retval != cmd_line_ir_sizes[i].ir_length)) - printf("Warning: overriding autoprobed IR length (%i) with command line value (%i) for device %i\n", retval, - cmd_line_ir_sizes[i].ir_length, devidx); - retval = cmd_line_ir_sizes[i].ir_length; - } - } - - if(retval < 0) { // Make sure we have a value - printf("ERROR! Unable to autoprobe IR length for device index %i; Must set IR size on command line. Aborting.\n", devidx); - exit(1); - } - - return retval; -} - - -uint32_t get_debug_cmd(int devidx) -{ - int retval = TAP_CMD_INVALID; - uint32_t manuf_id = (idcodes[devidx] >> 1) & 0x7FF; - - if(idcodes[devidx] != IDCODE_INVALID) { - if(manuf_id == XILINX_MANUFACTURER_ID) { - retval = bsdl_get_user1_cmd(idcodes[devidx]); - if(cmd_line_cmd_debug < 0) printf("Xilinx IDCODE, assuming internal BSCAN mode\n\t(using USER1 instead of DEBUG TAP command)\n"); - } else { - retval = bsdl_get_debug_cmd(idcodes[devidx]); - } - } - - if(cmd_line_cmd_debug >= 0) { - if(retval != TAP_CMD_INVALID) { - printf("Warning: overriding autoprobe debug command (0x%X) with command line value (0x%X)\n", retval, cmd_line_cmd_debug); - } else { - printf("Using command-line debug command 0x%X\n", cmd_line_cmd_debug); - } - retval = cmd_line_cmd_debug; - } - - if(retval == TAP_CMD_INVALID) { - printf("ERROR! Unable to find DEBUG command for device index %i, device ID 0x%0X\n", devidx, idcodes[devidx]); - } - - return retval; -} - - -// Extracts two values from an option string -// of the form ":", where both args -// are in base 10 -void get_ir_opts(char *optstr, int *idx, int *val) -{ - char *ptr; - - ptr = strstr(optstr, ":"); - if(ptr == NULL) { - printf("Error: badly formatted IR length option. Use format \':\', without spaces, where both args are in base 10\n"); - exit(1); - } - - *ptr = '\0'; - ptr++; // This now points to the second (value) arg string - - *idx = strtoul(optstr, NULL, 10); - *val = strtoul(ptr, NULL, 10); - // ***CHECK FOR SUCCESS -} - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/Makefile =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/Makefile (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/Makefile (nonexistent) @@ -1,104 +0,0 @@ -prefix = /usr/local - -# Your build environment. selects libs, lib dirs, and include dirs -# Supported: linux, cygwin -BUILD_ENVIRONMENT=cygwin - -# Set this to 'true' if you want to build for the legacy debug unit ('debug_if' core), -# leave 'false' if you are building for the Advanced Debug Unit. -SUPPORT_LEGACY=false - -# Set this to 'true' to include support for cables which require libusb -# currently includes Altera USB-Blaster and Xilinx XPC DLC8 -SUPPORT_USB_CABLES=true - -# Set this to 'true' to support cables which require libFTDI -# SUPPORT_USB_CABLES must also be set to 'true' to support FTDI-based cables. -SUPPORT_FTDI_CABLES=true - - -# ---------------------------------------------------------------------------- -# Most people shouldn't have to change anything below this line - -ifeq ($(BUILD_ENVIRONMENT),linux) -# These are for native Linux. You may need to put the path to libusb into the LIBS variable -# with the -L command. -CFLAGS = -g -O2 -Wall -CC = gcc -LIBS = -lpthread -INCLUDEDIRS = -I/usr/local/include/libusb-1.0/ -I/usr/local/include/ - -else - -ifeq ($(BUILD_ENVIRONMENT),cygwin) -# These are for cygwin. It assumes libusb.a is in the current directory. -CFLAGS = -g -O2 -Wall -CC = gcc -LIBS = -L. -lioperm -lpthread -INCLUDEDIRS = -I/usr/local/include/ -endif - -endif - -ifeq ($(SUPPORT_LEGACY),true) -CFLAGS += -D__LEGACY__ -endif - - -PROGRAMS = adv_jtag_bridge - -HEADERS = adv_jtag_bridge.h chain_commands.h opencores_tap.h \ - altera_virtual_jtag.h rsp-server.h bsdl.h or32_selftest.c cable_common.h \ - cable_parallel.h cable_sim.h \ - bsdl_parse.h errcodes.h spr-defs.h except.h adv_dbg_commands.h dbg_api.h \ - legacy_dbg_commands.h - -SOURCES = adv_jtag_bridge.c rsp-server.c chain_commands.c cable_common.c bsdl.c \ - or32_selftest.c cable_parallel.c cable_sim.c \ - bsdl_parse.c errcodes.c adv_dbg_commands.c dbg_api.c legacy_dbg_commands.c - -OBJECTS = adv_jtag_bridge.o rsp-server.o chain_commands.o cable_common.o bsdl.o \ - or32_selftest.o cable_parallel.o cable_sim.o \ - bsdl_parse.o errcodes.o adv_dbg_commands.o dbg_api.o legacy_dbg_commands.o - - -ifeq ($(SUPPORT_USB_CABLES),true) -CFLAGS += -D__SUPPORT_USB_CABLES__ -HEADERS += cable_usbblaster.h cable_xpc_dlc9.h -SOURCES += cable_usbblaster.c cable_xpc_dlc9.c -OBJECTS += cable_usbblaster.o cable_xpc_dlc9.o - -ifeq ($(SUPPORT_FTDI_CABLES),true) -CFLAGS += -D__SUPPORT_FTDI_CABLES__ -LIBS += -lftdi -HEADERS += cable_ft2232.h -SOURCES += cable_ft2232.c -OBJECTS += cable_ft2232.o -endif - -# libusb must follow libftdi in the list of libraries -LIBS += -lusb -endif - - -all: $(PROGRAMS) - -default: $(PROGRAMS) - -.c.o: - $(CC) $(CFLAGS) -c $< - -adv_jtag_bridge: Makefile $(OBJECTS) $(HEADERS) - rm -f $@ - $(CC) -o $@ $(CFLAGS) $(OBJECTS) $(LIBS) $(INCLUDEDIRS) - - -install: all - [ -d $(prefix)/bin ] || mkdir -p $(prefix)/bin - for p in $(PROGRAMS) ; do \ - /bin/rm -f $(prefix)/bin/$$p; \ - /bin/cp -p $$p $(prefix)/bin/$$p; \ - done - -clean: Makefile - rm -f $(PROGRAMS) *.o *~ Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/except.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/except.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/except.h (nonexistent) @@ -1,52 +0,0 @@ -/* except.h -- OR1K architecture specific exceptions - -Copyright (C) 1999 Damjan Lampret, lampret@opencores.org -Copyright (C) 2008 Embecosm Limited - -Contributor Jeremy Bennett - -This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3 of the License, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. - -You should have received a copy of the GNU General Public License along -with this program. If not, see . -*/ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - - -#ifndef EXCEPT__H -#define EXCEPT__H - - -/* Package includes */ -//#include "arch.h" - -/* Definition of OR1K exceptions */ -#define EXCEPT_NONE 0x0000 -#define EXCEPT_RESET 0x0100 -#define EXCEPT_BUSERR 0x0200 -#define EXCEPT_DPF 0x0300 -#define EXCEPT_IPF 0x0400 -#define EXCEPT_TICK 0x0500 -#define EXCEPT_ALIGN 0x0600 -#define EXCEPT_ILLEGAL 0x0700 -#define EXCEPT_INT 0x0800 -#define EXCEPT_DTLBMISS 0x0900 -#define EXCEPT_ITLBMISS 0x0a00 -#define EXCEPT_RANGE 0x0b00 -#define EXCEPT_SYSCALL 0x0c00 -#define EXCEPT_FPE 0x0d00 -#define EXCEPT_TRAP 0x0e00 - -#endif /* EXCEPT__H */ Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/or32_selftest.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/or32_selftest.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/or32_selftest.c (nonexistent) @@ -1,633 +0,0 @@ -/* or32_selftest.c -- JTAG protocol bridge between GDB and Advanced debug module. - Copyright(C) 2001 Marko Mlinar, markom@opencores.org - Code for TCP/IP copied from gdb, by Chris Ziomkowski - Refactoring and USB support by Nathan Yawn - - This file contains functions which perform high-level transactions - on a JTAG chain and debug unit, such as setting a value in the TAP IR - or doing a burst write through the wishbone module of the debug unit. - It uses the protocol for the Advanced Debug Interface (adv_dbg_if). - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - - -#include -#include // for exit() - -#include "or32_selftest.h" -#include "dbg_api.h" -#include "errcodes.h" - - -// Define your system parameters here -//#define HAS_CPU1 // stall cpu1 (as well as cpu0) -//#define HAS_MEMORY_CONTROLLER // init the SDRAM controller -#define MC_BASE_ADDR 0x93000000 -#define SDRAM_BASE 0x00000000 -//#define SDRAM_SIZE 0x04000000 -#define SDRAM_SIZE 0x400 -#define SRAM_BASE 0x00000000 -#define SRAM_SIZE 0x04000000 -#define FLASH_BASE_ADDR 0xf0000000 - -// Define the tests to be performed here -#define TEST_SRAM -//#define TEST_SDRAM -#define TEST_OR1K -//#define TEST_8051 // run a test on an 8051 on CPU1 - - -// Defines which depend on user-defined values, don't change these -#define FLASH_BAR_VAL FLASH_BASE_ADDR -#define SDRAM_BASE_ADDR SDRAM_BASE -#define SDRAM_BAR_VAL SDRAM_BASE_ADDR -#define SDRAM_AMR_VAL (~(SDRAM_SIZE -1)) - -#define CHECK(x) check(__FILE__, __LINE__, (x)) -void check(char *fn, int l, int i); - -void check(char *fn, int l, int i) { - if (i != 0) { - fprintf(stderr, "%s:%d: Jtag error %d occured; exiting.\n", fn, l, i); - exit(1); - } -} - - -//////////////////////////////////////////////////////////// -// Self-test functions -/////////////////////////////////////////////////////////// -int dbg_test() -{ - int success; - - success = stall_cpus(); - if(success == APP_ERR_NONE) { - -#ifdef HAS_MEMORY_CONTROLLER - // Init the memory contloller - init_mc(); - // Init the SRAM addresses in the MC - init_sram(); -#endif - - - -#ifdef TEST_SDRAM - success |= test_sdram(); - success |= test_sdram_2(); -#endif - -#ifdef TEST_SRAM - success |= test_sram(); -#endif - -#ifdef TEST_OR1K - success |= test_or1k_cpu0(); -#endif - -#if ((defined TEST_8051) && (defined HAS_CPU1)) - success |= test_8051_cpu1(); -#endif - - return success; - } - - return APP_ERR_TEST_FAIL; -} - - -int stall_cpus(void) -{ - unsigned char stalled; - -#ifdef HAS_CPU1 - printf("Stall 8051 - "); - CHECK(dbg_cpu1_write_reg(0, 0x01)); // stall 8051 -#endif - - printf("Stall or1k - "); - CHECK(dbg_cpu0_write_ctrl(0, 0x01)); // stall or1k - - -#ifdef HAS_CPU1 - CHECK(dbg_cpu1_read_ctrl(0, &stalled)); - if (!(stalled & 0x1)) { - printf("8051 is not stalled!\n"); // check stall 8051 - return APP_ERR_TEST_FAIL; - } -#endif - - CHECK(dbg_cpu0_read_ctrl(0, &stalled)); - if (!(stalled & 0x1)) { - printf("or1k is not stalled!\n"); // check stall or1k - return APP_ERR_TEST_FAIL; - } - - printf("CPU(s) stalled.\n"); - - return APP_ERR_NONE; -} - - -void init_mc(void) -{ - unsigned long insn; - - printf("Initialize Memory Controller (SDRAM)\n"); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_0, FLASH_BAR_VAL & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_0, FLASH_AMR_VAL & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_WTR_0, FLASH_WTR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RTR_0, FLASH_RTR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x40000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_4, SDRAM_BAR_VAL & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_4, SDRAM_AMR_VAL & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_4, 0x00bf0005)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RATR, SDRAM_RATR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RCDR, SDRAM_RCDR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RCTR, SDRAM_RCTR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_REFCTR, SDRAM_REFCTR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_PTR, SDRAM_PTR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RRDR, SDRAM_RRDR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RIR, SDRAM_RIR_VAL)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x5e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x5e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x7e000033)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x7e000033)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_4, 0xc0bf0005)); - - CHECK(dbg_wb_read32(MC_BASE_ADDR+MC_CCR_4, &insn)); - printf("expected %x, read %lx\n", 0xc0bf0005, insn); -} - - -void init_sram(void) -{ - // SRAM initialized to 0x40000000 - printf("Initialize Memory Controller (SRAM)\n"); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_1, SRAM_BASE & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_1, ~(SRAM_SIZE - 1) & 0xffff0000)); - CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_1, 0xc020001f)); -} - - - -int test_sdram(void) -{ - unsigned long insn; - unsigned long i; - unsigned long data4_out[0x08]; - unsigned long data4_in[0x08]; - unsigned short data2_out[0x10]; - unsigned short data2_in[0x10]; - unsigned char data1_out[0x20]; - unsigned char data1_in[0x20]; - - printf("Start SDRAM WR\n"); - for (i=0x10; i<(SDRAM_SIZE+SDRAM_BASE); i=i<<1) { - //printf("0x%x: 0x%x\n", SDRAM_BASE+i, i); - CHECK(dbg_wb_write32(SDRAM_BASE+i, i)); - } - - printf("Start SDRAM RD\n"); - for (i=0x10; i<(SDRAM_SIZE+SDRAM_BASE); i=i<<1) { - CHECK(dbg_wb_read32(SDRAM_BASE+i, &insn)); - //printf("0x%x: 0x%x\n", SDRAM_BASE+i, insn); - if (i != insn) { - printf("SDRAM test FAIL\n"); - return APP_ERR_TEST_FAIL; - } - } - - printf("32-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - for (i=0; i<(0x20/4); i++) { - data4_out[i] = data4_in[i] = ((4*i+3)<<24) | ((4*i+2)<<16) | ((4*i+1)<<8) | (4*i); - //printf("data_out = %0x\n", data4_out[i]); - } - - //printf("Press a key for write\n"); getchar(); - CHECK(dbg_wb_write_block32(SDRAM_BASE, &data4_out[0], 0x20)); - - // 32-bit block read is used for checking - printf("32-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - CHECK(dbg_wb_read_block32(SDRAM_BASE, &data4_out[0], 0x20)); - for (i=0; i<(0x20/4); i++) { - //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); - if (data4_in[i] != data4_out[i]) { - printf("SDRAM data differs. Expected: 0x%0lx, read: 0x%0lx\n", data4_in[i], data4_out[i]); - return APP_ERR_TEST_FAIL; - } - } - - - printf("16-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - for (i=0; i<(0x20/2); i++) { - data2_out[i] = data2_in[i] = ((4*i+1)<<8) | (4*i); - //printf("data_out = %0x\n", data_out[i]); - } - CHECK(dbg_wb_write_block16(SDRAM_BASE, &data2_out[0], 0x20)); - - // 16-bit block read is used for checking - printf("16-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - CHECK(dbg_wb_read_block16(SDRAM_BASE, &data2_out[0], 0x20)); - for (i=0; i<(0x20/2); i++) { - //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); - if (data2_in[i] != data2_out[i]) { - printf("SDRAM data differs. Expected: 0x%0x, read: 0x%0x\n", data2_in[i], data2_out[i]); - return APP_ERR_TEST_FAIL; - } - } - - printf("8-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - for (i=0; i<(0x20/1); i++) { - data1_out[i] = data1_in[i] = (4*i); - //printf("data_out = %0x\n", data_out[i]); - } - CHECK(dbg_wb_write_block8(SDRAM_BASE, &data1_out[0], 0x20)); - - // 32-bit block read is used for checking - printf("8-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); - CHECK(dbg_wb_read_block8(SDRAM_BASE, &data1_out[0], 0x20)); - for (i=0; i<(0x20/1); i++) { - //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); - if (data1_in[i] != data1_out[i]) { - printf("SDRAM data differs. Expected: 0x%0x, read: 0x%0x\n", data1_in[i], data1_out[i]); - return APP_ERR_TEST_FAIL; - } - } - - printf("SDRAM OK!\n"); - return APP_ERR_NONE; -} - - -int test_sdram_2(void) -{ - unsigned long insn; - - printf("SDRAM test 2: \n"); - CHECK(dbg_wb_write32(SDRAM_BASE+0x00, 0x12345678)); - CHECK(dbg_wb_read32(SDRAM_BASE+0x00, &insn)); - printf("expected %x, read %lx\n", 0x12345678, insn); - if (insn != 0x12345678) return APP_ERR_TEST_FAIL; - - CHECK(dbg_wb_write32(SDRAM_BASE+0x0000, 0x11112222)); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0000, &insn)); - printf("expected %x, read %lx\n", 0x11112222, insn); - if (insn != 0x11112222) return APP_ERR_TEST_FAIL; - - CHECK(dbg_wb_write32(SDRAM_BASE+0x0004, 0x33334444)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x0008, 0x55556666)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x000c, 0x77778888)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x0010, 0x9999aaaa)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x0014, 0xbbbbcccc)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x0018, 0xddddeeee)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x001c, 0xffff0000)); - CHECK(dbg_wb_write32(SDRAM_BASE+0x0020, 0xdeadbeef)); - - CHECK(dbg_wb_read32(SDRAM_BASE+0x0000, &insn)); - printf("expected %x, read %lx\n", 0x11112222, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0004, &insn)); - printf("expected %x, read %lx\n", 0x33334444, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0008, &insn)); - printf("expected %x, read %lx\n", 0x55556666, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x000c, &insn)); - printf("expected %x, read %lx\n", 0x77778888, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0010, &insn)); - printf("expected %x, read %lx\n", 0x9999aaaa, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0014, &insn)); - printf("expected %x, read %lx\n", 0xbbbbcccc, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0018, &insn)); - printf("expected %x, read %lx\n", 0xddddeeee, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x001c, &insn)); - printf("expected %x, read %lx\n", 0xffff0000, insn); - CHECK(dbg_wb_read32(SDRAM_BASE+0x0020, &insn)); - printf("expected %x, read %lx\n", 0xdeadbeef, insn); - - if (insn != 0xdeadbeef) { - printf("SDRAM test 2 FAILED\n"); - return APP_ERR_TEST_FAIL; - } - else - printf("SDRAM test 2 passed\n"); - - return APP_ERR_NONE; -} - - -int test_sram(void) -{ - //unsigned long insn; - unsigned long ins; - unsigned long insn[9]; - insn[0] = 0x11112222; - insn[1] = 0x33334444; - insn[2] = 0x55556666; - insn[3] = 0x77778888; - insn[4] = 0x9999aaaa; - insn[5] = 0xbbbbcccc; - insn[6] = 0xddddeeee; - insn[7] = 0xffff0000; - insn[8] = 0xdedababa; - - printf("SRAM test: \n"); - //dbg_wb_write_block32(0x0, insn, 9); - - CHECK(dbg_wb_write32(SRAM_BASE+0x0000, 0x11112222)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0004, 0x33334444)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0008, 0x55556666)); - CHECK(dbg_wb_write32(SRAM_BASE+0x000c, 0x77778888)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0010, 0x9999aaaa)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0014, 0xbbbbcccc)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0018, 0xddddeeee)); - CHECK(dbg_wb_write32(SRAM_BASE+0x001c, 0xffff0000)); - CHECK(dbg_wb_write32(SRAM_BASE+0x0020, 0xdedababa)); - - - CHECK(dbg_wb_read32(SRAM_BASE+0x0000, &ins)); - printf("expected %x, read %lx\n", 0x11112222, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0004, &ins)); - printf("expected %x, read %lx\n", 0x33334444, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0008, &ins)); - printf("expected %x, read %lx\n", 0x55556666, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x000c, &ins)); - printf("expected %x, read %lx\n", 0x77778888, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0010, &ins)); - printf("expected %x, read %lx\n", 0x9999aaaa, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0014, &ins)); - printf("expected %x, read %lx\n", 0xbbbbcccc, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0018, &ins)); - printf("expected %x, read %lx\n", 0xddddeeee, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x001c, &ins)); - printf("expected %x, read %lx\n", 0xffff0000, ins); - CHECK(dbg_wb_read32(SRAM_BASE+0x0020, &ins)); - printf("expected %x, read %lx\n", 0xdedababa, ins); - - if (ins != 0xdedababa) { - printf("SRAM test failed!!!\n"); - return APP_ERR_TEST_FAIL; - } - else - printf("SRAM test passed\n"); - - return APP_ERR_NONE; -} - - - -int test_or1k_cpu0(void) -{ - unsigned long npc, ppc, r1, insn; - unsigned char stalled; - unsigned long result; - int i; - - printf("Testing CPU0 (or1k) - writing instructions\n"); - CHECK(dbg_wb_write32(SDRAM_BASE+0x00, 0xe0000005)); /* l.xor r0,r0,r0 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x04, 0x9c200000)); /* l.addi r1,r0,0x0 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x08, 0x18400000)); /* l.movhi r2,0x4000 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x0c, 0xa8420030)); /* l.ori r2,r2,0x30 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x10, 0x9c210001)); /* l.addi r1,r1,1 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x14, 0x9c210001)); /* l.addi r1,r1,1 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x18, 0xd4020800)); /* l.sw 0(r2),r1 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x1c, 0x9c210001)); /* l.addi r1,r1,1 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x20, 0x84620000)); /* l.lwz r3,0(r2) */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x24, 0x03fffffb)); /* l.j loop2 */ - CHECK(dbg_wb_write32(SDRAM_BASE+0x28, 0xe0211800)); /* l.add r1,r1,r3 */ - - printf("Setting up CPU0\n"); - CHECK(dbg_cpu0_write((0 << 11) + 17, 0x01)); /* Enable exceptions */ - CHECK(dbg_cpu0_write((6 << 11) + 20, 0x2000)); /* Trap causes stall */ - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE)); /* Set PC */ - CHECK(dbg_cpu0_write((6 << 11) + 16, 1 << 22)); /* Set step bit */ - printf("Starting CPU0!\n"); - for(i = 0; i < 11; i++) { - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* 11x Unstall */ - //printf("Starting CPU, waiting for trap...\n"); - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - //printf("Got trap.\n"); - } - - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 5); - result = npc + ppc + r1; - - CHECK(dbg_cpu0_write((6 << 11) + 16, 0)); // Reset step bit - CHECK(dbg_wb_read32(SDRAM_BASE + 0x28, &insn)); // Set trap insn in delay slot - CHECK(dbg_wb_write32(SDRAM_BASE + 0x28, 0x21000001)); - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); // Unstall - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); // Read NPC - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); // Read PPC - CHECK(dbg_cpu0_read(0x401, &r1)); // Read R1 - CHECK(dbg_wb_write32(SDRAM_BASE + 0x28, insn)); // Set back original insn - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 8); - result = npc + ppc + r1 + result; - - CHECK(dbg_wb_read32(SDRAM_BASE + 0x24, &insn)); // Set trap insn in place of branch insn - CHECK(dbg_wb_write32(SDRAM_BASE + 0x24, 0x21000001)); - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x10)); // Set PC - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); // Unstall - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); // Read NPC - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); // Read PPC - CHECK(dbg_cpu0_read(0x401, &r1)); // Read R1 - CHECK(dbg_wb_write32(SDRAM_BASE + 0x24, insn)); // Set back original insn - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000028, 0x00000024, 11); - result = npc + ppc + r1 + result; - - CHECK(dbg_wb_read32(SDRAM_BASE + 0x20, &insn)); /* Set trap insn before branch insn */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, 0x21000001)); - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x24)); /* Set PC */ - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, insn)); /* Set back original insn */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000024, 0x00000020, 24); - result = npc + ppc + r1 + result; - - CHECK(dbg_wb_read32(SDRAM_BASE + 0x1c, &insn)); /* Set trap insn behind lsu insn */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x1c, 0x21000001)); - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x20)); /* Set PC */ - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x1c, insn)); /* Set back original insn */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000020, 0x0000001c, 49); - result = npc + ppc + r1 + result; - - CHECK(dbg_wb_read32(SDRAM_BASE + 0x20, &insn)); /* Set trap insn very near previous one */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, 0x21000001)); - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x1c)); /* Set PC */ - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, insn)); /* Set back original insn */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000024, 0x00000020, 50); - result = npc + ppc + r1 + result; - - CHECK(dbg_wb_read32(SDRAM_BASE + 0x10, &insn)); /* Set trap insn to the start */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x10, 0x21000001)); - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x20) /* Set PC */); - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - CHECK(dbg_wb_write32(SDRAM_BASE + 0x10, insn)); /* Set back original insn */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000014, 0x00000010, 99); - result = npc + ppc + r1 + result; - - CHECK(dbg_cpu0_write((6 << 11) + 16, 1 << 22)); /* Set step bit */ - for(i = 0; i < 5; i++) { - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - //printf("Waiting for trap..."); - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - //printf("got trap.\n"); - } - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000028, 0x00000024, 101); - result = npc + ppc + r1 + result; - - CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x24)); /* Set PC */ - for(i = 0; i < 2; i++) { - CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ - //printf("Waiting for trap...\n"); - do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); - //printf("Got trap.\n"); - } - CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ - CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ - CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ - printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); - printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 201); - result = npc + ppc + r1 + result; - printf("result = %.8lx\n", result ^ 0xdeaddae1); - - if((result ^ 0xdeaddae1) != 0xdeaddead) - return APP_ERR_TEST_FAIL; - - return APP_ERR_NONE; -} - - -// This function does not currently return a useful value -/* -unsigned char test_8051_cpu1(void) -{ - int retval = 1; - unsigned long result = 0; - unsigned long npc[3], tmp; - - printf("Testing CPU1 (8051)\n"); - - // WRITE ACC - CHECK(dbg_cpu1_write(0x20e0, 0xa6)); - - // READ ACC - CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space - printf("Read 8051 ACC = %0x (expected a6)\n", tmp); - result = result + tmp; - - // set exception to single step to jump over a loop - CHECK(dbg_cpu1_write(0x3010, 0xa0)); // set single step and global enable in EER - CHECK(dbg_cpu1_write(0x3011, 0x40)); // set evec = 24'h000040 - CHECK(dbg_cpu1_write(0x3012, 0x00)); // (already reset value) - CHECK(dbg_cpu1_write(0x3013, 0x00)); // (already reset value) - - // set HW breakpoint at PC == 0x41 - CHECK(dbg_cpu1_write(0x3020, 0x41)); // DVR0 = 24'h000041 - CHECK(dbg_cpu1_write(0x3023, 0x39)); // DCR0 = valid, == PC - CHECK(dbg_cpu1_write(0x3001, 0x04)); // DSR = watchpoint - - // flush 8051 instruction cache - CHECK(dbg_cpu1_write(0x209f, 0x00)); - - // Put some instructions in ram (8-bit mode on wishbone) - CHECK(dbg_wb_write8 (0x40, 0x04)); // inc a - CHECK(dbg_wb_write8 (0x41, 0x03)); // rr a; - CHECK(dbg_wb_write8 (0x42, 0x14)); // dec a; - CHECK(dbg_wb_write8 (0x43, 0xf5)); // mov 0e5h, a; - CHECK(dbg_wb_write8 (0x44, 0xe5)); - - // unstall just 8051 - CHECK(dbg_cpu1_write_reg(0, 0)); - - // read PC - CHECK(dbg_cpu1_read(0, &npc[0])); - CHECK(dbg_cpu1_read(1, &npc[1])); - CHECK(dbg_cpu1_read(2, &npc[2])); - printf("Read 8051 npc = %02x%02x%02x (expected 41)\n", npc[2], npc[1], npc[0]); - result = result + (npc[2] << 16) + (npc[1] << 8) + npc[0]; - - // READ ACC - CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space - printf("Read 8051 ACC = %0x (expected a7)\n", tmp); - result = result + tmp; - - // set sigle step to stop execution - CHECK(dbg_cpu1_write(0x3001, 0x20)); // set single step and global enable in DSR - - // clear DRR - CHECK(dbg_cpu1_write(0x3000, 0x00)); // set single step and global enable in DRR - - // unstall just 8051 - CHECK(dbg_cpu1_write_reg(0, 0)); - - // read PC - CHECK(dbg_cpu1_read(0, &npc[0])); - CHECK(dbg_cpu1_read(1, &npc[1])); - CHECK(dbg_cpu1_read(2, &npc[2])); - printf("Read 8051 npc = %02x%02x%02x (expected 42)\n", npc[2], npc[1], npc[0]); - result = result + (npc[2] << 16) + (npc[1] << 8) + npc[0]; - - // READ ACC - CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space - printf("Read 8051 ACC = %0x (expected d3)\n", tmp); - result = result + tmp; - - printf("report (%x)\n", result ^ 0x6c1 ^ 0xdeaddead); - - return APP_ERR_NONE; -} -*/ Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.h (nonexistent) @@ -1,18 +0,0 @@ -#ifndef _ADV_JTAG_BRIDGE_H_ -#define _ADV_JTAG_BRIDGE_H_ - -//#ifndef Boolean -//#define Boolean int -//#endif - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - - -#endif /* _ADV_JTAG_BRIDGE_H_ */ - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.c (nonexistent) @@ -1,393 +0,0 @@ -/* legacy_dbg_commands.c -- JTAG protocol bridge between GDB and OpenCores debug module. - Copyright(C) 2001 Marko Mlinar, markom@opencores.org - Code for TCP/IP copied from gdb, by Chris Ziomkowski - Adapted for the Advanced JTAG Bridge by Nathan Yawn, 2009 - - This file was part of the OpenRISC 1000 Architectural Simulator. - It is now also used to connect GDB to a running hardware OpenCores / OR1200 - debug unit. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include // for htonl - -#include "chain_commands.h" -#include "cable_common.h" -#include "errcodes.h" -#include "legacy_dbg_commands.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -#define LEGACY_CRC_POLY 0x04c11db7 -#define DBG_CRC_SIZE 32 - -/* Crc of current read or written data. */ -static int legacy_crc_r, legacy_crc_w = 0; - - -/*----------------------------------------------------------------------------------*/ -// Helper Functions - -/* Generates new crc, sending in new bit input_bit */ -static unsigned long legacy_crc_calc(unsigned long crc, int input_bit) { - unsigned long d = (input_bit&1) ? 0xfffffff : 0x0000000; - unsigned long crc_32 = ((crc >> 31)&1) ? 0xfffffff : 0x0000000; - crc <<= 1; - return crc ^ ((d ^ crc_32) & LEGACY_CRC_POLY); -} - -/* Writes bitstream. LS bit first if len < 0, MS bit first if len > 0. */ -static void legacy_write_stream(uint32_t stream, int len, int set_last_bit) { - int i; - uint32_t err; - uint32_t outdata = 0; - uint32_t datacpy = stream; - - // MSB needs to be transferred first, lower levels do LSB first. Reverse. - for(i = 0; i < len; i++) { - outdata |= stream & 0x1; - if(i < (len-1)) { - outdata <<= 1; - stream >>= 1; - } - } - - // Call the lower level, in case the driver has a high-speed transfer capability. - // *** This always transfers LS bit first. - err = jtag_write_stream(&outdata, len, set_last_bit); - - debug("legacy_write_stream, stream = 0x%X (0x%X), len = %d, set_last_bit = %d, ret = 0x%X\n", datacpy, outdata, len, set_last_bit, err); - - if(err != APP_ERR_NONE) { - fprintf(stderr, "Error in legacy_write_stream: %s\n", get_err_string(err)); - } - - // The low level call does not compute - // a CRC. Do so here. Remember, CRC is only calculated using data bits. - if(len < 0) { - fprintf(stderr, "Program error: legacy debug JTAG read with negative length!\n"); - /* - len = -len; - for(i = 0; i < len; i++) { - legacy_crc_w = legacy_crc_calc(legacy_crc_w, stream&1); - datacpy >>= 1; - } - */ - } - else { - for(i = len-1; i >= 0; i--) { - legacy_crc_w = legacy_crc_calc(legacy_crc_w, (datacpy>>i)&1); - } - } - -} - -/* Gets bitstream. LS bit first if len < 0, MS bit first if len > 0. */ -static uint32_t legacy_read_stream(unsigned long stream, int len, int set_last_bit) { - int i; - uint32_t data = 0, datacpy = 0; - uint32_t outdata = stream; - uint32_t indata; - uint32_t err; - - // *** WARNING: We assume that the input ("stream") will always be 0. - // If it's ever not, then we probably need to reverse the bit order (as - // is done in legacy_write_stream) before sending. - - // Call the lower level, in case the driver has a high-speed transfer capability. - // This always transfers LS bit first. - err = jtag_read_write_stream(&outdata, &indata, len, 0, set_last_bit); - - // Data comes from the legacy debug unit MSB first, so we need to - // reverse the bit order. - for(i = 0; i < len; i++) { - data |= indata & 0x1; - if(i < (len-1)) { - data <<= 1; - indata >>= 1; - } - } - - datacpy = data; - - debug("legacy_read_stream: write 0x%X, read 0x%X, len %i, set_last_bit = %d\n", outdata, data, len, set_last_bit); - - if(err != APP_ERR_NONE) { - fprintf(stderr, "Error in legacy_read_stream: %s\n", get_err_string(err)); - } - - // The low level call does not compute - // a CRC. Do so here. Remember, CRC is only calculated using data bits. - if(len < 0) { - fprintf(stderr, "Program error: legacy debug JTAG read with negative length!\n"); - /* - len = -len; - for(i = 0; i < len; i++) { - legacy_crc_w = legacy_crc_calc(legacy_crc_w, stream&1); - stream >>= 1; - legacy_crc_r = legacy_crc_calc(legacy_crc_r, datacpy&1); - datacpy >>= 1; - } - */ - } - else { - for(i = len-1; i >= 0; i--) { - legacy_crc_w = legacy_crc_calc(legacy_crc_w, (stream>>i)&1); - legacy_crc_r = legacy_crc_calc(legacy_crc_r, (datacpy>>i)&1); - } - } - - return data; -} - -////////////////////////////////////////////////////////////////////////// -// Actual operations on the legacy debug unit - -/* Sets scan chain. */ -int legacy_dbg_set_chain(int chain) { - int status, crc_generated, legacy_crc_read; - desired_chain = chain; - -try_again: - if (current_chain == chain) return APP_ERR_NONE; - current_chain = -1; - debug("\nset_chain %i\n", chain); - tap_set_shift_dr(); /* SHIFT_DR */ - - /* write data, EXIT1_DR */ - legacy_crc_w = 0xffffffff; - legacy_write_stream(((chain & 0xf) | (1<= 0 */ -int legacy_dbg_command(int type, unsigned long adr, int len) { - int status, crc_generated, legacy_crc_read; - -try_again: - legacy_dbg_set_chain(desired_chain); - debug("\ncomm %i\n", type); - - /***** WRITEx *****/ - tap_set_shift_dr(); /* SHIFT_DR */ - - /* write data, EXIT1_DR */ - legacy_crc_w = 0xffffffff; - legacy_write_stream(((DI_WRITE_CMD & 0xf) | (0< 0); - legacy_write_stream(len - 1, 16, 0); - legacy_write_stream(legacy_crc_w, DBG_CRC_SIZE, 0); - - legacy_crc_r = 0xffffffff; - status = legacy_read_stream(0, DC_STATUS_SIZE, 0); - crc_generated = legacy_crc_r; - legacy_crc_read = legacy_read_stream(0, DBG_CRC_SIZE, 1); - - /* CRCs must match, otherwise retry */ - if (legacy_crc_read != crc_generated) { - if (retry_do()) goto try_again; - else return APP_ERR_CRC; - } - /* we should read expected status value, otherwise retry */ - if (status != 0) { - if (retry_do()) goto try_again; - else return APP_ERR_BAD_PARAM; - } - - tap_exit_to_idle(); // Transition the TAP back to state IDLE - - /* reset retry counter */ - retry_ok(); - return APP_ERR_NONE; -} - -/* writes a ctrl reg */ -int legacy_dbg_ctrl(int reset, int stall) { - int status, crc_generated, legacy_crc_read; - -try_again: - legacy_dbg_set_chain(desired_chain); - debug("\nctrl\n"); - - /***** WRITEx *****/ - tap_set_shift_dr(); /* SHIFT_DR */ - - /* write data, EXIT1_DR */ - legacy_crc_w = 0xffffffff; - legacy_write_stream(((DI_WRITE_CTRL & 0xf) | (0< -#include // for malloc() -#include // for usleep() -//#include // for mutexes - -#include "chain_commands.h" // For the return error codes -#include "altera_virtual_jtag.h" // hardware-specifg defines for the Altera Virtual JTAG interface -#include "cable_common.h" // low-level JTAG IO routines -#include "adv_dbg_commands.h" // for the kludge in tap_reset() -#include "errcodes.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -// How many tries before an abort -#define NUM_SOFT_RETRIES 5 - -// for the klugde in tap_reset() -extern int current_reg_idx[DBG_MAX_MODULES]; - -/* Currently selected scan chain in the debug unit - just to prevent unnecessary - transfers. */ -int current_chain = -1; -int desired_chain = -1; - -// wait for 100ms -#define JTAG_RETRY_WAIT() usleep(100000); - -// Retry data -int soft_retry_no = 0; -//static int hard_retry_no = 0; - -// Configuration data -int global_IR_size = 0; -int global_IR_prefix_bits = 0; -int global_IR_postfix_bits = 0; -int global_DR_prefix_bits = 0; -int global_DR_postfix_bits = 0; -unsigned int global_jtag_cmd_debug = 0; // Value to be shifted into the TAP IR to select the debug unit (unused for virtual jtag) -unsigned char global_altera_virtual_jtag = 0; // Set true to use virtual jtag mode -unsigned int vjtag_cmd_vir = ALTERA_CYCLONE_CMD_VIR; // virtual IR-shift command for altera devices, may be configured on command line -unsigned int vjtag_cmd_vdr = ALTERA_CYCLONE_CMD_VDR; // virtual DR-shift, ditto -unsigned char global_xilinx_bscan = 0; // Set true if the hardware uses a Xilinx BSCAN_* device. - - -/////////////////////////////////////////////////////////////////////// -// Configuration - -void config_set_IR_size(int size) { - global_IR_size = size; -} - -void config_set_IR_prefix_bits(int bits) { - global_IR_prefix_bits = bits; -} - -void config_set_IR_postfix_bits(int bits) { - global_IR_postfix_bits = bits; -} - -void config_set_DR_prefix_bits(int bits) { - global_DR_prefix_bits = bits; -} - -void config_set_DR_postfix_bits(int bits) { - global_DR_postfix_bits = bits; -} - -void config_set_debug_cmd(unsigned int cmd) { - global_jtag_cmd_debug = cmd; -} - -void config_set_alt_vjtag(unsigned char enable) { - global_altera_virtual_jtag = (enable) ? 1:0; -} - -// At present, all devices which support virtual JTAG use the same VIR/VDR -// commands. But, if they ever change, these can be changed on the command line. -void config_set_vjtag_cmd_vir(unsigned int cmd) { - vjtag_cmd_vir = cmd; -} - -void config_set_vjtag_cmd_vdr(unsigned int cmd) { - vjtag_cmd_vdr = cmd; -} - -void config_set_xilinx_bscan(unsigned char enable) { - global_xilinx_bscan = (enable) ? 1:0; -} - -////////////////////////////////////////////////////////////////////// -// Functions which operate on the JTAG TAP - - -/* Resets JTAG - Writes TRST=1, and TRST=0. Sends 8 TMS to put the TAP - * in test_logic_reset mode, for good measure. - */ -int tap_reset(void) { - int i; - int err = APP_ERR_NONE; - - debug("\nreset("); - err |= jtag_write_bit(0); - JTAG_RETRY_WAIT(); - /* In case we don't have TRST reset it manually */ - for(i = 0; i < 8; i++) err |= jtag_write_bit(TMS); - err |= jtag_write_bit(TRST); // if TRST not supported, this puts us in test logic/reset - JTAG_RETRY_WAIT(); - err |= jtag_write_bit(0); // run test / idle - debug(")\n"); - - // Reset data on current module/register selections - current_chain = -1; - - // (this is only for the adv. debug i/f...bit of a kludge) - for(i = 0; i < DBG_MAX_MODULES; i++) - current_reg_idx[i] = -1; - - return err; -} - - // Set the IR with the DEBUG command, one way or the other -int tap_enable_debug_module(void) -{ - uint32_t data; - int err = APP_ERR_NONE; - - if(global_altera_virtual_jtag) { - /* Set for virtual IR shift */ - err |= tap_set_ir(vjtag_cmd_vir); // This is the altera virtual IR scan command - err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ - err |= jtag_write_bit(0); /* CAPTURE_DR */ - err |= jtag_write_bit(0); /* SHIFT_DR */ - - /* Select debug scan chain in virtual IR */ - data = (0x1< 32) { // Deal with spill into the next word - ir_chain[startoffset+1] &= ir >> (32-startshift); - ir_chain[startoffset+1] |= (0xFFFFFFFF << (global_IR_size - (32-startshift))); // Put the 1's back in the MSB positions - } - - // Do the actual JTAG transaction - debug("Set IR 0x%X\n", ir); - err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ - err |= jtag_write_bit(TMS); /* SELECT_IR SCAN */ - - err |= jtag_write_bit(0); /* CAPTURE_IR */ - err |= jtag_write_bit(0); /* SHIFT_IR */ - - /* write data, EXIT1_IR */ - debug("Setting IR, size %i, IR_size = %i, pre_size = %i, post_size = %i, data 0x%X\n", chain_size, global_IR_size, global_IR_prefix_bits, global_IR_postfix_bits, ir); - err |= cable_write_stream(ir_chain, chain_size, 1); // Use cable_ call directly (not jtag_), so we don't add DR prefix bits - debug("Done setting IR\n"); - - err |= jtag_write_bit(TMS); /* UPDATE_IR */ - err |= jtag_write_bit(0); /* IDLE */ - current_chain = -1; - return err; -} - - -// This assumes we are in the IDLE state, and we want to be in the SHIFT_DR state. -int tap_set_shift_dr(void) -{ - int err = APP_ERR_NONE; - - err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ - err |= jtag_write_bit(0); /* CAPTURE_DR */ - err |= jtag_write_bit(0); /* SHIFT_DR */ - - return err; -} - -// This transitions from EXIT1 to IDLE. It should be the last thing called -// in any debug unit transaction. -int tap_exit_to_idle(void) -{ - int err = APP_ERR_NONE; - - err |= jtag_write_bit(TMS); /* UPDATE_DR */ - err |= jtag_write_bit(0); /* IDLE */ - - return err; -} - -//////////////////////////////////////////////////////////////////// -// Operations to read / write data over JTAG - - -/* Writes TCLK=0, TRST=1, TMS=bit1, TDI=bit0 - and TCLK=1, TRST=1, TMS=bit1, TDI=bit0 -*/ -int jtag_write_bit(uint8_t packet) { - debug("Wbit(%i)\n", packet); - return cable_write_bit(packet); -} - -int jtag_read_write_bit(uint8_t packet, uint8_t *in_bit) { - int retval = cable_read_write_bit(packet, in_bit); - debug("RWbit(%i,%i)", packet, *in_bit); - return retval; -} - -// This automatically adjusts for the DR length (other devices on scan chain) -// when the set_TMS flag is true. -int jtag_write_stream(uint32_t *out_data, int length_bits, unsigned char set_TMS) -{ - int i; - int err = APP_ERR_NONE; - - if(!set_TMS) - err |= cable_write_stream(out_data, length_bits, 0); - else if(global_DR_prefix_bits == 0) - err |= cable_write_stream(out_data, length_bits, 1); - else { - err |= cable_write_stream(out_data, length_bits, 0); - // It could be faster to do a cable_write_stream for all the prefix bits (if >= 8 bits), - // but we'd need a data array of unknown (and theoretically unlimited) - // size to hold the 0 bits to write. TODO: alloc/realloc one. - for(i = 0; i < (global_DR_prefix_bits-1); i++) - err |= jtag_write_bit(0); - err |= jtag_write_bit(TMS); - } - return err; -} - -// When set_TMS is true, this function insures the written data is in the desired position (past prefix bits) -// before sending TMS. When 'adjust' is true, this function insures that the data read in accounts for postfix -// bits (they are shifted through before the read starts). -int jtag_read_write_stream(uint32_t *out_data, uint32_t *in_data, int length_bits, unsigned char adjust, unsigned char set_TMS) -{ - int i; - int err = APP_ERR_NONE; - - if(adjust && (global_DR_postfix_bits > 0)) { - // It would be faster to do a cable_write_stream for all the postfix bits, - // but we'd need a data array of unknown (and theoretically unlimited) - // size to hold the '0' bits to write. - for(i = 0; i < global_DR_postfix_bits; i++) - err |= cable_write_bit(0); - } - - // If there are both prefix and postfix bits, we may shift more bits than strictly necessary. - // If we shifted out the data while burning through the postfix bits, these shifts could be subtracted - // from the number of prefix shifts. However, that way leads to madness. - if(!set_TMS) - err |= cable_read_write_stream(out_data, in_data, length_bits, 0); - else if(global_DR_prefix_bits == 0) - err |= cable_read_write_stream(out_data, in_data, length_bits, 1); - else { - err |= cable_read_write_stream(out_data, in_data, length_bits, 0); - // It would be faster to do a cable_write_stream for all the prefix bits, - // but we'd need a data array of unknown (and theoretically unlimited) - // size to hold the '0' bits to write. - for(i = 0; i < (global_DR_prefix_bits-1); i++) - err |= jtag_write_bit(0); - err |= jtag_write_bit(TMS); - } - return err; -} - - - -// This function attempts to determine the structure of the JTAG chain -// It can determine how many devices are present. -// If the devices support the IDCODE command, it will be read and stored. -// There is no way to automatically determine the length of the IR registers - -// this must be read from a BSDL file, if IDCODE is supported. -// When IDCODE is not supported, IR length of the target device must be entered on the command line. - -#define ALLOC_SIZE 64 -#define MAX_DEVICES 1024 -int jtag_enumerate_chain(uint32_t **id_array, int *num_devices) -{ - uint32_t invalid_code = 0x7f; // Shift this out, we know we're done when we get it back - const unsigned int done_code = 0x3f; // invalid_code is altered, we keep this for comparison (minus the start bit) - int devindex = 0; // which device we are currently trying to detect - uint32_t tempID; - uint32_t temp_manuf_code; - uint32_t temp_rest_code; - uint8_t start_bit = 0; - uint32_t *idcodes; - int reallocs = 0; - int err = APP_ERR_NONE; - - // Malloc a reasonable number of entries, we'll expand if we must. Linked lists are overrated. - idcodes = (uint32_t *) malloc(ALLOC_SIZE*sizeof(uint32_t)); - if(idcodes == NULL) { - printf("Failed to allocate memory for device ID codes!\n"); - return APP_ERR_MALLOC; - } - - // Put in SHIFT-DR mode - err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ - err |= jtag_write_bit(0); /* CAPTURE_DR */ - err |= jtag_write_bit(0); /* SHIFT_DR */ - - printf("Enumerating JTAG chain...\n"); - - // Putting a limit on the # of devices supported has the useful side effect - // of insuring we still exit in error cases (we never get the 0x7f manuf. id) - while(devindex < MAX_DEVICES) { - // get 1 bit. 0 = BYPASS, 1 = start of IDCODE - err |= jtag_read_write_bit(invalid_code&0x01, &start_bit); - invalid_code >>= 1; - - if(start_bit == 0) { - if(devindex >= (ALLOC_SIZE << reallocs)) { // Enlarge the memory array if necessary, double the size each time - idcodes = (uint32_t *) realloc(idcodes, (ALLOC_SIZE << ++reallocs)*sizeof(uint32_t)); - if(idcodes == NULL) { - printf("Failed to allocate memory for device ID codes during enumeration!\n"); - return APP_ERR_MALLOC; - } - } - idcodes[devindex] = -1; - devindex++; - } - else { - // get 11 bit manufacturer code - err |= jtag_read_write_stream(&invalid_code, &temp_manuf_code, 11, 0, 0); - invalid_code >>= 11; - - if(temp_manuf_code != done_code) { - // get 20 more bits, rest of ID - err |= jtag_read_write_stream(&invalid_code, &temp_rest_code, 20, 0, 0); - invalid_code >>= 20; - tempID = (temp_rest_code << 12) | (temp_manuf_code << 1) | 0x01; - if(devindex >= (ALLOC_SIZE << reallocs)) { // Enlarge the memory array if necessary, double the size each time - idcodes = (uint32_t *) realloc(idcodes, (ALLOC_SIZE << ++reallocs)*sizeof(unsigned long)); - if(idcodes == NULL) { - printf("Failed to allocate memory for device ID codes during enumeration!\n"); - return APP_ERR_MALLOC; - } - } - idcodes[devindex] = tempID; - devindex++; - } else { - break; - } - } - - if(err) // Don't try to keep probing if we get a comm. error - return err; - } - - if(devindex >= MAX_DEVICES) - printf("WARNING: maximum supported devices on JTAG chain (%i) exceeded.\n", MAX_DEVICES); - - // Put in IDLE mode - err |= jtag_write_bit(TMS); /* EXIT1_DR */ - err |= jtag_write_bit(TMS); /* UPDATE_DR */ - err |= jtag_write_bit(0); /* IDLE */ - - *id_array = idcodes; - *num_devices = devindex; - - return err; -} - - - -int jtag_get_idcode(uint32_t cmd, uint32_t *idcode) -{ - uint32_t data_out = 0; - int err = APP_ERR_NONE; - unsigned char saveconfig = global_altera_virtual_jtag; - global_altera_virtual_jtag = 0; // We want the actual IDCODE, not the virtual device IDCODE - - err |= tap_set_ir(cmd); - err |= tap_set_shift_dr(); - err |= jtag_read_write_stream(&data_out, idcode, 32, 1, 1); /* EXIT1_DR */ - - if(err) - printf("Error getting ID code!\n"); - - // Put in IDLE mode - err |= jtag_write_bit(TMS); /* UPDATE_DR */ - err |= jtag_write_bit(0); /* IDLE */ - - global_altera_virtual_jtag = saveconfig; - return err; -} - - -///////////////////////////////////////////////////////////////// -// Helper functions - -/* counts retries and returns zero if we should abort */ -/* TODO: dynamically adjust timings */ -int retry_do() { - int err = APP_ERR_NONE; - - if (soft_retry_no >= NUM_SOFT_RETRIES) { - return 0; - - // *** TODO: Add a 'hard retry', which re-initializes the cable, re-enumerates the bus, etc. - - } else { /* quick reset */ - if(err |= tap_reset()) { - printf("Error %s while resetting for retry.\n", get_err_string(err)); - return 0; - } - - // Put us back into DEBUG mode - if(err |= tap_enable_debug_module()) { - printf("Error %s enabling debug module during retry.\n", get_err_string(err)); - return 0; - } - - soft_retry_no++; - printf("Retry...\n"); - } - - return 1; -} - -/* resets retry counter */ -void retry_ok() { - soft_retry_no = 0; -} - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch (nonexistent) @@ -1,24 +0,0 @@ -diff -d -urpN src.0/gdb/valops.c src.1/gdb/valops.c ---- src.0/gdb/valops.c 2008-07-27 04:00:03.000000000 +0200 -+++ src.1/gdb/valops.c 2008-07-31 15:17:42.000000000 +0200 -@@ -813,10 +813,18 @@ value_assign (struct value *toval, struc - struct frame_info *frame; - int value_reg; - -- /* Figure out which frame this is in currently. */ -- frame = frame_find_by_id (VALUE_FRAME_ID (toval)); - value_reg = VALUE_REGNUM (toval); - -+ /* Figure out which frame this is in currently. */ -+ frame = frame_find_by_id (VALUE_FRAME_ID (toval)); -+ /* "set $reg+=1" should work on programs with no debug info, -+ but frame_find_by_id returns NULL here (RH bug 436037). -+ Use current frame, it represents CPU state in this case. -+ If frame_find_by_id is changed to do it internally -+ (it is contemplated there), remove this. */ -+ if (!frame) -+ frame = get_current_frame (); -+ /* Probably never happens. */ - if (!frame) - error (_("Value being assigned to is no longer active.")); - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.h (nonexistent) @@ -1,26 +0,0 @@ - -#ifndef _LEGACY_DBG_COMMANDS_H_ -#define _LEGACY_DBG_COMMANDS_H_ - -#define DC_SIZE 4 -#define DC_STATUS_SIZE 4 - -#define DC_WISHBONE 0 -#define DC_CPU0 1 -#define DC_CPU1 2 - -#define DI_GO 0 -#define DI_READ_CMD 1 -#define DI_WRITE_CMD 2 -#define DI_READ_CTRL 3 -#define DI_WRITE_CTRL 4 - - -// Interface to send commands to the legacy debug interface -int legacy_dbg_set_chain(int chain); -int legacy_dbg_command(int type, unsigned long adr, int len); -int legacy_dbg_ctrl(int reset, int stall); -int legacy_dbg_ctrl_read(int *reset, int *stall); -int legacy_dbg_go(unsigned char *data, unsigned short len, int read); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_dbg_commands.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_dbg_commands.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/adv_dbg_commands.c (nonexistent) @@ -1,689 +0,0 @@ -/* adv_dbg_commands.c -- JTAG protocol bridge between GDB and Advanced debug module. - Copyright(C) Nathan Yawn, nyawn@opencores.net - - This file contains functions which perform high-level transactions - on a JTAG chain and debug unit, such as setting a value in the TAP IR - or doing a burst write through the wishbone module of the debug unit. - It uses the protocol for the Advanced Debug Interface (adv_dbg_if). - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - - - -#include -#include // for malloc() -#include // for exit() -//#include // for mutexes - -#include "chain_commands.h" -#include "adv_dbg_commands.h" // hardware-specific defines for the debug module -//#include "altera_virtual_jtag.h" // hardware-specifg defines for the Altera Virtual JTAG interface -#include "cable_common.h" // low-level JTAG IO routines -#include "errcodes.h" - -#define debug(...) //fprintf(stderr, __VA_ARGS__ ) - -// How many '0' status bits to get during a burst read -// before giving up -#define MAX_READ_STATUS_WAIT 100 - -// Currently selected internal register in each module -// - cuts down on unnecessary transfers -int current_reg_idx[DBG_MAX_MODULES]; - -// Prototypes for local functions -uint32_t adbg_compute_crc(uint32_t crc_in, uint32_t data_in, int length_bits); - - - -//////////////////////////////////////////////////////////////////////// -// Helper functions - -uint32_t adbg_compute_crc(uint32_t crc_in, uint32_t data_in, int length_bits) -{ - int i; - unsigned int d, c; - uint32_t crc_out = crc_in; - - for(i = 0; i < length_bits; i = i+1) - { - d = ((data_in >> i) & 0x1) ? 0xffffffff : 0; - c = (crc_out & 0x1) ? 0xffffffff : 0; - crc_out = crc_out >> 1; - crc_out = crc_out ^ ((d ^ c) & ADBG_CRC_POLY); - } - return crc_out; -} - -////////////////////////////////////////////////////////////////// -// Functions which operate on the advanced debug unit - -/* Selects one of the modules in the debug unit (e.g. wishbone unit, CPU0, etc.) - */ -int adbg_select_module(int chain) -{ - uint32_t data; - int err = APP_ERR_NONE; - - if (current_chain == chain) - return err; - - current_chain = -1; - desired_chain = chain; - - // MSB of the data out must be set to 1, indicating a module select command - data = chain | (1<> 16) | ((opcode & 0xf) << 16)) & ~(0x1<<20); // MSB must be 0 to access modules - - err |= tap_set_shift_dr(); /* SHIFT_DR */ - - /* write data, EXIT1_DR */ - err |= jtag_write_stream(data, 53, 1); // When TMS is set (last parameter), DR length is also adjusted; EXIT1_DR - - err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE - - /* reset retry counter */ - retry_ok(); - - if(err) - printf("Error %s sending burst command to module %i\n", get_err_string(err), desired_chain); - - return err; -} - -// Set up and execute a burst read from a contiguous block of addresses. -// Note that there is a minor weakness in the CRC algorithm in case of retries: -// the CRC is only checked for the final burst read. Thus, if errors/partial retries -// break up a transfer into multiple bursts, only the last burst will be CRC protected. -#define MAX_BUS_ERRORS 10 -int adbg_wb_burst_read(int word_size_bytes, int word_count, unsigned long start_address, void *data) -{ - unsigned char opcode; - uint8_t status; - unsigned long instream; - int i, j; - uint32_t crc_calc; - uint32_t crc_read; - unsigned char word_size_bits; - uint32_t out_data = 0; - uint32_t in_data; - unsigned long addr; - uint32_t err_data[2]; - int bus_error_retries = 0; - int err = APP_ERR_NONE; - - debug("Doing burst read, word size %d, word count %d, start address 0x%lX", word_size_bytes, word_count, start_address); - - if(word_count <= 0) { - debug("Ignoring illegal read burst length (%d)\n", word_count); - return 0; - } - - instream = 0; - word_size_bits = word_size_bytes << 3; - - // Select the appropriate opcode - switch(current_chain) { - case DC_WISHBONE: - if (word_size_bytes == 1) opcode = DBG_WB_CMD_BREAD8; - else if(word_size_bytes == 2) opcode = DBG_WB_CMD_BREAD16; - else if(word_size_bytes == 4) opcode = DBG_WB_CMD_BREAD32; - else { - printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_WB_CMD_BREAD32; - } - break; - case DC_CPU0: - if(word_size_bytes == 4) opcode = DBG_CPU0_CMD_BREAD32; - else { - printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_CPU0_CMD_BREAD32; - } - break; - case DC_CPU1: - if(word_size_bytes == 4) opcode = DBG_CPU1_CMD_BREAD32; - else { - printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_CPU0_CMD_BREAD32; - } - break; - default: - printf("ERROR! Illegal debug chain selected while doing burst read!\n"); - return 1; - } - - wb_burst_read_retry_full: - i = 0; - addr = start_address; - wb_burst_read_retry_partial: - crc_calc = 0xffffffff; - - - // Send the BURST READ command, returns TAP to idle state - if(err |= adbg_burst_command(opcode, addr, (word_count-i))) // word_count-i in case of partial retry - return err; - - // This is a kludge to word around oddities in the Xilinx BSCAN_* devices, and the - // adv_dbg_if state machine. The debug FSM needs 1 TCK between UPDATE_DR above, and - // the CAPTURE_DR below, and the BSCAN_* won't provide it. So, we force it, by putting the TAP - // in BYPASS, which makes the debug_select line inactive, which is AND'ed with the TCK line (in the xilinx_internal_jtag module), - // which forces it low. Then we re-enable USER1/debug_select to make TCK high. One TCK - // event, the hard way. - if(global_xilinx_bscan) { - err |= tap_set_ir(0xFFFFFFFF); - err |= tap_enable_debug_module(); - } - - // Get us back to shift_dr mode to read a burst - err |= tap_set_shift_dr(); - - // We do not adjust for the DR length here. BYPASS regs are loaded with 0, - // and the debug unit waits for a '1' status bit before beginning to read data. - - // Repeat for each word: wait until ready = 1, then read word_size_bits bits. - for(; i < word_count; i++) - { - // Get 1 status bit, then word_size_bytes*8 bits - status = 0; - j = 0; - while(!status) { // Status indicates whether there is a word available to read. Wait until it returns true. - err |= jtag_read_write_bit(0, &status); - j++; - // If max count exceeded, retry starting with the failure address - if(j > MAX_READ_STATUS_WAIT) { - printf("Burst read timed out.\n"); - if(!retry_do()) { - printf("Retry count exceeded in burst read!\n"); - return err|APP_ERR_MAX_RETRY; - } - err = APP_ERR_NONE; // on retry, errors cleared - addr = start_address + (i*word_size_bytes); - goto wb_burst_read_retry_partial; - } - } - - if(j > 1) { // It's actually normal for the first read of a burst to take 2 tries, even with a fast WB clock - 3 with a Xilinx BSCAN - debug("Took %0d tries before good status bit during burst read", j); - } - - // Get one word of data - err |= jtag_read_write_stream(&out_data, &in_data, word_size_bits, 0, 0); - debug("Read 0x%0lx", in_data); - - if(err) { // Break and retry as soon as possible on error - printf("Error %s during burst read.\n", get_err_string(err)); - if(!retry_do()) { - printf("Retry count exceeded in burst read!\n"); - return err|APP_ERR_MAX_RETRY; - } - err = APP_ERR_NONE; // on retry, errors cleared - addr = start_address + (i*word_size_bytes); - goto wb_burst_read_retry_partial; - } - - crc_calc = adbg_compute_crc(crc_calc, in_data, word_size_bits); - - if(word_size_bytes == 1) ((unsigned char *)data)[i] = in_data & 0xFF; - else if(word_size_bytes == 2) ((unsigned short *)data)[i] = in_data & 0xFFFF; - else ((unsigned long *)data)[i] = in_data; - } - - // All bus data was read. Read the data CRC from the debug module. - err |= jtag_read_write_stream(&out_data, &crc_read, 32, 0, 1); - - err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE - - if(crc_calc != crc_read) { - printf("CRC ERROR! Computed 0x%x, read CRC 0x%x\n", crc_calc, crc_read); - if(!retry_do()) { - printf("Retry count exceeded! Abort!\n\n"); - return err|APP_ERR_CRC; - } - goto wb_burst_read_retry_full; - } - else debug("CRC OK!"); - - - - // Now, read the error register, and retry/recompute as necessary. - if(current_chain == DC_WISHBONE) - { - err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 1); // First, just get 1 bit...read address only if necessary, - if(err_data[0] & 0x1) { // Then we have a problem. - err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 33); - addr = (err_data[0] >> 1) | (err_data[1] << 31); - i = (addr - start_address) / word_size_bytes; - printf("ERROR! WB bus error during burst read, address 0x%lX (index 0x%X), retrying!\n", addr, i); - bus_error_retries++; - if(bus_error_retries > MAX_BUS_ERRORS) { - printf("Max WB bus errors reached during burst read\n"); - return err|APP_ERR_MAX_BUS_ERR; - } - // Don't call retry_do(), a JTAG reset won't help a WB bus error - err_data[0] = 1; - err |= adbg_ctrl_write(DBG_WB_REG_ERROR, err_data, 1); // Write 1 bit, to reset the error register, - goto wb_burst_read_retry_partial; - } - } - - retry_ok(); - return err; -} - -// Set up and execute a burst write to a contiguous set of addresses -int adbg_wb_burst_write(void *data, int word_size_bytes, int word_count, unsigned long start_address) -{ - unsigned char opcode; - uint8_t status; - uint32_t datawords[2] = {0,0}; - uint32_t statuswords[2] = {0,0}; - int i; - uint32_t crc_calc; - uint32_t crc_match; - unsigned int word_size_bits; - unsigned long addr; - int bus_error_retries = 0; - uint32_t err_data[2]; - int loopct, successes; - int first_status_loop; - int err = APP_ERR_NONE; - - debug("Doing burst write, word size %d, word count %d, start address 0x%lx", word_size_bytes, word_count, start_address); - word_size_bits = word_size_bytes << 3; - - if(word_count <= 0) { - printf("Ignoring illegal burst write size (%d)\n", word_count); - return 0; - } - - // Select the appropriate opcode - switch(current_chain) { - case DC_WISHBONE: - if (word_size_bytes == 1) opcode = DBG_WB_CMD_BWRITE8; - else if(word_size_bytes == 2) opcode = DBG_WB_CMD_BWRITE16; - else if(word_size_bytes == 4) opcode = DBG_WB_CMD_BWRITE32; - else { - printf("Tried WB burst write with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_WB_CMD_BWRITE32; - } - break; - case DC_CPU0: - if(word_size_bytes == 4) opcode = DBG_CPU0_CMD_BWRITE32; - else { - printf("Tried CPU0 burst write with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_CPU0_CMD_BWRITE32; - } - break; - case DC_CPU1: - if(word_size_bytes == 4) opcode = DBG_CPU1_CMD_BWRITE32; - else { - printf("Tried CPU1 burst write with invalid word size (%0X), defaulting to 4-byte words", word_size_bytes); - opcode = DBG_CPU0_CMD_BWRITE32; - } - break; - default: - printf("ERROR! Illegal debug chain selected while doing burst WRITE!\n"); - return 1; - } - - // Compute which loop iteration in which to expect the first status bit - first_status_loop = 1 + ((global_DR_prefix_bits + global_DR_postfix_bits)/(word_size_bits+1)); - - wb_burst_write_retry_full: - i = 0; - addr = start_address; - wb_burst_write_retry_partial: - crc_calc = 0xffffffff; - successes = 0; - - - // Send burst command, return to idle state - if(err |= adbg_burst_command(opcode, addr, (word_count-i))) // word_count-i in case of partial retry - return err; - - // Get us back to shift_dr mode to write a burst - //err |= jtag_write_bit(TMS); // select_dr_scan - //err |= jtag_write_bit(0); // capture_ir - //err |= jtag_write_bit(0); // shift_ir - err |= tap_set_shift_dr(); - - // Write a start bit (a 1) so it knows when to start counting - err |= jtag_write_bit(TDO); - - // Now, repeat... - for(loopct = 0; i < word_count; i++,loopct++) // loopct only used to check status... - { - // Write word_size_bytes*8 bits, then get 1 status bit - if(word_size_bytes == 4) datawords[0] = ((unsigned long *)data)[i]; - else if(word_size_bytes == 2) datawords[0] = ((unsigned short *)data)[i]; - else datawords[0] = ((unsigned char *)data)[i]; - - crc_calc = adbg_compute_crc(crc_calc, datawords[0], word_size_bits); - - // This is an optimization - if((global_DR_prefix_bits + global_DR_postfix_bits) == 0) { - err |= jtag_write_stream(datawords, word_size_bits, 0); // Write data - err |= jtag_read_write_bit(0, &status); // Read status bit - if(!status) { - addr = start_address + (i*word_size_bytes); - printf("Write before bus ready, retrying (idx %i, addr 0x%08lX).\n", i, addr); - if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} - // Don't bother going to TAP idle state, we're about to reset the TAP - goto wb_burst_write_retry_partial; - } - } - else { // This is slower (for a USB cable anyway), because a read takes 1 more USB transaction than a write. - err |= jtag_read_write_stream(datawords, statuswords, word_size_bits+1, 0, 0); - debug("St. 0x%08lX 0x%08lX\n", statuswords[0], statuswords[1]); - status = (statuswords[0] || statuswords[1]); - if(loopct > first_status_loop) { - if(status) successes++; - else { - i = successes; - addr = start_address + (i*word_size_bytes); - printf("Write before bus ready, retrying (idx %i, addr 0x%08lX).\n", i, addr); - if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} - // Don't bother going to TAP idle state, we're about to reset the TAP - goto wb_burst_write_retry_partial; - } - } - } - - if(err) { - printf("Error %s getting status bit, retrying.\n", get_err_string(err)); - if(!retry_do()) { - printf("Retry count exceeded!\n"); - return err|APP_ERR_MAX_RETRY; - } - err = APP_ERR_NONE; - addr = start_address + (i*word_size_bytes); - // Don't bother going to TAP idle state, we're about to reset the TAP - goto wb_burst_write_retry_partial; - } - - debug("Wrote 0x%0lx", datawords[0]); - } - - // *** If this is a multi-device chain, at least one status bit will be lost. - // *** If we want to check for it, we'd have to look while sending the CRC, and - // *** maybe while burning bits to get the match bit. So, for now, there is a - // *** hole here. - - // Done sending data, Send the CRC we computed - err |= jtag_write_stream(&crc_calc, 32, 0); - for(i = 0; i < global_DR_prefix_bits; i++) // Push the CRC data all the way to the debug unit - err |= jtag_write_bit(0); // Can't do this with a stream command without setting TMS on the last bit - - // Read the 'CRC match' bit, and go to exit1_dr - // May need to adjust for other devices in chain! - datawords[0] = 0; - err |= jtag_read_write_stream(datawords, &crc_match, 1, 1, 0); // set 'adjust' to pull match bit all the way in - // But don't set TMS above, that would shift prefix bits (again), wasting time. - err |= jtag_write_bit(TMS); // exit1_dr - err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE - - if(!crc_match) { - printf("CRC ERROR! match bit after write is %i (computed CRC 0x%x)", crc_match, crc_calc); - if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} - goto wb_burst_write_retry_full; - } - else debug("CRC OK!"); - - - // Now, read the error register and retry/recompute as needed - if (current_chain == DC_WISHBONE) - { - err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 1); // First, just get 1 bit...read address only if necessary - if(err_data[0] & 0x1) { // Then we have a problem. - err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 33); - addr = (err_data[0] >> 1) | (err_data[1] << 31); - i = (addr - start_address) / word_size_bytes; - printf("ERROR! WB bus error during burst write, address 0x%lX (index 0x%X), retrying!\n", addr, i); - bus_error_retries++; - if(bus_error_retries > MAX_BUS_ERRORS) { - printf("Max WB bus errors reached!\n"); - return err|APP_ERR_MAX_BUS_ERR; - } - // Don't call retry_do(), a JTAG reset won't help a WB bus error - err |= adbg_ctrl_write(DBG_WB_REG_ERROR, err_data, 1); // Write 1 bit, to reset the error register. - goto wb_burst_write_retry_partial; - } - } - - retry_ok(); - return err; -} Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_ft2232.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_ft2232.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/cable_ft2232.c (nonexistent) @@ -1,880 +0,0 @@ -/* cable_ft2232.c - FT2232 based cable driver for the Advanced JTAG Bridge - Copyright (C) 2008 Arnim Laeuger, arniml@opencores.org - Copyright (C) 2009 José Ignacio Villar, jose@dte.us.es - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "cable_ft2232.h" -#include "cable_common.h" -#include "errcodes.h" -int debug = 0; - -static int usbconn_ftdi_common_open( usbconn_t *conn); -static void usbconn_ftdi_free( usbconn_t *conn ); -static int seq_purge(struct ftdi_context *ftdic, int purge_rx, int purge_tx); -static int seq_reset(struct ftdi_context *ftdic); -static int usbconn_ftdi_flush( ftdi_param_t *params ); -static int usbconn_ftdi_read( usbconn_t *conn, uint8_t *buf, int len ); -static int usbconn_ftdi_write( usbconn_t *conn, uint8_t *buf, int len, int recv ); -static int usbconn_ftdi_mpsse_open( usbconn_t *conn ); -static int usbconn_ftdi_close(usbconn_t *conn); - -usbconn_driver_t usbconn_ft2232_mpsse_driver = { - "ftdi-mpsse", - usbconn_ftdi_connect, - usbconn_ftdi_free, - usbconn_ftdi_mpsse_open, - usbconn_ftdi_close, - usbconn_ftdi_read, - usbconn_ftdi_write -}; - -usbconn_cable_t usbconn_ft2232_mpsse_CableID2= { - "CableID2", /* cable name */ - "CableID2", /* string pattern, not used */ - "ftdi-mpsse", /* default usbconn driver */ - 0x0403, /* VID */ - 0x6010 /* PID */ -}; - -static usbconn_t *ft2232_device; - - - -/// ---------------------------------------------------------------------------------------------- -/// libftdi wrappers for debugging purposes. -/// ---------------------------------------------------------------------------------------------- - -void print_buffer(unsigned char *buf, int size) { - int i=0; - for(i=0; i 1) print_buffer(buf, size); - return ftdi_write_data(ftdi, buf, size); -} - -char *my_ftdi_get_error_string (struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_get_error_string(ftdi);\n"); - return ftdi_get_error_string (ftdi); -} - -int my_ftdi_read_data(struct ftdi_context *ftdi, unsigned char *buf, int size) { - int ret = 0; - debug("[MYDBG] ftdi_read_data(ftdi, buf=BUFFER[%d], size=%d);\n", size, size); - ret = ftdi_read_data(ftdi, buf, size); - if(debug) print_buffer(buf, size); - return ret; -} - -int my_ftdi_usb_open_desc(struct ftdi_context *ftdi, int vendor, int product, const char* description, const char* serial) { - debug("[MYDBG] ftdi_usb_open_desc(ftdi, vendor=%d, product=%d, description=DESCRIPTION, serial=SERIAL);\n", vendor, product); - return ftdi_usb_open_desc(ftdi, vendor, product, description, serial); -} - -void my_ftdi_deinit(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_deinit(ftdi);\n"); - ftdi_deinit(ftdi); -} - -int my_ftdi_usb_purge_buffers(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_usb_purge_buffers(ftdi);\n"); - return ftdi_usb_purge_buffers(ftdi); -} - -int my_ftdi_usb_purge_rx_buffer(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_usb_purge_rx_buffer(ftdi);\n"); - return ftdi_usb_purge_rx_buffer(ftdi); -} - -int my_ftdi_usb_purge_tx_buffer(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_usb_purge_tx_buffer(ftdi);\n"); - return ftdi_usb_purge_tx_buffer(ftdi); -} - -int my_ftdi_usb_reset(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_usb_reset(ftdi);\n"); - return ftdi_usb_reset(ftdi); -} - -int my_ftdi_set_latency_timer(struct ftdi_context *ftdi, unsigned char latency) { - debug("[MYDBG] ftdi_set_latency_timer(ftdi, latency=0x%02x);\n", latency); - return ftdi_set_latency_timer(ftdi, latency); -} - -int my_ftdi_set_baudrate(struct ftdi_context *ftdi, int baudrate) { - debug("[MYDBG] ftdi_set_baudrate(ftdi, baudrate=%d);\n", baudrate); - return ftdi_set_baudrate(ftdi, baudrate); -} - -int my_ftdi_read_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize) { - debug("[MYDBG] ftdi_read_data_set_chunksize(ftdi, chunksize=%u);\n", chunksize); - return ftdi_read_data_set_chunksize(ftdi, chunksize); -} - -int my_ftdi_write_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize) { - debug("[MYDBG] ftdi_write_data_set_chunksize(ftdi, chunksize=%u);\n", chunksize); - return ftdi_write_data_set_chunksize(ftdi, chunksize); -} - -int my_ftdi_set_event_char(struct ftdi_context *ftdi, unsigned char eventch, unsigned char enable) { - debug("[MYDBG] ftdi_set_event_char(ftdi, eventch=0x%02x, enable=0x%02x);\n", eventch, enable); - return ftdi_set_event_char(ftdi, eventch, enable); -} - -int my_ftdi_set_error_char(struct ftdi_context *ftdi, unsigned char errorch, unsigned char enable) { - debug("[MYDBG] ftdi_set_error_char(ftdi, errorch=0x%02x, enable=0x%02x);\n", errorch, enable); - return ftdi_set_error_char(ftdi, errorch, enable); -} - -int my_ftdi_set_bitmode(struct ftdi_context *ftdi, unsigned char bitmask, unsigned char mode) { - debug("[MYDBG] ftdi_set_bitmode(ftdi, bitmask=0x%02x, mode=0x%02x);\n", bitmask, mode); - return ftdi_set_bitmode(ftdi, bitmask, mode); -} - -int my_ftdi_usb_close(struct ftdi_context *ftdi) { - debug("[MYDBG] ftdi_usb_close(ftdi);\n"); - return ftdi_usb_close(ftdi); -} - - - -/// ---------------------------------------------------------------------------------------------- -/// USBconn FTDI MPSSE subsystem -/// ---------------------------------------------------------------------------------------------- - - -static int usbconn_ftdi_common_open(usbconn_t *conn) { - ftdi_param_t *params = conn->params; - struct ftdi_context * ftdic = params->ftdic; - int error; - - printf("Initializing USB device\n"); - - if ((error = my_ftdi_usb_open_desc(ftdic, conn->cable->vid, conn->cable->pid, NULL, NULL))) { - if (error == -1) printf("usb_find_busses() failed\n"); - else if (error == -2) printf("usb_find_devices() failed\n"); - else if (error == -3) printf("usb device not found\n"); - else if (error == -4) printf("unable to open device\n"); - else if (error == -5) printf("unable to claim device\n"); - else if (error == -6) printf("reset failed\n"); - else if (error == -7) printf("set baudrate failed\n"); - else if (error == -8) printf("get product description failed\n"); - else if (error == -9) printf("get serial number failed\n"); - else if (error == -10) printf("unable to close device\n"); - - my_ftdi_deinit(ftdic); - ftdic = NULL; - - printf("Can't open FTDI usb device\n"); - return(-1); - } - - return 0; -} - -static int seq_purge(struct ftdi_context *ftdic, int purge_rx, int purge_tx) { - int r = 0; - unsigned char buf; - - if ((r = my_ftdi_usb_purge_buffers( ftdic )) < 0) - printf("my_ftdi_usb_purge_buffers() failed\n"); - if (r >= 0) if ((r = my_ftdi_read_data( ftdic, &buf, 1 )) < 0) - printf("my_ftdi_read_data() failed\n"); - - return r < 0 ? -1 : 0; -} - -static int seq_reset(struct ftdi_context *ftdic) { - - if (my_ftdi_usb_reset( ftdic ) < 0) { - printf("my_ftdi_usb_reset() failed\n"); - return -1; - } - - if(seq_purge(ftdic, 1, 1) < 0) - return -1; - - return 0; -} - -static int usbconn_ftdi_flush( ftdi_param_t *params ) - { - int xferred; - int recvd = 0; - - if (!params->ftdic) - return -1; - - if (params->send_buffered == 0) - return 0; - - if ((xferred = my_ftdi_write_data( params->ftdic, params->send_buf, params->send_buffered )) < 0) - printf("my_ftdi_write_data() failed\n"); - - if (xferred < params->send_buffered) { - printf("Written fewer bytes than requested.\n"); - return -1; - } - - params->send_buffered = 0; - - /* now read all scheduled receive bytes */ - if (params->to_recv) { - if (params->recv_write_idx + params->to_recv > params->recv_buf_len) { - /* extend receive buffer */ - params->recv_buf_len = params->recv_write_idx + params->to_recv; - if (params->recv_buf) - params->recv_buf = (uint8_t *)realloc( params->recv_buf, params->recv_buf_len ); - } - - if (!params->recv_buf) { - printf("Receive buffer does not exist.\n"); - return -1; - } - - while (recvd == 0) - if ((recvd = my_ftdi_read_data( params->ftdic, &(params->recv_buf[params->recv_write_idx]), params->to_recv )) < 0) - printf("Error from my_ftdi_read_data()\n"); - - if (recvd < params->to_recv) - printf("Received less bytes than requested.\n"); - - params->to_recv -= recvd; - params->recv_write_idx += recvd; - } - - debug("[MYDBG] FLUSHING xferred=%u\n", xferred); - return xferred < 0 ? -1 : xferred; -} - -static int usbconn_ftdi_read( usbconn_t *conn, uint8_t *buf, int len ) { - ftdi_param_t *params = conn->params; - int cpy_len; - int recvd = 0; - - if (!params->ftdic) - return -1; - - /* flush send buffer to get all scheduled receive bytes */ - if (usbconn_ftdi_flush( params ) < 0) - return -1; - - if (len == 0) - return 0; - - /* check for number of remaining bytes in receive buffer */ - cpy_len = params->recv_write_idx - params->recv_read_idx; - if (cpy_len > len) - cpy_len = len; - len -= cpy_len; - - if (cpy_len > 0) { - /* get data from the receive buffer */ - memcpy( buf, &(params->recv_buf[params->recv_read_idx]), cpy_len ); - params->recv_read_idx += cpy_len; - if (params->recv_read_idx == params->recv_write_idx) - params->recv_read_idx = params->recv_write_idx = 0; - } - - if (len > 0) { - /* need to get more data directly from the device */ - while (recvd == 0) - if ((recvd = my_ftdi_read_data( params->ftdic, &(buf[cpy_len]), len )) < 0) - printf("Error from my_ftdi_read_data()\n"); - } - debug("[MYDBG] READ cpy_len=%u ; len=%u\n", cpy_len, len); - return recvd < 0 ? -1 : cpy_len + len; -} - -static int usbconn_ftdi_write( usbconn_t *conn, uint8_t *buf, int len, int recv ) { - - ftdi_param_t *params = conn->params; - int xferred = 0; - - if (!params->ftdic) - return -1; - - /* this write function will try to buffer write data - buffering will be ceased and a flush triggered in two cases. */ - - /* Case A: max number of scheduled receive bytes will be exceeded - with this write - Case B: max number of scheduled send bytes has been reached */ - if ((params->to_recv + recv > FTDI_MAXRECV) || ((params->send_buffered > FTDX_MAXSEND) && (params->to_recv == 0))) - xferred = usbconn_ftdi_flush(params); - - if (xferred < 0) - return -1; - - /* now buffer this write */ - if (params->send_buffered + len > params->send_buf_len) { - params->send_buf_len = params->send_buffered + len; - if (params->send_buf) - params->send_buf = (uint8_t *)realloc( params->send_buf, params->send_buf_len); - } - - if (params->send_buf) { - memcpy( &(params->send_buf[params->send_buffered]), buf, len ); - params->send_buffered += len; - if (recv > 0) - params->to_recv += recv; - - if (recv < 0) { - /* immediate write requested, so flush the buffered data */ - xferred = usbconn_ftdi_flush( params ); - } - - debug("[MYDBG] WRITE inmediate=%s ; xferred=%u ; len=%u\n", ((recv < 0) ? "TRUE" : "FALSE"), xferred, len); - return xferred < 0 ? -1 : len; - } - else { - printf("Send buffer does not exist.\n"); - return -1; - } -} - -static int usbconn_ftdi_mpsse_open( usbconn_t *conn ) { - ftdi_param_t *params = conn->params; - struct ftdi_context *ftdic = params->ftdic; - - int r = 0; - - if (usbconn_ftdi_common_open(conn) < 0) { - printf("Connection failed\n"); - return -1; - } - - /* This sequence might seem weird and containing superfluous stuff. - However, it's built after the description of JTAG_InitDevice - Ref. FTCJTAGPG10.pdf - Intermittent problems will occur when certain steps are skipped. */ - - r = seq_reset( ftdic ); - if (r >= 0) - r = seq_purge( ftdic, 1, 0 ); - - if (r >= 0) - if ((r = my_ftdi_write_data_set_chunksize( ftdic, FTDX_MAXSEND_MPSSE )) < 0) - puts( my_ftdi_get_error_string( ftdic ) ); - - if (r >= 0) - if ((r = my_ftdi_read_data_set_chunksize( ftdic, FTDX_MAXSEND_MPSSE )) < 0) - puts( my_ftdi_get_error_string( ftdic ) ); - - /* set a reasonable latency timer value - if this value is too low then the chip will send intermediate result data - in short packets (suboptimal performance) */ - if (r >= 0) - if ((r = my_ftdi_set_latency_timer( ftdic, 16 )) < 0) - printf("my_ftdi_set_latency_timer() failed\n"); - - if (r >= 0) - if ((r = my_ftdi_set_bitmode( ftdic, 0x0b, BITMODE_MPSSE )) < 0) - printf("my_ftdi_set_bitmode() failed\n"); - - if (r >= 0) - if ((r = my_ftdi_usb_reset( ftdic )) < 0) - printf("my_ftdi_usb_reset() failed\n"); - - if (r >= 0) - r = seq_purge( ftdic, 1, 0 ); - - /* set TCK Divisor */ - if (r >= 0) { - uint8_t buf[3] = {TCK_DIVISOR, 0x00, 0x00}; - r = usbconn_ftdi_write( conn, buf, 3, 0 ); - } - - /* switch off loopback */ - if (r >= 0) { - uint8_t buf[1] = {LOOPBACK_END}; - r = usbconn_ftdi_write( conn, buf, 1, 0 ); - } - - if (r >= 0) - r = usbconn_ftdi_read( conn, NULL, 0 ); - - if (r >= 0) - if ((r = my_ftdi_usb_reset( ftdic )) < 0) - printf("my_ftdi_usb_reset() failed\n"); - - if (r >= 0) - r = seq_purge( ftdic, 1, 0 ); - - if (r < 0) { - ftdi_usb_close( ftdic ); - ftdi_deinit( ftdic ); - /* mark ftdi layer as not initialized */ - params->ftdic = NULL; - } - - return r < 0 ? -1 : 0; -} - -static int usbconn_ftdi_close(usbconn_t *conn) { - ftdi_param_t *params = conn->params; - - if (params->ftdic) { - my_ftdi_usb_close(params->ftdic); - my_ftdi_deinit(params->ftdic); - params->ftdic = NULL; - } - - return 0; -} - -static void usbconn_ftdi_free( usbconn_t *conn ) -{ - ftdi_param_t *params = conn->params; - - if (params->send_buf) free( params->send_buf ); - if (params->recv_buf) free( params->recv_buf ); - if (params->ftdic) free( params->ftdic ); - if (params->serial) free( params->serial ); - - free( conn->params ); - free( conn ); -} - -usbconn_t * usbconn_ftdi_connect() { - - usbconn_t *conn = malloc( sizeof( usbconn_t ) ); - ftdi_param_t *params = malloc( sizeof( ftdi_param_t ) ); - struct ftdi_context *ftdic = malloc( sizeof( struct ftdi_context ) ); - - if (params) { - params->send_buf_len = FTDX_MAXSEND; - params->send_buffered = 0; - params->send_buf = (uint8_t *) malloc( params->send_buf_len ); - params->recv_buf_len = FTDI_MAXRECV; - params->to_recv = 0; - params->recv_write_idx = 0; - params->recv_read_idx = 0; - params->recv_buf = (uint8_t *) malloc( params->recv_buf_len ); - } - - if (!conn || !params || !ftdic || !params->send_buf || !params->recv_buf) { - printf("Can't allocate memory for ftdi context structures\n"); - - if (conn) free( conn ); - if (params) free( params ); - if (ftdic) free( ftdic ); - if (params->send_buf) free( params->send_buf ); - if (params->recv_buf) free( params->recv_buf ); - return NULL; - } - - conn->driver = &usbconn_ft2232_mpsse_driver; - conn->cable = &usbconn_ft2232_mpsse_CableID2; - - ftdi_init( ftdic ); - params->ftdic = ftdic; - params->pid = conn->cable->pid; - params->vid = conn->cable->vid; - params->serial = NULL; - - conn->params = params; - - printf("Structs successfully initialized\n"); - - /* do a test open with the specified cable paramters, - alternatively we could use libusb to detect the presence of the - specified USB device */ - if (usbconn_ftdi_common_open(conn) != 0) { - printf("Connection failed\n"); - usbconn_ftdi_free(conn); - printf("Freeing structures.\n"); - return NULL; - } - - my_ftdi_usb_close( ftdic ); - - printf("Connected to libftdi driver.\n"); - - return conn; -} - - - -/// ---------------------------------------------------------------------------------------------- -/// High level functions to generate Tx/Rx commands -/// ---------------------------------------------------------------------------------------------- - -int cable_ft2232_write_bytes(usbconn_t *conn, unsigned char *buf, int len, int postread) { - - int cur_command_size; - int max_command_size; - int cur_chunk_len; - int recv; - int xferred; - int i; - unsigned char *mybuf; - - if(len == 0) - return 0; - debug("write_bytes(length=%d, postread=%s)\n", len, ((postread > 0) ? "TRUE" : "FALSE")); - recv = 0; - max_command_size = min(len, 65536)+3; - mybuf = (unsigned char *) malloc( max_command_size ); - - /// Command OPCODE: write bytes - mybuf[0] = MPSSE_DO_WRITE | MPSSE_LSB | MPSSE_WRITE_NEG; - if(postread) // if postread is enabled it will buffer incoming bytes - mybuf[0] = mybuf[0] | MPSSE_DO_READ; - - // We divide the transmitting stream of bytes in chunks with a maximun length of 65536 bytes each. - while(len > 0) { - cur_chunk_len = min(len, 65536); - len = len - cur_chunk_len; - cur_command_size = cur_chunk_len + 3; - - /// Low and High bytes of the length field - mybuf[1] = (unsigned char) ( cur_chunk_len - 1); - mybuf[2] = (unsigned char) ((cur_chunk_len - 1) >> 8); - - debug("\tOPCODE: 0x%x\n", mybuf[0]); - debug("\tLENGTL: 0x%02x\n", mybuf[1]); - debug("\tLENGTH: 0x%02x\n", mybuf[2]); - - /// The rest of the command is filled with the bytes that will be transferred - memcpy(&(mybuf[3]), buf, cur_chunk_len ); - buf = buf + cur_chunk_len; - for(i = 0; i< cur_chunk_len; i++) - if(debug>1) debug("\tBYTE%3d: 0x%02x\n", i, mybuf[3+i]); - - /// Finally we can ransmit the command - xferred = usbconn_ftdi_write( conn, mybuf, cur_command_size, (postread ? cur_chunk_len : 0) ); - if(xferred != cur_command_size) - return -1; - - // If OK, the update the number of incoming bytes that are being buffered for a posterior read - if(postread) - recv = recv + cur_chunk_len; - } - debug("\tPOSTREAD: %u bytes\n", recv); - - // Returns the number of buffered incoming bytes - return recv; -} - -int cable_ft2232_write_bits(usbconn_t *conn, unsigned char *buf, int len, int postread, int with_tms) -{ - int max_command_size; - int max_chunk_len; - int cur_chunk_len; - int recv; - int xferred; - int i; - unsigned char *mybuf; - - if(len == 0) - return 0; - - max_command_size = 3; - mybuf = (unsigned char *) malloc( max_command_size ); - - if(!with_tms) { - /// Command OPCODE: write bits (can write up to 8 bits in a single command) - max_chunk_len = 8; - mybuf[0] = MPSSE_DO_WRITE | MPSSE_LSB | MPSSE_WRITE_NEG | MPSSE_BITMODE; - } - else { - /// Command OPCODE: 0x4B write bit with tms (can write up to 1 bits in a single command) - max_chunk_len = 1; - mybuf[0] = MPSSE_WRITE_TMS|MPSSE_LSB|MPSSE_BITMODE|MPSSE_WRITE_NEG; - } - - if(postread) // (OPCODE += 0x20) if postread is enabled it will buffer incoming bits - mybuf[0] = mybuf[0] | MPSSE_DO_READ; - - // We divide the transmitting stream of bytes in chunks with a maximun length of max_chunk_len bits each. - i=0; - recv = 0; - while(len > 0) { - cur_chunk_len = min(len, max_chunk_len); - len = len - cur_chunk_len; - - /// Bits length field - mybuf[1] = (unsigned char) ( cur_chunk_len - 1); - - debug("\tOPCODE: 0x%x\n", mybuf[0]); - debug("\tLENGTH: 0x%02x\n", mybuf[1]); - - if(!with_tms) { - /// The last byte of the command is filled with the bits that will be transferred - debug("\tDATA[%d] 0x%02x\n", (i/8), buf[i/8]); - mybuf[2] = buf[i/8]; - i=i+8; - } - else { - //TODO: seleccionar el bit a transmitir - mybuf[2] = 0x01 | ((buf[(i/8)] >> (i%8)) << 7); - i++; - } - - debug("\tBYTE%3d: 0x%02x\n", i, mybuf[2]); - - /// Finally we can transmmit the command - xferred = usbconn_ftdi_write( conn, mybuf, max_command_size, (postread ? 1 : 0) ); - if(xferred != max_command_size) - return -1; - - // If OK, the update the number of incoming bytes that are being buffered for a posterior read - if(postread) - recv = recv + 1; - } - debug("\tPOSTREAD: %u bytes\n", recv); - - return recv; -} - -int cable_ft2232_read_packed_bits(usbconn_t *conn, uint8_t *buf, int packet_len, int bits_per_packet, int offset) -{ - unsigned char *mybuf; - unsigned char dst_mask; - unsigned char src_mask; - int row_offset; - int dst_row; - int dst_col; - int src_row; - int src_col; - int i; - int r; - - if(packet_len == 0 || bits_per_packet == 0) - return 0; - - mybuf = (unsigned char *) malloc( packet_len ); - if((r=usbconn_ftdi_read( conn, mybuf, packet_len )) < 0) { - debug("Read failed\n"); - return -1; - } - - if(bits_per_packet < 8) { - for(i=0; i < packet_len; i++){ // rotate bits to the left side -// debug("[MYDBG] unaligned bits[%d]=%02x\n", i, mybuf[i]); - mybuf[i] = (mybuf[i] >> (8-bits_per_packet)); -// debug("[MYDBG] aligned bits[%d]=%02x\n", i, mybuf[i]); - } - for(i=offset; i < (packet_len*bits_per_packet+offset); i++) { - dst_row = i / 8; - dst_col = i % 8; - src_row = (i-offset) / bits_per_packet; - src_col = (i-offset) % bits_per_packet; - dst_mask = ~(1 << dst_col); - src_mask = (1 << src_col); -// debug("[MYDBG] i=%4d dst[%3d][%3d] dst_mask=%02x dst_val=%02x dst_masked=%02x\n", i, dst_row, dst_col, dst_mask, buf[dst_row], (buf[dst_row] & dst_mask)); -// debug("[MYDBG] i=%4d src[%3d][%3d] src_mask=%02x src_val=%02x src_masked=%02x\n", i, src_row, src_col, src_mask, mybuf[src_row], (mybuf[src_row] & src_mask)); - if(dst_col >= src_col) - buf[dst_row] = (buf[dst_row] & dst_mask) | ((mybuf[src_row] & src_mask) << (dst_col - src_col)); - else - buf[dst_row] = (buf[dst_row] & dst_mask) | ((mybuf[src_row] & src_mask) >> (dst_col - src_col)); - } - - } - else if(bits_per_packet == 8){ - row_offset = offset / 8; -// debug("[MYDBG] Row offset=%d\n", row_offset); - memcpy( &(buf[row_offset]), mybuf, packet_len); - } - else { - return -1; - } - -// debug("read_bits()-> %x\n", *buf); - return ((r < 1) ? -1 : 0); -} - -int cable_ft2232_write_stream(usbconn_t *conn, unsigned char *buf, int len, int postread, int with_tms) { - int len_bytes; - int len_bits; - int len_tms_bits; - unsigned char mybuf; - - len_tms_bits = ((with_tms) ? 1 : 0); - len_bytes = ((len -len_tms_bits) / 8); - len_bits = ((len -len_tms_bits) % 8); - - debug("[MYDBG] cable_ft2232_write_stream(len=%d postread=%d tms=%d) = %d bytes %dbits %dtms_bits\n", len, postread, with_tms, len_bytes, len_bits, len_tms_bits); - - if(len_bytes > 0) - cable_ft2232_write_bytes(conn, buf, len_bytes, postread); - - if(len_bits > 0) - cable_ft2232_write_bits(conn, &(buf[len_bytes]), len_bits, postread, 0); - - if(len_tms_bits > 0) { - mybuf = (buf[len_bytes] >> len_bits); - cable_ft2232_write_bits(conn, &mybuf, 1, postread, 1); - } - - return 0; -} - -int cable_ft2232_read_stream(usbconn_t *conn, unsigned char *buf, int len, int with_tms) { - int len_bytes; - int len_bits; - int len_tms_bits; - - len_tms_bits = ((with_tms) ? 1 : 0); - len_bytes = ((len -len_tms_bits) / 8); - len_bits = ((len -len_tms_bits) % 8); - - debug("[MYDBG] cable_ft2232_read_stream(len=%d tms=%d) = %d bytes %dbits %dtms_bits\n", len, with_tms, len_bytes, len_bits, len_tms_bits); - - if(len_bytes > 0) - cable_ft2232_read_packed_bits(conn, buf, len_bytes, 8, 0); - - if(len_bits > 0) - cable_ft2232_read_packed_bits(conn, buf, 1, len_bits, (len_bytes * 8)); - - if(len_tms_bits > 0) - cable_ft2232_read_packed_bits(conn, buf, 1, 1, (len_bits + (len_bytes * 8))); - - return 0; -} - - - -/// ---------------------------------------------------------------------------------------------- -/// Advanced Jtag debugger driver interface. -/// ---------------------------------------------------------------------------------------------- - -int cable_ftdi_init() { - int err = APP_ERR_NONE; - int res = 0; - unsigned char *buf = malloc(10); - - ft2232_device = usbconn_ftdi_connect(); - - if((res = usbconn_ftdi_mpsse_open(ft2232_device)) != 0) - err |= APP_ERR_USB; - printf("Open MPSSE mode returned: %s\n", ((res != 0) ? "FAIL" : "OK") ); - - ftdi_param_t *params = ft2232_device->params; - //struct ftdi_context * ftdic = params->ftdic; - - buf[0]= SET_BITS_LOW; - buf[1]= 0x00; - buf[2]= 0x0b; - buf[3]= TCK_DIVISOR; - buf[4]= 0x01; - buf[5]= 0x00; - buf[6]= SET_BITS_HIGH; - buf[7]= ~0x04; - buf[8]= 0x04; - buf[9]= SEND_IMMEDIATE; - if(usbconn_ftdi_write( ft2232_device , buf, 10, 0) != 10) { - err |= APP_ERR_USB; - printf("Initial write failed\n"); - } - - usbconn_ftdi_flush( params ); - - return err; -} - -int cable_ftdi_close() { - usbconn_ftdi_close(ft2232_device); - usbconn_ftdi_free(ft2232_device); - - return APP_ERR_NONE; -} - -int cable_ftdi_flush() { - ftdi_param_t *params = ft2232_device->params; - usbconn_ftdi_flush( params ); - - return APP_ERR_NONE; -} - -int cable_ftdi_write_bit(uint8_t packet) { - int err = APP_ERR_NONE; - unsigned char buf; - int tms; - - buf = ((packet & TDO) ? 0x01 : 0x00); - tms = ((packet & TMS) ? 1 : 0); - - if(cable_ft2232_write_stream(ft2232_device, &buf, 1, 0, tms) < 0) - err |= APP_ERR_COMM; - - cable_ftdi_flush(); - - return err; - -} - -int cable_ftdi_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { - - int err = APP_ERR_NONE; - unsigned char buf; - int tms; - - buf = ((packet_out & TDO) ? 0x01 : 0x00); - tms = ((packet_out & TMS) ? 1 : 0); - - if(cable_ft2232_write_stream(ft2232_device, &buf, 1, 1, tms) < 0) - err = APP_ERR_COMM; - - if(cable_ft2232_read_stream(ft2232_device, ((unsigned char *)bit_in), 1, tms) < 0) - err = APP_ERR_COMM; - - return err; -} - -int cable_ftdi_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { - int err = APP_ERR_NONE; - - if(cable_ft2232_write_stream(ft2232_device, ((unsigned char *)stream), len_bits, 0, set_last_bit) < 0) - err |= APP_ERR_COMM; - - cable_ftdi_flush(); - - return err; -} - -int cable_ftdi_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { - int err = APP_ERR_NONE; - if(cable_ft2232_write_stream(ft2232_device, ((unsigned char *)outstream), len_bits, 1, set_last_bit) < 0) - err |= APP_ERR_COMM; - if(cable_ft2232_read_stream(ft2232_device, ((unsigned char *)instream), len_bits, set_last_bit) < 0) - err |= APP_ERR_COMM; - - return err; -} - -int cable_ftdi_opt(int c, char *str) { - fprintf(stderr, "Unknown parameter '%c'\n", c); - return APP_ERR_BAD_PARAM; -} - -/// ---------------------------------------------------------------------------------------------- - Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/chain_commands.h =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/chain_commands.h (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/chain_commands.h (nonexistent) @@ -1,49 +0,0 @@ -#ifndef _CHAIN_COMMANDS_H_ -#define _CHAIN_COMMANDS_H_ - -#include - -// These two are used by both debug modules -extern int current_chain; -extern int desired_chain; - -// These are needed by the advanced debug module -extern int global_DR_prefix_bits; -extern int global_DR_postfix_bits; -extern unsigned char global_xilinx_bscan; - -// Discover devices on JTAG chain -int jtag_enumerate_chain(uint32_t **id_array, int *num_devices); -int jtag_get_idcode(uint32_t cmd, uint32_t *idcode); - -// Functions to set configuration for the JTAG chain -void config_set_IR_size(int size); -void config_set_IR_prefix_bits(int bits); -void config_set_IR_postfix_bits(int bits); -void config_set_DR_prefix_bits(int bits); -void config_set_DR_postfix_bits(int bits); -void config_set_debug_cmd(unsigned int cmd); -void config_set_alt_vjtag(unsigned char enable); -void config_set_vjtag_cmd_vir(unsigned int cmd); -void config_set_vjtag_cmd_vdr(unsigned int cmd); -void config_set_xilinx_bscan(unsigned char enable); - -// Operations on the JTAG TAP -int tap_reset(void); -int tap_enable_debug_module(void); -int tap_set_ir(int ir); -int tap_set_shift_dr(void); -int tap_exit_to_idle(void); - -// Functions to Send/receive bitstreams via JTAG -// These functions are aware of other devices in the chain, and may adjust for them. -int jtag_write_bit(uint8_t packet); -int jtag_read_write_bit(uint8_t packet, uint8_t *in_bit); -int jtag_write_stream(uint32_t *out_data, int length_bits, unsigned char set_TMS); -int jtag_read_write_stream(uint32_t *out_data, uint32_t *in_data, int length_bits, - unsigned char adjust, unsigned char set_TMS); - -int retry_do(void); -void retry_ok(void); - -#endif Index: ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/rsp-server.c =================================================================== --- ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/rsp-server.c (revision 26) +++ ADS_RELEASE_1_2_0/trunk/Software/adv_jtag_bridge/rsp-server.c (nonexistent) @@ -1,2968 +0,0 @@ -/* rsp-server.c -- Remote Serial Protocol server for GDB - -Copyright (C) 2008 Embecosm Limited - -Contributor Jeremy Bennett - -This file was part of Or1ksim, the OpenRISC 1000 Architectural Simulator. -Adapted for adv_jtag_bridge by Nathan Yawn - -This program is free software; you can redistribute it and/or modify it -under the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3 of the License, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, but WITHOUT -ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -more details. - -You should have received a copy of the GNU General Public License along -with this program. If not, see . -*/ - -/* This program is commented throughout in a fashion suitable for processing - with Doxygen. */ - -/* System includes */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Package includes */ -#include "except.h" -#include "spr-defs.h" -#include "dbg_api.h" -#include "errcodes.h" - -/* Define to log each packet */ -#define RSP_TRACE 0 - -/*! Name of the RSP service */ -#define OR1KSIM_RSP_SERVICE "jtag-rsp" - -/*! Protocol used by Or1ksim */ -#define OR1KSIM_RSP_PROTOCOL "tcp" - -/* Indices of GDB registers that are not GPRs. Must match GDB settings! */ -#define PPC_REGNUM (MAX_GPRS + 0) /*!< Previous PC */ -#define NPC_REGNUM (MAX_GPRS + 1) /*!< Next PC */ -#define SR_REGNUM (MAX_GPRS + 2) /*!< Supervision Register */ -#define NUM_REGS (MAX_GRPS + 3) /*!< Total GDB registers */ - -/*! Trap instruction for OR32 */ -#define OR1K_TRAP_INSTR 0x21000001 - -/*! Definition of GDB target signals. Data taken from the GDB 6.8 - source. Only those we use defined here. */ -enum target_signal { - TARGET_SIGNAL_NONE = 0, - TARGET_SIGNAL_INT = 2, - TARGET_SIGNAL_ILL = 4, - TARGET_SIGNAL_TRAP = 5, - TARGET_SIGNAL_FPE = 8, - TARGET_SIGNAL_BUS = 10, - TARGET_SIGNAL_SEGV = 11, - TARGET_SIGNAL_ALRM = 14, - TARGET_SIGNAL_USR2 = 31, - TARGET_SIGNAL_PWR = 32 -}; - -/*! The maximum number of characters in inbound/outbound buffers. The largest - packets are the 'G' packet, which must hold the 'G' and all the registers - with two hex digits per byte and the 'g' reply, which must hold all the - registers, and (in our implementation) an end-of-string (0) - character. Adding the EOS allows us to print out the packet as a - string. So at least NUMREGBYTES*2 + 1 (for the 'G' or the EOS) are needed - for register packets */ -#define GDB_BUF_MAX ((NUM_REGS) * 8 + 1) - -/*! Size of the matchpoint hash table. Largest prime < 2^10 */ -#define MP_HASH_SIZE 1021 - -/*! String to map hex digits to chars */ -static const char hexchars[]="0123456789abcdef"; - -/*! Data structure for RSP buffers. Can't be null terminated, since it may - include zero bytes */ -struct rsp_buf -{ - char data[GDB_BUF_MAX]; - int len; -}; - -/*! Enumeration of different types of matchpoint. These have explicit values - matching the second digit of 'z' and 'Z' packets. */ -enum mp_type { - BP_MEMORY = 0, - BP_HARDWARE = 1, - WP_WRITE = 2, - WP_READ = 3, - WP_ACCESS = 4 -}; - -/*! Data structure for a matchpoint hash table entry */ -struct mp_entry -{ - enum mp_type type; /*!< Type of matchpoint */ - unsigned long int addr; /*!< Address with the matchpoint */ - unsigned long int instr; /*!< Substituted instruction */ - struct mp_entry *next; /*!< Next entry with this hash */ -}; - -/* Data to interface the GDB handler thread with the target handler thread */ -pthread_mutex_t rsp_mutex = PTHREAD_MUTEX_INITIALIZER; /*!< Mutex to protect the "target_running" member of the rsp struct */ -pthread_mutex_t target_handler_mutex = PTHREAD_MUTEX_INITIALIZER; -pthread_cond_t target_handler_cond = PTHREAD_COND_INITIALIZER; - -int target_handler_state = 0; -pthread_t target_handler_thread; -void *target_handler(void *arg); - -int pipe_fds[2]; // Descriptors for the pipe from the poller thread to the GDB interface thread - -// Work-around for the current OR1200 implementation; After setting the NPC, -// it always reads back 0 until the next instruction is executed. This -// is a problem with the way we handle memory breakpoints (resetting the NPC), -// so we cache the last value we set the NPC to, incase we need it. -unsigned char use_cached_npc = 0; -unsigned int cached_npc = 0; - -/*! Central data for the RSP connection */ -static struct -{ - int client_waiting; /*!< Is client waiting a response? */ - int target_running; /*!< Is target hardware running? --NAY */ - int single_step_mode; - int proto_num; /*!< Number of the protocol used */ - int server_fd; /*!< FD for new connections */ - int client_fd; /*!< FD for talking to GDB */ - int sigval; /*!< GDB signal for any exception */ - unsigned long int start_addr; /*!< Start of last run */ - struct mp_entry *mp_hash[MP_HASH_SIZE]; /*!< Matchpoint hash table */ -} rsp; - -/* Forward declarations of static functions */ -void rsp_exception (unsigned long int except); -static void rsp_server_request (); -static void rsp_client_request (); -static void rsp_server_close (); -static void rsp_client_close (); -static void put_packet (struct rsp_buf *buf); -static void put_str_packet (const char *str); -static struct rsp_buf *get_packet (); -static void put_rsp_char (char c); -static int get_rsp_char (); -static int rsp_unescape (char *data, - int len); -static void mp_hash_init (); -static void mp_hash_add (enum mp_type type, - unsigned long int addr, - unsigned long int instr); -static struct mp_entry *mp_hash_lookup (enum mp_type type, - unsigned long int addr); -static struct mp_entry *mp_hash_delete (enum mp_type type, - unsigned long int addr); -static int hex (int c); -static void reg2hex (unsigned long int val, - char *buf); -static unsigned long int hex2reg (char *buf); -static void ascii2hex (char *dest, - char *src); -static void hex2ascii (char *dest, - char *src); -static unsigned int set_npc (unsigned long int addr); -static void rsp_report_exception (); -static void rsp_continue (struct rsp_buf *buf); -static void rsp_continue_with_signal (struct rsp_buf *buf); -static void rsp_continue_generic (unsigned long int except); -static void rsp_read_all_regs (); -static void rsp_write_all_regs (struct rsp_buf *buf); -static void rsp_read_mem (struct rsp_buf *buf); -static void rsp_write_mem (struct rsp_buf *buf); -static void rsp_read_reg (struct rsp_buf *buf); -static void rsp_write_reg (struct rsp_buf *buf); -static void rsp_query (struct rsp_buf *buf); -static void rsp_command (struct rsp_buf *buf); -static void rsp_set (struct rsp_buf *buf); -static void rsp_restart (); -static void rsp_step (struct rsp_buf *buf); -static void rsp_step_with_signal (struct rsp_buf *buf); -static void rsp_step_generic (unsigned long int except); -static void rsp_vpkt (struct rsp_buf *buf); -static void rsp_write_mem_bin (struct rsp_buf *buf); -static void rsp_remove_matchpoint (struct rsp_buf *buf); -static void rsp_insert_matchpoint (struct rsp_buf *buf); - -void set_stall_state(int stall); - -/*---------------------------------------------------------------------------*/ -/*!Initialize the Remote Serial Protocol connection - - This involves setting up a socket to listen on a socket for attempted - connections from a single GDB instance (we couldn't be talking to multiple - GDBs at once!). - - The service is specified either as a port number in the Or1ksim configuration - (parameter rsp_port in section debug, default 51000) or as a service name - in the constant OR1KSIM_RSP_SERVICE. - - The protocol used for communication is specified in OR1KSIM_RSP_PROTOCOL. */ -/*---------------------------------------------------------------------------*/ -void -rsp_init (int portNum) -{ - struct protoent *protocol; /* Protocol number */ - struct hostent *host_entry; /* Our host entry */ - struct sockaddr_in sock_addr; /* Socket address */ - - int optval; /* Socket options */ - int flags; /* Socket flags */ - char name[256]; /* Our name */ - unsigned long tmp; - - - /* Clear out the central data structure */ - rsp.client_waiting = 0; /* GDB client is not waiting for us */ - rsp.proto_num = -1; /* i.e. invalid */ - rsp.server_fd = -1; /* i.e. invalid */ - rsp.client_fd = -1; /* i.e. invalid */ - rsp.sigval = 0; /* No exception */ - rsp.start_addr = EXCEPT_RESET; /* Default restart point */ - - /* Set up the matchpoint hash table */ - mp_hash_init (); - - /* Get the protocol number of TCP and save it for future use */ - protocol = getprotobyname (OR1KSIM_RSP_PROTOCOL); - if (NULL == protocol) - { - fprintf (stderr, "Warning: RSP unable to load protocol \"%s\": %s\n", - OR1KSIM_RSP_PROTOCOL, strerror (errno)); - return; - } - - rsp.proto_num = protocol->p_proto; /* Saved for future client use */ - - /* 0 is used as the RSP port number to indicate that we should use the - service name instead. */ - if (0 == portNum) - { - struct servent *service = - getservbyname (OR1KSIM_RSP_SERVICE, protocol->p_name); - - if (NULL == service) - { - fprintf (stderr, "Warning: RSP unable to find service \"%s\": %s\n", - OR1KSIM_RSP_SERVICE, strerror (errno)); - return; - } - - portNum = ntohs (service->s_port); - } - - /* Create the socket using the TCP protocol */ - rsp.server_fd = socket (PF_INET, SOCK_STREAM, protocol->p_proto); - if (rsp.server_fd < 0) - { - fprintf (stderr, "Warning: RSP could not create server socket: %s\n", - strerror (errno)); - return; - } - - /* Set this socket to reuse its address. This allows the server to keep - trying before a GDB session has got going. */ - optval = 1; - if (setsockopt(rsp.server_fd, SOL_SOCKET, - SO_REUSEADDR, &optval, sizeof (optval)) < 0) - { - fprintf (stderr, "Cannot set SO_REUSEADDR option on server socket %d: " - "%s\n", rsp.server_fd, strerror (errno)); - rsp_server_close(); - return; - } - - /* The server should be non-blocking. Get the current flags and then set the - non-blocking flags */ - flags = fcntl (rsp.server_fd, F_GETFL); - if (flags < 0) - { - fprintf (stderr, "Warning: Unable to get flags for RSP server socket " - "%d: %s\n", rsp.server_fd, strerror (errno)); - rsp_server_close(); - return; - } - - flags |= O_NONBLOCK; - if (fcntl (rsp.server_fd, F_SETFL, flags) < 0) - { - fprintf (stderr, "Warning: Unable to set flags for RSP server socket " - "%d to 0x%08x: %s\n", rsp.server_fd, flags, strerror (errno)); - rsp_server_close(); - return; - } - - /* Find out what our name is */ - if (gethostname (name, sizeof (name)) < 0) - { - fprintf (stderr, "Warning: Unable to get hostname for RSP server: %s\n", - strerror (errno)); - rsp_server_close(); - return; - } - - /* Find out what our address is */ - host_entry = gethostbyname (name); - if (NULL == host_entry) - { - fprintf (stderr, "Warning: Unable to get host entry for RSP server: " - "%s\n", strerror (errno)); - rsp_server_close(); - return; - } - - /* Bind our socket to the appropriate address */ - memset (&sock_addr, 0, sizeof (sock_addr)); - sock_addr.sin_family = host_entry->h_addrtype; - sock_addr.sin_port = htons (portNum); - - if (bind (rsp.server_fd, - (struct sockaddr *)&sock_addr, sizeof (sock_addr)) < 0) - { - fprintf (stderr, "Warning: Unable to bind RSP server socket %d to port " - "%d: %s\n", rsp.server_fd, portNum, - strerror (errno)); - rsp_server_close(); - return; - } - - /* Mark us as a passive port, with a maximum backlog of 1 connection (we - never connect simultaneously to more than one RSP client!) */ - if (listen (rsp.server_fd, 1) < 0) - { - fprintf (stderr, "Warning: Unable to set RSP backlog on server socket " - "%d to %d: %s\n", rsp.server_fd, 1, strerror (errno)); - rsp_server_close(); - return; - } - - // Stall the CPU...it starts off running. - set_stall_state(1); - rsp.target_running = 0; - target_handler_state = 0; // Don't start the polling thread until we have a client - rsp.single_step_mode = 0; - - // Set up the CPU to break to the debug unit on exceptions. - dbg_cpu0_read(SPR_DSR, &tmp); - dbg_cpu0_write(SPR_DSR, tmp|SPR_DSR_TE|SPR_DSR_FPE|SPR_DSR_RE|SPR_DSR_IIE|SPR_DSR_AE|SPR_DSR_BUSEE); - - // Enable TRAP exception, but don't otherwise change the SR - dbg_cpu0_read(SPR_SR, &tmp); - dbg_cpu0_write(SPR_SR, tmp|SPR_SR_SM); // We set 'supervisor mode', which also enables TRAP exceptions - - if(0 > pipe(pipe_fds)) { // pipe_fds[0] is for reading, [1] is for writing - perror("Error creating sockets: "); - rsp_server_close(); - return; - } - - // Create the harware target polling thread - if(pthread_create(&target_handler_thread, NULL, target_handler, NULL)) - { - fprintf(stderr, "Failed to create target handler thread!\n"); - rsp_server_close(); - return; - } - -} /* rsp_init () */ - - -/*---------------------------------------------------------------------------*/ -/*!Look for action on RSP - - This function is called when the processor has stalled, which, except for - initialization, must be due to an interrupt. - - If we have no RSP client, we poll the RSP server for a client requesting to - join. We can make no progress until the client is available. - - Then if the cause is an interrupt, and the interrupt not been notified to - GDB, a packet reporting the cause of the interrupt is sent. - - The function then polls the RSP client port (if open) - for available input. It then processes the GDB RSP request and return. - - If an error occurs when polling the RSP server, other than an interrupt, a - warning message is printed out and the RSP server and client (if open) - connections are closed. - - If an error occurs when polling the RSP client, other than an interrupt, a - warning message is printed out and the RSP client connection is closed. - - Polling is always blocking (i.e. timeout -1). */ -/*---------------------------------------------------------------------------*/ -int handle_rsp (void) -{ - struct pollfd fds[2]; /* The FD to poll for */ - char bitbucket; - - /* Give up if no RSP server port (this should not occur) */ - if (-1 == rsp.server_fd) - { - fprintf (stderr, "Warning: No RSP server port open\n"); - return 0; - } - - /* If we have no RSP client, poll the server until we get one. */ - while (-1 == rsp.client_fd) - { - /* Poll for a client on the RSP server socket */ - fds[0].fd = rsp.server_fd; /* FD for the server socket */ - fds[0].events = POLLIN; /* Poll for input activity */ - - /* Poll is always blocking. We can't do anything more until something - happens here. */ - switch (poll (fds, 1, -1)) - { - case -1: - /* Error. Only one we ignore is an interrupt */ - if (EINTR != errno) - { - fprintf (stderr, "Warning: poll for RSP failed: closing " - "server connection: %s\n", strerror (errno)); - rsp_client_close(); - rsp_server_close(); - return 0; - } - break; - - case 0: - /* Timeout. This can't occur! */ - fprintf (stderr, "Warning: Unexpected RSP server poll timeout\n"); - break; - - default: - /* Is the poll due to input available? If we succeed ignore any - outstanding reports of exceptions. */ - if (POLLIN == (fds[0].revents & POLLIN)) - { - rsp_server_request (); - rsp.client_waiting = 0; /* No longer waiting */ - } - else - { - /* Error leads to closing the client and server */ - fprintf (stderr, "Warning: RSP server received flags " - "0x%08x: closing server connection\n", fds[0].revents); - rsp_client_close(); - rsp_server_close(); - return 0; - } - } - } - - - /* Poll the RSP client socket for a message from GDB */ - /* Also watch for a message from the hardware poller thread. - This might be easier if we used ppoll() and sent a Signal, instead - of using a pipe? */ - - fds[0].fd = rsp.client_fd; /* FD for the client socket */ - fds[0].events = POLLIN; /* Poll for input activity */ - - fds[1].fd = pipe_fds[0]; - fds[1].events = POLLIN; - - /* Poll is always blocking. We can't do anything more until something - happens here. */ - //fprintf(stderr, "Polling...\n"); - switch (poll (fds, 2, -1)) - { - case -1: - /* Error. Only one we ignore is an interrupt */ - if (EINTR != errno) - { - fprintf (stderr, "Warning: poll for RSP failed: closing " - "server connection: %s\n", strerror (errno)); - rsp_client_close(); - rsp_server_close(); - return 0; - } - - return 1; - - case 0: - /* Timeout. This can't occur! */ - fprintf (stderr, "Warning: Unexpected RSP client poll timeout\n"); - return 1; - - default: - /* Is the client activity due to input available? */ - if (POLLIN == (fds[0].revents & POLLIN)) - { - rsp_client_request (); - } - else if(POLLIN == (fds[1].revents & POLLIN)) - { - //fprintf(stderr, "Got pipe event from monitor thread\n"); - bitbucket = read(pipe_fds[0], &bitbucket, 1); // Clear the byte out and discard - /* If we have an unacknowledged exception and a client is available, tell - GDB. If this exception was a trap due to a memory breakpoint, then - adjust the NPC. */ - if (rsp.client_waiting) - { - // Read the PPC - unsigned long ppcval; - dbg_cpu0_read(SPR_PPC, &ppcval); - - if ((TARGET_SIGNAL_TRAP == rsp.sigval) && - (NULL != mp_hash_lookup (BP_MEMORY, ppcval))) // We also get TRAP from a single-step, don't change npc unless it's really a BP - { - set_npc (ppcval); - } - - rsp_report_exception(); - rsp.client_waiting = 0; /* No longer waiting */ - } - } - else - { - /* Error leads to closing the client, but not the server. */ - fprintf (stderr, "Warning: RSP client received flags " - "0x%08x: closing client connection\n", fds[0].revents); - rsp_client_close(); - } - } - - return 1; -} /* handle_rsp () */ - - -//--------------------------------------------------------------------------- -//!Note an exception for future processing -// -// The simulator has encountered an exception. Record it here, so that a -// future call to handle_exception will report it back to the client. The -// signal is supplied in Or1ksim form and recorded in GDB form. - -// We flag up a warning if an exception is already pending, and ignore the -// earlier exception. - -// @param[in] except The exception -//--------------------------------------------------------------------------- - -void rsp_exception (unsigned long int except) -{ - int sigval; // GDB signal equivalent to exception - - switch (except) - { - case SPR_DRR_RSTE: sigval = TARGET_SIGNAL_PWR; break; - case SPR_DRR_BUSEE: sigval = TARGET_SIGNAL_BUS; break; - case SPR_DRR_DPFE: sigval = TARGET_SIGNAL_SEGV; break; - case SPR_DRR_IPFE: sigval = TARGET_SIGNAL_SEGV; break; - case SPR_DRR_TTE: sigval = TARGET_SIGNAL_ALRM; break; - case SPR_DRR_AE: sigval = TARGET_SIGNAL_BUS; break; - case SPR_DRR_IIE: sigval = TARGET_SIGNAL_ILL; break; - case SPR_DRR_IE: sigval = TARGET_SIGNAL_INT; break; - case SPR_DRR_DME: sigval = TARGET_SIGNAL_SEGV; break; - case SPR_DRR_IME: sigval = TARGET_SIGNAL_SEGV; break; - case SPR_DRR_RE: sigval = TARGET_SIGNAL_FPE; break; - case SPR_DRR_SCE: sigval = TARGET_SIGNAL_USR2; break; - case SPR_DRR_FPE: sigval = TARGET_SIGNAL_FPE; break; - case SPR_DRR_TE: sigval = TARGET_SIGNAL_TRAP; break; - - // In the current OR1200 hardware implementation, a single-step does not create a TRAP, - // the DSR reads back 0. GDB expects a TRAP, so... - case 0: sigval = TARGET_SIGNAL_TRAP; break; - - default: - fprintf (stderr, "Warning: Unknown RSP exception %lu: Ignored\n", except); - return; - } - - if ((0 != rsp.sigval) && (sigval != rsp.sigval)) - { - fprintf (stderr, "Warning: RSP signal %d received while signal " - "%d pending: Pending exception replaced\n", sigval, rsp.sigval); - } - - rsp.sigval = sigval; // Save the signal value - -} // rsp_exception () - - - -/*---------------------------------------------------------------------------*/ -/*!Handle a request to the server for a new client - - We may already have a client. If we do, we will accept an immediately close - the new client. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_server_request () -{ - struct sockaddr_in sock_addr; /* The socket address */ - socklen_t len; /* Size of the socket address */ - int fd; /* The client FD */ - int flags; /* fcntl () flags */ - int optval; /* Option value for setsockopt () */ - - /* Get the client FD */ - len = sizeof (sock_addr); - fd = accept (rsp.server_fd, (struct sockaddr *)&sock_addr, &len); - if (fd < 0) - { - /* This is can happen, because a connection could have started, and then - terminated due to a protocol error or user initiation before the - accept could take place. - - Two of the errors we can ignore (a retry is permissible). All other - errors, we assume the server port has gone tits up and close. */ - - if ((errno != EWOULDBLOCK) && (errno != EAGAIN)) - { - fprintf (stderr, "Warning: RSP server error creating client: " - "closing connection %s\n", strerror (errno)); - rsp_client_close (); - rsp_server_close (); - } - - return; - } - - /* If we already have a client, then immediately close the new one */ - if (-1 != rsp.client_fd) - { - fprintf (stderr, "Warning: Additional RSP client request refused\n"); - close (fd); - return; - } - - /* We have a new client, which should be non-blocking. Get the current flags - and then set the non-blocking flags */ - flags = fcntl (fd, F_GETFL); - if (flags < 0) - { - fprintf (stderr, "Warning: Unable to get flags for RSP client socket " - "%d: %s\n", fd, strerror (errno)); - close (fd); - return; - } - - flags |= O_NONBLOCK; - if (fcntl (fd, F_SETFL, flags) < 0) - { - fprintf (stderr, "Warning: Unable to set flags for RSP client socket " - "%d to 0x%08x: %s\n", fd, flags, strerror (errno)); - close (fd); - return; - } - - /* Turn of Nagel's algorithm for the client socket. This means the client - sends stuff immediately, it doesn't wait to fill up a packet. */ - optval = 0; - len = sizeof (optval); - if (setsockopt (fd, rsp.proto_num, TCP_NODELAY, &optval, len) < 0) - { - fprintf (stderr, "Warning: Unable to disable Nagel's algorithm for " - "RSP client socket %d: %s\n", fd, strerror (errno)); - close (fd); - return; - } - - /* We have a new client socket */ - rsp.client_fd = fd; - - // Set the hardware polling thread to run - // This will cause the poll() to be interrupted next time - pthread_mutex_lock(&target_handler_mutex); - target_handler_state = 1; - pthread_mutex_unlock(&target_handler_mutex); - -} /* rsp_server_request () */ - - -/*---------------------------------------------------------------------------*/ -/*!Deal with a request from the GDB client session - - In general, apart from the simplest requests, this function replies on - other functions to implement the functionality. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_client_request () -{ - struct rsp_buf *buf = get_packet (); /* Message sent to us */ - - // Null packet means we hit EOF or the link was closed for some other - // reason. Close the client and return - if (NULL == buf) - { - rsp_client_close (); - return; - } - -#if RSP_TRACE - printf ("Packet received %s: %d chars\n", buf->data, buf->len ); - fflush (stdout); -#endif - - // Check if target is running. - int running = 0; - pthread_mutex_lock(&rsp_mutex); - running = rsp.target_running; - pthread_mutex_unlock(&rsp_mutex); - - // If running, only process async BREAK command - if(running) - { - if(buf->data[0] == 0x03) // 0x03 is the ctrl-C "break" command from GDB - { - // Send the STALL command to the target - set_stall_state (1); - } - else - { - // Send a response to GDB indicating the target is not stalled: "Target not stopped" - put_str_packet("O6154677274656e20746f73206f74707064650a0d"); // Need to hex-encode warning string (I think...) - fprintf(stderr, "WARNING: Received GDB command 0x%X (%c) while target running!\n", buf->data[0], buf->data[0]); - } - return; - } - - switch (buf->data[0]) - { - case 0x03: - fprintf(stderr, "Warning: asynchronous BREAK received while target stopped.\n"); - return; - - case '!': - /* Request for extended remote mode */ - put_str_packet ("OK"); - return; - - case '?': - /* Return last signal ID */ - rsp_report_exception(); - return; - - case 'A': - /* Initialization of argv not supported */ - fprintf (stderr, "Warning: RSP 'A' packet not supported: ignored\n"); - put_str_packet ("E01"); - return; - - case 'b': - /* Setting baud rate is deprecated */ - fprintf (stderr, "Warning: RSP 'b' packet is deprecated and not " - "supported: ignored\n"); - return; - - case 'B': - /* Breakpoints should be set using Z packets */ - fprintf (stderr, "Warning: RSP 'B' packet is deprecated (use 'Z'/'z' " - "packets instead): ignored\n"); - return; - - case 'c': - /* Continue */ - rsp_continue (buf); - return; - - case 'C': - /* Continue with signal */ - rsp_continue_with_signal (buf); - return; - - case 'd': - /* Disable debug using a general query */ - fprintf (stderr, "Warning: RSP 'd' packet is deprecated (define a 'Q' " - "packet instead: ignored\n"); - return; - - case 'D': - /* Detach GDB. Do this by closing the client. The rules say that - execution should continue. TODO. Is this really then intended - meaning? Or does it just mean that only vAttach will be recognized - after this? */ - put_str_packet ("OK"); - rsp_client_close (); - set_stall_state (0); - return; - - case 'F': - /* File I/O is not currently supported */ - fprintf (stderr, "Warning: RSP file I/O not currently supported: 'F' " - "packet ignored\n"); - return; - - case 'g': - rsp_read_all_regs (); - return; - - case 'G': - rsp_write_all_regs (buf); - return; - - case 'H': - /* Set the thread number of subsequent operations. For now ignore - silently and just reply "OK" */ - put_str_packet ("OK"); - return; - - case 'i': - /* Single instruction step */ - rsp_step (buf); - return; - - case 'I': - /* Single instruction step with signal */ - rsp_step_with_signal (buf); - return; - - case 'k': - /* Kill request. Do nothing for now. */ - return; - - case 'm': - /* Read memory (symbolic) */ - rsp_read_mem (buf); - return; - - case 'M': - /* Write memory (symbolic) */ - rsp_write_mem (buf); - return; - - case 'p': - /* Read a register */ - rsp_read_reg (buf); - return; - - case 'P': - /* Write a register */ - rsp_write_reg (buf); - return; - - case 'q': - /* Any one of a number of query packets */ - rsp_query (buf); - return; - - case 'Q': - /* Any one of a number of set packets */ - rsp_set (buf); - return; - - case 'r': - /* Reset the system. Deprecated (use 'R' instead) */ - fprintf (stderr, "Warning: RSP 'r' packet is deprecated (use 'R' " - "packet instead): ignored\n"); - return; - - case 'R': - /* Restart the program being debugged. */ - rsp_restart (); - return; - - case 's': - /* Single step (one high level instruction). This could be hard without - DWARF2 info */ - rsp_step (buf); - return; - - case 'S': - /* Single step (one high level instruction) with signal. This could be - hard without DWARF2 info */ - rsp_step_with_signal (buf); - return; - - case 't': - /* Search. This is not well defined in the manual and for now we don't - support it. No response is defined. */ - fprintf (stderr, "Warning: RSP 't' packet not supported: ignored\n"); - return; - - case 'T': - /* Is the thread alive. We are bare metal, so don't have a thread - context. The answer is always "OK". */ - put_str_packet ("OK"); - return; - - case 'v': - /* Any one of a number of packets to control execution */ - rsp_vpkt (buf); - return; - - case 'X': - /* Write memory (binary) */ - rsp_write_mem_bin (buf); - return; - - case 'z': - /* Remove a breakpoint/watchpoint. */ - rsp_remove_matchpoint (buf); - return; - - case 'Z': - /* Insert a breakpoint/watchpoint. */ - rsp_insert_matchpoint (buf); - return; - - default: - /* Unknown commands are ignored */ - fprintf (stderr, "Warning: Unknown RSP request %s\n", buf->data); - return; - } -} /* rsp_client_request () */ - - -/*---------------------------------------------------------------------------*/ -/*!Close the server if it is open */ -/*---------------------------------------------------------------------------*/ -static void -rsp_server_close () -{ - // Stop the target handler thread - pthread_mutex_lock(&target_handler_mutex); - target_handler_state = 2; - pthread_mutex_unlock(&target_handler_mutex); - - if (-1 != rsp.server_fd) - { - close (rsp.server_fd); - rsp.server_fd = -1; - } -} /* rsp_server_close () */ - - -/*---------------------------------------------------------------------------*/ -/*!Close the client if it is open */ -/*---------------------------------------------------------------------------*/ -static void -rsp_client_close () -{ - unsigned char was_running = 0; - - // If target is running, stop it so we can modify SPRs - pthread_mutex_lock(&rsp_mutex); - was_running = rsp.target_running; - pthread_mutex_unlock(&rsp_mutex); - if(was_running) { - set_stall_state(1); - } - - // Clear the DSR: don't transfer control to the debug unit for any reason - dbg_cpu0_write(SPR_DSR, 0); - - // If target was running, restart it. - if(was_running) { - set_stall_state(0); - } - - // Stop the target handler thread. MUST BE DONE AFTER THE LAST set_stall_state()! - pthread_mutex_lock(&target_handler_mutex); - target_handler_state = 0; - pthread_mutex_unlock(&target_handler_mutex); - - if (-1 != rsp.client_fd) - { - close (rsp.client_fd); - rsp.client_fd = -1; - } -} /* rsp_client_close () */ - - -/*---------------------------------------------------------------------------*/ -/*!Send a packet to the GDB client - - Modeled on the stub version supplied with GDB. Put out the data preceded by - a '$', followed by a '#' and a one byte checksum. '$', '#', '*' and '}' are - escaped by preceding them with '}' and then XORing the character with - 0x20. - - @param[in] buf The data to send */ -/*---------------------------------------------------------------------------*/ -static void -put_packet (struct rsp_buf *buf) -{ - int ch; /* Ack char */ - - /* Construct $#. Repeat until the GDB client - acknowledges satisfactory receipt. */ - do - { - unsigned char checksum = 0; /* Computed checksum */ - int count = 0; /* Index into the buffer */ - -#if RSP_TRACE - printf ("Putting %s\n", buf->data); - fflush (stdout); -#endif - - put_rsp_char ('$'); /* Start char */ - - /* Body of the packet */ - for (count = 0; count < buf->len; count++) - { - unsigned char ch = buf->data[count]; - - /* Check for escaped chars */ - if (('$' == ch) || ('#' == ch) || ('*' == ch) || ('}' == ch)) - { - ch ^= 0x20; - checksum += (unsigned char)'}'; - put_rsp_char ('}'); - } - - checksum += ch; - put_rsp_char (ch); - } - - put_rsp_char ('#'); /* End char */ - - /* Computed checksum */ - put_rsp_char (hexchars[checksum >> 4]); - put_rsp_char (hexchars[checksum % 16]); - - /* Check for ack of connection failure */ - ch = get_rsp_char (); - if (-1 == ch) - { - return; /* Fail the put silently. */ - } - } - while ('+' != ch); - -} /* put_packet () */ - - -/*---------------------------------------------------------------------------*/ -/*!Convenience to put a constant string packet - - param[in] str The text of the packet */ -/*---------------------------------------------------------------------------*/ -static void -put_str_packet (const char *str) -{ - struct rsp_buf buf; - int len = strlen (str); - - /* Construct the packet to send, so long as string is not too big, - otherwise truncate. Add EOS at the end for convenient debug printout */ - - if (len >= GDB_BUF_MAX) - { - fprintf (stderr, "Warning: String %s too large for RSP packet: " - "truncated\n", str); - len = GDB_BUF_MAX - 1; - } - - strncpy (buf.data, str, len); - buf.data[len] = 0; - buf.len = len; - - put_packet (&buf); - -} /* put_str_packet () */ - - -/*---------------------------------------------------------------------------*/ -/*!Get a packet from the GDB client - - Modeled on the stub version supplied with GDB. The data is in a static - buffer. The data should be copied elsewhere if it is to be preserved across - a subsequent call to get_packet(). - - Unlike the reference implementation, we don't deal with sequence - numbers. GDB has never used them, and this implementation is only intended - for use with GDB 6.8 or later. Sequence numbers were removed from the RSP - standard at GDB 5.0. - - @return A pointer to the static buffer containing the data */ -/*---------------------------------------------------------------------------*/ -static struct rsp_buf * -get_packet () -{ - static struct rsp_buf buf; /* Survives the return */ - - /* Keep getting packets, until one is found with a valid checksum */ - while (1) - { - unsigned char checksum; /* The checksum we have computed */ - int count; /* Index into the buffer */ - int ch; /* Current character */ - - /* Wait around for the start character ('$'). Ignore all other - characters */ - ch = get_rsp_char (); - while (ch != '$') - { - if (-1 == ch) - { - return NULL; /* Connection failed */ - } - - // 0x03 is a special case, an out-of-band break when running - if(ch == 0x03) - { - buf.data[0] = ch; - buf.len = 1; - return &buf; - } - - ch = get_rsp_char (); - } - - /* Read until a '#' or end of buffer is found */ - checksum = 0; - count = 0; - while (count < GDB_BUF_MAX - 1) - { - ch = get_rsp_char (); - - /* Check for connection failure */ - if (-1 == ch) - { - return NULL; - } - - /* If we hit a start of line char begin all over again */ - if ('$' == ch) - { - checksum = 0; - count = 0; - - continue; - } - - /* Break out if we get the end of line char */ - if ('#' == ch) - { - break; - } - - /* Update the checksum and add the char to the buffer */ - - checksum = checksum + (unsigned char)ch; - buf.data[count] = (char)ch; - count = count + 1; - } - - /* Mark the end of the buffer with EOS - it's convenient for non-binary - data to be valid strings. */ - buf.data[count] = 0; - buf.len = count; - - /* If we have a valid end of packet char, validate the checksum */ - if ('#' == ch) - { - unsigned char xmitcsum; /* The checksum in the packet */ - - ch = get_rsp_char (); - if (-1 == ch) - { - return NULL; /* Connection failed */ - } - xmitcsum = hex (ch) << 4; - - ch = get_rsp_char (); - if (-1 == ch) - { - return NULL; /* Connection failed */ - } - - xmitcsum += hex (ch); - - /* If the checksums don't match print a warning, and put the - negative ack back to the client. Otherwise put a positive ack. */ - if (checksum != xmitcsum) - { - fprintf (stderr, "Warning: Bad RSP checksum: Computed " - "0x%02x, received 0x%02x\n", checksum, xmitcsum); - - put_rsp_char ('-'); /* Failed checksum */ - } - else - { - put_rsp_char ('+'); /* successful transfer */ - break; - } - } - else - { - fprintf (stderr, "Warning: RSP packet overran buffer\n"); - } - } - - return &buf; /* Success */ - -} /* get_packet () */ - - -/*---------------------------------------------------------------------------*/ -/*!Put a single character out onto the client socket - - This should only be called if the client is open, but we check for safety. - - @param[in] c The character to put out */ -/*---------------------------------------------------------------------------*/ -static void -put_rsp_char (char c) -{ - if (-1 == rsp.client_fd) - { - fprintf (stderr, "Warning: Attempt to write '%c' to unopened RSP " - "client: Ignored\n", c); - return; - } - - /* Write until successful (we retry after interrupts) or catastrophic - failure. */ - while (1) - { - switch (write (rsp.client_fd, &c, sizeof (c))) - { - case -1: - /* Error: only allow interrupts or would block */ - if ((EAGAIN != errno) && (EINTR != errno)) - { - fprintf (stderr, "Warning: Failed to write to RSP client: " - "Closing client connection: %s\n", - strerror (errno)); - rsp_client_close (); - return; - } - - break; - - case 0: - break; /* Nothing written! Try again */ - - default: - return; /* Success, we can return */ - } - } -} /* put_rsp_char () */ - - -/*---------------------------------------------------------------------------*/ -/*!Get a single character from the client socket - - This should only be called if the client is open, but we check for safety. - - @return The character read, or -1 on failure */ -/*---------------------------------------------------------------------------*/ -static int -get_rsp_char () -{ - unsigned char c; /* The character read */ - - if (-1 == rsp.client_fd) - { - fprintf (stderr, "Warning: Attempt to read from unopened RSP " - "client: Ignored\n"); - return -1; - } - - /* Read until successful (we retry after interrupts) or catastrophic - failure. */ - while (1) - { - switch (read (rsp.client_fd, &c, sizeof (c))) - { - case -1: - /* Error: only allow interrupts or would block */ - if ((EAGAIN != errno) && (EINTR != errno)) - { - fprintf (stderr, "Warning: Failed to read from RSP client: " - "Closing client connection: %s\n", - strerror (errno)); - rsp_client_close (); - return -1; - } - - break; - - case 0: - // EOF - rsp_client_close (); - return -1; - - default: - return c & 0xff; /* Success, we can return (no sign extend!) */ - } - } -} /* get_rsp_char () */ - - -/*---------------------------------------------------------------------------*/ -/*!"Unescape" RSP binary data - - '#', '$' and '}' are escaped by preceding them by '}' and oring with 0x20. - - This function reverses that, modifying the data in place. - - @param[in] data The array of bytes to convert - @para[in] len The number of bytes to be converted - - @return The number of bytes AFTER conversion */ -/*---------------------------------------------------------------------------*/ -static int -rsp_unescape (char *data, - int len) -{ - int from_off = 0; /* Offset to source char */ - int to_off = 0; /* Offset to dest char */ - - while (from_off < len) - { - /* Is it escaped */ - if ( '}' == data[from_off]) - { - from_off++; - data[to_off] = data[from_off] ^ 0x20; - } - else - { - data[to_off] = data[from_off]; - } - - from_off++; - to_off++; - } - - return to_off; - -} /* rsp_unescape () */ - - -/*---------------------------------------------------------------------------*/ -/*!Initialize the matchpoint hash table - - This is an open hash table, so this function clears all the links to - NULL. */ -/*---------------------------------------------------------------------------*/ -static void -mp_hash_init () -{ - int i; - - for (i = 0; i < MP_HASH_SIZE; i++) - { - rsp.mp_hash[i] = NULL; - } -} /* mp_hash_init () */ - - -/*---------------------------------------------------------------------------*/ -/*!Add an entry to the matchpoint hash table - - Add the entry if it wasn't already there. If it was there do nothing. The - match just be on type and addr. The instr need not match, since if this is - a duplicate insertion (perhaps due to a lost packet) they will be - different. - - @param[in] type The type of matchpoint - @param[in] addr The address of the matchpoint - @para[in] instr The instruction to associate with the address */ -/*---------------------------------------------------------------------------*/ -static void -mp_hash_add (enum mp_type type, - unsigned long int addr, - unsigned long int instr) -{ - int hv = addr % MP_HASH_SIZE; - struct mp_entry *curr; - - /* See if we already have the entry */ - for(curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) - { - if ((type == curr->type) && (addr == curr->addr)) - { - return; /* We already have the entry */ - } - } - - /* Insert the new entry at the head of the chain */ - curr = malloc (sizeof (*curr)); - - curr->type = type; - curr->addr = addr; - curr->instr = instr; - curr->next = rsp.mp_hash[hv]; - - rsp.mp_hash[hv] = curr; - -} /* mp_hash_add () */ - - -/*---------------------------------------------------------------------------*/ -/*!Look up an entry in the matchpoint hash table - - The match must be on type AND addr. - - @param[in] type The type of matchpoint - @param[in] addr The address of the matchpoint - - @return The entry deleted, or NULL if the entry was not found */ -/*---------------------------------------------------------------------------*/ -static struct mp_entry * -mp_hash_lookup (enum mp_type type, - unsigned long int addr) -{ - int hv = addr % MP_HASH_SIZE; - struct mp_entry *curr; - - /* Search */ - for (curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) - { - if ((type == curr->type) && (addr == curr->addr)) - { - return curr; /* The entry found */ - } - } - - /* Not found */ - return NULL; - -} /* mp_hash_lookup () */ - - -/*---------------------------------------------------------------------------*/ -/*!Delete an entry from the matchpoint hash table - - If it is there the entry is deleted from the hash table. If it is not - there, no action is taken. The match must be on type AND addr. - - The usual fun and games tracking the previous entry, so we can delete - things. - - @note The deletion DOES NOT free the memory associated with the entry, - since that is returned. The caller should free the memory when they - have used the information. - - @param[in] type The type of matchpoint - @param[in] addr The address of the matchpoint - - @return The entry deleted, or NULL if the entry was not found */ -/*---------------------------------------------------------------------------*/ -static struct mp_entry * -mp_hash_delete (enum mp_type type, - unsigned long int addr) -{ - int hv = addr % MP_HASH_SIZE; - struct mp_entry *prev = NULL; - struct mp_entry *curr; - - /* Search */ - for (curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) - { - if ((type == curr->type) && (addr == curr->addr)) - { - /* Found - delete. Method depends on whether we are the head of - chain. */ - if (NULL == prev) - { - rsp.mp_hash[hv] = curr->next; - } - else - { - prev->next = curr->next; - } - - return curr; /* The entry deleted */ - } - - prev = curr; - } - - /* Not found */ - return NULL; - -} /* mp_hash_delete () */ - - -/*---------------------------------------------------------------------------*/ -/*!Utility to give the value of a hex char - - @param[in] ch A character representing a hexadecimal digit. Done as -1, - for consistency with other character routines, which can use - -1 as EOF. - - @return The value of the hex character, or -1 if the character is - invalid. */ -/*---------------------------------------------------------------------------*/ -static int -hex (int c) -{ - return ((c >= 'a') && (c <= 'f')) ? c - 'a' + 10 : - ((c >= '0') && (c <= '9')) ? c - '0' : - ((c >= 'A') && (c <= 'F')) ? c - 'A' + 10 : -1; - -} /* hex () */ - - -/*---------------------------------------------------------------------------*/ -/*!Convert a register to a hex digit string - - The supplied 32-bit value is converted to an 8 digit hex string according - the target endianism. It is null terminated for convenient printing. - - @param[in] val The value to convert - @param[out] buf The buffer for the text string */ -/*---------------------------------------------------------------------------*/ -static void -reg2hex (unsigned long int val, - char *buf) -{ - int n; /* Counter for digits */ - - for (n = 0; n < 8; n++) - { -#ifdef WORDSBIGENDIAN - int nyb_shift = n * 4; -#else - int nyb_shift = 28 - (n * 4); -#endif - buf[n] = hexchars[(val >> nyb_shift) & 0xf]; - } - - buf[8] = 0; /* Useful to terminate as string */ - -} /* reg2hex () */ - - -/*---------------------------------------------------------------------------*/ -/*!Convert a hex digit string to a register value - - The supplied 8 digit hex string is converted to a 32-bit value according - the target endianism - - @param[in] buf The buffer with the hex string - - @return The value to convert */ -/*---------------------------------------------------------------------------*/ -static unsigned long int -hex2reg (char *buf) -{ - int n; /* Counter for digits */ - unsigned long int val = 0; /* The result */ - - for (n = 0; n < 8; n++) - { -#ifdef WORDSBIGENDIAN - int nyb_shift = n * 4; -#else - int nyb_shift = 28 - (n * 4); -#endif - val |= hex (buf[n]) << nyb_shift; - } - - return val; - -} /* hex2reg () */ - - -/*---------------------------------------------------------------------------*/ -/*!Convert an ASCII character string to pairs of hex digits - - Both source and destination are null terminated. - - @param[out] dest Buffer to store the hex digit pairs (null terminated) - @param[in] src The ASCII string (null terminated) */ -/*---------------------------------------------------------------------------*/ -static void ascii2hex (char *dest, - char *src) -{ - int i; - - /* Step through converting the source string */ - for (i = 0; src[i] != '\0'; i++) - { - char ch = src[i]; - - dest[i * 2] = hexchars[ch >> 4 & 0xf]; - dest[i * 2 + 1] = hexchars[ch & 0xf]; - } - - dest[i * 2] = '\0'; - -} /* ascii2hex () */ - - -/*---------------------------------------------------------------------------*/ -/*!Convert pairs of hex digits to an ASCII character string - - Both source and destination are null terminated. - - @param[out] dest The ASCII string (null terminated) - @param[in] src Buffer holding the hex digit pairs (null terminated) */ -/*---------------------------------------------------------------------------*/ -static void hex2ascii (char *dest, - char *src) -{ - int i; - - /* Step through convering the source hex digit pairs */ - for (i = 0; src[i * 2] != '\0' && src[i * 2 + 1] != '\0'; i++) - { - dest[i] = ((hex (src[i * 2]) & 0xf) << 4) | (hex (src[i * 2 + 1]) & 0xf); - } - - dest[i] = '\0'; - -} /* hex2ascii () */ - - -/*---------------------------------------------------------------------------*/ -/*!Set the program counter - - This sets the value in the NPC SPR. Not completely trivial, since this is - actually cached in cpu_state.pc. Any reset of the NPC also involves - clearing the delay state and setting the pcnext global. - - Only actually do this if the requested address is different to the current - NPC (avoids clearing the delay pipe). - - @param[in] addr The address to use */ -/*---------------------------------------------------------------------------*/ -static unsigned int set_npc (unsigned long int addr) -{ - int errcode; - - errcode = dbg_cpu0_write(SPR_NPC, addr); - cached_npc = addr; - use_cached_npc = 1; - - /* This was done in the simulator. Is any of this necessary on the hardware? --NAY - if (cpu_state.pc != addr) - { - cpu_state.pc = addr; - cpu_state.delay_insn = 0; - pcnext = addr + 4; - } - */ - return errcode; -} /* set_npc () */ - - -/*---------------------------------------------------------------------------*/ -/*!Send a packet acknowledging an exception has occurred - - This is only called if there is a client FD to talk to */ -/*---------------------------------------------------------------------------*/ -static void -rsp_report_exception () -{ - struct rsp_buf buf; - - /* Construct a signal received packet */ - buf.data[0] = 'S'; - buf.data[1] = hexchars[rsp.sigval >> 4]; - buf.data[2] = hexchars[rsp.sigval % 16]; - buf.data[3] = 0; - buf.len = strlen (buf.data); - - put_packet (&buf); - -} /* rsp_report_exception () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP continue request - - Parse the command to see if there is an address. Uses the underlying - generic continue function, with EXCEPT_NONE. - - @param[in] buf The full continue packet */ -/*---------------------------------------------------------------------------*/ -static void -rsp_continue (struct rsp_buf *buf) -{ - unsigned long int addr; /* Address to continue from, if any */ - - if (strncmp(buf->data, "c", 2)) - { - if(1 != sscanf (buf->data, "c%lx", &addr)) - { - fprintf (stderr, - "Warning: RSP continue address %s not recognized: ignored\n", - buf->data); - } - else - { - /* Set the address as the value of the next program counter */ - // TODO Is support for this really that simple? --NAY - set_npc (addr); - } - } - - rsp_continue_generic (EXCEPT_NONE); - -} /* rsp_continue () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP continue with signal request - - Currently null. Will use the underlying generic continue function. - - @param[in] buf The full continue with signal packet */ -/*---------------------------------------------------------------------------*/ -static void -rsp_continue_with_signal (struct rsp_buf *buf) -{ - printf ("RSP continue with signal '%s' received\n", buf->data); - -} /* rsp_continue_with_signal () */ - - -/*---------------------------------------------------------------------------*/ -/*!Generic processing of a continue request - - The signal may be EXCEPT_NONE if there is no exception to be - handled. Currently the exception is ignored. - - The single step flag is cleared in the debug registers and then the - processor is unstalled. - - @param[in] addr Address from which to step - @param[in] except The exception to use (if any) */ -/*---------------------------------------------------------------------------*/ -static void -rsp_continue_generic (unsigned long int except) -{ - unsigned long tmp; - - /* Clear Debug Reason Register and watchpoint break generation in Debug Mode - Register 2 */ - dbg_cpu0_write(SPR_DRR, 0); - dbg_cpu0_read(SPR_DMR2, &tmp); - tmp &= ~SPR_DMR2_WGB; - dbg_cpu0_write(SPR_DMR2, tmp); - - /* Clear the single step trigger in Debug Mode Register 1 and set traps to be - handled by the debug unit in the Debug Stop Register */ - dbg_cpu0_read(SPR_DMR1, &tmp); - tmp &= ~(SPR_DMR1_ST|SPR_DMR1_BT); // clear single-step and trap-on-branch - dbg_cpu0_write(SPR_DMR1, tmp); - - // *** TODO Is there ever a situation where the DSR will not be set to give us control on a TRAP? --NAY - - /* Unstall the processor (also starts the target handler thread) */ - set_stall_state (0); - - /* Note the GDB client is now waiting for a reply. */ - rsp.client_waiting = 1; - rsp.single_step_mode = 0; - -} /* rsp_continue_generic () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP read all registers request - - The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PPC - (i.e. SPR PPC), NPC (i.e. SPR NPC) and SR (i.e. SPR SR). Each register is - returned as a sequence of bytes in target endian order. - - Each byte is packed as a pair of hex digits. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_read_all_regs () -{ - struct rsp_buf buf; /* Buffer for the reply */ - int r; /* Register index */ - unsigned long regbuf[MAX_GPRS]; - unsigned int errcode = APP_ERR_NONE; - - // Read all the GPRs in a single burst, for efficiency - errcode = dbg_cpu0_read_block(SPR_GPR_BASE, regbuf, MAX_GPRS); - - /* Format the GPR data for output */ - for (r = 0; r < MAX_GPRS; r++) - { - reg2hex(regbuf[r], &(buf.data[r * 8])); - } - - /* PPC, NPC and SR have consecutive addresses, read in one burst */ - errcode |= dbg_cpu0_read_block(SPR_NPC, regbuf, 3); - - // Note that reg2hex adds a NULL terminator; as such, they must be - // put in buf.data in numerical order: PPC, NPC, SR - reg2hex(regbuf[2], &(buf.data[PPC_REGNUM * 8])); - - if(use_cached_npc == 1) { // Hackery to work around CPU hardware quirk - reg2hex(cached_npc, &(buf.data[NPC_REGNUM * 8])); - } - else { - reg2hex(regbuf[0], &(buf.data[NPC_REGNUM * 8])); - } - - reg2hex(regbuf[1], &(buf.data[SR_REGNUM * 8])); - - //fprintf(stderr, "Read SPRs: 0x%08X, 0x%08X, 0x%08X\n", regbuf[0], regbuf[1], regbuf[2]); - - /* - dbg_cpu0_read(SPR_PPC, &tmp); - reg2hex(tmp, &(buf.data[PPC_REGNUM * 8])); - - if(use_cached_npc == 1) { // Hackery to work around CPU hardware quirk - tmp = cached_npc; - } - else { - dbg_cpu0_read(SPR_NPC, &tmp); - } - reg2hex(tmp, &(buf.data[NPC_REGNUM * 8])); - - dbg_cpu0_read(SPR_SR, &tmp); - reg2hex(tmp, &(buf.data[SR_REGNUM * 8])); - */ - - if(errcode == APP_ERR_NONE) { - /* Finalize the packet and send it */ - buf.data[NUM_REGS * 8] = 0; - buf.len = NUM_REGS * 8; - put_packet (&buf); - } - else { - fprintf(stderr, "Error while reading all registers: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_read_all_regs () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP write all registers request - - The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PPC - (i.e. SPR PPC), NPC (i.e. SPR NPC) and SR (i.e. SPR SR). Each register is - supplied as a sequence of bytes in target endian order. - - Each byte is packed as a pair of hex digits. - - @todo There is no error checking at present. Non-hex chars will generate a - warning message, but there is no other check that the right amount - of data is present. The result is always "OK". - - @param[in] buf The original packet request. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_write_all_regs (struct rsp_buf *buf) -{ - int r; /* Register index */ - unsigned long regbuf[MAX_GPRS]; - unsigned int errcode; - - /* The GPRs */ - for (r = 0; r < MAX_GPRS; r++) - { - // Set up the data for a burst access - regbuf[r] = hex2reg (&(buf->data[r * 8])); - } - - errcode = dbg_cpu0_write_block(SPR_GPR_BASE, regbuf, MAX_GPRS); - - /* PPC, NPC and SR */ - regbuf[0] = hex2reg (&(buf->data[NPC_REGNUM * 8])); - regbuf[1] = hex2reg (&(buf->data[SR_REGNUM * 8])); - regbuf[2] = hex2reg (&(buf->data[PPC_REGNUM * 8])); - - errcode |= dbg_cpu0_write_block(SPR_NPC, regbuf, 3); - - /* - tmp = hex2reg (&(buf->data[PPC_REGNUM * 8])); - dbg_cpu0_write(SPR_PPC, tmp); - - tmp = hex2reg (&(buf->data[SR_REGNUM * 8])); - dbg_cpu0_write(SPR_SR, tmp); - - tmp = hex2reg (&(buf->data[NPC_REGNUM * 8])); - dbg_cpu0_write(SPR_NPC, tmp); - */ - - if(errcode == APP_ERR_NONE) - put_str_packet ("OK"); - else { - fprintf(stderr, "Error while writing all registers: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_write_all_regs () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP read memory (symbolic) request - - Syntax is: - - m,: - - The response is the bytes, lowest address first, encoded as pairs of hex - digits. - - The length given is the number of bytes to be read. - - @note This function reuses buf, so trashes the original command. - - @param[in] buf The command received */ -/*---------------------------------------------------------------------------*/ -static void -rsp_read_mem (struct rsp_buf *buf) -{ - unsigned int addr; /* Where to read the memory */ - int len; /* Number of bytes to read */ - int off; /* Offset into the memory */ - unsigned int errcode = APP_ERR_NONE; - - if (2 != sscanf (buf->data, "m%x,%x:", &addr, &len)) - { - fprintf (stderr, "Warning: Failed to recognize RSP read memory " - "command: %s\n", buf->data); - put_str_packet ("E01"); - return; - } - - /* Make sure we won't overflow the buffer (2 chars per byte) */ - if ((len * 2) >= GDB_BUF_MAX) - { - fprintf (stderr, "Warning: Memory read %s too large for RSP packet: " - "truncated\n", buf->data); - len = (GDB_BUF_MAX - 1) / 2; - } - - // Do the memory read into a temporary buffer - unsigned char *tmpbuf = (unsigned char *) malloc(len); // *** TODO check return, don't always malloc (use realloc) - errcode = dbg_wb_read_block8(addr, tmpbuf, len); - - - /* Refill the buffer with the reply */ - for (off = 0; off < len; off++) - { - unsigned char ch; /* The byte at the address */ - - /* Check memory area is valid. Not really possible without knowing hardware configuration. */ - - // Get the memory direct - no translation. - ch = tmpbuf[off]; - buf->data[off * 2] = hexchars[ch >> 4]; - buf->data[off * 2 + 1] = hexchars[ch & 0xf]; - } - - free(tmpbuf); - - if(errcode == APP_ERR_NONE) { - buf->data[off * 2] = 0; /* End of string */ - buf->len = strlen (buf->data); - put_packet (buf); - } - else { - fprintf(stderr, "Error reading memory: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_read_mem () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP write memory (symbolic) request - - Syntax is: - - m,: - - The data is the bytes, lowest address first, encoded as pairs of hex - digits. - - The length given is the number of bytes to be written. - - @note This function reuses buf, so trashes the original command. - - @param[in] buf The command received */ -/*---------------------------------------------------------------------------*/ -static void -rsp_write_mem (struct rsp_buf *buf) -{ - unsigned int addr; /* Where to write the memory */ - int len; /* Number of bytes to write */ - char *symdat; /* Pointer to the symboli data */ - int datlen; /* Number of digits in symbolic data */ - int off; /* Offset into the memory */ - unsigned int errcode; - - if (2 != sscanf (buf->data, "M%x,%x:", &addr, &len)) - { - fprintf (stderr, "Warning: Failed to recognize RSP write memory " - "command: %s\n", buf->data); - put_str_packet ("E01"); - return; - } - - /* Find the start of the data and check there is the amount we expect. */ - symdat = memchr ((const void *)buf->data, ':', GDB_BUF_MAX) + 1; - datlen = buf->len - (symdat - buf->data); - - /* Sanity check */ - if (len * 2 != datlen) - { - fprintf (stderr, "Warning: Write of %d digits requested, but %d digits " - "supplied: packet ignored\n", len * 2, datlen ); - put_str_packet ("E01"); - return; - } - - /* Write the bytes to memory */ - // Put all the data into a single buffer, so it can be burst-written via JTAG. - // One burst is much faster than many single-byte transactions. - unsigned char *tmpbuf = (unsigned char *) malloc(len); - for (off = 0; off < len; off++) - { - unsigned char nyb1 = hex (symdat[off * 2]); - unsigned char nyb2 = hex (symdat[off * 2 + 1]); - tmpbuf[off] = (nyb1 << 4) | nyb2; - } - - errcode = dbg_wb_write_block8(addr, tmpbuf, len); - free(tmpbuf); - - /* Can't really check if the memory addresses are valid on hardware. */ - if(errcode == APP_ERR_NONE) { - put_str_packet ("OK"); - } - else { - fprintf(stderr, "Error writing memory: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_write_mem () */ - - -/*---------------------------------------------------------------------------*/ -/*!Read a single register - - The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC - (i.e. SPR NPC) and SR (i.e. SPR SR). The register is returned as a - sequence of bytes in target endian order. - - Each byte is packed as a pair of hex digits. - - @param[in] buf The original packet request. Reused for the reply. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_read_reg (struct rsp_buf *buf) -{ - unsigned int regnum; - unsigned long tmp; - unsigned int errcode = APP_ERR_NONE; - - /* Break out the fields from the data */ - if (1 != sscanf (buf->data, "p%x", ®num)) - { - fprintf (stderr, "Warning: Failed to recognize RSP read register " - "command: \'%s\'\n", buf->data); - put_str_packet ("E01"); - return; - } - - /* Get the relevant register */ - if (regnum < MAX_GPRS) - { - errcode = dbg_cpu0_read(SPR_GPR_BASE+regnum, &tmp); - } - else if (PPC_REGNUM == regnum) - { - errcode = dbg_cpu0_read(SPR_PPC, &tmp); - } - else if (NPC_REGNUM == regnum) - { - if(use_cached_npc) { - tmp = cached_npc; - } else { - errcode = dbg_cpu0_read(SPR_NPC, &tmp); - } - } - else if (SR_REGNUM == regnum) - { - errcode = dbg_cpu0_read(SPR_SR, &tmp); - } - else - { - /* Error response if we don't know the register */ - fprintf (stderr, "Warning: Attempt to read unknown register 0x%x: " - "ignored\n", regnum); - put_str_packet ("E01"); - return; - } - - if(errcode == APP_ERR_NONE) { - reg2hex(tmp, buf->data); - buf->len = strlen (buf->data); - put_packet (buf); - } - else { - fprintf(stderr, "Error reading register: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_read_reg () */ - - -/*---------------------------------------------------------------------------*/ -/*!Write a single register - - The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC - (i.e. SPR NPC) and SR (i.e. SPR SR). The register is specified as a - sequence of bytes in target endian order. - - Each byte is packed as a pair of hex digits. - - @param[in] buf The original packet request. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_write_reg (struct rsp_buf *buf) -{ - unsigned int regnum; - char valstr[9]; /* Allow for EOS on the string */ - unsigned int errcode = APP_ERR_NONE; - - /* Break out the fields from the data */ - if (2 != sscanf (buf->data, "P%x=%8s", ®num, valstr)) - { - fprintf (stderr, "Warning: Failed to recognize RSP write register " - "command: %s\n", buf->data); - put_str_packet ("E01"); - return; - } - - /* Set the relevant register. Must translate between GDB register numbering and hardware reg. numbers. */ - if (regnum < MAX_GPRS) - { - errcode = dbg_cpu0_write(SPR_GPR_BASE+regnum, hex2reg(valstr)); - } - else if (PPC_REGNUM == regnum) - { - errcode = dbg_cpu0_write(SPR_PPC, hex2reg(valstr)); - } - else if (NPC_REGNUM == regnum) - { - errcode = set_npc (hex2reg (valstr)); - } - else if (SR_REGNUM == regnum) - { - errcode = dbg_cpu0_write(SPR_SR, hex2reg(valstr)); - } - else - { - /* Error response if we don't know the register */ - fprintf (stderr, "Warning: Attempt to write unknown register 0x%x: " - "ignored\n", regnum); - put_str_packet ("E01"); - return; - } - - if(errcode == APP_ERR_NONE) { - put_str_packet ("OK"); - } - else { - fprintf(stderr, "Error writing register: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_write_reg () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP query request - - @param[in] buf The request */ -/*---------------------------------------------------------------------------*/ -static void -rsp_query (struct rsp_buf *buf) -{ - if (0 == strcmp ("qC", buf->data)) - { - /* Return the current thread ID (unsigned hex). A null response - indicates to use the previously selected thread. Since we do not - support a thread concept, this is the appropriate response. */ - put_str_packet (""); - } - else if (0 == strncmp ("qCRC", buf->data, strlen ("qCRC"))) - { - /* Return CRC of memory area */ - fprintf (stderr, "Warning: RSP CRC query not supported\n"); - put_str_packet ("E01"); - } - else if (0 == strcmp ("qfThreadInfo", buf->data)) - { - /* Return info about active threads. We return just '-1' */ - put_str_packet ("m-1"); - } - else if (0 == strcmp ("qsThreadInfo", buf->data)) - { - /* Return info about more active threads. We have no more, so return the - end of list marker, 'l' */ - put_str_packet ("l"); - } - else if (0 == strncmp ("qGetTLSAddr:", buf->data, strlen ("qGetTLSAddr:"))) - { - /* We don't support this feature */ - put_str_packet (""); - } - else if (0 == strncmp ("qL", buf->data, strlen ("qL"))) - { - /* Deprecated and replaced by 'qfThreadInfo' */ - fprintf (stderr, "Warning: RSP qL deprecated: no info returned\n"); - put_str_packet ("qM001"); - } - else if (0 == strcmp ("qOffsets", buf->data)) - { - /* Report any relocation */ - put_str_packet ("Text=0;Data=0;Bss=0"); - } - else if (0 == strncmp ("qP", buf->data, strlen ("qP"))) - { - /* Deprecated and replaced by 'qThreadExtraInfo' */ - fprintf (stderr, "Warning: RSP qP deprecated: no info returned\n"); - put_str_packet (""); - } - else if (0 == strncmp ("qRcmd,", buf->data, strlen ("qRcmd,"))) - { - /* This is used to interface to commands to do "stuff" */ - rsp_command (buf); - } - else if (0 == strncmp ("qSupported", buf->data, strlen ("qSupported"))) - { - /* Report a list of the features we support. For now we just ignore any - supplied specific feature queries, but in the future these may be - supported as well. Note that the packet size allows for 'G' + all the - registers sent to us, or a reply to 'g' with all the registers and an - EOS so the buffer is a well formed string. */ - - char reply[GDB_BUF_MAX]; - - sprintf (reply, "PacketSize=%x", GDB_BUF_MAX); - put_str_packet (reply); - } - else if (0 == strncmp ("qSymbol:", buf->data, strlen ("qSymbol:"))) - { - /* Offer to look up symbols. Nothing we want (for now). TODO. This just - ignores any replies to symbols we looked up, but we didn't want to - do that anyway! */ - put_str_packet ("OK"); - } - else if (0 == strncmp ("qThreadExtraInfo,", buf->data, - strlen ("qThreadExtraInfo,"))) - { - /* Report that we are runnable, but the text must be hex ASCI - digits. For now do this by steam, reusing the original packet */ - sprintf (buf->data, "%02x%02x%02x%02x%02x%02x%02x%02x%02x", - 'R', 'u', 'n', 'n', 'a', 'b', 'l', 'e', 0); - buf->len = strlen (buf->data); - put_packet (buf); - } - else if (0 == strncmp ("qXfer:", buf->data, strlen ("qXfer:"))) - { - /* For now we support no 'qXfer' requests, but these should not be - expected, since they were not reported by 'qSupported' */ - fprintf (stderr, "Warning: RSP 'qXfer' not supported: ignored\n"); - put_str_packet (""); - } - else - { - fprintf (stderr, "Unrecognized RSP query: ignored\n"); - } -} /* rsp_query () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP qRcmd request - - The actual command follows the "qRcmd," in ASCII encoded to hex - - @param[in] buf The request in full */ -/*---------------------------------------------------------------------------*/ -static void -rsp_command (struct rsp_buf *buf) -{ - char cmd[GDB_BUF_MAX]; - unsigned long tmp; - - hex2ascii (cmd, &(buf->data[strlen ("qRcmd,")])); - - /* Work out which command it is */ - if (0 == strncmp ("readspr ", cmd, strlen ("readspr"))) - { - unsigned int regno; - - /* Parse and return error if we fail */ - if( 1 != sscanf (cmd, "readspr %4x", ®no)) - { - fprintf (stderr, "Warning: qRcmd %s not recognized: ignored\n", - cmd); - put_str_packet ("E01"); - return; - } - - /* SPR out of range */ - if (regno > MAX_SPRS) - { - fprintf (stderr, "Warning: qRcmd readspr %x too large: ignored\n", - regno); - put_str_packet ("E01"); - return; - } - - /* Construct the reply */ - dbg_cpu0_read(regno, &tmp); // TODO Check return value of all hardware accesses - sprintf (cmd, "%8lx", tmp); - ascii2hex (buf->data, cmd); - buf->len = strlen (buf->data); - put_packet (buf); - } - else if (0 == strncmp ("writespr ", cmd, strlen ("writespr"))) - { - unsigned int regno; - unsigned long int val; - - /* Parse and return error if we fail */ - if( 2 != sscanf (cmd, "writespr %4x %8lx", ®no, &val)) - { - fprintf (stderr, "Warning: qRcmd %s not recognized: ignored\n", - cmd); - put_str_packet ("E01"); - return; - } - - /* SPR out of range */ - if (regno > MAX_SPRS) - { - fprintf (stderr, "Warning: qRcmd writespr %x too large: ignored\n", - regno); - put_str_packet ("E01"); - return; - } - - /* Update the SPR and reply "OK" */ - dbg_cpu0_write(regno, val); - put_str_packet ("OK"); - } - -} /* rsp_command () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP set request - - @param[in] buf The request */ -/*---------------------------------------------------------------------------*/ -static void -rsp_set (struct rsp_buf *buf) -{ - if (0 == strncmp ("QPassSignals:", buf->data, strlen ("QPassSignals:"))) - { - /* Passing signals not supported */ - put_str_packet (""); - } - else if ((0 == strncmp ("QTDP", buf->data, strlen ("QTDP"))) || - (0 == strncmp ("QFrame", buf->data, strlen ("QFrame"))) || - (0 == strcmp ("QTStart", buf->data)) || - (0 == strcmp ("QTStop", buf->data)) || - (0 == strcmp ("QTinit", buf->data)) || - (0 == strncmp ("QTro", buf->data, strlen ("QTro")))) - { - /* All tracepoint features are not supported. This reply is really only - needed to 'QTDP', since with that the others should not be - generated. */ - put_str_packet (""); - } - else - { - fprintf (stderr, "Unrecognized RSP set request: ignored\n"); - } -} /* rsp_set () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP restart request - - For now we just put the program counter back to the one used with the last - vRun request. */ -/*---------------------------------------------------------------------------*/ -static void -rsp_restart () -{ - set_npc (rsp.start_addr); - -} /* rsp_restart () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP step request - - Parse the command to see if there is an address. Uses the underlying - generic step function, with EXCEPT_NONE. - - @param[in] buf The full step packet */ -/*---------------------------------------------------------------------------*/ -static void -rsp_step (struct rsp_buf *buf) -{ - unsigned long int addr; /* The address to step from, if any */ - - if(strncmp(buf->data, "s", 2)) - { - if(1 != sscanf (buf->data, "s%lx", &addr)) - { - fprintf (stderr, - "Warning: RSP step address %s not recognized: ignored\n", - buf->data); - } - else - { - /* Set the address as the value of the next program counter */ - // TODO Is implementing this really just this simple? - //set_npc (addr); - } - } - - rsp_step_generic (EXCEPT_NONE); - -} /* rsp_step () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP step with signal request - - Currently null. Will use the underlying generic step function. - - @param[in] buf The full step with signal packet */ -/*---------------------------------------------------------------------------*/ -static void -rsp_step_with_signal (struct rsp_buf *buf) -{ - int val; - printf ("RSP step with signal '%s' received\n", buf->data); - val = strtoul(&buf->data[1], NULL, 10); - rsp_step_generic(val); -} /* rsp_step_with_signal () */ - - -/*---------------------------------------------------------------------------*/ -/*!Generic processing of a step request - - The signal may be EXCEPT_NONE if there is no exception to be - handled. Currently the exception is ignored. - - The single step flag is set in the debug registers and then the processor - is unstalled. - - @param[in] addr Address from which to step - @param[in] except The exception to use (if any) */ -/*---------------------------------------------------------------------------*/ -static void -rsp_step_generic (unsigned long int except) -{ - unsigned long tmp; - - /* Clear Debug Reason Register and watchpoint break generation in Debug Mode - Register 2 */ - tmp = 0; - dbg_cpu0_write(SPR_DRR, tmp); // *** TODO Check return value of all hardware accesses - dbg_cpu0_read(SPR_DMR2, &tmp); - if(tmp & SPR_DMR2_WGB) { - tmp &= ~SPR_DMR2_WGB; - dbg_cpu0_write(SPR_DMR2, tmp); - } - - /* Set the single step trigger in Debug Mode Register 1 and set traps to be - handled by the debug unit in the Debug Stop Register */ - if(!rsp.single_step_mode) - { - dbg_cpu0_read(SPR_DMR1, &tmp); - tmp |= SPR_DMR1_ST|SPR_DMR1_BT; - dbg_cpu0_write(SPR_DMR1, tmp); - dbg_cpu0_read(SPR_DSR, &tmp); - if(!(tmp & SPR_DSR_TE)) { - tmp |= SPR_DSR_TE; - dbg_cpu0_write(SPR_DSR, tmp); - } - rsp.single_step_mode = 1; - } - - /* Unstall the processor */ - set_stall_state (0); - - /* Note the GDB client is now waiting for a reply. */ - rsp.client_waiting = 1; - -} /* rsp_step_generic () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP 'v' packet - - These are commands associated with executing the code on the target - - @param[in] buf The request */ -/*---------------------------------------------------------------------------*/ -static void -rsp_vpkt (struct rsp_buf *buf) -{ - if (0 == strncmp ("vAttach;", buf->data, strlen ("vAttach;"))) - { - /* Attaching is a null action, since we have no other process. We just - return a stop packet (using TRAP) to indicate we are stopped. */ - put_str_packet ("S05"); - return; - } - else if (0 == strcmp ("vCont?", buf->data)) - { - /* For now we don't support this. */ - put_str_packet (""); - return; - } - else if (0 == strncmp ("vCont", buf->data, strlen ("vCont"))) - { - /* This shouldn't happen, because we've reported non-support via vCont? - above */ - fprintf (stderr, "Warning: RSP vCont not supported: ignored\n" ); - return; - } - else if (0 == strncmp ("vFile:", buf->data, strlen ("vFile:"))) - { - /* For now we don't support this. */ - fprintf (stderr, "Warning: RSP vFile not supported: ignored\n" ); - put_str_packet (""); - return; - } - else if (0 == strncmp ("vFlashErase:", buf->data, strlen ("vFlashErase:"))) - { - /* For now we don't support this. */ - fprintf (stderr, "Warning: RSP vFlashErase not supported: ignored\n" ); - put_str_packet ("E01"); - return; - } - else if (0 == strncmp ("vFlashWrite:", buf->data, strlen ("vFlashWrite:"))) - { - /* For now we don't support this. */ - fprintf (stderr, "Warning: RSP vFlashWrite not supported: ignored\n" ); - put_str_packet ("E01"); - return; - } - else if (0 == strcmp ("vFlashDone", buf->data)) - { - /* For now we don't support this. */ - fprintf (stderr, "Warning: RSP vFlashDone not supported: ignored\n" ); - put_str_packet ("E01"); - return; - } - else if (0 == strncmp ("vRun;", buf->data, strlen ("vRun;"))) - { - /* We shouldn't be given any args, but check for this */ - if (buf->len > strlen ("vRun;")) - { - fprintf (stderr, "Warning: Unexpected arguments to RSP vRun " - "command: ignored\n"); - } - - /* Restart the current program. However unlike a "R" packet, "vRun" - should behave as though it has just stopped. We use signal - 5 (TRAP). */ - rsp_restart (); - put_str_packet ("S05"); - } - else - { - fprintf (stderr, "Warning: Unknown RSP 'v' packet type %s: ignored\n", - buf->data); - put_str_packet ("E01"); - return; - } -} /* rsp_vpkt () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP write memory (binary) request - - Syntax is: - - X,: - - Followed by the specified number of bytes as raw binary. Response should be - "OK" if all copied OK, E if error has occurred. - - The length given is the number of bytes to be written. However the number - of data bytes may be greater, since '#', '$' and '}' are escaped by - preceding them by '}' and oring with 0x20. - - @param[in] buf The command received */ -/*---------------------------------------------------------------------------*/ -static void -rsp_write_mem_bin (struct rsp_buf *buf) -{ - unsigned int addr; /* Where to write the memory */ - int len; /* Number of bytes to write */ - char *bindat; /* Pointer to the binary data */ - int off; /* Offset to start of binary data */ - int newlen; /* Number of bytes in bin data */ - unsigned int errcode; - - if (2 != sscanf (buf->data, "X%x,%x:", &addr, &len)) - { - fprintf (stderr, "Warning: Failed to recognize RSP write memory " - "command: %s\n", buf->data); - put_str_packet ("E01"); - return; - } - - /* Find the start of the data and "unescape" it */ - bindat = memchr ((const void *)buf->data, ':', GDB_BUF_MAX) + 1; - off = bindat - buf->data; - newlen = rsp_unescape (bindat, buf->len - off); - - /* Sanity check */ - if (newlen != len) - { - int minlen = len < newlen ? len : newlen; - - fprintf (stderr, "Warning: Write of %d bytes requested, but %d bytes " - "supplied. %d will be written\n", len, newlen, minlen); - len = minlen; - } - - /* Write the bytes to memory */ - errcode = dbg_wb_write_block8(addr, (uint8_t *) bindat, len); - - // We can't really verify if the memory target address exists or not. - // Don't write to non-existant memory unless your system wishbone implementation - // has a hardware bus timeout. - if(errcode == APP_ERR_NONE) { - put_str_packet ("OK"); - } - else { - fprintf(stderr, "Error writing memory: %s\n", get_err_string(errcode)); - put_str_packet("E01"); - } - -} /* rsp_write_mem_bin () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP remove breakpoint or matchpoint request - - For now only memory breakpoints are implemented, which are implemented by - substituting a breakpoint at the specified address. The implementation must - cope with the possibility of duplicate packets. - - @todo This doesn't work with icache/immu yet - - @param[in] buf The command received */ -/*---------------------------------------------------------------------------*/ -static void -rsp_remove_matchpoint (struct rsp_buf *buf) -{ - enum mp_type type; /* What sort of matchpoint */ - unsigned long int addr; /* Address specified */ - int len; /* Matchpoint length (not used) */ - struct mp_entry *mpe; /* Info about the replaced instr */ - unsigned long instbuf[1]; - - /* Break out the instruction */ - if (3 != sscanf (buf->data, "z%1d,%lx,%1d", (int *)&type, &addr, &len)) - { - fprintf (stderr, "Warning: RSP matchpoint deletion request not " - "recognized: ignored\n"); - put_str_packet ("E01"); - return; - } - - /* Sanity check that the length is 4 */ - if (4 != len) - { - fprintf (stderr, "Warning: RSP matchpoint deletion length %d not " - "valid: 4 assumed\n", len); - len = 4; - } - - /* Sort out the type of matchpoint */ - switch (type) - { - case BP_MEMORY: - /* Memory breakpoint - replace the original instruction. */ - mpe = mp_hash_delete (type, addr); - - /* If the BP hasn't yet been deleted, put the original instruction - back. Don't forget to free the hash table entry afterwards. */ - if (NULL != mpe) - { - instbuf[0] = mpe->instr; - dbg_wb_write_block32(addr, instbuf, 1); // *** TODO Check return value - free (mpe); - } - - put_str_packet ("OK"); - - return; - - case BP_HARDWARE: - put_str_packet (""); /* Not supported */ - return; - - case WP_WRITE: - put_str_packet (""); /* Not supported */ - return; - - case WP_READ: - put_str_packet (""); /* Not supported */ - return; - - case WP_ACCESS: - put_str_packet (""); /* Not supported */ - return; - - default: - fprintf (stderr, "Warning: RSP matchpoint type %d not " - "recognized: ignored\n", type); - put_str_packet ("E01"); - return; - - } -} /* rsp_remove_matchpoint () */ - - -/*---------------------------------------------------------------------------*/ -/*!Handle a RSP insert breakpoint or matchpoint request - - For now only memory breakpoints are implemented, which are implemented by - substituting a breakpoint at the specified address. The implementation must - cope with the possibility of duplicate packets. - - @todo This doesn't work with icache/immu yet - - @param[in] buf The command received */ -/*---------------------------------------------------------------------------*/ -static void -rsp_insert_matchpoint (struct rsp_buf *buf) -{ - enum mp_type type; /* What sort of matchpoint */ - unsigned long int addr; /* Address specified */ - int len; /* Matchpoint length (not used) */ - unsigned long instbuf[1]; - - /* Break out the instruction */ - if (3 != sscanf (buf->data, "Z%1d,%lx,%1d", (int *)&type, &addr, &len)) - { - fprintf (stderr, "Warning: RSP matchpoint insertion request not " - "recognized: ignored\n"); - put_str_packet ("E01"); - return; - } - - /* Sanity check that the length is 4 */ - if (4 != len) - { - fprintf (stderr, "Warning: RSP matchpoint insertion length %d not " - "valid: 4 assumed\n", len); - len = 4; - } - - /* Sort out the type of matchpoint */ - switch (type) - { - case BP_MEMORY: - /* Memory breakpoint - substitute a TRAP instruction */ - dbg_wb_read_block32(addr, instbuf, 1); // Get the old instruction. *** TODO Check return value - mp_hash_add (type, addr, instbuf[0]); - instbuf[0] = OR1K_TRAP_INSTR; // Set the TRAP instruction - dbg_wb_write_block32(addr, instbuf, 1); // *** TODO Check return value - put_str_packet ("OK"); - - return; - - case BP_HARDWARE: - put_str_packet (""); /* Not supported */ - return; - - case WP_WRITE: - put_str_packet (""); /* Not supported */ - return; - - case WP_READ: - put_str_packet (""); /* Not supported */ - return; - - case WP_ACCESS: - put_str_packet (""); /* Not supported */ - return; - - default: - fprintf (stderr, "Warning: RSP matchpoint type %d not " - "recognized: ignored\n", type); - put_str_packet ("E01"); - return; - - } - -} /* rsp_insert_matchpoint () */ - - -// Additions from this point on were added solely to handle hardware, -// and did not come from simulator interface code. -/////////////////////////////////////////////////////////////////////////// -// -// Thread to poll for break on remote processor. -/////////////////////////////////////////////////////////////////////////// - -void *target_handler(void *arg) -{ - unsigned char target_status = 0; - int retval = APP_ERR_NONE; - char string[] = "a"; // We send this through the pipe. Content is unimportant. - unsigned int local_state = 0; - - while(1) - { - // Block on condition for GO or DETACH signal - pthread_mutex_lock(&target_handler_mutex); - if(target_handler_state == 0) - { - pthread_cond_wait(&target_handler_cond, &target_handler_mutex); - } - - // if detach, exit thread - if(target_handler_state == 2) // 2 = DETACH - { - target_handler_state = 0; - pthread_mutex_unlock(&target_handler_mutex); - return arg; - } - - local_state = target_handler_state; - pthread_mutex_unlock(&target_handler_mutex); - - - - if(local_state == 1) // Then start target polling loop, but keep checking for DETACH. State 1 == GO - { - while(1) - { - // non-blocking check for DETACH signal - pthread_mutex_lock(&target_handler_mutex); - if(target_handler_state == 2) // state 2 == DETACH - { - pthread_mutex_unlock(&target_handler_mutex); - return arg; - } - pthread_mutex_unlock(&target_handler_mutex); - - // Poll target hardware - retval = dbg_cpu0_read_ctrl(0, &target_status); - if(retval != APP_ERR_NONE) - fprintf(stderr, "ERROR 0x%X while polling target CPU status\n", retval); - else { - if(target_status & 0x01) // Did we get the stall bit? Bit 0 is STALL bit. - { - // clear the RUNNING flag - pthread_mutex_lock(&rsp_mutex); - rsp.target_running = 0; - pthread_mutex_unlock(&rsp_mutex); - - // Log the exception so it can be sent back to GDB - unsigned long drrval; - dbg_cpu0_read(SPR_DRR, &drrval); // Read the DRR, find out why we stopped - rsp_exception(drrval); // Send it to be translated and stored - - // Send message to GDB handler thread via socket (so it can break out of its poll()) - int ret = write(pipe_fds[1], string, 1); - if(!ret) { - fprintf(stderr, "Warning: target monitor write() to pipe returned 0\n"); - } - else if(ret < 0) { - perror("Error in target monitor write to pipe: "); - } - - // Set our own state back to STOP - pthread_mutex_lock(&target_handler_mutex); - target_handler_state = 0; - pthread_mutex_unlock(&target_handler_mutex); - - break; // Stop polling, block on the next GO/DETACH - } - } - - usleep(250000); // wait 1/4 second before polling again. - } - } - - else - { - fprintf(stderr, "Unknown command 0x%X received by target handler thread\n", local_state); - pthread_mutex_lock(&target_handler_mutex); // Set our own state back to STOP - target_handler_state = 0; - pthread_mutex_unlock(&target_handler_mutex); - } - } - - return arg; -} - - - - -void set_stall_state(int stall) -{ - int retval = 0; - unsigned char data = (stall>0)? 1:0; - unsigned char stalled = 0; - - // Set the 'running' variable, if necessary. Do this before actually starting the CPU. - // The 'running' variable prevents us from responding to most GDB requests while the - // CPU is running. - // We don't ever set the 'running' bit to 0 here. Instead, we stall the CPU hardware, and let - // the target handler thread detect the stall, then signal us to send a message up to - // GDB and clear the 'running' bit. - if(stall == 0) - { - use_cached_npc = 0; - pthread_mutex_lock(&rsp_mutex); - rsp.target_running = 1; - pthread_mutex_unlock(&rsp_mutex); - } - - // Actually start or stop the CPU hardware - retval = dbg_cpu0_write_ctrl(0, data); // 0x01 is the STALL command bit - if(retval != APP_ERR_NONE) - fprintf(stderr, "ERROR 0x%X sending async STALL to target.\n", retval); - - dbg_cpu0_read_ctrl(0, &stalled); - /* - if (!(stalled & 0x1)) { - printf("or1k is not stalled!\n"); - } - - fprintf(stderr, "Set STALL to %i\n", data); - */ - - // Wake up the target handler thread to poll for a new STALL - if(stall == 0) - { - pthread_mutex_lock(&target_handler_mutex); - target_handler_state = 1; - pthread_cond_signal(&target_handler_cond); - pthread_mutex_unlock(&target_handler_mutex); - } - - return; -} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.c (revision 27) @@ -0,0 +1,191 @@ +/* cable_parallel.c - Parallel cable drivers (XPC3 and XESS) for the Advanced JTAG Bridge + Copyright (C) 2001 Marko Mlinar, markom@opencores.org + Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org + + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + + +#include +#include // for inb(), outb() +#include +#include + +#include "cable_common.h" +#include "errcodes.h" + + +#define LPT_READ (base+1) +#define LPT_WRITE base + +// Common functions used by both cable types +static int cable_parallel_out(uint8_t value); +static int cable_parallel_inout(uint8_t value, uint8_t *inval); + + +static int base = 0x378; + + + +///////////////////////////////////////////////////////////////////////////////// +/*-------------------------------------[ Parallel port specific functions ]---*/ +/////////////////////////////////////////////////////////////////////////////// + +int cable_parallel_init() +{ + + //#ifndef WIN32 + if (ioperm(base, 3, 1)) { + fprintf(stderr, "Couldn't get the port at %x\n", base); + perror("Root privileges are required.\n"); + return APP_ERR_INIT_FAILED; + } + printf("Connected to parallel port at %x\n", base); + printf("Dropping root privileges.\n"); + setreuid(getuid(), getuid()); + //#endif + + return APP_ERR_NONE; +} + + +int cable_parallel_opt(int c, char *str) +{ + switch(c) { + case 'p': + if(!sscanf(str, "%x", &base)) { + fprintf(stderr, "p parameter must have a hex number as parameter\n"); + return APP_ERR_BAD_PARAM; + } + break; + default: + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; + } + return APP_ERR_NONE; +} + +/*-----------------------------------------[ Physical board wait function ]---*/ +void cable_parallel_phys_wait() +{ + usleep(10); +} + +/*----------------------------------------------[ xpc3 specific functions ]---*/ +int cable_xpc3_out(uint8_t value) +{ + uint8_t out = 0; + + /* First convert the bits in value byte to the ones that the cable wants */ + if(value & TCLK_BIT) + out |= 0x02; /* D1 pin 3 */ + if(value & TRST_BIT) + out |= 0x10; /* Not used */ + if(value & TDI_BIT) + out |= 0x01; /* D0 pin 2 */ + if(value & TMS_BIT) + out |= 0x04; /* D2 pin 4 */ + + return cable_parallel_out(out); +} + +int cable_xpc3_inout(uint8_t value, uint8_t *inval) +{ + uint8_t in; + int retval; + uint8_t out = 0; + + /* First convert the bits in value byte to the ones that the cable wants */ + if(value & TCLK_BIT) + out |= 0x02; /* D1 pin 3 */ + if(value & TRST_BIT) + out |= 0x10; /* Not used */ + if(value & TDI_BIT) + out |= 0x01; /* D0 pin 2 */ + if(value & TMS_BIT) + out |= 0x04; /* D2 pin 4 */ + + retval = cable_parallel_inout(out, &in); + + if(in & 0x10) /* S6 pin 13 */ + *inval = 1; + else + *inval = 0; + + return retval; +} + +/*----------------------------------------------[ xess specific functions ]---*/ +int cable_xess_out(uint8_t value) +{ + uint8_t out = 0; + + /* First convert the bits in value byte to the ones that the cable wants */ + if(value & TCLK_BIT) + out |= 0x04; /* D2 pin 4 */ + if(value & TRST_BIT) + out |= 0x08; /* D3 pin 5 */ + if(value & TDI_BIT) + out |= 0x10; /* D4 pin 6 */ + if(value & TMS_BIT) + out |= 0x20; /* D3 pin 5 */ + + return cable_parallel_out(out); +} + +uint8_t cable_xess_inout(uint8_t value, uint8_t *inval) +{ + uint8_t in; + int retval; + uint8_t out = 0; + + /* First convert the bits in value byte to the ones that the cable wants */ + if(value & TCLK_BIT) + out |= 0x04; /* D2 pin 4 */ + if(value & TRST_BIT) + out |= 0x08; /* D3 pin 5 */ + if(value & TDI_BIT) + out |= 0x10; /* D4 pin 6 */ + if(value & TMS_BIT) + out |= 0x20; /* D3 pin 5 */ + + retval = cable_parallel_inout(out, &in); + + if(in & 0x20) /* S5 pin 12*/ + *inval = 1; + else + *inval = 0; + + return retval; +} + + +/*----------------------------------------------[ common helper functions ]---*/ +// 'static' for internal access only + +static int cable_parallel_out(uint8_t value) +{ + outb(value, LPT_WRITE); + return APP_ERR_NONE; +} + +static int cable_parallel_inout(uint8_t value, uint8_t *inval) +{ + *inval = inb(LPT_READ); + outb(value, LPT_WRITE); + + return APP_ERR_NONE; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.c (revision 27) @@ -0,0 +1,358 @@ +/* cable_common.c -- Interface to the low-level cable drivers + Copyright (C) 2001 Marko Mlinar, markom@opencores.org + Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org + Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + + +#include +#include + + +#include "cable_common.h" +#include "cable_parallel.h" +#include "cable_sim.h" +#include "cable_usbblaster.h" +#include "cable_ft2232.h" +#include "cable_xpc_dlc9.h" +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +static struct jtag_cable { + const char *name; + int (*inout_func)(uint8_t, uint8_t *); + int (*out_func)(uint8_t); + int (*init_func)(); + void (*wait_func)(); + int (*opt_func)(int, char *); + int (*bit_out_func)(uint8_t); + int (*bit_inout_func)(uint8_t, uint8_t *); + int (*stream_out_func)(uint32_t *, int, int); + int (*stream_inout_func)(uint32_t *, uint32_t *, int, int); + int (*flush_func)(); + const char *opts; + const char *help; +} jtag_cables[] = { + { "rtl_sim", + cable_rtl_sim_inout, + cable_rtl_sim_out, + cable_rtl_sim_init, + NULL, + cable_rtl_sim_opt, + cable_common_write_bit, + cable_common_read_write_bit, + cable_common_write_stream, + cable_common_read_stream, + NULL, + "d:", + "-d [directory] Directory in which gdb_in.dat/gdb_out.dat may be found\n" }, + { "vpi", + cable_vpi_inout, + cable_vpi_out, + cable_vpi_init, + cable_vpi_wait, + cable_vpi_opt, + cable_common_write_bit, + cable_common_read_write_bit, + cable_common_write_stream, + cable_common_read_stream, + NULL, + "s:p:", + "-p [port] Port number that the VPI module is listening on\n\t-s [server] Server that the VPI module is running on\n" }, + { "xpc3", + cable_xpc3_inout, + cable_xpc3_out, + cable_parallel_init, + cable_parallel_phys_wait, + cable_parallel_opt, + cable_common_write_bit, + cable_common_read_write_bit, + cable_common_write_stream, + cable_common_read_stream, + NULL, + "p:", + "-p [port] Which port to use when communicating with the parport hardware (eg. 0x378)\n" }, + { "xess", + cable_xess_inout, + cable_xess_out, + cable_parallel_init, + cable_parallel_phys_wait, + cable_parallel_opt, + cable_common_write_bit, + cable_common_read_write_bit, + cable_common_write_stream, + cable_common_read_stream, + NULL, + "p:", + "-p [port] Which port to use when communicating with the parport hardware (eg. 0x378)\n" }, +#ifdef __SUPPORT_USB_CABLES__ + { "usbblaster", + cable_usbblaster_inout, + cable_usbblaster_out, + cable_usbblaster_init, + NULL, + cable_usbblaster_opt, + cable_common_write_bit, + cable_common_read_write_bit, + cable_usbblaster_write_stream, + cable_usbblaster_read_stream, + NULL, + "", + "no options\n" }, + { "xpc_usb", + cable_xpcusb_inout, + cable_xpcusb_out, + cable_xpcusb_init, + NULL, + cable_xpcusb_opt, + cable_common_write_bit, + cable_xpcusb_read_write_bit, + cable_common_write_stream, + cable_common_read_stream, + NULL, + "", + "no options\n" }, +#ifdef __SUPPORT_FTDI_CABLES__ + { "ft2232", + NULL, + NULL, + cable_ftdi_init, + NULL, + cable_ftdi_opt, + cable_ftdi_write_bit, + cable_ftdi_read_write_bit, + cable_ftdi_write_stream, + cable_ftdi_read_stream, + cable_ftdi_flush, + "", + "no options\n" }, +#endif // __SUPPORT_FTDI_CABLES__ +#endif // __SUPPORT_USB_CABLES__ + { NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL } }; + +static struct jtag_cable *jtag_cable_in_use = NULL; /* The currently selected cable */ + + +///////////////////////////////////////////////////////////////////////////////////// +// Cable subsystem / init functions + + +/* Selects a cable for use */ +int cable_select(const char *cable) +{ + int i; + + for(i = 0; jtag_cables[i].name; i++) { + if(!strcmp(cable, jtag_cables[i].name)) { + jtag_cable_in_use = &jtag_cables[i]; + return APP_ERR_NONE; + } + } + + return APP_ERR_CABLE_INVALID; +} + +/* Calls the init function of the cable + */ +int cable_init() +{ + return jtag_cable_in_use->init_func(); +} + +/* Parses command-line options specific to the selected cable */ +int cable_parse_opt(int c, char *str) +{ + return jtag_cable_in_use->opt_func(c, str); +} + +const char *cable_get_args() +{ + if(jtag_cable_in_use != NULL) + return jtag_cable_in_use->opts; + else + return NULL; +} + +/* Prints a (short) useage message for each available cable */ +void cable_print_help() +{ + int i; + printf("Available cables: "); + + for(i = 0; jtag_cables[i].name; i++) { + if(i) + printf(", "); + printf("%s", jtag_cables[i].name); + } + + printf("\n\nOptions availible for the cables:\n"); + for(i = 0; jtag_cables[i].name; i++) { + if(!jtag_cables[i].help) + continue; + printf(" %s:\n %s", jtag_cables[i].name, jtag_cables[i].help); + } +} + + +///////////////////////////////////////////////////////////////////////////////// +// Cable API Functions + +int cable_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { + return jtag_cable_in_use->stream_out_func(stream, len_bits, set_last_bit); +} + +int cable_read_write_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { + return jtag_cable_in_use->stream_inout_func(outstream, instream, len_bits, set_last_bit); +} + +int cable_write_bit(uint8_t packet) { + return jtag_cable_in_use->bit_out_func(packet); +} + +int cable_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { + return jtag_cable_in_use->bit_inout_func(packet_out, bit_in); +} + +int cable_flush(void) { + if(jtag_cable_in_use->flush_func != NULL) + return jtag_cable_in_use->flush_func(); + return APP_ERR_NONE; +} + + +///////////////////////////////////////////////////////////////////////////////////// +// Common functions which may or may not be used by individual drivers + + +/* Note that these make no assumption as to the starting state of the clock, + * and they leave the clock HIGH. But, these need to interface with other routines (like + * the byte-shift mode in the USB-Blaster), which begin by assuming that a new + * data bit is available at TDO, which only happens after a FALLING edge of TCK. + * So, routines which assume new data is available will need to start by dropping + * the clock. + */ +int cable_common_write_bit(uint8_t packet) { + uint8_t data = TRST_BIT; // TRST is active low, don't clear unless /set/ in 'packet' + int err = APP_ERR_NONE; + + /* Write data, drop clock */ + if(packet & TDO) data |= TDI_BIT; + if(packet & TMS) data |= TMS_BIT; + if(packet & TRST) data &= ~TRST_BIT; + + err |= jtag_cable_in_use->out_func(data); + if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); + + /* raise clock, to do write */ + err |= jtag_cable_in_use->out_func(data | TCLK_BIT); + if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); + + return err; +} + +int cable_common_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { + uint8_t data = TRST_BIT; // TRST is active low, don't clear unless /set/ in 'packet' + int err = APP_ERR_NONE; + + /* Write data, drop clock */ + if(packet_out & TDO) data |= TDI_BIT; + if(packet_out & TMS) data |= TMS_BIT; + if(packet_out & TRST) data &= ~TRST_BIT; + + err |= jtag_cable_in_use->out_func(data); // drop the clock to make data available, set the out data + if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); + err |= jtag_cable_in_use->inout_func((data | TCLK_BIT), bit_in); // read in bit, clock high for out bit. + if (jtag_cable_in_use->wait_func != NULL) jtag_cable_in_use->wait_func(); + + return err; +} + + +/* Writes bitstream via bit-bang. Can be used by any driver which does not have a high-speed transfer function. + * Transfers LSB to MSB of stream[0], then LSB to MSB of stream[1], etc. + */ +int cable_common_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { + int i; + int index = 0; + int bits_this_index = 0; + uint8_t out; + int err = APP_ERR_NONE; + + debug("writeSrrm%d(", len_bits); + for(i = 0; i < len_bits - 1; i++) { + out = (stream[index] >> bits_this_index) & 1; + err |= cable_write_bit(out); + debug("%i", out); + bits_this_index++; + if(bits_this_index >= 32) { + index++; + bits_this_index = 0; + } + } + + out = (stream[index] >>(len_bits - 1)) & 0x1; + if(set_last_bit) out |= TMS; + err |= cable_write_bit(out); + debug("%i)\n", out); + return err; +} + +/* Gets bitstream via bit-bang. Can be used by any driver which does not have a high-speed transfer function. + * Transfers LSB to MSB of stream[0], then LSB to MSB of stream[1], etc. + */ +int cable_common_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { + int i; + int index = 0; + int bits_this_index = 0; + uint8_t inval, outval; + int err = APP_ERR_NONE; + + instream[0] = 0; + + debug("readStrm%d(", len_bits); + for(i = 0; i < (len_bits - 1); i++) { + outval = (outstream[index] >> bits_this_index) & 0x1; + err |= cable_read_write_bit(outval, &inval); + debug("%i", inval); + instream[index] |= (inval << bits_this_index); + bits_this_index++; + if(bits_this_index >= 32) { + index++; + bits_this_index = 0; + instream[index] = 0; // It's safe to do this, because there's always at least one more bit + } + } + + if (set_last_bit) + outval = ((outstream[index] >> (len_bits - 1)) & 1) | TMS; + else + outval = (outstream[index] >> (len_bits - 1)) & 1; + + err |= cable_read_write_bit(outval, &inval); + debug("%i", inval); + instream[index] |= (inval << bits_this_index); + + debug(") = 0x%lX\n", instream[0]); + + return err; +} + + + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_common.h (revision 27) @@ -0,0 +1,44 @@ + +#ifndef _CABLE_COMMON_H_ +#define _CABLE_COMMON_H_ + +#include + +// Defines to use in the 'packet' args of cable_write_bit() +// and cable_read_write_bit(). Note that while TRST is +// active low for JTAG hardware, here the TRST bit +// should be set when you want the TRST wire active +// (JTAG TAP to be reset). +#define TRST (0x04) +#define TMS (0x02) +#define TDO (0x01) + +// These should only be used in the cable_* files. +#define TCLK_BIT (0x01) +#define TRST_BIT (0x02) +#define TDI_BIT (0x04) +#define TMS_BIT (0x08) +#define TDO_BIT (0x20) + +// Cable subsystem / init routines +int cable_select(const char *cable); +int cable_init(); +int cable_parse_opt(int c, char *str); +const char *cable_get_args(); +void cable_print_help(); + + +// Cable API routines +int cable_write_bit(uint8_t packet); +int cable_read_write_bit(uint8_t packet_out, uint8_t *bit_in); +int cable_write_stream(uint32_t *stream, int len_bits, int set_last_bit); +int cable_read_write_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); +int cable_flush(void); + +// Common functions for lower-level drivers to use as desired +int cable_common_write_bit(uint8_t packet); +int cable_common_read_write_bit(uint8_t packet_out, uint8_t *bit_in); +int cable_common_write_stream(uint32_t *stream, int len_bits, int set_last_bit); +int cable_common_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/adv_jtag_bridge.pdf =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/adv_jtag_bridge.pdf (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/adv_jtag_bridge.pdf (revision 27) @@ -0,0 +1,2502 @@ +%PDF-1.4 +%äüöß +2 0 obj +<> +stream +xœm‘ËNÄ0 E÷ù +¯‘ì8FŠ"Ñy ±¨Ä±âµa˜Íü>Ž[`è J©cßú»h Žæ:”0’“3åv^àþ>´ØžÃ›Fã˜-C ÞzŸárKà$z}(Hµ£‚®º‚\;.èkç †*Ùˆ©J¦¯Ts“\i8 #zæïU¾ÒÐãZEÜjBÑ?Ž7f3šÝ‚ËÇlpB&.¸¸qµ–ܬý| +§"h9} z‡3rœÍXÌ"°²¦…Yøß(ר#Ç…:.®q3+·ú^¶š$jš<å°;…#Å#8EzÚ´ŽÈo¯üd’õìú u½¼ÃÝù.sßz9²i11y +BF‘Ò0õ¿<;øT} +endstream +endobj + +3 0 obj +290 +endobj + +5 0 obj +<> +stream +xœVËëãF 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TRANSLATION + +Translation is considered a kind of modification, so you may +distribute translations of the Document under the terms of section 4. +Replacing Invariant Sections with translations requires special +permission from their copyright holders, but you may include +translations of some or all Invariant Sections in addition to the +original versions of these Invariant Sections. You may include a +translation of this License, and all the license notices in the +Document, and any Warranty Disclaimers, provided that you also include +the original English version of this License and the original versions +of those notices and disclaimers. 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Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/gpl-2.0.txt =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/gpl-2.0.txt (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/doc/gpl-2.0.txt (revision 27) @@ -0,0 +1,339 @@ + GNU GENERAL PUBLIC LICENSE + Version 2, June 1991 + + Copyright (C) 1989, 1991 Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. By contrast, the GNU General Public +License is intended to guarantee your freedom to share and change free +software--to make sure the software is free for all its users. This +General Public License applies to most of the Free Software +Foundation's software and to any other program whose authors commit to +using it. (Some other Free Software Foundation software is covered by +the GNU Lesser General Public License instead.) You can apply it to +your programs, too. + + When we speak of free software, we are referring to freedom, not +price. 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And you must show them these terms so they know their +rights. + + We protect your rights with two steps: (1) copyright the software, and +(2) offer you this license which gives you legal permission to copy, +distribute and/or modify the software. + + Also, for each author's protection and ours, we want to make certain +that everyone understands that there is no warranty for this free +software. If the software is modified by someone else and passed on, we +want its recipients to know that what they have is not the original, so +that any problems introduced by others will not reflect on the original +authors' reputations. + + Finally, any free program is threatened constantly by software +patents. We wish to avoid the danger that redistributors of a free +program will individually obtain patent licenses, in effect making the +program proprietary. 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You may copy and distribute verbatim copies of the Program's +source code as you receive it, in any medium, provided that you +conspicuously and appropriately publish on each copy an appropriate +copyright notice and disclaimer of warranty; keep intact all the +notices that refer to this License and to the absence of any warranty; +and give any other recipients of the Program a copy of this License +along with the Program. + +You may charge a fee for the physical act of transferring a copy, and +you may at your option offer warranty protection in exchange for a fee. + + 2. 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But when you +distribute the same sections as part of a whole which is a work based +on the Program, the distribution of the whole must be on the terms of +this License, whose permissions for other licensees extend to the +entire whole, and thus to each and every part regardless of who wrote it. + +Thus, it is not the intent of this section to claim rights or contest +your rights to work written entirely by you; rather, the intent is to +exercise the right to control the distribution of derivative or +collective works based on the Program. + +In addition, mere aggregation of another work not based on the Program +with the Program (or with a work based on the Program) on a volume of +a storage or distribution medium does not bring the other work under +the scope of this License. + + 3. You may copy and distribute the Program (or a work based on it, +under Section 2) in object code or executable form under the terms of +Sections 1 and 2 above provided that you also do one of the following: + + a) Accompany it with the complete corresponding machine-readable + source code, which must be distributed under the terms of Sections + 1 and 2 above on a medium customarily used for software interchange; or, + + b) Accompany it with a written offer, valid for at least three + years, to give any third party, for a charge no more than your + cost of physically performing source distribution, a complete + machine-readable copy of the corresponding source code, to be + distributed under the terms of Sections 1 and 2 above on a medium + customarily used for software interchange; or, + + c) Accompany it with the information you received as to the offer + to distribute corresponding source code. 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Any attempt +otherwise to copy, modify, sublicense or distribute the Program is +void, and will automatically terminate your rights under this License. +However, parties who have received copies, or rights, from you under +this License will not have their licenses terminated so long as such +parties remain in full compliance. + + 5. You are not required to accept this License, since you have not +signed it. However, nothing else grants you permission to modify or +distribute the Program or its derivative works. These actions are +prohibited by law if you do not accept this License. Therefore, by +modifying or distributing the Program (or any work based on the +Program), you indicate your acceptance of this License to do so, and +all its terms and conditions for copying, distributing or modifying +the Program or works based on it. + + 6. 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The Free Software Foundation may publish revised and/or new versions +of the General Public License from time to time. Such new versions will +be similar in spirit to the present version, but may differ in detail to +address new problems or concerns. + +Each version is given a distinguishing version number. If the Program +specifies a version number of this License which applies to it and "any +later version", you have the option of following the terms and conditions +either of that version or of any later version published by the Free +Software Foundation. If the Program does not specify a version number of +this License, you may choose any version ever published by the Free Software +Foundation. + + 10. If you wish to incorporate parts of the Program into other free +programs whose distribution conditions are different, write to the author +to ask for permission. For software which is copyrighted by the Free +Software Foundation, write to the Free Software Foundation; we sometimes +make exceptions for this. Our decision will be guided by the two goals +of preserving the free status of all derivatives of our free software and +of promoting the sharing and reuse of software generally. + + NO WARRANTY + + 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY +FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN +OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES +PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED +OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS +TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE +PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, +REPAIR OR CORRECTION. + + 12. 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It is safest +to attach them to the start of each source file to most effectively +convey the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + + Copyright (C) + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +Also add information on how to contact you by electronic and paper mail. + +If the program is interactive, make it output a short notice like this +when it starts in an interactive mode: + + Gnomovision version 69, Copyright (C) year name of author + Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, the commands you use may +be called something other than `show w' and `show c'; they could even be +mouse-clicks or menu items--whatever suits your program. + +You should also get your employer (if you work as a programmer) or your +school, if any, to sign a "copyright disclaimer" for the program, if +necessary. Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the program + `Gnomovision' (which makes passes at compilers) written by James Hacker. + + , 1 April 1989 + Ty Coon, President of Vice + +This General Public License does not permit incorporating your program into +proprietary programs. If your program is a subroutine library, you may +consider it more useful to permit linking proprietary applications with the +library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/Makefile =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/Makefile (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/Makefile (revision 27) @@ -0,0 +1,104 @@ +prefix = /usr/local + +# Your build environment. selects libs, lib dirs, and include dirs +# Supported: linux, cygwin +BUILD_ENVIRONMENT=cygwin + +# Set this to 'true' if you want to build for the legacy debug unit ('debug_if' core), +# leave 'false' if you are building for the Advanced Debug Unit. +SUPPORT_LEGACY=false + +# Set this to 'true' to include support for cables which require libusb +# currently includes Altera USB-Blaster and Xilinx XPC DLC8 +SUPPORT_USB_CABLES=true + +# Set this to 'true' to support cables which require libFTDI +# SUPPORT_USB_CABLES must also be set to 'true' to support FTDI-based cables. +SUPPORT_FTDI_CABLES=true + + +# ---------------------------------------------------------------------------- +# Most people shouldn't have to change anything below this line + +ifeq ($(BUILD_ENVIRONMENT),linux) +# These are for native Linux. You may need to put the path to libusb into the LIBS variable +# with the -L command. +CFLAGS = -g -O2 -Wall +CC = gcc +LIBS = -lpthread +INCLUDEDIRS = -I/usr/local/include/libusb-1.0/ -I/usr/local/include/ + +else + +ifeq ($(BUILD_ENVIRONMENT),cygwin) +# These are for cygwin. It assumes libusb.a is in the current directory. +CFLAGS = -g -O2 -Wall +CC = gcc +LIBS = -L. -lioperm -lpthread +INCLUDEDIRS = -I/usr/local/include/ +endif + +endif + +ifeq ($(SUPPORT_LEGACY),true) +CFLAGS += -D__LEGACY__ +endif + + +PROGRAMS = adv_jtag_bridge + +HEADERS = adv_jtag_bridge.h chain_commands.h opencores_tap.h \ + altera_virtual_jtag.h rsp-server.h bsdl.h or32_selftest.c cable_common.h \ + cable_parallel.h cable_sim.h \ + bsdl_parse.h errcodes.h spr-defs.h except.h adv_dbg_commands.h dbg_api.h \ + legacy_dbg_commands.h + +SOURCES = adv_jtag_bridge.c rsp-server.c chain_commands.c cable_common.c bsdl.c \ + or32_selftest.c cable_parallel.c cable_sim.c \ + bsdl_parse.c errcodes.c adv_dbg_commands.c dbg_api.c legacy_dbg_commands.c + +OBJECTS = adv_jtag_bridge.o rsp-server.o chain_commands.o cable_common.o bsdl.o \ + or32_selftest.o cable_parallel.o cable_sim.o \ + bsdl_parse.o errcodes.o adv_dbg_commands.o dbg_api.o legacy_dbg_commands.o + + +ifeq ($(SUPPORT_USB_CABLES),true) +CFLAGS += -D__SUPPORT_USB_CABLES__ +HEADERS += cable_usbblaster.h cable_xpc_dlc9.h +SOURCES += cable_usbblaster.c cable_xpc_dlc9.c +OBJECTS += cable_usbblaster.o cable_xpc_dlc9.o + +ifeq ($(SUPPORT_FTDI_CABLES),true) +CFLAGS += -D__SUPPORT_FTDI_CABLES__ +LIBS += -lftdi +HEADERS += cable_ft2232.h +SOURCES += cable_ft2232.c +OBJECTS += cable_ft2232.o +endif + +# libusb must follow libftdi in the list of libraries +LIBS += -lusb +endif + + +all: $(PROGRAMS) + +default: $(PROGRAMS) + +.c.o: + $(CC) $(CFLAGS) -c $< + +adv_jtag_bridge: Makefile $(OBJECTS) $(HEADERS) + rm -f $@ + $(CC) -o $@ $(CFLAGS) $(OBJECTS) $(LIBS) $(INCLUDEDIRS) + + +install: all + [ -d $(prefix)/bin ] || mkdir -p $(prefix)/bin + for p in $(PROGRAMS) ; do \ + /bin/rm -f $(prefix)/bin/$$p; \ + /bin/cp -p $$p $(prefix)/bin/$$p; \ + done + +clean: Makefile + rm -f $(PROGRAMS) *.o *~ Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.c (revision 27) @@ -0,0 +1,880 @@ +/* cable_ft2232.c - FT2232 based cable driver for the Advanced JTAG Bridge + Copyright (C) 2008 Arnim Laeuger, arniml@opencores.org + Copyright (C) 2009 José Ignacio Villar, jose@dte.us.es + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "cable_ft2232.h" +#include "cable_common.h" +#include "errcodes.h" +int debug = 0; + +static int usbconn_ftdi_common_open( usbconn_t *conn); +static void usbconn_ftdi_free( usbconn_t *conn ); +static int seq_purge(struct ftdi_context *ftdic, int purge_rx, int purge_tx); +static int seq_reset(struct ftdi_context *ftdic); +static int usbconn_ftdi_flush( ftdi_param_t *params ); +static int usbconn_ftdi_read( usbconn_t *conn, uint8_t *buf, int len ); +static int usbconn_ftdi_write( usbconn_t *conn, uint8_t *buf, int len, int recv ); +static int usbconn_ftdi_mpsse_open( usbconn_t *conn ); +static int usbconn_ftdi_close(usbconn_t *conn); + +usbconn_driver_t usbconn_ft2232_mpsse_driver = { + "ftdi-mpsse", + usbconn_ftdi_connect, + usbconn_ftdi_free, + usbconn_ftdi_mpsse_open, + usbconn_ftdi_close, + usbconn_ftdi_read, + usbconn_ftdi_write +}; + +usbconn_cable_t usbconn_ft2232_mpsse_CableID2= { + "CableID2", /* cable name */ + "CableID2", /* string pattern, not used */ + "ftdi-mpsse", /* default usbconn driver */ + 0x0403, /* VID */ + 0x6010 /* PID */ +}; + +static usbconn_t *ft2232_device; + + + +/// ---------------------------------------------------------------------------------------------- +/// libftdi wrappers for debugging purposes. +/// ---------------------------------------------------------------------------------------------- + +void print_buffer(unsigned char *buf, int size) { + int i=0; + for(i=0; i 1) print_buffer(buf, size); + return ftdi_write_data(ftdi, buf, size); +} + +char *my_ftdi_get_error_string (struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_get_error_string(ftdi);\n"); + return ftdi_get_error_string (ftdi); +} + +int my_ftdi_read_data(struct ftdi_context *ftdi, unsigned char *buf, int size) { + int ret = 0; + debug("[MYDBG] ftdi_read_data(ftdi, buf=BUFFER[%d], size=%d);\n", size, size); + ret = ftdi_read_data(ftdi, buf, size); + if(debug) print_buffer(buf, size); + return ret; +} + +int my_ftdi_usb_open_desc(struct ftdi_context *ftdi, int vendor, int product, const char* description, const char* serial) { + debug("[MYDBG] ftdi_usb_open_desc(ftdi, vendor=%d, product=%d, description=DESCRIPTION, serial=SERIAL);\n", vendor, product); + return ftdi_usb_open_desc(ftdi, vendor, product, description, serial); +} + +void my_ftdi_deinit(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_deinit(ftdi);\n"); + ftdi_deinit(ftdi); +} + +int my_ftdi_usb_purge_buffers(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_usb_purge_buffers(ftdi);\n"); + return ftdi_usb_purge_buffers(ftdi); +} + +int my_ftdi_usb_purge_rx_buffer(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_usb_purge_rx_buffer(ftdi);\n"); + return ftdi_usb_purge_rx_buffer(ftdi); +} + +int my_ftdi_usb_purge_tx_buffer(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_usb_purge_tx_buffer(ftdi);\n"); + return ftdi_usb_purge_tx_buffer(ftdi); +} + +int my_ftdi_usb_reset(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_usb_reset(ftdi);\n"); + return ftdi_usb_reset(ftdi); +} + +int my_ftdi_set_latency_timer(struct ftdi_context *ftdi, unsigned char latency) { + debug("[MYDBG] ftdi_set_latency_timer(ftdi, latency=0x%02x);\n", latency); + return ftdi_set_latency_timer(ftdi, latency); +} + +int my_ftdi_set_baudrate(struct ftdi_context *ftdi, int baudrate) { + debug("[MYDBG] ftdi_set_baudrate(ftdi, baudrate=%d);\n", baudrate); + return ftdi_set_baudrate(ftdi, baudrate); +} + +int my_ftdi_read_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize) { + debug("[MYDBG] ftdi_read_data_set_chunksize(ftdi, chunksize=%u);\n", chunksize); + return ftdi_read_data_set_chunksize(ftdi, chunksize); +} + +int my_ftdi_write_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize) { + debug("[MYDBG] ftdi_write_data_set_chunksize(ftdi, chunksize=%u);\n", chunksize); + return ftdi_write_data_set_chunksize(ftdi, chunksize); +} + +int my_ftdi_set_event_char(struct ftdi_context *ftdi, unsigned char eventch, unsigned char enable) { + debug("[MYDBG] ftdi_set_event_char(ftdi, eventch=0x%02x, enable=0x%02x);\n", eventch, enable); + return ftdi_set_event_char(ftdi, eventch, enable); +} + +int my_ftdi_set_error_char(struct ftdi_context *ftdi, unsigned char errorch, unsigned char enable) { + debug("[MYDBG] ftdi_set_error_char(ftdi, errorch=0x%02x, enable=0x%02x);\n", errorch, enable); + return ftdi_set_error_char(ftdi, errorch, enable); +} + +int my_ftdi_set_bitmode(struct ftdi_context *ftdi, unsigned char bitmask, unsigned char mode) { + debug("[MYDBG] ftdi_set_bitmode(ftdi, bitmask=0x%02x, mode=0x%02x);\n", bitmask, mode); + return ftdi_set_bitmode(ftdi, bitmask, mode); +} + +int my_ftdi_usb_close(struct ftdi_context *ftdi) { + debug("[MYDBG] ftdi_usb_close(ftdi);\n"); + return ftdi_usb_close(ftdi); +} + + + +/// ---------------------------------------------------------------------------------------------- +/// USBconn FTDI MPSSE subsystem +/// ---------------------------------------------------------------------------------------------- + + +static int usbconn_ftdi_common_open(usbconn_t *conn) { + ftdi_param_t *params = conn->params; + struct ftdi_context * ftdic = params->ftdic; + int error; + + printf("Initializing USB device\n"); + + if ((error = my_ftdi_usb_open_desc(ftdic, conn->cable->vid, conn->cable->pid, NULL, NULL))) { + if (error == -1) printf("usb_find_busses() failed\n"); + else if (error == -2) printf("usb_find_devices() failed\n"); + else if (error == -3) printf("usb device not found\n"); + else if (error == -4) printf("unable to open device\n"); + else if (error == -5) printf("unable to claim device\n"); + else if (error == -6) printf("reset failed\n"); + else if (error == -7) printf("set baudrate failed\n"); + else if (error == -8) printf("get product description failed\n"); + else if (error == -9) printf("get serial number failed\n"); + else if (error == -10) printf("unable to close device\n"); + + my_ftdi_deinit(ftdic); + ftdic = NULL; + + printf("Can't open FTDI usb device\n"); + return(-1); + } + + return 0; +} + +static int seq_purge(struct ftdi_context *ftdic, int purge_rx, int purge_tx) { + int r = 0; + unsigned char buf; + + if ((r = my_ftdi_usb_purge_buffers( ftdic )) < 0) + printf("my_ftdi_usb_purge_buffers() failed\n"); + if (r >= 0) if ((r = my_ftdi_read_data( ftdic, &buf, 1 )) < 0) + printf("my_ftdi_read_data() failed\n"); + + return r < 0 ? -1 : 0; +} + +static int seq_reset(struct ftdi_context *ftdic) { + + if (my_ftdi_usb_reset( ftdic ) < 0) { + printf("my_ftdi_usb_reset() failed\n"); + return -1; + } + + if(seq_purge(ftdic, 1, 1) < 0) + return -1; + + return 0; +} + +static int usbconn_ftdi_flush( ftdi_param_t *params ) + { + int xferred; + int recvd = 0; + + if (!params->ftdic) + return -1; + + if (params->send_buffered == 0) + return 0; + + if ((xferred = my_ftdi_write_data( params->ftdic, params->send_buf, params->send_buffered )) < 0) + printf("my_ftdi_write_data() failed\n"); + + if (xferred < params->send_buffered) { + printf("Written fewer bytes than requested.\n"); + return -1; + } + + params->send_buffered = 0; + + /* now read all scheduled receive bytes */ + if (params->to_recv) { + if (params->recv_write_idx + params->to_recv > params->recv_buf_len) { + /* extend receive buffer */ + params->recv_buf_len = params->recv_write_idx + params->to_recv; + if (params->recv_buf) + params->recv_buf = (uint8_t *)realloc( params->recv_buf, params->recv_buf_len ); + } + + if (!params->recv_buf) { + printf("Receive buffer does not exist.\n"); + return -1; + } + + while (recvd == 0) + if ((recvd = my_ftdi_read_data( params->ftdic, &(params->recv_buf[params->recv_write_idx]), params->to_recv )) < 0) + printf("Error from my_ftdi_read_data()\n"); + + if (recvd < params->to_recv) + printf("Received less bytes than requested.\n"); + + params->to_recv -= recvd; + params->recv_write_idx += recvd; + } + + debug("[MYDBG] FLUSHING xferred=%u\n", xferred); + return xferred < 0 ? -1 : xferred; +} + +static int usbconn_ftdi_read( usbconn_t *conn, uint8_t *buf, int len ) { + ftdi_param_t *params = conn->params; + int cpy_len; + int recvd = 0; + + if (!params->ftdic) + return -1; + + /* flush send buffer to get all scheduled receive bytes */ + if (usbconn_ftdi_flush( params ) < 0) + return -1; + + if (len == 0) + return 0; + + /* check for number of remaining bytes in receive buffer */ + cpy_len = params->recv_write_idx - params->recv_read_idx; + if (cpy_len > len) + cpy_len = len; + len -= cpy_len; + + if (cpy_len > 0) { + /* get data from the receive buffer */ + memcpy( buf, &(params->recv_buf[params->recv_read_idx]), cpy_len ); + params->recv_read_idx += cpy_len; + if (params->recv_read_idx == params->recv_write_idx) + params->recv_read_idx = params->recv_write_idx = 0; + } + + if (len > 0) { + /* need to get more data directly from the device */ + while (recvd == 0) + if ((recvd = my_ftdi_read_data( params->ftdic, &(buf[cpy_len]), len )) < 0) + printf("Error from my_ftdi_read_data()\n"); + } + debug("[MYDBG] READ cpy_len=%u ; len=%u\n", cpy_len, len); + return recvd < 0 ? -1 : cpy_len + len; +} + +static int usbconn_ftdi_write( usbconn_t *conn, uint8_t *buf, int len, int recv ) { + + ftdi_param_t *params = conn->params; + int xferred = 0; + + if (!params->ftdic) + return -1; + + /* this write function will try to buffer write data + buffering will be ceased and a flush triggered in two cases. */ + + /* Case A: max number of scheduled receive bytes will be exceeded + with this write + Case B: max number of scheduled send bytes has been reached */ + if ((params->to_recv + recv > FTDI_MAXRECV) || ((params->send_buffered > FTDX_MAXSEND) && (params->to_recv == 0))) + xferred = usbconn_ftdi_flush(params); + + if (xferred < 0) + return -1; + + /* now buffer this write */ + if (params->send_buffered + len > params->send_buf_len) { + params->send_buf_len = params->send_buffered + len; + if (params->send_buf) + params->send_buf = (uint8_t *)realloc( params->send_buf, params->send_buf_len); + } + + if (params->send_buf) { + memcpy( &(params->send_buf[params->send_buffered]), buf, len ); + params->send_buffered += len; + if (recv > 0) + params->to_recv += recv; + + if (recv < 0) { + /* immediate write requested, so flush the buffered data */ + xferred = usbconn_ftdi_flush( params ); + } + + debug("[MYDBG] WRITE inmediate=%s ; xferred=%u ; len=%u\n", ((recv < 0) ? "TRUE" : "FALSE"), xferred, len); + return xferred < 0 ? -1 : len; + } + else { + printf("Send buffer does not exist.\n"); + return -1; + } +} + +static int usbconn_ftdi_mpsse_open( usbconn_t *conn ) { + ftdi_param_t *params = conn->params; + struct ftdi_context *ftdic = params->ftdic; + + int r = 0; + + if (usbconn_ftdi_common_open(conn) < 0) { + printf("Connection failed\n"); + return -1; + } + + /* This sequence might seem weird and containing superfluous stuff. + However, it's built after the description of JTAG_InitDevice + Ref. FTCJTAGPG10.pdf + Intermittent problems will occur when certain steps are skipped. */ + + r = seq_reset( ftdic ); + if (r >= 0) + r = seq_purge( ftdic, 1, 0 ); + + if (r >= 0) + if ((r = my_ftdi_write_data_set_chunksize( ftdic, FTDX_MAXSEND_MPSSE )) < 0) + puts( my_ftdi_get_error_string( ftdic ) ); + + if (r >= 0) + if ((r = my_ftdi_read_data_set_chunksize( ftdic, FTDX_MAXSEND_MPSSE )) < 0) + puts( my_ftdi_get_error_string( ftdic ) ); + + /* set a reasonable latency timer value + if this value is too low then the chip will send intermediate result data + in short packets (suboptimal performance) */ + if (r >= 0) + if ((r = my_ftdi_set_latency_timer( ftdic, 16 )) < 0) + printf("my_ftdi_set_latency_timer() failed\n"); + + if (r >= 0) + if ((r = my_ftdi_set_bitmode( ftdic, 0x0b, BITMODE_MPSSE )) < 0) + printf("my_ftdi_set_bitmode() failed\n"); + + if (r >= 0) + if ((r = my_ftdi_usb_reset( ftdic )) < 0) + printf("my_ftdi_usb_reset() failed\n"); + + if (r >= 0) + r = seq_purge( ftdic, 1, 0 ); + + /* set TCK Divisor */ + if (r >= 0) { + uint8_t buf[3] = {TCK_DIVISOR, 0x00, 0x00}; + r = usbconn_ftdi_write( conn, buf, 3, 0 ); + } + + /* switch off loopback */ + if (r >= 0) { + uint8_t buf[1] = {LOOPBACK_END}; + r = usbconn_ftdi_write( conn, buf, 1, 0 ); + } + + if (r >= 0) + r = usbconn_ftdi_read( conn, NULL, 0 ); + + if (r >= 0) + if ((r = my_ftdi_usb_reset( ftdic )) < 0) + printf("my_ftdi_usb_reset() failed\n"); + + if (r >= 0) + r = seq_purge( ftdic, 1, 0 ); + + if (r < 0) { + ftdi_usb_close( ftdic ); + ftdi_deinit( ftdic ); + /* mark ftdi layer as not initialized */ + params->ftdic = NULL; + } + + return r < 0 ? -1 : 0; +} + +static int usbconn_ftdi_close(usbconn_t *conn) { + ftdi_param_t *params = conn->params; + + if (params->ftdic) { + my_ftdi_usb_close(params->ftdic); + my_ftdi_deinit(params->ftdic); + params->ftdic = NULL; + } + + return 0; +} + +static void usbconn_ftdi_free( usbconn_t *conn ) +{ + ftdi_param_t *params = conn->params; + + if (params->send_buf) free( params->send_buf ); + if (params->recv_buf) free( params->recv_buf ); + if (params->ftdic) free( params->ftdic ); + if (params->serial) free( params->serial ); + + free( conn->params ); + free( conn ); +} + +usbconn_t * usbconn_ftdi_connect() { + + usbconn_t *conn = malloc( sizeof( usbconn_t ) ); + ftdi_param_t *params = malloc( sizeof( ftdi_param_t ) ); + struct ftdi_context *ftdic = malloc( sizeof( struct ftdi_context ) ); + + if (params) { + params->send_buf_len = FTDX_MAXSEND; + params->send_buffered = 0; + params->send_buf = (uint8_t *) malloc( params->send_buf_len ); + params->recv_buf_len = FTDI_MAXRECV; + params->to_recv = 0; + params->recv_write_idx = 0; + params->recv_read_idx = 0; + params->recv_buf = (uint8_t *) malloc( params->recv_buf_len ); + } + + if (!conn || !params || !ftdic || !params->send_buf || !params->recv_buf) { + printf("Can't allocate memory for ftdi context structures\n"); + + if (conn) free( conn ); + if (params) free( params ); + if (ftdic) free( ftdic ); + if (params->send_buf) free( params->send_buf ); + if (params->recv_buf) free( params->recv_buf ); + return NULL; + } + + conn->driver = &usbconn_ft2232_mpsse_driver; + conn->cable = &usbconn_ft2232_mpsse_CableID2; + + ftdi_init( ftdic ); + params->ftdic = ftdic; + params->pid = conn->cable->pid; + params->vid = conn->cable->vid; + params->serial = NULL; + + conn->params = params; + + printf("Structs successfully initialized\n"); + + /* do a test open with the specified cable paramters, + alternatively we could use libusb to detect the presence of the + specified USB device */ + if (usbconn_ftdi_common_open(conn) != 0) { + printf("Connection failed\n"); + usbconn_ftdi_free(conn); + printf("Freeing structures.\n"); + return NULL; + } + + my_ftdi_usb_close( ftdic ); + + printf("Connected to libftdi driver.\n"); + + return conn; +} + + + +/// ---------------------------------------------------------------------------------------------- +/// High level functions to generate Tx/Rx commands +/// ---------------------------------------------------------------------------------------------- + +int cable_ft2232_write_bytes(usbconn_t *conn, unsigned char *buf, int len, int postread) { + + int cur_command_size; + int max_command_size; + int cur_chunk_len; + int recv; + int xferred; + int i; + unsigned char *mybuf; + + if(len == 0) + return 0; + debug("write_bytes(length=%d, postread=%s)\n", len, ((postread > 0) ? "TRUE" : "FALSE")); + recv = 0; + max_command_size = min(len, 65536)+3; + mybuf = (unsigned char *) malloc( max_command_size ); + + /// Command OPCODE: write bytes + mybuf[0] = MPSSE_DO_WRITE | MPSSE_LSB | MPSSE_WRITE_NEG; + if(postread) // if postread is enabled it will buffer incoming bytes + mybuf[0] = mybuf[0] | MPSSE_DO_READ; + + // We divide the transmitting stream of bytes in chunks with a maximun length of 65536 bytes each. + while(len > 0) { + cur_chunk_len = min(len, 65536); + len = len - cur_chunk_len; + cur_command_size = cur_chunk_len + 3; + + /// Low and High bytes of the length field + mybuf[1] = (unsigned char) ( cur_chunk_len - 1); + mybuf[2] = (unsigned char) ((cur_chunk_len - 1) >> 8); + + debug("\tOPCODE: 0x%x\n", mybuf[0]); + debug("\tLENGTL: 0x%02x\n", mybuf[1]); + debug("\tLENGTH: 0x%02x\n", mybuf[2]); + + /// The rest of the command is filled with the bytes that will be transferred + memcpy(&(mybuf[3]), buf, cur_chunk_len ); + buf = buf + cur_chunk_len; + for(i = 0; i< cur_chunk_len; i++) + if(debug>1) debug("\tBYTE%3d: 0x%02x\n", i, mybuf[3+i]); + + /// Finally we can ransmit the command + xferred = usbconn_ftdi_write( conn, mybuf, cur_command_size, (postread ? cur_chunk_len : 0) ); + if(xferred != cur_command_size) + return -1; + + // If OK, the update the number of incoming bytes that are being buffered for a posterior read + if(postread) + recv = recv + cur_chunk_len; + } + debug("\tPOSTREAD: %u bytes\n", recv); + + // Returns the number of buffered incoming bytes + return recv; +} + +int cable_ft2232_write_bits(usbconn_t *conn, unsigned char *buf, int len, int postread, int with_tms) +{ + int max_command_size; + int max_chunk_len; + int cur_chunk_len; + int recv; + int xferred; + int i; + unsigned char *mybuf; + + if(len == 0) + return 0; + + max_command_size = 3; + mybuf = (unsigned char *) malloc( max_command_size ); + + if(!with_tms) { + /// Command OPCODE: write bits (can write up to 8 bits in a single command) + max_chunk_len = 8; + mybuf[0] = MPSSE_DO_WRITE | MPSSE_LSB | MPSSE_WRITE_NEG | MPSSE_BITMODE; + } + else { + /// Command OPCODE: 0x4B write bit with tms (can write up to 1 bits in a single command) + max_chunk_len = 1; + mybuf[0] = MPSSE_WRITE_TMS|MPSSE_LSB|MPSSE_BITMODE|MPSSE_WRITE_NEG; + } + + if(postread) // (OPCODE += 0x20) if postread is enabled it will buffer incoming bits + mybuf[0] = mybuf[0] | MPSSE_DO_READ; + + // We divide the transmitting stream of bytes in chunks with a maximun length of max_chunk_len bits each. + i=0; + recv = 0; + while(len > 0) { + cur_chunk_len = min(len, max_chunk_len); + len = len - cur_chunk_len; + + /// Bits length field + mybuf[1] = (unsigned char) ( cur_chunk_len - 1); + + debug("\tOPCODE: 0x%x\n", mybuf[0]); + debug("\tLENGTH: 0x%02x\n", mybuf[1]); + + if(!with_tms) { + /// The last byte of the command is filled with the bits that will be transferred + debug("\tDATA[%d] 0x%02x\n", (i/8), buf[i/8]); + mybuf[2] = buf[i/8]; + i=i+8; + } + else { + //TODO: seleccionar el bit a transmitir + mybuf[2] = 0x01 | ((buf[(i/8)] >> (i%8)) << 7); + i++; + } + + debug("\tBYTE%3d: 0x%02x\n", i, mybuf[2]); + + /// Finally we can transmmit the command + xferred = usbconn_ftdi_write( conn, mybuf, max_command_size, (postread ? 1 : 0) ); + if(xferred != max_command_size) + return -1; + + // If OK, the update the number of incoming bytes that are being buffered for a posterior read + if(postread) + recv = recv + 1; + } + debug("\tPOSTREAD: %u bytes\n", recv); + + return recv; +} + +int cable_ft2232_read_packed_bits(usbconn_t *conn, uint8_t *buf, int packet_len, int bits_per_packet, int offset) +{ + unsigned char *mybuf; + unsigned char dst_mask; + unsigned char src_mask; + int row_offset; + int dst_row; + int dst_col; + int src_row; + int src_col; + int i; + int r; + + if(packet_len == 0 || bits_per_packet == 0) + return 0; + + mybuf = (unsigned char *) malloc( packet_len ); + if((r=usbconn_ftdi_read( conn, mybuf, packet_len )) < 0) { + debug("Read failed\n"); + return -1; + } + + if(bits_per_packet < 8) { + for(i=0; i < packet_len; i++){ // rotate bits to the left side +// debug("[MYDBG] unaligned bits[%d]=%02x\n", i, mybuf[i]); + mybuf[i] = (mybuf[i] >> (8-bits_per_packet)); +// debug("[MYDBG] aligned bits[%d]=%02x\n", i, mybuf[i]); + } + for(i=offset; i < (packet_len*bits_per_packet+offset); i++) { + dst_row = i / 8; + dst_col = i % 8; + src_row = (i-offset) / bits_per_packet; + src_col = (i-offset) % bits_per_packet; + dst_mask = ~(1 << dst_col); + src_mask = (1 << src_col); +// debug("[MYDBG] i=%4d dst[%3d][%3d] dst_mask=%02x dst_val=%02x dst_masked=%02x\n", i, dst_row, dst_col, dst_mask, buf[dst_row], (buf[dst_row] & dst_mask)); +// debug("[MYDBG] i=%4d src[%3d][%3d] src_mask=%02x src_val=%02x src_masked=%02x\n", i, src_row, src_col, src_mask, mybuf[src_row], (mybuf[src_row] & src_mask)); + if(dst_col >= src_col) + buf[dst_row] = (buf[dst_row] & dst_mask) | ((mybuf[src_row] & src_mask) << (dst_col - src_col)); + else + buf[dst_row] = (buf[dst_row] & dst_mask) | ((mybuf[src_row] & src_mask) >> (dst_col - src_col)); + } + + } + else if(bits_per_packet == 8){ + row_offset = offset / 8; +// debug("[MYDBG] Row offset=%d\n", row_offset); + memcpy( &(buf[row_offset]), mybuf, packet_len); + } + else { + return -1; + } + +// debug("read_bits()-> %x\n", *buf); + return ((r < 1) ? -1 : 0); +} + +int cable_ft2232_write_stream(usbconn_t *conn, unsigned char *buf, int len, int postread, int with_tms) { + int len_bytes; + int len_bits; + int len_tms_bits; + unsigned char mybuf; + + len_tms_bits = ((with_tms) ? 1 : 0); + len_bytes = ((len -len_tms_bits) / 8); + len_bits = ((len -len_tms_bits) % 8); + + debug("[MYDBG] cable_ft2232_write_stream(len=%d postread=%d tms=%d) = %d bytes %dbits %dtms_bits\n", len, postread, with_tms, len_bytes, len_bits, len_tms_bits); + + if(len_bytes > 0) + cable_ft2232_write_bytes(conn, buf, len_bytes, postread); + + if(len_bits > 0) + cable_ft2232_write_bits(conn, &(buf[len_bytes]), len_bits, postread, 0); + + if(len_tms_bits > 0) { + mybuf = (buf[len_bytes] >> len_bits); + cable_ft2232_write_bits(conn, &mybuf, 1, postread, 1); + } + + return 0; +} + +int cable_ft2232_read_stream(usbconn_t *conn, unsigned char *buf, int len, int with_tms) { + int len_bytes; + int len_bits; + int len_tms_bits; + + len_tms_bits = ((with_tms) ? 1 : 0); + len_bytes = ((len -len_tms_bits) / 8); + len_bits = ((len -len_tms_bits) % 8); + + debug("[MYDBG] cable_ft2232_read_stream(len=%d tms=%d) = %d bytes %dbits %dtms_bits\n", len, with_tms, len_bytes, len_bits, len_tms_bits); + + if(len_bytes > 0) + cable_ft2232_read_packed_bits(conn, buf, len_bytes, 8, 0); + + if(len_bits > 0) + cable_ft2232_read_packed_bits(conn, buf, 1, len_bits, (len_bytes * 8)); + + if(len_tms_bits > 0) + cable_ft2232_read_packed_bits(conn, buf, 1, 1, (len_bits + (len_bytes * 8))); + + return 0; +} + + + +/// ---------------------------------------------------------------------------------------------- +/// Advanced Jtag debugger driver interface. +/// ---------------------------------------------------------------------------------------------- + +int cable_ftdi_init() { + int err = APP_ERR_NONE; + int res = 0; + unsigned char *buf = malloc(10); + + ft2232_device = usbconn_ftdi_connect(); + + if((res = usbconn_ftdi_mpsse_open(ft2232_device)) != 0) + err |= APP_ERR_USB; + printf("Open MPSSE mode returned: %s\n", ((res != 0) ? "FAIL" : "OK") ); + + ftdi_param_t *params = ft2232_device->params; + //struct ftdi_context * ftdic = params->ftdic; + + buf[0]= SET_BITS_LOW; + buf[1]= 0x00; + buf[2]= 0x0b; + buf[3]= TCK_DIVISOR; + buf[4]= 0x01; + buf[5]= 0x00; + buf[6]= SET_BITS_HIGH; + buf[7]= ~0x04; + buf[8]= 0x04; + buf[9]= SEND_IMMEDIATE; + if(usbconn_ftdi_write( ft2232_device , buf, 10, 0) != 10) { + err |= APP_ERR_USB; + printf("Initial write failed\n"); + } + + usbconn_ftdi_flush( params ); + + return err; +} + +int cable_ftdi_close() { + usbconn_ftdi_close(ft2232_device); + usbconn_ftdi_free(ft2232_device); + + return APP_ERR_NONE; +} + +int cable_ftdi_flush() { + ftdi_param_t *params = ft2232_device->params; + usbconn_ftdi_flush( params ); + + return APP_ERR_NONE; +} + +int cable_ftdi_write_bit(uint8_t packet) { + int err = APP_ERR_NONE; + unsigned char buf; + int tms; + + buf = ((packet & TDO) ? 0x01 : 0x00); + tms = ((packet & TMS) ? 1 : 0); + + if(cable_ft2232_write_stream(ft2232_device, &buf, 1, 0, tms) < 0) + err |= APP_ERR_COMM; + + cable_ftdi_flush(); + + return err; + +} + +int cable_ftdi_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { + + int err = APP_ERR_NONE; + unsigned char buf; + int tms; + + buf = ((packet_out & TDO) ? 0x01 : 0x00); + tms = ((packet_out & TMS) ? 1 : 0); + + if(cable_ft2232_write_stream(ft2232_device, &buf, 1, 1, tms) < 0) + err = APP_ERR_COMM; + + if(cable_ft2232_read_stream(ft2232_device, ((unsigned char *)bit_in), 1, tms) < 0) + err = APP_ERR_COMM; + + return err; +} + +int cable_ftdi_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { + int err = APP_ERR_NONE; + + if(cable_ft2232_write_stream(ft2232_device, ((unsigned char *)stream), len_bits, 0, set_last_bit) < 0) + err |= APP_ERR_COMM; + + cable_ftdi_flush(); + + return err; +} + +int cable_ftdi_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { + int err = APP_ERR_NONE; + if(cable_ft2232_write_stream(ft2232_device, ((unsigned char *)outstream), len_bits, 1, set_last_bit) < 0) + err |= APP_ERR_COMM; + if(cable_ft2232_read_stream(ft2232_device, ((unsigned char *)instream), len_bits, set_last_bit) < 0) + err |= APP_ERR_COMM; + + return err; +} + +int cable_ftdi_opt(int c, char *str) { + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; +} + +/// ---------------------------------------------------------------------------------------------- + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_ft2232.h (revision 27) @@ -0,0 +1,107 @@ + +#ifndef _CABLE_FT2232_H_ +#define _CABLE_FT2232_H_ + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) +#ifndef min +#define min(X,Y) ((X) < (Y) ? (X) : (Y)) +#endif + +#define FTDX_MAXSEND 4096 +#define FTDX_MAXSEND_MPSSE (64 * 1024) +#define FTDI_MAXRECV ( 4 * 64) + +#define BIT_CABLEID2_TCK 0 /* ADBUS0 */ +#define BIT_CABLEID2_TDIDO 1 /* ADBUS1 */ +#define BIT_CABLEID2_TDODI 2 /* ADBUS2 */ +#define BIT_CABLEID2_TMS 3 /* ADBUS3 */ +#define BITMASK_CABLEID2_TCK (1 << BIT_CABLEID2_TCK) +#define BITMASK_CABLEID2_TDIDO (1 << BIT_CABLEID2_TDIDO) +#define BITMASK_CABLEID2_TDODI (1 << BIT_CABLEID2_TDODI) +#define BITMASK_CABLEID2_TMS (1 << BIT_CABLEID2_TMS) + +#define BIT_CABLEID2_OE 1 /* ACBUS1 */ +#define BIT_CABLEID2_RXLED 2 /* ACBUS2 */ +#define BIT_CABLEID2_TXLED 3 /* ACBUS3 */ +#define BITMASK_CABLEID2_OE (1 << BIT_CABLEID2_OE) +#define BITMASK_CABLEID2_RXLED (1 << BIT_CABLEID2_RXLED) +#define BITMASK_CABLEID2_TXLED (1 << BIT_CABLEID2_TXLED) + +typedef struct usbconn_t usbconn_t; + +typedef struct { + char *name; + char *desc; + char *driver; + int32_t vid; + int32_t pid; +} usbconn_cable_t; + +typedef struct { + const char *type; + usbconn_t *(*connect)( const char **, int, usbconn_cable_t *); + void (*free)( usbconn_t * ); + int (*open)( usbconn_t * ); + int (*close)( usbconn_t * ); + int (*read)( usbconn_t *, uint8_t *, int ); + int (*write)( usbconn_t *, uint8_t *, int, int ); +} usbconn_driver_t; + +struct usbconn_t { + usbconn_driver_t *driver; + void *params; + usbconn_cable_t *cable; +}; + +typedef struct { + /* USB device information */ + unsigned int vid; + unsigned int pid; + struct ftdi_context *ftdic; + char *serial; + /* send and receive buffer handling */ + uint32_t send_buf_len; + uint32_t send_buffered; + uint8_t *send_buf; + uint32_t recv_buf_len; + uint32_t to_recv; + uint32_t recv_write_idx; + uint32_t recv_read_idx; + uint8_t *recv_buf; +} ftdi_param_t; + + +usbconn_t * usbconn_ftdi_connect(); +int my_ftdi_write_data(struct ftdi_context *ftdi, unsigned char *buf, int size); +char *my_ftdi_get_error_string (struct ftdi_context *ftdi); +int my_ftdi_read_data(struct ftdi_context *ftdi, unsigned char *buf, int size); +int my_ftdi_usb_open_desc(struct ftdi_context *ftdi, int vendor, int product, const char* description, const char* serial); +void my_ftdi_deinit(struct ftdi_context *ftdi); +int my_ftdi_usb_purge_buffers(struct ftdi_context *ftdi); +int my_ftdi_usb_purge_rx_buffer(struct ftdi_context *ftdi); +int my_ftdi_usb_purge_tx_buffer(struct ftdi_context *ftdi); +int my_ftdi_usb_reset(struct ftdi_context *ftdi); +int my_ftdi_set_latency_timer(struct ftdi_context *ftdi, unsigned char latency); +int my_ftdi_set_baudrate(struct ftdi_context *ftdi, int baudrate); +int my_ftdi_read_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize); +int my_ftdi_write_data_set_chunksize(struct ftdi_context *ftdi, unsigned int chunksize); +int my_ftdi_set_event_char(struct ftdi_context *ftdi, unsigned char eventch, unsigned char enable); +int my_ftdi_set_error_char(struct ftdi_context *ftdi, unsigned char errorch, unsigned char enable); +int my_ftdi_set_bitmode(struct ftdi_context *ftdi, unsigned char bitmask, unsigned char mode); +int my_ftdi_usb_close(struct ftdi_context *ftdi); +int cable_common_write_bit(uint8_t packet); +int cable_common_read_write_bit(uint8_t packet_out, uint8_t *bit_in); +int cable_common_write_stream(uint32_t *stream, int len_bits, int set_last_bit); +int cable_common_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); +int cable_ftdi_init(); +int cable_ftdi_write_bit(uint8_t packet); +int cable_ftdi_read_write_bit(uint8_t packet_out, uint8_t *bit_in); +int cable_ftdi_write_stream(uint32_t *stream, int len_bits, int set_last_bit); +int cable_ftdi_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); +int cable_ftdi_opt(int c, char *str); +int cable_ftdi_flush(); +int cable_ftdi_close(); + +#endif + + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.c (revision 27) @@ -0,0 +1,669 @@ +/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module. + Copyright(C) Nathan Yawn, nyawn@opencores.net + based on code from jp2 by Marko Mlinar, markom@opencores.org + + This file contains API functions which may be called from the GDB + interface server. These functions call the appropriate hardware- + specific functions for the advanced debug interface or the legacy + debug interface, depending on which is selected. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + + +#include +#include // for mutexes +#include // for ntohl() + +#include "adv_dbg_commands.h" +#include "legacy_dbg_commands.h" +#include "cable_common.h" +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +#define DBG_HW_ADVANCED 1 +#define DBG_HW_LEGACY 2 +#ifdef __LEGACY__ +#warning Compiling for LEGACY debug hardware! +#define DEBUG_HARDWARE DBG_HW_LEGACY +#else +#warning Compiling for ADVANCED debug unit! +#define DEBUG_HARDWARE DBG_HW_ADVANCED +#endif + +pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER; + +/* read a word from wishbone */ +int dbg_wb_read32(unsigned long adr, unsigned long *data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4))) + err = legacy_dbg_go((unsigned char*)data, 4, 1); + *data = ntohl(*data); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +/* write a word to wishbone */ +int dbg_wb_write32(unsigned long adr, unsigned long data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)&data, 4, 1, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + data = ntohl(data); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4))) + err = legacy_dbg_go((unsigned char*)&data, 4, 0); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +// write a word to wishbone +// Never actually called from the GDB interface +int dbg_wb_write16(unsigned long adr, uint16_t data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)&data, 2, 1, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + data = ntohs(data); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2))) + err = legacy_dbg_go((unsigned char*)&data, 2, 0); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +// write a word to wishbone +// Never actually called from the GDB interface +int dbg_wb_write8(unsigned long adr, uint8_t data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)&data, 1, 1, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1))) + err = legacy_dbg_go((unsigned char*)&data, 1, 0); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words. + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + int bytelen = len<<2; + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen))) + if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes + for (i = 0; i < len; i ++) data[i] = ntohl(data[i]); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +// Never actually called from the GDB interface +int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + int bytelen = len<<1; + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen))) + if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes + for (i = 0; i < len; i ++) data[i] = ntohs(data[i]); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +// Never actually called from the GDB interface +int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words... + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len))) + err = legacy_dbg_go((unsigned char*)data, len, 1); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + + +// write a block to wishbone +int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words. + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + int bytelen = len << 2; + for (i = 0; i < len; i ++) data[i] = ntohl(data[i]); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen))) + err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +// write a block to wishbone +// Never actually called from the GDB interface +int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + int bytelen = len<<1; + for (i = 0; i < len; i ++) data[i] = ntohs(data[i]); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen))) + err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +// write a block to wishbone +int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(!len) + return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_WISHBONE))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words... + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len))) + err = legacy_dbg_go((unsigned char*)data, len, 0); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +/* read a register from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */ +int dbg_cpu0_read(unsigned long adr, unsigned long *data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4))) + if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1))) + *data = ntohl(*data); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]); + return err; +} + +/* read multiple registers from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */ +int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + unsigned long readaddr = adr; + err = APP_ERR_NONE; + for(i = 0; i < count; i++) { + err |= dbg_cpu0_read(readaddr++, &data[i]); + } + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]); + return err; +} + +/* write a cpu register to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */ +int dbg_cpu0_write(unsigned long adr, unsigned long data) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)&data, 4, 1, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + data = ntohl(data); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4))) + err = legacy_dbg_go((unsigned char*)&data, 4, 0); + } + debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */ +int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)data, 4, count, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int i; + unsigned long writeaddr = adr; + err = APP_ERR_NONE; + for(i = 0; i < count; i++) { + err |= dbg_cpu0_write(writeaddr++, data[i]); + } + } + debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +/* write a debug unit cpu module register + * Since OR32 debug module has only 1 register, + * adr is ignored (for now) */ +int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) { + int err = APP_ERR_NONE; + uint32_t dataword = data; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) { + printf("Failed to set chain to 0x%X\n", DC_CPU0); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) { + printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0))) + err = legacy_dbg_ctrl(data & 2, data &1); + } + debug("cpu0_write_ctrl(): set reg to 0x%X\n", data); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +/* read a register from cpu module of the debug unit. + * Currently, there is only 1 register, so we do not need to select it, adr is ignored + */ +int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) { + int err = APP_ERR_NONE; + uint32_t dataword; + pthread_mutex_lock(&dbg_access_mutex); + + // reset is bit 1, stall is bit 0 in *data + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) { + printf("Failed to set chain to 0x%X\n", DC_CPU0); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) { + printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + *data = dataword; + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int r, s; + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0))) + err = legacy_dbg_ctrl_read(&r, &s); + *data = (r << 1) | s; + debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + +// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually +// called from the GDB interface. They are included for completeness and future use. +// read a register from cpu1 +int dbg_cpu1_read(unsigned long adr, unsigned long *data) + { + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU1))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4))) + err = legacy_dbg_go((unsigned char*)data, 4, 1); + *data = ntohl(*data); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +// write a cpu register +int dbg_cpu1_write(unsigned long adr, unsigned long data) +{ + int err; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU0))) + { + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + err = adbg_wb_burst_write((void *)&data, 4, 1, adr); + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + data = ntohl(data); + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1))) + if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4))) + err = legacy_dbg_go((unsigned char*)&data, 4, 0); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +// write a debug unit cpu module register +int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) { + int err; + uint32_t dataword = data; + pthread_mutex_lock(&dbg_access_mutex); + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU1))) { + printf("Failed to set chain to 0x%X\n", DC_CPU1); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) { + printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1))) + err = legacy_dbg_ctrl(data & 2, data & 1); + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + +// read a debug unit cpu module register +int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) { + int err; + uint32_t dataword; + pthread_mutex_lock(&dbg_access_mutex); + + // reset is bit 1, stall is bit 0 in *data + + if(DEBUG_HARDWARE == DBG_HW_ADVANCED) + { + if ((err = adbg_select_module(DC_CPU1))) { + printf("Failed to set chain to 0x%X\n", DC_CPU1); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) { + printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS); + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; + } + *data = dataword; + } + else if(DEBUG_HARDWARE == DBG_HW_LEGACY) + { + int r, s; + if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1))) + err = legacy_dbg_ctrl_read(&r, &s); + *data = (r << 1) | s; + } + cable_flush(); + pthread_mutex_unlock(&dbg_access_mutex); + return err; +} + + + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.h (revision 27) @@ -0,0 +1,14 @@ + +#ifndef _CABLE_XPC_DLC9_H_ +#define _CABLE_XPC_DLC9_H_ + +#include + +int cable_xpcusb_init(); +int cable_xpcusb_out(uint8_t value); +int cable_xpcusb_inout(uint8_t value, uint8_t *inval); +int cable_xpcusb_opt(int c, char *str); +int cable_xpcusb_read_write_bit(uint8_t packet_out, uint8_t *bit_in); + + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.c (revision 27) @@ -0,0 +1,487 @@ +/* bsdl_parse.c - BSDL parser for the advanced JTAG bridge + Copyright(C) 2008 Nathan Yawn + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include +#include // isspace(), etc. +#include // malloc(), strtoul(), etc. +#include "bsdl.h" // has constants + + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +char * strtoupper(char *str); +int get_line(char *filedata, int startpos, char **linedata, int filesize); +char * strchr_s(char *str, char *chars); +void parse_opcodes(char *cmdbuf, uint32_t *debug_cmd, uint32_t *user1_cmd, uint32_t *idcode_cmd); + +// We assume that no value will be more than 128 chars +char tmpbuf[128]; + + + ///////////////////////////////////////////////////////////////// + // API call: extract desired info from 1 BSDL fise + +bsdlinfo *parse_extract_values(char *bsdlfilename) +{ + FILE *fd; + int filesize; + bsdlinfo *ret; + char *filedata; + char *linedata; + char *token; + char *last; + char *cmdbuf; + int filepos = 0; + int i,j; + char done,valid,opens; + + int IR_size = -1; + uint8_t found_IR_size = 0; + uint32_t debug_cmd = TAP_CMD_INVALID; + uint32_t user1_cmd = TAP_CMD_INVALID; + uint32_t idcode_cmd = TAP_CMD_INVALID; + uint8_t found_cmds = 0; + uint32_t idcode = 0; + uint32_t idcode_mask = 0xFFFFFFFF; // 'X' is a valid char in an IDCODE, set 0's here for X's. + uint8_t found_idcode = 0; + char *entityname = NULL; + + // Open the file + fd = fopen(bsdlfilename, "r"); + if(fd == NULL) { + printf("ERROR: failed to open BSDL file %s\n", bsdlfilename); + return NULL; + } + + fseek(fd, 0, SEEK_END); + filesize = ftell(fd); + fseek(fd, 0, SEEK_SET); + + filedata = (char *) malloc(filesize); + if(filedata == NULL) { + printf("ERROR: failed to allocate memory for BSDL file %s\n", bsdlfilename); + return NULL; + } + + if(fread(filedata, 1, filesize, fd) < filesize) { // 1 long read will be faster than many short ones + printf("Warning: failed to read entire BSDL file %s\n", bsdlfilename); + } + + fclose(fd); + + + // while there's more data and not all values have been found + while((filepos < filesize) && (!found_IR_size || !found_cmds || !found_idcode)) + { + // Get a line. Replace any "--" with a \0 char + filepos = get_line(filedata, filepos, &linedata, filesize); + + // look for each value + token = strtok_r(linedata, " \t", &last); + if(token == NULL) { + printf("ERROR: End of file reached before END statement is BSDL file \'%s\'\n", bsdlfilename); + break; + } + + if(!strcmp(strtoupper(token), "ENTITY")) { + // Parse an entity line + token = strtok_r(NULL, " \t", &last); + if(token != NULL) { + entityname = (char *) malloc(strlen(token)); + if(entityname != NULL) strcpy(entityname, token); + debug("Found entity \'%s\'\n", entityname); + } else { + printf("Parse error near ENTITY token in file %s\n", bsdlfilename); + } + } + else if(!strcmp(strtoupper(token), "CONSTANT")) { + // Parse a constant declaration...we ignore them, just get lines until we find a ';' char + // assume nothing else useful comes on the line after the ';' + // Slightly awkward, since we have to search the rest of the line after the strtok, then possible + // new lines as well. + token = strtok_r(NULL, " \t", &last); // debug...don't worry about error, token only used in printf + debug("Ignoring constant \'%s\'\n", token); // debug + while(strchr(last, ';') == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + } + else if(!strcmp(strtoupper(token), "GENERIC")) { + // Parse a generic declaration...we ignore them, just get lines until we find a ';' char + // assume nothing else useful comes on the line after the ';' + // Slightly awkward, since we have to search the rest of the line after the strtok, then possible + // new lines as well. + token = strtok_r(NULL, " \t", &last); // debug...don't worry about error, token only used in printf + debug("Ignoring generic \'%s\'\n", token); // debug + while(strchr(last, ';') == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + } + else if(!strcmp(strtoupper(token), "USE")) { + // Parse a 'use' declaration...we ignore them, just get lines until we find a ';' char + // assume nothing else useful comes on the line after the ';' + // Note that there may be no space after the token, so add ';' to the tokenizing list in the debug bits. + // Slightly awkward, since we have to search the rest of the line after the strtok, then possible + // new lines as well. + token = strtok_r(NULL, " \t;", &last); // debug ...don't worry about error, token only used in printf + debug("Ignoring use \'%s\'\n", token); // debug + while(strchr(last, ';') == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + } + else if(!strcmp(strtoupper(token), "END")) { + // We're done, whether we've found what we want or not. Eject eject eject... + debug("Found END token, stopping parser\n"); + break; + } + else if(!strcmp(strtoupper(token), "PORT")) { + // Parse a port list. Find a '(', find a ')', find a ';'. + // Note that "()" pairs may occur in between. + // 'last' must be set in the first two strchr() calls so that the next strchr() call will + // begin parsing after the previous char position. Otherwise, e.g. a ';' before the ')' but on the same + // line would (incorrectly) satisfy the search. + while((last = strchr(last, '(')) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + opens = 1; + last++; // don't leave 'last' pointing at the '(' char, since we're looking for another + + do { + while((last = strchr_s(last, "()")) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** abort if new line is empty + } + if(*last == '(') opens++; + else if(*last == ')') opens--; + last++; // don't leave last pointing at the same "()" char, since we're looking for another + } while(opens); + + + while(strchr(last, ';') == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + debug("Ignored port statement\n"); + } + else if(!strcmp(strtoupper(token), "ATTRIBUTE")) { + // Parse an attribute + token = strtok_r(NULL, " \t", &last); // *** check for error + if(!strcmp(strtoupper(token), "INSTRUCTION_LENGTH")) { + // Find ':', then "entity", then "is", then take anything before the ';' as the value + while((last = strchr(last, ':')) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "is")) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + + // scan until the end of the line looking for data + j = 0; + done = 0; + while(*last != '\0') { + if(isdigit(*last)) tmpbuf[j++] = *last; + else if(*last == ';') { done = 1; break;} + last++; + } + // May need to go to additional lines + while(!done) { + filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data + while(*linedata != '\0') { + if(isdigit(*linedata)) tmpbuf[j++] = *linedata; + else if(*linedata == ';') { done = 1; break;} + linedata++; + } + } + + tmpbuf[j] = '\0'; + IR_size = strtoul(tmpbuf, NULL, 0); + found_IR_size = 1; + debug("Found IR size %i (%s)\n", IR_size, tmpbuf); + } // end if INSTRUCTION_LENGTH + + else if(!strcmp(strtoupper(token), "INSTRUCTION_OPCODE")) { + // Find ": entity is" + while((last = strchr(last, ':')) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "is")) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + + // We're going to copy the entire attribute (all commands) into a temp. buffer. We need a big enough buffer, + // and we can't just scan for ';' to find out because there's a '\0' at the end of this line. + // But, it can't be bigger than the entire rest of the file, so... + cmdbuf = (char *) malloc(filesize-filepos); + // Parse until ';', and grab everything between each pair of "" found + // Note that 'last' still points at "is" + j = 0; + done = 0; + valid = 0; + while(*last != '\0') { + if(*last == ';') { done = 1; break;} // Put this first in case of badly formed BSDL files + else if(valid && (*last != '\"')) cmdbuf[j++] = *last; + else if(*last == '\"') valid = !valid; + last++; + } + // May need to go to additional lines + while(!done) { + filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data + while(*linedata != '\0') { + if(valid && (*linedata != '\"')) cmdbuf[j++] = *linedata; + else if(*linedata == '\"') valid = !valid; + else if(*linedata == ';') { done = 1; break;} + linedata++; + } + } + cmdbuf[j] = '\0'; + + // Parse the opcodes attribute. This is an exercise unto itself, so do it in another function. + parse_opcodes(cmdbuf, &debug_cmd, &user1_cmd, &idcode_cmd); + found_cmds = 1; + free(cmdbuf); + + } // end if INSTRUCTION_OPCODE + + else if(!strcmp(strtoupper(token), "IDCODE_REGISTER")) { + // Find : entity is + while((last = strchr(last, ':')) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "entity")) == NULL) { // don't do strtoupper() here, that would do the entire line + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + while((last = strstr(last, "is")) == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); // *** check last actually has data? + } + + // Parse until ';', and grab everything between each pair of "" found + // Note that 'last' still points at "is" + j = 0; + done = 0; + valid = 0; + while(*last != '\0') { + if(*last == ';') { done = 1; break;} // Put this first in case of badly formed BSDL files + else if(valid && (*last != '\"')) tmpbuf[j++] = *last; + else if(*last == '\"') valid = !valid; + last++; + } + // May need to go to additional lines + while(!done) { + filepos = get_line(filedata, filepos, &linedata, filesize); // *** break if linedata has no data + while(*linedata != '\0') { + if(valid && (*linedata != '\"')) tmpbuf[j++] = *linedata; + else if(*linedata == '\"') valid = !valid; + else if(*linedata == ';') { done = 1; break;} + linedata++; + } + } + tmpbuf[j] = '\0'; + + // Parse the tmpbuf + if(j != 32) printf("Warning: found %i chars (expected 32) while getting IDCODE in BSDL file %s.\n", j, bsdlfilename); // Sanity check + debug("Got IDCODE string \'%s\'\n", tmpbuf); + for(i = 0; i < j; i++) { + if(tmpbuf[i] == '1') idcode |= 0x1<<(31-i); + else if(toupper(tmpbuf[i]) == 'X') idcode_mask &= ~(0x1<<(31-i)); + } + debug("Found IDCODE 0x%08X (%s), mask is 0x%08X\n", idcode, tmpbuf, idcode_mask); + found_idcode = 1; + + } // end if IDCODE_REGISTER + + else { + debug("Ignoring attribute \'%s\'\n", token); + // Consume chars until ';' found + while(strchr(last, ';') == NULL) { + filepos = get_line(filedata, filepos, &last, filesize); + } + } + } + else { + debug("Unknown token \'%s\' found in BSDL file %s\n", token, bsdlfilename); + } + } + + free(filedata); + + // Put the data in a struct for return and storage + ret = (bsdlinfo *) malloc(sizeof(bsdlinfo)); + if(ret == NULL) { + printf("Error: out of memory, unable to store BSDL info for file %s\n", bsdlfilename); + return NULL; + } + + ret->name = entityname; // this was malloc'd, so it's persistant, this is safe + ret->idcode = idcode; + ret->idcode_mask = idcode_mask; + ret->IR_size = IR_size; + ret->cmd_debug = debug_cmd; + ret->cmd_user1 = user1_cmd; + ret->cmd_idcode = idcode_cmd; + ret->next = NULL; + + return ret; +} + + + +////////////////////////////////////////////////////////////////////////////////////////////// +// Local / helper functions + + +// Returns 1 line from a complete file buffer pointed to by *filedata. Removes leading +// whitespace, ignores comment lines, removes trailing comments (comments denoted by "--") +// startpos: index in filedata[] to start looking for a new line. +// linedata: set to point to the first char of the new line. +// filesize: used so we don't go past the end of filedata[] +// The return value is the first index after the returned line. This may be 1 past the end of the buffer. +int get_line(char *filedata, int startpos, char **linedata, int filesize) +{ + int lineidx = startpos; + unsigned char loop; + char *commentptr; + + do { + loop = 0; + while(isspace(filedata[lineidx]) && (lineidx < filesize)) lineidx++; // burn leading whitespace chars + + if(lineidx >= (filesize-1)) { // We look at the data at lineidx and lineidx+1...don't look at invalid offsets. + lineidx = filesize-1; + break; + } + + if((filedata[lineidx] == '-') && (filedata[lineidx+1] == '-')) + { // then this is a full-line comment, with no useful data + while(((filedata[lineidx] != '\n') && (filedata[lineidx] != '\r')) && (lineidx < filesize)) + lineidx++; // burn comment line up to CR/LF + loop = 1; + } + } while(loop); + + // Set the line pointer + *linedata = &filedata[lineidx]; + + // Put a NULL char at the newline + while(!iscntrl(filedata[lineidx]) && (lineidx < filesize)) lineidx++; + if(lineidx >= filesize) { // Don't write past the end of the array. + lineidx = filesize-1; + } + filedata[lineidx] = '\0'; + + // Put a NULL at the first "--" string, if any + commentptr = strstr(*linedata, "--"); + if(commentptr != NULL) *commentptr = '\0'; + + return lineidx+1; +} + + +// In-place string capitalizer +char * strtoupper(char *str) +{ + int i = 0; + + while(str[i] != '\0') { + str[i] = toupper(str[i]); + i++; + } + + return str; +} + +// Searches a string 'str' for the first occurance of any +// character in the string 'chars'. Returns a pointer to +// the char in 'str' if one is found, returns NULL if +// none of the chars in 'chars' are present in 'str'. +char * strchr_s(char *str, char *chars) +{ + int slen = strlen(chars); + char *ptr = str; + int i; + + while(*ptr != '\0') { + for(i = 0; i < slen; i++) { + if(*ptr == chars[i]) + return ptr; + } + ptr++; + } + + return NULL; +} + + +// Parses a string with command name / opcode pairs of the format +// EXTEST (1111000000),SAMPLE (1111000001), [...] +// There may or may not be a space between the name and the open paren. +// We do not assume a comma after the last close paren. +#define TARGET_DEBUG 1 +#define TARGET_USER1 2 +#define TARGET_IDCODE 3 +void parse_opcodes(char *cmdbuf, uint32_t *debug_cmd, uint32_t *user1_cmd, uint32_t *idcode_cmd) +{ + char *saveptr = NULL; + char *cmd; + char *token; + char *saveptr2; + int target; + int opcode; + + cmd = strtok_r(cmdbuf, ",", &saveptr); + while(cmd != NULL) + { + // 'cmd' should now have one pair in the form "EXTEST (1111000000)" + target = 0; + token = strtok_r(cmd, " \t(", &saveptr2); + if(!strcmp(strtoupper(token), "DEBUG")) { + target = TARGET_DEBUG; + debug("Found DEBUG opcode: "); + } + else if(!strcmp(strtoupper(token), "USER1")) { + target = TARGET_USER1; + debug("Found USER1 opcode:"); + } + else if(!strcmp(strtoupper(token), "IDCODE")) { + target = TARGET_IDCODE; + debug("Found IDCODE opcode: "); + } + + if(target) { // don't parse opcode number unless necessary + token = strtok_r(NULL, " \t()", &saveptr2); + if(token != NULL) { + opcode = strtoul(token, NULL, 2); // *** Test for errors + debug("0x%X (%s)\n", opcode, token); + + if(target == TARGET_DEBUG) *debug_cmd = opcode; + else if(target == TARGET_USER1) *user1_cmd = opcode; + else if(target == TARGET_IDCODE) *idcode_cmd = opcode; + } + else { + printf("Error: failed to find opcode value after identifier.\n"); + } + } + + cmd = strtok_r(NULL, ",", &saveptr); + } + + +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_parallel.h (revision 27) @@ -0,0 +1,19 @@ + +#ifndef _CABLE_PARALLEL_H_ +#define _CABLE_PARALLEL_H_ + +#include + +int cable_parallel_init(); +int cable_parallel_opt(int c, char *str); +void cable_parallel_phys_wait(); + +int cable_xpc3_inout(uint8_t value, uint8_t *inval); +int cable_xpc3_out(uint8_t value); + +int cable_xess_inout(uint8_t value, uint8_t *inval); +int cable_xess_out(uint8_t value); + + + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.c (revision 27) @@ -0,0 +1,532 @@ +/* adv_jtag_bridge.c -- JTAG protocol bridge between GDB and Advanced debug module. + Copyright(C) 2001 Marko Mlinar, markom@opencores.org + Code for TCP/IP copied from gdb, by Chris Ziomkowski + Refactoring by Nathan Yawn, nyawn@opencores.org + + This file was part of the OpenRISC 1000 Architectural Simulator. + It is now also used to connect GDB to a running hardware OpenCores / OR1200 + advanced debug unit. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* Establishes jtag proxy server and communicates with parallel + port directly. Requires root access. */ + +#include +#include // for exit(), atoi(), strtoul() +#include +#include +#include // for strstr() +#include + + +#include "adv_jtag_bridge.h" +#include "rsp-server.h" +#include "chain_commands.h" +#include "cable_common.h" +#include "or32_selftest.h" +#include "bsdl.h" +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +// How many command-line IR length settings to create by default +#define IR_START_SETS 16 + +////////////////////////////////////////////////// +// Command line option flags / values + +/* Which device in the scan chain we want to target. + * 0 is the first device we find, which is nearest the data input of the cable. + */ +unsigned int target_dev_pos = 0; + +// Do test before setting up server? +unsigned char do_selftest = 0; + +// IR register length in TAP of +// Can override autoprobe, or set if IDCODE not supported +typedef struct { + int dev_index; + int ir_length; +} irset; + +#define START_IR_SETS 16 +int reallocs = 0; +int num_ir_sets = 0; +irset * cmd_line_ir_sizes = NULL; + +// DEBUG command for target device TAP +// May actually be USER1, for Xilinx devices using internal BSCAN modules +// Can override autoprobe, or set if unable to find in BSDL files +int cmd_line_cmd_debug = -1; // 0 is a valid debug command, so use -1 + +// TCP port to set up the server for GDB on +char *port; +char default_port[] = "9999"; + +// Force altera virtual jtag mode on(1) or off(-1) +int force_alt_vjtag = 0; + + +// Pointer to the command line arg used as the cable name +char * cable_name = NULL; + +//////////////////////////////////////////////////////// +// List of IDCODES of devices on the JTAG scan chain +// The array is dynamically allocated in chain_commands/jtag_enumerate_chain() + +uint32_t *idcodes = NULL; +int num_devices = 0; + + +const char *name_not_found = "(unknown)"; + +/////////////////////////////////////////////////////////// +// JTAG constants + +// Defines for Altera JTAG constants +#define ALTERA_MANUFACTURER_ID 0x6E + +// Defines for Xilinx JTAG constants +#define XILINX_MANUFACTURER_ID 0x49 + + +/////////////////////////////////////////////////// +// Prototypes for local / helper functions +int get_IR_size(int devidx); +uint32_t get_debug_cmd(int devidx); +void configure_chain(void); +void print_usage(char *func); +void parse_args(int argc, char **argv); +void get_ir_opts(char *optstr, int *idx, int *val); + + +////////////////////////////////////////////////////////////////////////////////////// +/*----------------------------------------------------------------------------------*/ +// Functions +///////////////////////////////////////////////////////////////////////////////////// + +// Resets JTAG, and sets up DEBUG scan chain +void configure_chain(void) +{ + int i; + unsigned int manuf_id; + uint32_t cmd; + const char *name; + int irlen; + int err = APP_ERR_NONE; + + err |= tap_reset(); + err |= jtag_enumerate_chain(&idcodes, &num_devices); + + if(err != APP_ERR_NONE) { + printf("Error %s enumerating JTAG chain, aborting.\n", get_err_string(err)); + exit(1); + } + + printf("\nDevices on JTAG chain:\n"); + printf("Index\tName\t\tID Code\t\tIR Length\n"); + printf("----------------------------------------------------------------\n"); + for(i = 0; i < num_devices; i++) + { + if(idcodes[i] != IDCODE_INVALID) { + name = bsdl_get_name(idcodes[i]); + irlen = bsdl_get_IR_size(idcodes[i]); + if(name == NULL) + name = name_not_found; + } else { + name = name_not_found; + irlen = -1; + } + printf("%d: \t%s \t0x%08X \t%d\n", i, name, idcodes[i], irlen); + } + printf("\n"); + +#ifdef __LEGACY__ +// The legacy debug interface cannot support multi-device chains. If there is more than +// one device on this chain, pull the cord. +if(num_devices > 1) { + fprintf(stderr, "\n*** ERROR: The legacy debug hardware cannot support JTAG chains with\n"); + fprintf(stderr, "*** more than one device. Reconnect the JTAG cable to ONLY the legacy\n"); + fprintf(stderr, "*** debug unit, or change your SoC to use the Advanced Debug Unit.\n"); + exit(0); +} +#endif + + + if(target_dev_pos >= num_devices) { + printf("ERROR: Requested target device (%i) beyond highest device index (%i).\n", target_dev_pos, num_devices-1); + exit(1); + } else { + printf("Target device %i, JTAG ID = 0x%08x\n", target_dev_pos, idcodes[target_dev_pos]); + } + + manuf_id = (idcodes[target_dev_pos] >> 1) & 0x7FF; + + // Use BSDL files to determine prefix bits, postfix bits, debug command, IR length + config_set_IR_size(get_IR_size(target_dev_pos)); + + // Set the IR prefix / postfix bits + int total = 0; + for(i = 0; i < num_devices; i++) { + if(i == target_dev_pos) { + config_set_IR_postfix_bits(total); + //debug("Postfix bits: %d\n", total); + total = 0; + continue; + } + + total += get_IR_size(i); + debug("Adding %i to total for devidx %i\n", get_IR_size(i), i); + } + config_set_IR_prefix_bits(total); + debug("Prefix bits: %d\n", total); + + + // Note that there's a little translation here, since device index 0 is actually closest to the cable data input + config_set_DR_prefix_bits(num_devices - target_dev_pos - 1); // number of devices between cable data out and target device + config_set_DR_postfix_bits(target_dev_pos); // number of devices between target device and cable data in + + // Set the DEBUG command for the IR of the target device. + // If this is a Xilinx device, use USER1 instead of DEBUG + // If we Altera Virtual JTAG mode, we don't care. + if((force_alt_vjtag == -1) || ((force_alt_vjtag == 0) && (manuf_id != ALTERA_MANUFACTURER_ID))) { + cmd = get_debug_cmd(target_dev_pos); + if(cmd == TAP_CMD_INVALID) { + printf("Unable to find DEBUG command, aborting.\n"); + exit(1); + } + config_set_debug_cmd(cmd); // This may have to be USER1 if this is a Xilinx device + } + + // Enable the kludge for Xilinx BSCAN, if necessary. + // Safe, but slower, for non-BSCAN TAPs. + if(manuf_id == XILINX_MANUFACTURER_ID) { + config_set_xilinx_bscan(1); + } + + // Set Altera Virtual JTAG mode on or off. If not forced, then enable + // if the target device has an Altera manufacturer IDCODE + if(force_alt_vjtag == 1) { + config_set_alt_vjtag(1); + } else if(force_alt_vjtag == -1) { + config_set_alt_vjtag(0); + } else { + if(manuf_id == ALTERA_MANUFACTURER_ID) { + config_set_alt_vjtag(1); + } else { + config_set_alt_vjtag(0); + } + } + + // Do a sanity test + cmd = bsdl_get_idcode_cmd(idcodes[target_dev_pos]); + if(cmd != TAP_CMD_INVALID) { + uint32_t id_read; + err |= jtag_get_idcode(cmd, &id_read); + + if(err != APP_ERR_NONE) { + printf("Error %s checking IDCODE, aborting.\n", get_err_string(err)); + exit(1); + } + + if(id_read == idcodes[target_dev_pos]) { + printf("IDCODE sanity test passed, chain OK!\n"); + } else { + printf("Warning: IDCODE sanity test failed. Read IDCODE 0x%08X, expected 0x%08X\n", id_read, idcodes[target_dev_pos]); + } + } + + if(err |= tap_enable_debug_module()) { // Select the debug unit in the TAP. + printf("Error %s enabling debug module, aborting.\n", get_err_string(err)); + exit(1); + } +} + + +void print_usage(char *func) +{ + printf("JTAG connection between GDB and the SoC debug interface.\n"); +#ifdef __LEGACY__ + printf("Compiled with support for the Legacy debug unit (debug_if).\n"); +#else + printf("Compiled with support for the Advanced Debug Interface (adv_dbg_if).\n"); +#endif + printf("Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org\n\n"); + printf("Usage: %s (options) [cable] (cable options)\n", func); + printf("Options:\n"); + printf("\t-g [port] : port number for GDB (default: 9999)\n"); + printf("\t-x [index] : Position of the target device in the scan chain\n"); + printf("\t-a [0 / 1] : force Altera virtual JTAG mode off (0) or on (1)\n"); + printf("\t-l [:] : Specify length of IR register for device\n"); + printf("\t , override autodetect (if any)\n"); + printf("\t-c [hex cmd] : Debug command for target TAP, override autodetect\n"); + printf("\t (ignored for Altera targets)\n"); + printf("\t-v [hex cmd] : VIR command for target TAP, override autodetect\n"); + printf("\t (Altera virtual JTAG targets only)\n"); + printf("\t-r [hex cmd] : VDR for target TAP, override autodetect\n"); + printf("\t (Altera virtual JTAG targets only)\n"); + printf("\t-b [dirname] : Add a directory to search for BSDL files\n"); + printf("\t-t : perform CPU / memory self-test before starting server\n"); + printf("\t-h : show help\n\n"); + cable_print_help(); +} + + +void parse_args(int argc, char **argv) +{ + int c; + int i; + int idx, val; + const char *valid_cable_args = NULL; + port = NULL; + force_alt_vjtag = 0; + cmd_line_cmd_debug = -1; + + /* Parse the global arguments (if-any) */ + while((c = getopt(argc, argv, "+g:x:a:l:c:v:r:b:th")) != -1) { + switch(c) { + case 'h': + print_usage(argv[0]); + exit(0); + break; + case 'g': + port = optarg; + break; + case 'x': + target_dev_pos = atoi(optarg); + break; + case 'l': + get_ir_opts(optarg, &idx, &val); // parse the option + if(num_ir_sets >= (IR_START_SETS< 0) && (retval != cmd_line_ir_sizes[i].ir_length)) + printf("Warning: overriding autoprobed IR length (%i) with command line value (%i) for device %i\n", retval, + cmd_line_ir_sizes[i].ir_length, devidx); + retval = cmd_line_ir_sizes[i].ir_length; + } + } + + if(retval < 0) { // Make sure we have a value + printf("ERROR! Unable to autoprobe IR length for device index %i; Must set IR size on command line. Aborting.\n", devidx); + exit(1); + } + + return retval; +} + + +uint32_t get_debug_cmd(int devidx) +{ + int retval = TAP_CMD_INVALID; + uint32_t manuf_id = (idcodes[devidx] >> 1) & 0x7FF; + + if(idcodes[devidx] != IDCODE_INVALID) { + if(manuf_id == XILINX_MANUFACTURER_ID) { + retval = bsdl_get_user1_cmd(idcodes[devidx]); + if(cmd_line_cmd_debug < 0) printf("Xilinx IDCODE, assuming internal BSCAN mode\n\t(using USER1 instead of DEBUG TAP command)\n"); + } else { + retval = bsdl_get_debug_cmd(idcodes[devidx]); + } + } + + if(cmd_line_cmd_debug >= 0) { + if(retval != TAP_CMD_INVALID) { + printf("Warning: overriding autoprobe debug command (0x%X) with command line value (0x%X)\n", retval, cmd_line_cmd_debug); + } else { + printf("Using command-line debug command 0x%X\n", cmd_line_cmd_debug); + } + retval = cmd_line_cmd_debug; + } + + if(retval == TAP_CMD_INVALID) { + printf("ERROR! Unable to find DEBUG command for device index %i, device ID 0x%0X\n", devidx, idcodes[devidx]); + } + + return retval; +} + + +// Extracts two values from an option string +// of the form ":", where both args +// are in base 10 +void get_ir_opts(char *optstr, int *idx, int *val) +{ + char *ptr; + + ptr = strstr(optstr, ":"); + if(ptr == NULL) { + printf("Error: badly formatted IR length option. Use format \':\', without spaces, where both args are in base 10\n"); + exit(1); + } + + *ptr = '\0'; + ptr++; // This now points to the second (value) arg string + + *idx = strtoul(optstr, NULL, 10); + *val = strtoul(ptr, NULL, 10); + // ***CHECK FOR SUCCESS +} + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.c (revision 27) @@ -0,0 +1,633 @@ +/* or32_selftest.c -- JTAG protocol bridge between GDB and Advanced debug module. + Copyright(C) 2001 Marko Mlinar, markom@opencores.org + Code for TCP/IP copied from gdb, by Chris Ziomkowski + Refactoring and USB support by Nathan Yawn + + This file contains functions which perform high-level transactions + on a JTAG chain and debug unit, such as setting a value in the TAP IR + or doing a burst write through the wishbone module of the debug unit. + It uses the protocol for the Advanced Debug Interface (adv_dbg_if). + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + +#include +#include // for exit() + +#include "or32_selftest.h" +#include "dbg_api.h" +#include "errcodes.h" + + +// Define your system parameters here +//#define HAS_CPU1 // stall cpu1 (as well as cpu0) +//#define HAS_MEMORY_CONTROLLER // init the SDRAM controller +#define MC_BASE_ADDR 0x93000000 +#define SDRAM_BASE 0x00000000 +//#define SDRAM_SIZE 0x04000000 +#define SDRAM_SIZE 0x400 +#define SRAM_BASE 0x00000000 +#define SRAM_SIZE 0x04000000 +#define FLASH_BASE_ADDR 0xf0000000 + +// Define the tests to be performed here +#define TEST_SRAM +//#define TEST_SDRAM +#define TEST_OR1K +//#define TEST_8051 // run a test on an 8051 on CPU1 + + +// Defines which depend on user-defined values, don't change these +#define FLASH_BAR_VAL FLASH_BASE_ADDR +#define SDRAM_BASE_ADDR SDRAM_BASE +#define SDRAM_BAR_VAL SDRAM_BASE_ADDR +#define SDRAM_AMR_VAL (~(SDRAM_SIZE -1)) + +#define CHECK(x) check(__FILE__, __LINE__, (x)) +void check(char *fn, int l, int i); + +void check(char *fn, int l, int i) { + if (i != 0) { + fprintf(stderr, "%s:%d: Jtag error %d occured; exiting.\n", fn, l, i); + exit(1); + } +} + + +//////////////////////////////////////////////////////////// +// Self-test functions +/////////////////////////////////////////////////////////// +int dbg_test() +{ + int success; + + success = stall_cpus(); + if(success == APP_ERR_NONE) { + +#ifdef HAS_MEMORY_CONTROLLER + // Init the memory contloller + init_mc(); + // Init the SRAM addresses in the MC + init_sram(); +#endif + + + +#ifdef TEST_SDRAM + success |= test_sdram(); + success |= test_sdram_2(); +#endif + +#ifdef TEST_SRAM + success |= test_sram(); +#endif + +#ifdef TEST_OR1K + success |= test_or1k_cpu0(); +#endif + +#if ((defined TEST_8051) && (defined HAS_CPU1)) + success |= test_8051_cpu1(); +#endif + + return success; + } + + return APP_ERR_TEST_FAIL; +} + + +int stall_cpus(void) +{ + unsigned char stalled; + +#ifdef HAS_CPU1 + printf("Stall 8051 - "); + CHECK(dbg_cpu1_write_reg(0, 0x01)); // stall 8051 +#endif + + printf("Stall or1k - "); + CHECK(dbg_cpu0_write_ctrl(0, 0x01)); // stall or1k + + +#ifdef HAS_CPU1 + CHECK(dbg_cpu1_read_ctrl(0, &stalled)); + if (!(stalled & 0x1)) { + printf("8051 is not stalled!\n"); // check stall 8051 + return APP_ERR_TEST_FAIL; + } +#endif + + CHECK(dbg_cpu0_read_ctrl(0, &stalled)); + if (!(stalled & 0x1)) { + printf("or1k is not stalled!\n"); // check stall or1k + return APP_ERR_TEST_FAIL; + } + + printf("CPU(s) stalled.\n"); + + return APP_ERR_NONE; +} + + +void init_mc(void) +{ + unsigned long insn; + + printf("Initialize Memory Controller (SDRAM)\n"); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_0, FLASH_BAR_VAL & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_0, FLASH_AMR_VAL & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_WTR_0, FLASH_WTR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RTR_0, FLASH_RTR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x40000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_4, SDRAM_BAR_VAL & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_4, SDRAM_AMR_VAL & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_4, 0x00bf0005)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RATR, SDRAM_RATR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RCDR, SDRAM_RCDR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RCTR, SDRAM_RCTR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_REFCTR, SDRAM_REFCTR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_PTR, SDRAM_PTR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RRDR, SDRAM_RRDR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_RIR, SDRAM_RIR_VAL)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x5e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x5e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x6e000000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_OSR, 0x7e000033)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_ORR, 0x7e000033)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_4, 0xc0bf0005)); + + CHECK(dbg_wb_read32(MC_BASE_ADDR+MC_CCR_4, &insn)); + printf("expected %x, read %lx\n", 0xc0bf0005, insn); +} + + +void init_sram(void) +{ + // SRAM initialized to 0x40000000 + printf("Initialize Memory Controller (SRAM)\n"); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_BAR_1, SRAM_BASE & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_AMR_1, ~(SRAM_SIZE - 1) & 0xffff0000)); + CHECK(dbg_wb_write32(MC_BASE_ADDR + MC_CCR_1, 0xc020001f)); +} + + + +int test_sdram(void) +{ + unsigned long insn; + unsigned long i; + unsigned long data4_out[0x08]; + unsigned long data4_in[0x08]; + unsigned short data2_out[0x10]; + unsigned short data2_in[0x10]; + unsigned char data1_out[0x20]; + unsigned char data1_in[0x20]; + + printf("Start SDRAM WR\n"); + for (i=0x10; i<(SDRAM_SIZE+SDRAM_BASE); i=i<<1) { + //printf("0x%x: 0x%x\n", SDRAM_BASE+i, i); + CHECK(dbg_wb_write32(SDRAM_BASE+i, i)); + } + + printf("Start SDRAM RD\n"); + for (i=0x10; i<(SDRAM_SIZE+SDRAM_BASE); i=i<<1) { + CHECK(dbg_wb_read32(SDRAM_BASE+i, &insn)); + //printf("0x%x: 0x%x\n", SDRAM_BASE+i, insn); + if (i != insn) { + printf("SDRAM test FAIL\n"); + return APP_ERR_TEST_FAIL; + } + } + + printf("32-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + for (i=0; i<(0x20/4); i++) { + data4_out[i] = data4_in[i] = ((4*i+3)<<24) | ((4*i+2)<<16) | ((4*i+1)<<8) | (4*i); + //printf("data_out = %0x\n", data4_out[i]); + } + + //printf("Press a key for write\n"); getchar(); + CHECK(dbg_wb_write_block32(SDRAM_BASE, &data4_out[0], 0x20)); + + // 32-bit block read is used for checking + printf("32-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + CHECK(dbg_wb_read_block32(SDRAM_BASE, &data4_out[0], 0x20)); + for (i=0; i<(0x20/4); i++) { + //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); + if (data4_in[i] != data4_out[i]) { + printf("SDRAM data differs. Expected: 0x%0lx, read: 0x%0lx\n", data4_in[i], data4_out[i]); + return APP_ERR_TEST_FAIL; + } + } + + + printf("16-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + for (i=0; i<(0x20/2); i++) { + data2_out[i] = data2_in[i] = ((4*i+1)<<8) | (4*i); + //printf("data_out = %0x\n", data_out[i]); + } + CHECK(dbg_wb_write_block16(SDRAM_BASE, &data2_out[0], 0x20)); + + // 16-bit block read is used for checking + printf("16-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + CHECK(dbg_wb_read_block16(SDRAM_BASE, &data2_out[0], 0x20)); + for (i=0; i<(0x20/2); i++) { + //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); + if (data2_in[i] != data2_out[i]) { + printf("SDRAM data differs. Expected: 0x%0x, read: 0x%0x\n", data2_in[i], data2_out[i]); + return APP_ERR_TEST_FAIL; + } + } + + printf("8-bit block write from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + for (i=0; i<(0x20/1); i++) { + data1_out[i] = data1_in[i] = (4*i); + //printf("data_out = %0x\n", data_out[i]); + } + CHECK(dbg_wb_write_block8(SDRAM_BASE, &data1_out[0], 0x20)); + + // 32-bit block read is used for checking + printf("8-bit block read from %x to %x\n", SDRAM_BASE, SDRAM_BASE + 0x20); + CHECK(dbg_wb_read_block8(SDRAM_BASE, &data1_out[0], 0x20)); + for (i=0; i<(0x20/1); i++) { + //printf("0x%x: 0x%x\n", SDRAM_BASE+(i*4), data_out[i]); + if (data1_in[i] != data1_out[i]) { + printf("SDRAM data differs. Expected: 0x%0x, read: 0x%0x\n", data1_in[i], data1_out[i]); + return APP_ERR_TEST_FAIL; + } + } + + printf("SDRAM OK!\n"); + return APP_ERR_NONE; +} + + +int test_sdram_2(void) +{ + unsigned long insn; + + printf("SDRAM test 2: \n"); + CHECK(dbg_wb_write32(SDRAM_BASE+0x00, 0x12345678)); + CHECK(dbg_wb_read32(SDRAM_BASE+0x00, &insn)); + printf("expected %x, read %lx\n", 0x12345678, insn); + if (insn != 0x12345678) return APP_ERR_TEST_FAIL; + + CHECK(dbg_wb_write32(SDRAM_BASE+0x0000, 0x11112222)); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0000, &insn)); + printf("expected %x, read %lx\n", 0x11112222, insn); + if (insn != 0x11112222) return APP_ERR_TEST_FAIL; + + CHECK(dbg_wb_write32(SDRAM_BASE+0x0004, 0x33334444)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x0008, 0x55556666)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x000c, 0x77778888)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x0010, 0x9999aaaa)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x0014, 0xbbbbcccc)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x0018, 0xddddeeee)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x001c, 0xffff0000)); + CHECK(dbg_wb_write32(SDRAM_BASE+0x0020, 0xdeadbeef)); + + CHECK(dbg_wb_read32(SDRAM_BASE+0x0000, &insn)); + printf("expected %x, read %lx\n", 0x11112222, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0004, &insn)); + printf("expected %x, read %lx\n", 0x33334444, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0008, &insn)); + printf("expected %x, read %lx\n", 0x55556666, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x000c, &insn)); + printf("expected %x, read %lx\n", 0x77778888, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0010, &insn)); + printf("expected %x, read %lx\n", 0x9999aaaa, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0014, &insn)); + printf("expected %x, read %lx\n", 0xbbbbcccc, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0018, &insn)); + printf("expected %x, read %lx\n", 0xddddeeee, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x001c, &insn)); + printf("expected %x, read %lx\n", 0xffff0000, insn); + CHECK(dbg_wb_read32(SDRAM_BASE+0x0020, &insn)); + printf("expected %x, read %lx\n", 0xdeadbeef, insn); + + if (insn != 0xdeadbeef) { + printf("SDRAM test 2 FAILED\n"); + return APP_ERR_TEST_FAIL; + } + else + printf("SDRAM test 2 passed\n"); + + return APP_ERR_NONE; +} + + +int test_sram(void) +{ + //unsigned long insn; + unsigned long ins; + unsigned long insn[9]; + insn[0] = 0x11112222; + insn[1] = 0x33334444; + insn[2] = 0x55556666; + insn[3] = 0x77778888; + insn[4] = 0x9999aaaa; + insn[5] = 0xbbbbcccc; + insn[6] = 0xddddeeee; + insn[7] = 0xffff0000; + insn[8] = 0xdedababa; + + printf("SRAM test: \n"); + //dbg_wb_write_block32(0x0, insn, 9); + + CHECK(dbg_wb_write32(SRAM_BASE+0x0000, 0x11112222)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0004, 0x33334444)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0008, 0x55556666)); + CHECK(dbg_wb_write32(SRAM_BASE+0x000c, 0x77778888)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0010, 0x9999aaaa)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0014, 0xbbbbcccc)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0018, 0xddddeeee)); + CHECK(dbg_wb_write32(SRAM_BASE+0x001c, 0xffff0000)); + CHECK(dbg_wb_write32(SRAM_BASE+0x0020, 0xdedababa)); + + + CHECK(dbg_wb_read32(SRAM_BASE+0x0000, &ins)); + printf("expected %x, read %lx\n", 0x11112222, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0004, &ins)); + printf("expected %x, read %lx\n", 0x33334444, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0008, &ins)); + printf("expected %x, read %lx\n", 0x55556666, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x000c, &ins)); + printf("expected %x, read %lx\n", 0x77778888, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0010, &ins)); + printf("expected %x, read %lx\n", 0x9999aaaa, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0014, &ins)); + printf("expected %x, read %lx\n", 0xbbbbcccc, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0018, &ins)); + printf("expected %x, read %lx\n", 0xddddeeee, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x001c, &ins)); + printf("expected %x, read %lx\n", 0xffff0000, ins); + CHECK(dbg_wb_read32(SRAM_BASE+0x0020, &ins)); + printf("expected %x, read %lx\n", 0xdedababa, ins); + + if (ins != 0xdedababa) { + printf("SRAM test failed!!!\n"); + return APP_ERR_TEST_FAIL; + } + else + printf("SRAM test passed\n"); + + return APP_ERR_NONE; +} + + + +int test_or1k_cpu0(void) +{ + unsigned long npc, ppc, r1, insn; + unsigned char stalled; + unsigned long result; + int i; + + printf("Testing CPU0 (or1k) - writing instructions\n"); + CHECK(dbg_wb_write32(SDRAM_BASE+0x00, 0xe0000005)); /* l.xor r0,r0,r0 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x04, 0x9c200000)); /* l.addi r1,r0,0x0 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x08, 0x18400000)); /* l.movhi r2,0x4000 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x0c, 0xa8420030)); /* l.ori r2,r2,0x30 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x10, 0x9c210001)); /* l.addi r1,r1,1 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x14, 0x9c210001)); /* l.addi r1,r1,1 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x18, 0xd4020800)); /* l.sw 0(r2),r1 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x1c, 0x9c210001)); /* l.addi r1,r1,1 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x20, 0x84620000)); /* l.lwz r3,0(r2) */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x24, 0x03fffffb)); /* l.j loop2 */ + CHECK(dbg_wb_write32(SDRAM_BASE+0x28, 0xe0211800)); /* l.add r1,r1,r3 */ + + printf("Setting up CPU0\n"); + CHECK(dbg_cpu0_write((0 << 11) + 17, 0x01)); /* Enable exceptions */ + CHECK(dbg_cpu0_write((6 << 11) + 20, 0x2000)); /* Trap causes stall */ + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE)); /* Set PC */ + CHECK(dbg_cpu0_write((6 << 11) + 16, 1 << 22)); /* Set step bit */ + printf("Starting CPU0!\n"); + for(i = 0; i < 11; i++) { + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* 11x Unstall */ + //printf("Starting CPU, waiting for trap...\n"); + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + //printf("Got trap.\n"); + } + + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 5); + result = npc + ppc + r1; + + CHECK(dbg_cpu0_write((6 << 11) + 16, 0)); // Reset step bit + CHECK(dbg_wb_read32(SDRAM_BASE + 0x28, &insn)); // Set trap insn in delay slot + CHECK(dbg_wb_write32(SDRAM_BASE + 0x28, 0x21000001)); + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); // Unstall + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); // Read NPC + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); // Read PPC + CHECK(dbg_cpu0_read(0x401, &r1)); // Read R1 + CHECK(dbg_wb_write32(SDRAM_BASE + 0x28, insn)); // Set back original insn + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 8); + result = npc + ppc + r1 + result; + + CHECK(dbg_wb_read32(SDRAM_BASE + 0x24, &insn)); // Set trap insn in place of branch insn + CHECK(dbg_wb_write32(SDRAM_BASE + 0x24, 0x21000001)); + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x10)); // Set PC + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); // Unstall + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); // Read NPC + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); // Read PPC + CHECK(dbg_cpu0_read(0x401, &r1)); // Read R1 + CHECK(dbg_wb_write32(SDRAM_BASE + 0x24, insn)); // Set back original insn + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000028, 0x00000024, 11); + result = npc + ppc + r1 + result; + + CHECK(dbg_wb_read32(SDRAM_BASE + 0x20, &insn)); /* Set trap insn before branch insn */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, 0x21000001)); + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x24)); /* Set PC */ + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, insn)); /* Set back original insn */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000024, 0x00000020, 24); + result = npc + ppc + r1 + result; + + CHECK(dbg_wb_read32(SDRAM_BASE + 0x1c, &insn)); /* Set trap insn behind lsu insn */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x1c, 0x21000001)); + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x20)); /* Set PC */ + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x1c, insn)); /* Set back original insn */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000020, 0x0000001c, 49); + result = npc + ppc + r1 + result; + + CHECK(dbg_wb_read32(SDRAM_BASE + 0x20, &insn)); /* Set trap insn very near previous one */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, 0x21000001)); + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x1c)); /* Set PC */ + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x20, insn)); /* Set back original insn */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000024, 0x00000020, 50); + result = npc + ppc + r1 + result; + + CHECK(dbg_wb_read32(SDRAM_BASE + 0x10, &insn)); /* Set trap insn to the start */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x10, 0x21000001)); + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x20) /* Set PC */); + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + CHECK(dbg_wb_write32(SDRAM_BASE + 0x10, insn)); /* Set back original insn */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000014, 0x00000010, 99); + result = npc + ppc + r1 + result; + + CHECK(dbg_cpu0_write((6 << 11) + 16, 1 << 22)); /* Set step bit */ + for(i = 0; i < 5; i++) { + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + //printf("Waiting for trap..."); + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + //printf("got trap.\n"); + } + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000028, 0x00000024, 101); + result = npc + ppc + r1 + result; + + CHECK(dbg_cpu0_write((0 << 11) + 16, SDRAM_BASE + 0x24)); /* Set PC */ + for(i = 0; i < 2; i++) { + CHECK(dbg_cpu0_write_ctrl(CPU_OP_ADR, 0x00)); /* Unstall */ + //printf("Waiting for trap...\n"); + do CHECK(dbg_cpu0_read_ctrl(CPU_OP_ADR, &stalled)); while (!(stalled & 1)); + //printf("Got trap.\n"); + } + CHECK(dbg_cpu0_read((0 << 11) + 16, &npc)); /* Read NPC */ + CHECK(dbg_cpu0_read((0 << 11) + 18, &ppc)); /* Read PPC */ + CHECK(dbg_cpu0_read(0x401, &r1)); /* Read R1 */ + printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); + printf("Expected npc = %.8x ppc = %.8x r1 = %.8x\n", 0x00000010, 0x00000028, 201); + result = npc + ppc + r1 + result; + printf("result = %.8lx\n", result ^ 0xdeaddae1); + + if((result ^ 0xdeaddae1) != 0xdeaddead) + return APP_ERR_TEST_FAIL; + + return APP_ERR_NONE; +} + + +// This function does not currently return a useful value +/* +unsigned char test_8051_cpu1(void) +{ + int retval = 1; + unsigned long result = 0; + unsigned long npc[3], tmp; + + printf("Testing CPU1 (8051)\n"); + + // WRITE ACC + CHECK(dbg_cpu1_write(0x20e0, 0xa6)); + + // READ ACC + CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space + printf("Read 8051 ACC = %0x (expected a6)\n", tmp); + result = result + tmp; + + // set exception to single step to jump over a loop + CHECK(dbg_cpu1_write(0x3010, 0xa0)); // set single step and global enable in EER + CHECK(dbg_cpu1_write(0x3011, 0x40)); // set evec = 24'h000040 + CHECK(dbg_cpu1_write(0x3012, 0x00)); // (already reset value) + CHECK(dbg_cpu1_write(0x3013, 0x00)); // (already reset value) + + // set HW breakpoint at PC == 0x41 + CHECK(dbg_cpu1_write(0x3020, 0x41)); // DVR0 = 24'h000041 + CHECK(dbg_cpu1_write(0x3023, 0x39)); // DCR0 = valid, == PC + CHECK(dbg_cpu1_write(0x3001, 0x04)); // DSR = watchpoint + + // flush 8051 instruction cache + CHECK(dbg_cpu1_write(0x209f, 0x00)); + + // Put some instructions in ram (8-bit mode on wishbone) + CHECK(dbg_wb_write8 (0x40, 0x04)); // inc a + CHECK(dbg_wb_write8 (0x41, 0x03)); // rr a; + CHECK(dbg_wb_write8 (0x42, 0x14)); // dec a; + CHECK(dbg_wb_write8 (0x43, 0xf5)); // mov 0e5h, a; + CHECK(dbg_wb_write8 (0x44, 0xe5)); + + // unstall just 8051 + CHECK(dbg_cpu1_write_reg(0, 0)); + + // read PC + CHECK(dbg_cpu1_read(0, &npc[0])); + CHECK(dbg_cpu1_read(1, &npc[1])); + CHECK(dbg_cpu1_read(2, &npc[2])); + printf("Read 8051 npc = %02x%02x%02x (expected 41)\n", npc[2], npc[1], npc[0]); + result = result + (npc[2] << 16) + (npc[1] << 8) + npc[0]; + + // READ ACC + CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space + printf("Read 8051 ACC = %0x (expected a7)\n", tmp); + result = result + tmp; + + // set sigle step to stop execution + CHECK(dbg_cpu1_write(0x3001, 0x20)); // set single step and global enable in DSR + + // clear DRR + CHECK(dbg_cpu1_write(0x3000, 0x00)); // set single step and global enable in DRR + + // unstall just 8051 + CHECK(dbg_cpu1_write_reg(0, 0)); + + // read PC + CHECK(dbg_cpu1_read(0, &npc[0])); + CHECK(dbg_cpu1_read(1, &npc[1])); + CHECK(dbg_cpu1_read(2, &npc[2])); + printf("Read 8051 npc = %02x%02x%02x (expected 42)\n", npc[2], npc[1], npc[0]); + result = result + (npc[2] << 16) + (npc[1] << 8) + npc[0]; + + // READ ACC + CHECK(dbg_cpu1_read(0x20e0, &tmp)); // select SFR space + printf("Read 8051 ACC = %0x (expected d3)\n", tmp); + result = result + tmp; + + printf("report (%x)\n", result ^ 0x6c1 ^ 0xdeaddead); + + return APP_ERR_NONE; +} +*/ Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_jtag_bridge.h (revision 27) @@ -0,0 +1,18 @@ +#ifndef _ADV_JTAG_BRIDGE_H_ +#define _ADV_JTAG_BRIDGE_H_ + +//#ifndef Boolean +//#define Boolean int +//#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + + +#endif /* _ADV_JTAG_BRIDGE_H_ */ + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.c (revision 27) @@ -0,0 +1,393 @@ +/* legacy_dbg_commands.c -- JTAG protocol bridge between GDB and OpenCores debug module. + Copyright(C) 2001 Marko Mlinar, markom@opencores.org + Code for TCP/IP copied from gdb, by Chris Ziomkowski + Adapted for the Advanced JTAG Bridge by Nathan Yawn, 2009 + + This file was part of the OpenRISC 1000 Architectural Simulator. + It is now also used to connect GDB to a running hardware OpenCores / OR1200 + debug unit. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include // for htonl + +#include "chain_commands.h" +#include "cable_common.h" +#include "errcodes.h" +#include "legacy_dbg_commands.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +#define LEGACY_CRC_POLY 0x04c11db7 +#define DBG_CRC_SIZE 32 + +/* Crc of current read or written data. */ +static int legacy_crc_r, legacy_crc_w = 0; + + +/*----------------------------------------------------------------------------------*/ +// Helper Functions + +/* Generates new crc, sending in new bit input_bit */ +static unsigned long legacy_crc_calc(unsigned long crc, int input_bit) { + unsigned long d = (input_bit&1) ? 0xfffffff : 0x0000000; + unsigned long crc_32 = ((crc >> 31)&1) ? 0xfffffff : 0x0000000; + crc <<= 1; + return crc ^ ((d ^ crc_32) & LEGACY_CRC_POLY); +} + +/* Writes bitstream. LS bit first if len < 0, MS bit first if len > 0. */ +static void legacy_write_stream(uint32_t stream, int len, int set_last_bit) { + int i; + uint32_t err; + uint32_t outdata = 0; + uint32_t datacpy = stream; + + // MSB needs to be transferred first, lower levels do LSB first. Reverse. + for(i = 0; i < len; i++) { + outdata |= stream & 0x1; + if(i < (len-1)) { + outdata <<= 1; + stream >>= 1; + } + } + + // Call the lower level, in case the driver has a high-speed transfer capability. + // *** This always transfers LS bit first. + err = jtag_write_stream(&outdata, len, set_last_bit); + + debug("legacy_write_stream, stream = 0x%X (0x%X), len = %d, set_last_bit = %d, ret = 0x%X\n", datacpy, outdata, len, set_last_bit, err); + + if(err != APP_ERR_NONE) { + fprintf(stderr, "Error in legacy_write_stream: %s\n", get_err_string(err)); + } + + // The low level call does not compute + // a CRC. Do so here. Remember, CRC is only calculated using data bits. + if(len < 0) { + fprintf(stderr, "Program error: legacy debug JTAG read with negative length!\n"); + /* + len = -len; + for(i = 0; i < len; i++) { + legacy_crc_w = legacy_crc_calc(legacy_crc_w, stream&1); + datacpy >>= 1; + } + */ + } + else { + for(i = len-1; i >= 0; i--) { + legacy_crc_w = legacy_crc_calc(legacy_crc_w, (datacpy>>i)&1); + } + } + +} + +/* Gets bitstream. LS bit first if len < 0, MS bit first if len > 0. */ +static uint32_t legacy_read_stream(unsigned long stream, int len, int set_last_bit) { + int i; + uint32_t data = 0, datacpy = 0; + uint32_t outdata = stream; + uint32_t indata; + uint32_t err; + + // *** WARNING: We assume that the input ("stream") will always be 0. + // If it's ever not, then we probably need to reverse the bit order (as + // is done in legacy_write_stream) before sending. + + // Call the lower level, in case the driver has a high-speed transfer capability. + // This always transfers LS bit first. + err = jtag_read_write_stream(&outdata, &indata, len, 0, set_last_bit); + + // Data comes from the legacy debug unit MSB first, so we need to + // reverse the bit order. + for(i = 0; i < len; i++) { + data |= indata & 0x1; + if(i < (len-1)) { + data <<= 1; + indata >>= 1; + } + } + + datacpy = data; + + debug("legacy_read_stream: write 0x%X, read 0x%X, len %i, set_last_bit = %d\n", outdata, data, len, set_last_bit); + + if(err != APP_ERR_NONE) { + fprintf(stderr, "Error in legacy_read_stream: %s\n", get_err_string(err)); + } + + // The low level call does not compute + // a CRC. Do so here. Remember, CRC is only calculated using data bits. + if(len < 0) { + fprintf(stderr, "Program error: legacy debug JTAG read with negative length!\n"); + /* + len = -len; + for(i = 0; i < len; i++) { + legacy_crc_w = legacy_crc_calc(legacy_crc_w, stream&1); + stream >>= 1; + legacy_crc_r = legacy_crc_calc(legacy_crc_r, datacpy&1); + datacpy >>= 1; + } + */ + } + else { + for(i = len-1; i >= 0; i--) { + legacy_crc_w = legacy_crc_calc(legacy_crc_w, (stream>>i)&1); + legacy_crc_r = legacy_crc_calc(legacy_crc_r, (datacpy>>i)&1); + } + } + + return data; +} + +////////////////////////////////////////////////////////////////////////// +// Actual operations on the legacy debug unit + +/* Sets scan chain. */ +int legacy_dbg_set_chain(int chain) { + int status, crc_generated, legacy_crc_read; + desired_chain = chain; + +try_again: + if (current_chain == chain) return APP_ERR_NONE; + current_chain = -1; + debug("\nset_chain %i\n", chain); + tap_set_shift_dr(); /* SHIFT_DR */ + + /* write data, EXIT1_DR */ + legacy_crc_w = 0xffffffff; + legacy_write_stream(((chain & 0xf) | (1<= 0 */ +int legacy_dbg_command(int type, unsigned long adr, int len) { + int status, crc_generated, legacy_crc_read; + +try_again: + legacy_dbg_set_chain(desired_chain); + debug("\ncomm %i\n", type); + + /***** WRITEx *****/ + tap_set_shift_dr(); /* SHIFT_DR */ + + /* write data, EXIT1_DR */ + legacy_crc_w = 0xffffffff; + legacy_write_stream(((DI_WRITE_CMD & 0xf) | (0< 0); + legacy_write_stream(len - 1, 16, 0); + legacy_write_stream(legacy_crc_w, DBG_CRC_SIZE, 0); + + legacy_crc_r = 0xffffffff; + status = legacy_read_stream(0, DC_STATUS_SIZE, 0); + crc_generated = legacy_crc_r; + legacy_crc_read = legacy_read_stream(0, DBG_CRC_SIZE, 1); + + /* CRCs must match, otherwise retry */ + if (legacy_crc_read != crc_generated) { + if (retry_do()) goto try_again; + else return APP_ERR_CRC; + } + /* we should read expected status value, otherwise retry */ + if (status != 0) { + if (retry_do()) goto try_again; + else return APP_ERR_BAD_PARAM; + } + + tap_exit_to_idle(); // Transition the TAP back to state IDLE + + /* reset retry counter */ + retry_ok(); + return APP_ERR_NONE; +} + +/* writes a ctrl reg */ +int legacy_dbg_ctrl(int reset, int stall) { + int status, crc_generated, legacy_crc_read; + +try_again: + legacy_dbg_set_chain(desired_chain); + debug("\nctrl\n"); + + /***** WRITEx *****/ + tap_set_shift_dr(); /* SHIFT_DR */ + + /* write data, EXIT1_DR */ + legacy_crc_w = 0xffffffff; + legacy_write_stream(((DI_WRITE_CTRL & 0xf) | (0< +#include // for malloc() +#include // for usleep() +//#include // for mutexes + +#include "chain_commands.h" // For the return error codes +#include "altera_virtual_jtag.h" // hardware-specifg defines for the Altera Virtual JTAG interface +#include "cable_common.h" // low-level JTAG IO routines +#include "adv_dbg_commands.h" // for the kludge in tap_reset() +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +// How many tries before an abort +#define NUM_SOFT_RETRIES 5 + +// for the klugde in tap_reset() +extern int current_reg_idx[DBG_MAX_MODULES]; + +/* Currently selected scan chain in the debug unit - just to prevent unnecessary + transfers. */ +int current_chain = -1; +int desired_chain = -1; + +// wait for 100ms +#define JTAG_RETRY_WAIT() usleep(100000); + +// Retry data +int soft_retry_no = 0; +//static int hard_retry_no = 0; + +// Configuration data +int global_IR_size = 0; +int global_IR_prefix_bits = 0; +int global_IR_postfix_bits = 0; +int global_DR_prefix_bits = 0; +int global_DR_postfix_bits = 0; +unsigned int global_jtag_cmd_debug = 0; // Value to be shifted into the TAP IR to select the debug unit (unused for virtual jtag) +unsigned char global_altera_virtual_jtag = 0; // Set true to use virtual jtag mode +unsigned int vjtag_cmd_vir = ALTERA_CYCLONE_CMD_VIR; // virtual IR-shift command for altera devices, may be configured on command line +unsigned int vjtag_cmd_vdr = ALTERA_CYCLONE_CMD_VDR; // virtual DR-shift, ditto +unsigned char global_xilinx_bscan = 0; // Set true if the hardware uses a Xilinx BSCAN_* device. + + +/////////////////////////////////////////////////////////////////////// +// Configuration + +void config_set_IR_size(int size) { + global_IR_size = size; +} + +void config_set_IR_prefix_bits(int bits) { + global_IR_prefix_bits = bits; +} + +void config_set_IR_postfix_bits(int bits) { + global_IR_postfix_bits = bits; +} + +void config_set_DR_prefix_bits(int bits) { + global_DR_prefix_bits = bits; +} + +void config_set_DR_postfix_bits(int bits) { + global_DR_postfix_bits = bits; +} + +void config_set_debug_cmd(unsigned int cmd) { + global_jtag_cmd_debug = cmd; +} + +void config_set_alt_vjtag(unsigned char enable) { + global_altera_virtual_jtag = (enable) ? 1:0; +} + +// At present, all devices which support virtual JTAG use the same VIR/VDR +// commands. But, if they ever change, these can be changed on the command line. +void config_set_vjtag_cmd_vir(unsigned int cmd) { + vjtag_cmd_vir = cmd; +} + +void config_set_vjtag_cmd_vdr(unsigned int cmd) { + vjtag_cmd_vdr = cmd; +} + +void config_set_xilinx_bscan(unsigned char enable) { + global_xilinx_bscan = (enable) ? 1:0; +} + +////////////////////////////////////////////////////////////////////// +// Functions which operate on the JTAG TAP + + +/* Resets JTAG - Writes TRST=1, and TRST=0. Sends 8 TMS to put the TAP + * in test_logic_reset mode, for good measure. + */ +int tap_reset(void) { + int i; + int err = APP_ERR_NONE; + + debug("\nreset("); + err |= jtag_write_bit(0); + JTAG_RETRY_WAIT(); + /* In case we don't have TRST reset it manually */ + for(i = 0; i < 8; i++) err |= jtag_write_bit(TMS); + err |= jtag_write_bit(TRST); // if TRST not supported, this puts us in test logic/reset + JTAG_RETRY_WAIT(); + err |= jtag_write_bit(0); // run test / idle + debug(")\n"); + + // Reset data on current module/register selections + current_chain = -1; + + // (this is only for the adv. debug i/f...bit of a kludge) + for(i = 0; i < DBG_MAX_MODULES; i++) + current_reg_idx[i] = -1; + + return err; +} + + // Set the IR with the DEBUG command, one way or the other +int tap_enable_debug_module(void) +{ + uint32_t data; + int err = APP_ERR_NONE; + + if(global_altera_virtual_jtag) { + /* Set for virtual IR shift */ + err |= tap_set_ir(vjtag_cmd_vir); // This is the altera virtual IR scan command + err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ + err |= jtag_write_bit(0); /* CAPTURE_DR */ + err |= jtag_write_bit(0); /* SHIFT_DR */ + + /* Select debug scan chain in virtual IR */ + data = (0x1< 32) { // Deal with spill into the next word + ir_chain[startoffset+1] &= ir >> (32-startshift); + ir_chain[startoffset+1] |= (0xFFFFFFFF << (global_IR_size - (32-startshift))); // Put the 1's back in the MSB positions + } + + // Do the actual JTAG transaction + debug("Set IR 0x%X\n", ir); + err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ + err |= jtag_write_bit(TMS); /* SELECT_IR SCAN */ + + err |= jtag_write_bit(0); /* CAPTURE_IR */ + err |= jtag_write_bit(0); /* SHIFT_IR */ + + /* write data, EXIT1_IR */ + debug("Setting IR, size %i, IR_size = %i, pre_size = %i, post_size = %i, data 0x%X\n", chain_size, global_IR_size, global_IR_prefix_bits, global_IR_postfix_bits, ir); + err |= cable_write_stream(ir_chain, chain_size, 1); // Use cable_ call directly (not jtag_), so we don't add DR prefix bits + debug("Done setting IR\n"); + + err |= jtag_write_bit(TMS); /* UPDATE_IR */ + err |= jtag_write_bit(0); /* IDLE */ + current_chain = -1; + return err; +} + + +// This assumes we are in the IDLE state, and we want to be in the SHIFT_DR state. +int tap_set_shift_dr(void) +{ + int err = APP_ERR_NONE; + + err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ + err |= jtag_write_bit(0); /* CAPTURE_DR */ + err |= jtag_write_bit(0); /* SHIFT_DR */ + + return err; +} + +// This transitions from EXIT1 to IDLE. It should be the last thing called +// in any debug unit transaction. +int tap_exit_to_idle(void) +{ + int err = APP_ERR_NONE; + + err |= jtag_write_bit(TMS); /* UPDATE_DR */ + err |= jtag_write_bit(0); /* IDLE */ + + return err; +} + +//////////////////////////////////////////////////////////////////// +// Operations to read / write data over JTAG + + +/* Writes TCLK=0, TRST=1, TMS=bit1, TDI=bit0 + and TCLK=1, TRST=1, TMS=bit1, TDI=bit0 +*/ +int jtag_write_bit(uint8_t packet) { + debug("Wbit(%i)\n", packet); + return cable_write_bit(packet); +} + +int jtag_read_write_bit(uint8_t packet, uint8_t *in_bit) { + int retval = cable_read_write_bit(packet, in_bit); + debug("RWbit(%i,%i)", packet, *in_bit); + return retval; +} + +// This automatically adjusts for the DR length (other devices on scan chain) +// when the set_TMS flag is true. +int jtag_write_stream(uint32_t *out_data, int length_bits, unsigned char set_TMS) +{ + int i; + int err = APP_ERR_NONE; + + if(!set_TMS) + err |= cable_write_stream(out_data, length_bits, 0); + else if(global_DR_prefix_bits == 0) + err |= cable_write_stream(out_data, length_bits, 1); + else { + err |= cable_write_stream(out_data, length_bits, 0); + // It could be faster to do a cable_write_stream for all the prefix bits (if >= 8 bits), + // but we'd need a data array of unknown (and theoretically unlimited) + // size to hold the 0 bits to write. TODO: alloc/realloc one. + for(i = 0; i < (global_DR_prefix_bits-1); i++) + err |= jtag_write_bit(0); + err |= jtag_write_bit(TMS); + } + return err; +} + +// When set_TMS is true, this function insures the written data is in the desired position (past prefix bits) +// before sending TMS. When 'adjust' is true, this function insures that the data read in accounts for postfix +// bits (they are shifted through before the read starts). +int jtag_read_write_stream(uint32_t *out_data, uint32_t *in_data, int length_bits, unsigned char adjust, unsigned char set_TMS) +{ + int i; + int err = APP_ERR_NONE; + + if(adjust && (global_DR_postfix_bits > 0)) { + // It would be faster to do a cable_write_stream for all the postfix bits, + // but we'd need a data array of unknown (and theoretically unlimited) + // size to hold the '0' bits to write. + for(i = 0; i < global_DR_postfix_bits; i++) + err |= cable_write_bit(0); + } + + // If there are both prefix and postfix bits, we may shift more bits than strictly necessary. + // If we shifted out the data while burning through the postfix bits, these shifts could be subtracted + // from the number of prefix shifts. However, that way leads to madness. + if(!set_TMS) + err |= cable_read_write_stream(out_data, in_data, length_bits, 0); + else if(global_DR_prefix_bits == 0) + err |= cable_read_write_stream(out_data, in_data, length_bits, 1); + else { + err |= cable_read_write_stream(out_data, in_data, length_bits, 0); + // It would be faster to do a cable_write_stream for all the prefix bits, + // but we'd need a data array of unknown (and theoretically unlimited) + // size to hold the '0' bits to write. + for(i = 0; i < (global_DR_prefix_bits-1); i++) + err |= jtag_write_bit(0); + err |= jtag_write_bit(TMS); + } + return err; +} + + + +// This function attempts to determine the structure of the JTAG chain +// It can determine how many devices are present. +// If the devices support the IDCODE command, it will be read and stored. +// There is no way to automatically determine the length of the IR registers - +// this must be read from a BSDL file, if IDCODE is supported. +// When IDCODE is not supported, IR length of the target device must be entered on the command line. + +#define ALLOC_SIZE 64 +#define MAX_DEVICES 1024 +int jtag_enumerate_chain(uint32_t **id_array, int *num_devices) +{ + uint32_t invalid_code = 0x7f; // Shift this out, we know we're done when we get it back + const unsigned int done_code = 0x3f; // invalid_code is altered, we keep this for comparison (minus the start bit) + int devindex = 0; // which device we are currently trying to detect + uint32_t tempID; + uint32_t temp_manuf_code; + uint32_t temp_rest_code; + uint8_t start_bit = 0; + uint32_t *idcodes; + int reallocs = 0; + int err = APP_ERR_NONE; + + // Malloc a reasonable number of entries, we'll expand if we must. Linked lists are overrated. + idcodes = (uint32_t *) malloc(ALLOC_SIZE*sizeof(uint32_t)); + if(idcodes == NULL) { + printf("Failed to allocate memory for device ID codes!\n"); + return APP_ERR_MALLOC; + } + + // Put in SHIFT-DR mode + err |= jtag_write_bit(TMS); /* SELECT_DR SCAN */ + err |= jtag_write_bit(0); /* CAPTURE_DR */ + err |= jtag_write_bit(0); /* SHIFT_DR */ + + printf("Enumerating JTAG chain...\n"); + + // Putting a limit on the # of devices supported has the useful side effect + // of insuring we still exit in error cases (we never get the 0x7f manuf. id) + while(devindex < MAX_DEVICES) { + // get 1 bit. 0 = BYPASS, 1 = start of IDCODE + err |= jtag_read_write_bit(invalid_code&0x01, &start_bit); + invalid_code >>= 1; + + if(start_bit == 0) { + if(devindex >= (ALLOC_SIZE << reallocs)) { // Enlarge the memory array if necessary, double the size each time + idcodes = (uint32_t *) realloc(idcodes, (ALLOC_SIZE << ++reallocs)*sizeof(uint32_t)); + if(idcodes == NULL) { + printf("Failed to allocate memory for device ID codes during enumeration!\n"); + return APP_ERR_MALLOC; + } + } + idcodes[devindex] = -1; + devindex++; + } + else { + // get 11 bit manufacturer code + err |= jtag_read_write_stream(&invalid_code, &temp_manuf_code, 11, 0, 0); + invalid_code >>= 11; + + if(temp_manuf_code != done_code) { + // get 20 more bits, rest of ID + err |= jtag_read_write_stream(&invalid_code, &temp_rest_code, 20, 0, 0); + invalid_code >>= 20; + tempID = (temp_rest_code << 12) | (temp_manuf_code << 1) | 0x01; + if(devindex >= (ALLOC_SIZE << reallocs)) { // Enlarge the memory array if necessary, double the size each time + idcodes = (uint32_t *) realloc(idcodes, (ALLOC_SIZE << ++reallocs)*sizeof(unsigned long)); + if(idcodes == NULL) { + printf("Failed to allocate memory for device ID codes during enumeration!\n"); + return APP_ERR_MALLOC; + } + } + idcodes[devindex] = tempID; + devindex++; + } else { + break; + } + } + + if(err) // Don't try to keep probing if we get a comm. error + return err; + } + + if(devindex >= MAX_DEVICES) + printf("WARNING: maximum supported devices on JTAG chain (%i) exceeded.\n", MAX_DEVICES); + + // Put in IDLE mode + err |= jtag_write_bit(TMS); /* EXIT1_DR */ + err |= jtag_write_bit(TMS); /* UPDATE_DR */ + err |= jtag_write_bit(0); /* IDLE */ + + *id_array = idcodes; + *num_devices = devindex; + + return err; +} + + + +int jtag_get_idcode(uint32_t cmd, uint32_t *idcode) +{ + uint32_t data_out = 0; + int err = APP_ERR_NONE; + unsigned char saveconfig = global_altera_virtual_jtag; + global_altera_virtual_jtag = 0; // We want the actual IDCODE, not the virtual device IDCODE + + err |= tap_set_ir(cmd); + err |= tap_set_shift_dr(); + err |= jtag_read_write_stream(&data_out, idcode, 32, 1, 1); /* EXIT1_DR */ + + if(err) + printf("Error getting ID code!\n"); + + // Put in IDLE mode + err |= jtag_write_bit(TMS); /* UPDATE_DR */ + err |= jtag_write_bit(0); /* IDLE */ + + global_altera_virtual_jtag = saveconfig; + return err; +} + + +///////////////////////////////////////////////////////////////// +// Helper functions + +/* counts retries and returns zero if we should abort */ +/* TODO: dynamically adjust timings */ +int retry_do() { + int err = APP_ERR_NONE; + + if (soft_retry_no >= NUM_SOFT_RETRIES) { + return 0; + + // *** TODO: Add a 'hard retry', which re-initializes the cable, re-enumerates the bus, etc. + + } else { /* quick reset */ + if(err |= tap_reset()) { + printf("Error %s while resetting for retry.\n", get_err_string(err)); + return 0; + } + + // Put us back into DEBUG mode + if(err |= tap_enable_debug_module()) { + printf("Error %s enabling debug module during retry.\n", get_err_string(err)); + return 0; + } + + soft_retry_no++; + printf("Retry...\n"); + } + + return 1; +} + +/* resets retry counter */ +void retry_ok() { + soft_retry_no = 0; +} + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/legacy_dbg_commands.h (revision 27) @@ -0,0 +1,26 @@ + +#ifndef _LEGACY_DBG_COMMANDS_H_ +#define _LEGACY_DBG_COMMANDS_H_ + +#define DC_SIZE 4 +#define DC_STATUS_SIZE 4 + +#define DC_WISHBONE 0 +#define DC_CPU0 1 +#define DC_CPU1 2 + +#define DI_GO 0 +#define DI_READ_CMD 1 +#define DI_WRITE_CMD 2 +#define DI_READ_CTRL 3 +#define DI_WRITE_CTRL 4 + + +// Interface to send commands to the legacy debug interface +int legacy_dbg_set_chain(int chain); +int legacy_dbg_command(int type, unsigned long adr, int len); +int legacy_dbg_ctrl(int reset, int stall); +int legacy_dbg_ctrl_read(int *reset, int *stall); +int legacy_dbg_go(unsigned char *data, unsigned short len, int read); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.c (revision 27) @@ -0,0 +1,689 @@ +/* adv_dbg_commands.c -- JTAG protocol bridge between GDB and Advanced debug module. + Copyright(C) Nathan Yawn, nyawn@opencores.net + + This file contains functions which perform high-level transactions + on a JTAG chain and debug unit, such as setting a value in the TAP IR + or doing a burst write through the wishbone module of the debug unit. + It uses the protocol for the Advanced Debug Interface (adv_dbg_if). + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + + + +#include +#include // for malloc() +#include // for exit() +//#include // for mutexes + +#include "chain_commands.h" +#include "adv_dbg_commands.h" // hardware-specific defines for the debug module +//#include "altera_virtual_jtag.h" // hardware-specifg defines for the Altera Virtual JTAG interface +#include "cable_common.h" // low-level JTAG IO routines +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +// How many '0' status bits to get during a burst read +// before giving up +#define MAX_READ_STATUS_WAIT 100 + +// Currently selected internal register in each module +// - cuts down on unnecessary transfers +int current_reg_idx[DBG_MAX_MODULES]; + +// Prototypes for local functions +uint32_t adbg_compute_crc(uint32_t crc_in, uint32_t data_in, int length_bits); + + + +//////////////////////////////////////////////////////////////////////// +// Helper functions + +uint32_t adbg_compute_crc(uint32_t crc_in, uint32_t data_in, int length_bits) +{ + int i; + unsigned int d, c; + uint32_t crc_out = crc_in; + + for(i = 0; i < length_bits; i = i+1) + { + d = ((data_in >> i) & 0x1) ? 0xffffffff : 0; + c = (crc_out & 0x1) ? 0xffffffff : 0; + crc_out = crc_out >> 1; + crc_out = crc_out ^ ((d ^ c) & ADBG_CRC_POLY); + } + return crc_out; +} + +////////////////////////////////////////////////////////////////// +// Functions which operate on the advanced debug unit + +/* Selects one of the modules in the debug unit (e.g. wishbone unit, CPU0, etc.) + */ +int adbg_select_module(int chain) +{ + uint32_t data; + int err = APP_ERR_NONE; + + if (current_chain == chain) + return err; + + current_chain = -1; + desired_chain = chain; + + // MSB of the data out must be set to 1, indicating a module select command + data = chain | (1<> 16) | ((opcode & 0xf) << 16)) & ~(0x1<<20); // MSB must be 0 to access modules + + err |= tap_set_shift_dr(); /* SHIFT_DR */ + + /* write data, EXIT1_DR */ + err |= jtag_write_stream(data, 53, 1); // When TMS is set (last parameter), DR length is also adjusted; EXIT1_DR + + err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE + + /* reset retry counter */ + retry_ok(); + + if(err) + printf("Error %s sending burst command to module %i\n", get_err_string(err), desired_chain); + + return err; +} + +// Set up and execute a burst read from a contiguous block of addresses. +// Note that there is a minor weakness in the CRC algorithm in case of retries: +// the CRC is only checked for the final burst read. Thus, if errors/partial retries +// break up a transfer into multiple bursts, only the last burst will be CRC protected. +#define MAX_BUS_ERRORS 10 +int adbg_wb_burst_read(int word_size_bytes, int word_count, unsigned long start_address, void *data) +{ + unsigned char opcode; + uint8_t status; + unsigned long instream; + int i, j; + uint32_t crc_calc; + uint32_t crc_read; + unsigned char word_size_bits; + uint32_t out_data = 0; + uint32_t in_data; + unsigned long addr; + uint32_t err_data[2]; + int bus_error_retries = 0; + int err = APP_ERR_NONE; + + debug("Doing burst read, word size %d, word count %d, start address 0x%lX", word_size_bytes, word_count, start_address); + + if(word_count <= 0) { + debug("Ignoring illegal read burst length (%d)\n", word_count); + return 0; + } + + instream = 0; + word_size_bits = word_size_bytes << 3; + + // Select the appropriate opcode + switch(current_chain) { + case DC_WISHBONE: + if (word_size_bytes == 1) opcode = DBG_WB_CMD_BREAD8; + else if(word_size_bytes == 2) opcode = DBG_WB_CMD_BREAD16; + else if(word_size_bytes == 4) opcode = DBG_WB_CMD_BREAD32; + else { + printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_WB_CMD_BREAD32; + } + break; + case DC_CPU0: + if(word_size_bytes == 4) opcode = DBG_CPU0_CMD_BREAD32; + else { + printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_CPU0_CMD_BREAD32; + } + break; + case DC_CPU1: + if(word_size_bytes == 4) opcode = DBG_CPU1_CMD_BREAD32; + else { + printf("Tried burst read with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_CPU0_CMD_BREAD32; + } + break; + default: + printf("ERROR! Illegal debug chain selected while doing burst read!\n"); + return 1; + } + + wb_burst_read_retry_full: + i = 0; + addr = start_address; + wb_burst_read_retry_partial: + crc_calc = 0xffffffff; + + + // Send the BURST READ command, returns TAP to idle state + if(err |= adbg_burst_command(opcode, addr, (word_count-i))) // word_count-i in case of partial retry + return err; + + // This is a kludge to word around oddities in the Xilinx BSCAN_* devices, and the + // adv_dbg_if state machine. The debug FSM needs 1 TCK between UPDATE_DR above, and + // the CAPTURE_DR below, and the BSCAN_* won't provide it. So, we force it, by putting the TAP + // in BYPASS, which makes the debug_select line inactive, which is AND'ed with the TCK line (in the xilinx_internal_jtag module), + // which forces it low. Then we re-enable USER1/debug_select to make TCK high. One TCK + // event, the hard way. + if(global_xilinx_bscan) { + err |= tap_set_ir(0xFFFFFFFF); + err |= tap_enable_debug_module(); + } + + // Get us back to shift_dr mode to read a burst + err |= tap_set_shift_dr(); + + // We do not adjust for the DR length here. BYPASS regs are loaded with 0, + // and the debug unit waits for a '1' status bit before beginning to read data. + + // Repeat for each word: wait until ready = 1, then read word_size_bits bits. + for(; i < word_count; i++) + { + // Get 1 status bit, then word_size_bytes*8 bits + status = 0; + j = 0; + while(!status) { // Status indicates whether there is a word available to read. Wait until it returns true. + err |= jtag_read_write_bit(0, &status); + j++; + // If max count exceeded, retry starting with the failure address + if(j > MAX_READ_STATUS_WAIT) { + printf("Burst read timed out.\n"); + if(!retry_do()) { + printf("Retry count exceeded in burst read!\n"); + return err|APP_ERR_MAX_RETRY; + } + err = APP_ERR_NONE; // on retry, errors cleared + addr = start_address + (i*word_size_bytes); + goto wb_burst_read_retry_partial; + } + } + + if(j > 1) { // It's actually normal for the first read of a burst to take 2 tries, even with a fast WB clock - 3 with a Xilinx BSCAN + debug("Took %0d tries before good status bit during burst read", j); + } + + // Get one word of data + err |= jtag_read_write_stream(&out_data, &in_data, word_size_bits, 0, 0); + debug("Read 0x%0lx", in_data); + + if(err) { // Break and retry as soon as possible on error + printf("Error %s during burst read.\n", get_err_string(err)); + if(!retry_do()) { + printf("Retry count exceeded in burst read!\n"); + return err|APP_ERR_MAX_RETRY; + } + err = APP_ERR_NONE; // on retry, errors cleared + addr = start_address + (i*word_size_bytes); + goto wb_burst_read_retry_partial; + } + + crc_calc = adbg_compute_crc(crc_calc, in_data, word_size_bits); + + if(word_size_bytes == 1) ((unsigned char *)data)[i] = in_data & 0xFF; + else if(word_size_bytes == 2) ((unsigned short *)data)[i] = in_data & 0xFFFF; + else ((unsigned long *)data)[i] = in_data; + } + + // All bus data was read. Read the data CRC from the debug module. + err |= jtag_read_write_stream(&out_data, &crc_read, 32, 0, 1); + + err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE + + if(crc_calc != crc_read) { + printf("CRC ERROR! Computed 0x%x, read CRC 0x%x\n", crc_calc, crc_read); + if(!retry_do()) { + printf("Retry count exceeded! Abort!\n\n"); + return err|APP_ERR_CRC; + } + goto wb_burst_read_retry_full; + } + else debug("CRC OK!"); + + + + // Now, read the error register, and retry/recompute as necessary. + if(current_chain == DC_WISHBONE) + { + err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 1); // First, just get 1 bit...read address only if necessary, + if(err_data[0] & 0x1) { // Then we have a problem. + err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 33); + addr = (err_data[0] >> 1) | (err_data[1] << 31); + i = (addr - start_address) / word_size_bytes; + printf("ERROR! WB bus error during burst read, address 0x%lX (index 0x%X), retrying!\n", addr, i); + bus_error_retries++; + if(bus_error_retries > MAX_BUS_ERRORS) { + printf("Max WB bus errors reached during burst read\n"); + return err|APP_ERR_MAX_BUS_ERR; + } + // Don't call retry_do(), a JTAG reset won't help a WB bus error + err_data[0] = 1; + err |= adbg_ctrl_write(DBG_WB_REG_ERROR, err_data, 1); // Write 1 bit, to reset the error register, + goto wb_burst_read_retry_partial; + } + } + + retry_ok(); + return err; +} + +// Set up and execute a burst write to a contiguous set of addresses +int adbg_wb_burst_write(void *data, int word_size_bytes, int word_count, unsigned long start_address) +{ + unsigned char opcode; + uint8_t status; + uint32_t datawords[2] = {0,0}; + uint32_t statuswords[2] = {0,0}; + int i; + uint32_t crc_calc; + uint32_t crc_match; + unsigned int word_size_bits; + unsigned long addr; + int bus_error_retries = 0; + uint32_t err_data[2]; + int loopct, successes; + int first_status_loop; + int err = APP_ERR_NONE; + + debug("Doing burst write, word size %d, word count %d, start address 0x%lx", word_size_bytes, word_count, start_address); + word_size_bits = word_size_bytes << 3; + + if(word_count <= 0) { + printf("Ignoring illegal burst write size (%d)\n", word_count); + return 0; + } + + // Select the appropriate opcode + switch(current_chain) { + case DC_WISHBONE: + if (word_size_bytes == 1) opcode = DBG_WB_CMD_BWRITE8; + else if(word_size_bytes == 2) opcode = DBG_WB_CMD_BWRITE16; + else if(word_size_bytes == 4) opcode = DBG_WB_CMD_BWRITE32; + else { + printf("Tried WB burst write with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_WB_CMD_BWRITE32; + } + break; + case DC_CPU0: + if(word_size_bytes == 4) opcode = DBG_CPU0_CMD_BWRITE32; + else { + printf("Tried CPU0 burst write with invalid word size (%0x), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_CPU0_CMD_BWRITE32; + } + break; + case DC_CPU1: + if(word_size_bytes == 4) opcode = DBG_CPU1_CMD_BWRITE32; + else { + printf("Tried CPU1 burst write with invalid word size (%0X), defaulting to 4-byte words", word_size_bytes); + opcode = DBG_CPU0_CMD_BWRITE32; + } + break; + default: + printf("ERROR! Illegal debug chain selected while doing burst WRITE!\n"); + return 1; + } + + // Compute which loop iteration in which to expect the first status bit + first_status_loop = 1 + ((global_DR_prefix_bits + global_DR_postfix_bits)/(word_size_bits+1)); + + wb_burst_write_retry_full: + i = 0; + addr = start_address; + wb_burst_write_retry_partial: + crc_calc = 0xffffffff; + successes = 0; + + + // Send burst command, return to idle state + if(err |= adbg_burst_command(opcode, addr, (word_count-i))) // word_count-i in case of partial retry + return err; + + // Get us back to shift_dr mode to write a burst + //err |= jtag_write_bit(TMS); // select_dr_scan + //err |= jtag_write_bit(0); // capture_ir + //err |= jtag_write_bit(0); // shift_ir + err |= tap_set_shift_dr(); + + // Write a start bit (a 1) so it knows when to start counting + err |= jtag_write_bit(TDO); + + // Now, repeat... + for(loopct = 0; i < word_count; i++,loopct++) // loopct only used to check status... + { + // Write word_size_bytes*8 bits, then get 1 status bit + if(word_size_bytes == 4) datawords[0] = ((unsigned long *)data)[i]; + else if(word_size_bytes == 2) datawords[0] = ((unsigned short *)data)[i]; + else datawords[0] = ((unsigned char *)data)[i]; + + crc_calc = adbg_compute_crc(crc_calc, datawords[0], word_size_bits); + + // This is an optimization + if((global_DR_prefix_bits + global_DR_postfix_bits) == 0) { + err |= jtag_write_stream(datawords, word_size_bits, 0); // Write data + err |= jtag_read_write_bit(0, &status); // Read status bit + if(!status) { + addr = start_address + (i*word_size_bytes); + printf("Write before bus ready, retrying (idx %i, addr 0x%08lX).\n", i, addr); + if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} + // Don't bother going to TAP idle state, we're about to reset the TAP + goto wb_burst_write_retry_partial; + } + } + else { // This is slower (for a USB cable anyway), because a read takes 1 more USB transaction than a write. + err |= jtag_read_write_stream(datawords, statuswords, word_size_bits+1, 0, 0); + debug("St. 0x%08lX 0x%08lX\n", statuswords[0], statuswords[1]); + status = (statuswords[0] || statuswords[1]); + if(loopct > first_status_loop) { + if(status) successes++; + else { + i = successes; + addr = start_address + (i*word_size_bytes); + printf("Write before bus ready, retrying (idx %i, addr 0x%08lX).\n", i, addr); + if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} + // Don't bother going to TAP idle state, we're about to reset the TAP + goto wb_burst_write_retry_partial; + } + } + } + + if(err) { + printf("Error %s getting status bit, retrying.\n", get_err_string(err)); + if(!retry_do()) { + printf("Retry count exceeded!\n"); + return err|APP_ERR_MAX_RETRY; + } + err = APP_ERR_NONE; + addr = start_address + (i*word_size_bytes); + // Don't bother going to TAP idle state, we're about to reset the TAP + goto wb_burst_write_retry_partial; + } + + debug("Wrote 0x%0lx", datawords[0]); + } + + // *** If this is a multi-device chain, at least one status bit will be lost. + // *** If we want to check for it, we'd have to look while sending the CRC, and + // *** maybe while burning bits to get the match bit. So, for now, there is a + // *** hole here. + + // Done sending data, Send the CRC we computed + err |= jtag_write_stream(&crc_calc, 32, 0); + for(i = 0; i < global_DR_prefix_bits; i++) // Push the CRC data all the way to the debug unit + err |= jtag_write_bit(0); // Can't do this with a stream command without setting TMS on the last bit + + // Read the 'CRC match' bit, and go to exit1_dr + // May need to adjust for other devices in chain! + datawords[0] = 0; + err |= jtag_read_write_stream(datawords, &crc_match, 1, 1, 0); // set 'adjust' to pull match bit all the way in + // But don't set TMS above, that would shift prefix bits (again), wasting time. + err |= jtag_write_bit(TMS); // exit1_dr + err |= tap_exit_to_idle(); // Go from EXIT1 to IDLE + + if(!crc_match) { + printf("CRC ERROR! match bit after write is %i (computed CRC 0x%x)", crc_match, crc_calc); + if(!retry_do()) { printf("Retry count exceeded! Abort!\n\n"); exit(1);} + goto wb_burst_write_retry_full; + } + else debug("CRC OK!"); + + + // Now, read the error register and retry/recompute as needed + if (current_chain == DC_WISHBONE) + { + err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 1); // First, just get 1 bit...read address only if necessary + if(err_data[0] & 0x1) { // Then we have a problem. + err |= adbg_ctrl_read(DBG_WB_REG_ERROR, err_data, 33); + addr = (err_data[0] >> 1) | (err_data[1] << 31); + i = (addr - start_address) / word_size_bytes; + printf("ERROR! WB bus error during burst write, address 0x%lX (index 0x%X), retrying!\n", addr, i); + bus_error_retries++; + if(bus_error_retries > MAX_BUS_ERRORS) { + printf("Max WB bus errors reached!\n"); + return err|APP_ERR_MAX_BUS_ERR; + } + // Don't call retry_do(), a JTAG reset won't help a WB bus error + err |= adbg_ctrl_write(DBG_WB_REG_ERROR, err_data, 1); // Write 1 bit, to reset the error register. + goto wb_burst_write_retry_partial; + } + } + + retry_ok(); + return err; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/chain_commands.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/chain_commands.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/chain_commands.h (revision 27) @@ -0,0 +1,49 @@ +#ifndef _CHAIN_COMMANDS_H_ +#define _CHAIN_COMMANDS_H_ + +#include + +// These two are used by both debug modules +extern int current_chain; +extern int desired_chain; + +// These are needed by the advanced debug module +extern int global_DR_prefix_bits; +extern int global_DR_postfix_bits; +extern unsigned char global_xilinx_bscan; + +// Discover devices on JTAG chain +int jtag_enumerate_chain(uint32_t **id_array, int *num_devices); +int jtag_get_idcode(uint32_t cmd, uint32_t *idcode); + +// Functions to set configuration for the JTAG chain +void config_set_IR_size(int size); +void config_set_IR_prefix_bits(int bits); +void config_set_IR_postfix_bits(int bits); +void config_set_DR_prefix_bits(int bits); +void config_set_DR_postfix_bits(int bits); +void config_set_debug_cmd(unsigned int cmd); +void config_set_alt_vjtag(unsigned char enable); +void config_set_vjtag_cmd_vir(unsigned int cmd); +void config_set_vjtag_cmd_vdr(unsigned int cmd); +void config_set_xilinx_bscan(unsigned char enable); + +// Operations on the JTAG TAP +int tap_reset(void); +int tap_enable_debug_module(void); +int tap_set_ir(int ir); +int tap_set_shift_dr(void); +int tap_exit_to_idle(void); + +// Functions to Send/receive bitstreams via JTAG +// These functions are aware of other devices in the chain, and may adjust for them. +int jtag_write_bit(uint8_t packet); +int jtag_read_write_bit(uint8_t packet, uint8_t *in_bit); +int jtag_write_stream(uint32_t *out_data, int length_bits, unsigned char set_TMS); +int jtag_read_write_stream(uint32_t *out_data, uint32_t *in_data, int length_bits, + unsigned char adjust, unsigned char set_TMS); + +int retry_do(void); +void retry_ok(void); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.c (revision 27) @@ -0,0 +1,2968 @@ +/* rsp-server.c -- Remote Serial Protocol server for GDB + +Copyright (C) 2008 Embecosm Limited + +Contributor Jeremy Bennett + +This file was part of Or1ksim, the OpenRISC 1000 Architectural Simulator. +Adapted for adv_jtag_bridge by Nathan Yawn + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3 of the License, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. + +You should have received a copy of the GNU General Public License along +with this program. If not, see . +*/ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + +/* System includes */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Package includes */ +#include "except.h" +#include "spr-defs.h" +#include "dbg_api.h" +#include "errcodes.h" + +/* Define to log each packet */ +#define RSP_TRACE 0 + +/*! Name of the RSP service */ +#define OR1KSIM_RSP_SERVICE "jtag-rsp" + +/*! Protocol used by Or1ksim */ +#define OR1KSIM_RSP_PROTOCOL "tcp" + +/* Indices of GDB registers that are not GPRs. Must match GDB settings! */ +#define PPC_REGNUM (MAX_GPRS + 0) /*!< Previous PC */ +#define NPC_REGNUM (MAX_GPRS + 1) /*!< Next PC */ +#define SR_REGNUM (MAX_GPRS + 2) /*!< Supervision Register */ +#define NUM_REGS (MAX_GRPS + 3) /*!< Total GDB registers */ + +/*! Trap instruction for OR32 */ +#define OR1K_TRAP_INSTR 0x21000001 + +/*! Definition of GDB target signals. Data taken from the GDB 6.8 + source. Only those we use defined here. */ +enum target_signal { + TARGET_SIGNAL_NONE = 0, + TARGET_SIGNAL_INT = 2, + TARGET_SIGNAL_ILL = 4, + TARGET_SIGNAL_TRAP = 5, + TARGET_SIGNAL_FPE = 8, + TARGET_SIGNAL_BUS = 10, + TARGET_SIGNAL_SEGV = 11, + TARGET_SIGNAL_ALRM = 14, + TARGET_SIGNAL_USR2 = 31, + TARGET_SIGNAL_PWR = 32 +}; + +/*! The maximum number of characters in inbound/outbound buffers. The largest + packets are the 'G' packet, which must hold the 'G' and all the registers + with two hex digits per byte and the 'g' reply, which must hold all the + registers, and (in our implementation) an end-of-string (0) + character. Adding the EOS allows us to print out the packet as a + string. So at least NUMREGBYTES*2 + 1 (for the 'G' or the EOS) are needed + for register packets */ +#define GDB_BUF_MAX ((NUM_REGS) * 8 + 1) + +/*! Size of the matchpoint hash table. Largest prime < 2^10 */ +#define MP_HASH_SIZE 1021 + +/*! String to map hex digits to chars */ +static const char hexchars[]="0123456789abcdef"; + +/*! Data structure for RSP buffers. Can't be null terminated, since it may + include zero bytes */ +struct rsp_buf +{ + char data[GDB_BUF_MAX]; + int len; +}; + +/*! Enumeration of different types of matchpoint. These have explicit values + matching the second digit of 'z' and 'Z' packets. */ +enum mp_type { + BP_MEMORY = 0, + BP_HARDWARE = 1, + WP_WRITE = 2, + WP_READ = 3, + WP_ACCESS = 4 +}; + +/*! Data structure for a matchpoint hash table entry */ +struct mp_entry +{ + enum mp_type type; /*!< Type of matchpoint */ + unsigned long int addr; /*!< Address with the matchpoint */ + unsigned long int instr; /*!< Substituted instruction */ + struct mp_entry *next; /*!< Next entry with this hash */ +}; + +/* Data to interface the GDB handler thread with the target handler thread */ +pthread_mutex_t rsp_mutex = PTHREAD_MUTEX_INITIALIZER; /*!< Mutex to protect the "target_running" member of the rsp struct */ +pthread_mutex_t target_handler_mutex = PTHREAD_MUTEX_INITIALIZER; +pthread_cond_t target_handler_cond = PTHREAD_COND_INITIALIZER; + +int target_handler_state = 0; +pthread_t target_handler_thread; +void *target_handler(void *arg); + +int pipe_fds[2]; // Descriptors for the pipe from the poller thread to the GDB interface thread + +// Work-around for the current OR1200 implementation; After setting the NPC, +// it always reads back 0 until the next instruction is executed. This +// is a problem with the way we handle memory breakpoints (resetting the NPC), +// so we cache the last value we set the NPC to, incase we need it. +unsigned char use_cached_npc = 0; +unsigned int cached_npc = 0; + +/*! Central data for the RSP connection */ +static struct +{ + int client_waiting; /*!< Is client waiting a response? */ + int target_running; /*!< Is target hardware running? --NAY */ + int single_step_mode; + int proto_num; /*!< Number of the protocol used */ + int server_fd; /*!< FD for new connections */ + int client_fd; /*!< FD for talking to GDB */ + int sigval; /*!< GDB signal for any exception */ + unsigned long int start_addr; /*!< Start of last run */ + struct mp_entry *mp_hash[MP_HASH_SIZE]; /*!< Matchpoint hash table */ +} rsp; + +/* Forward declarations of static functions */ +void rsp_exception (unsigned long int except); +static void rsp_server_request (); +static void rsp_client_request (); +static void rsp_server_close (); +static void rsp_client_close (); +static void put_packet (struct rsp_buf *buf); +static void put_str_packet (const char *str); +static struct rsp_buf *get_packet (); +static void put_rsp_char (char c); +static int get_rsp_char (); +static int rsp_unescape (char *data, + int len); +static void mp_hash_init (); +static void mp_hash_add (enum mp_type type, + unsigned long int addr, + unsigned long int instr); +static struct mp_entry *mp_hash_lookup (enum mp_type type, + unsigned long int addr); +static struct mp_entry *mp_hash_delete (enum mp_type type, + unsigned long int addr); +static int hex (int c); +static void reg2hex (unsigned long int val, + char *buf); +static unsigned long int hex2reg (char *buf); +static void ascii2hex (char *dest, + char *src); +static void hex2ascii (char *dest, + char *src); +static unsigned int set_npc (unsigned long int addr); +static void rsp_report_exception (); +static void rsp_continue (struct rsp_buf *buf); +static void rsp_continue_with_signal (struct rsp_buf *buf); +static void rsp_continue_generic (unsigned long int except); +static void rsp_read_all_regs (); +static void rsp_write_all_regs (struct rsp_buf *buf); +static void rsp_read_mem (struct rsp_buf *buf); +static void rsp_write_mem (struct rsp_buf *buf); +static void rsp_read_reg (struct rsp_buf *buf); +static void rsp_write_reg (struct rsp_buf *buf); +static void rsp_query (struct rsp_buf *buf); +static void rsp_command (struct rsp_buf *buf); +static void rsp_set (struct rsp_buf *buf); +static void rsp_restart (); +static void rsp_step (struct rsp_buf *buf); +static void rsp_step_with_signal (struct rsp_buf *buf); +static void rsp_step_generic (unsigned long int except); +static void rsp_vpkt (struct rsp_buf *buf); +static void rsp_write_mem_bin (struct rsp_buf *buf); +static void rsp_remove_matchpoint (struct rsp_buf *buf); +static void rsp_insert_matchpoint (struct rsp_buf *buf); + +void set_stall_state(int stall); + +/*---------------------------------------------------------------------------*/ +/*!Initialize the Remote Serial Protocol connection + + This involves setting up a socket to listen on a socket for attempted + connections from a single GDB instance (we couldn't be talking to multiple + GDBs at once!). + + The service is specified either as a port number in the Or1ksim configuration + (parameter rsp_port in section debug, default 51000) or as a service name + in the constant OR1KSIM_RSP_SERVICE. + + The protocol used for communication is specified in OR1KSIM_RSP_PROTOCOL. */ +/*---------------------------------------------------------------------------*/ +void +rsp_init (int portNum) +{ + struct protoent *protocol; /* Protocol number */ + struct hostent *host_entry; /* Our host entry */ + struct sockaddr_in sock_addr; /* Socket address */ + + int optval; /* Socket options */ + int flags; /* Socket flags */ + char name[256]; /* Our name */ + unsigned long tmp; + + + /* Clear out the central data structure */ + rsp.client_waiting = 0; /* GDB client is not waiting for us */ + rsp.proto_num = -1; /* i.e. invalid */ + rsp.server_fd = -1; /* i.e. invalid */ + rsp.client_fd = -1; /* i.e. invalid */ + rsp.sigval = 0; /* No exception */ + rsp.start_addr = EXCEPT_RESET; /* Default restart point */ + + /* Set up the matchpoint hash table */ + mp_hash_init (); + + /* Get the protocol number of TCP and save it for future use */ + protocol = getprotobyname (OR1KSIM_RSP_PROTOCOL); + if (NULL == protocol) + { + fprintf (stderr, "Warning: RSP unable to load protocol \"%s\": %s\n", + OR1KSIM_RSP_PROTOCOL, strerror (errno)); + return; + } + + rsp.proto_num = protocol->p_proto; /* Saved for future client use */ + + /* 0 is used as the RSP port number to indicate that we should use the + service name instead. */ + if (0 == portNum) + { + struct servent *service = + getservbyname (OR1KSIM_RSP_SERVICE, protocol->p_name); + + if (NULL == service) + { + fprintf (stderr, "Warning: RSP unable to find service \"%s\": %s\n", + OR1KSIM_RSP_SERVICE, strerror (errno)); + return; + } + + portNum = ntohs (service->s_port); + } + + /* Create the socket using the TCP protocol */ + rsp.server_fd = socket (PF_INET, SOCK_STREAM, protocol->p_proto); + if (rsp.server_fd < 0) + { + fprintf (stderr, "Warning: RSP could not create server socket: %s\n", + strerror (errno)); + return; + } + + /* Set this socket to reuse its address. This allows the server to keep + trying before a GDB session has got going. */ + optval = 1; + if (setsockopt(rsp.server_fd, SOL_SOCKET, + SO_REUSEADDR, &optval, sizeof (optval)) < 0) + { + fprintf (stderr, "Cannot set SO_REUSEADDR option on server socket %d: " + "%s\n", rsp.server_fd, strerror (errno)); + rsp_server_close(); + return; + } + + /* The server should be non-blocking. Get the current flags and then set the + non-blocking flags */ + flags = fcntl (rsp.server_fd, F_GETFL); + if (flags < 0) + { + fprintf (stderr, "Warning: Unable to get flags for RSP server socket " + "%d: %s\n", rsp.server_fd, strerror (errno)); + rsp_server_close(); + return; + } + + flags |= O_NONBLOCK; + if (fcntl (rsp.server_fd, F_SETFL, flags) < 0) + { + fprintf (stderr, "Warning: Unable to set flags for RSP server socket " + "%d to 0x%08x: %s\n", rsp.server_fd, flags, strerror (errno)); + rsp_server_close(); + return; + } + + /* Find out what our name is */ + if (gethostname (name, sizeof (name)) < 0) + { + fprintf (stderr, "Warning: Unable to get hostname for RSP server: %s\n", + strerror (errno)); + rsp_server_close(); + return; + } + + /* Find out what our address is */ + host_entry = gethostbyname (name); + if (NULL == host_entry) + { + fprintf (stderr, "Warning: Unable to get host entry for RSP server: " + "%s\n", strerror (errno)); + rsp_server_close(); + return; + } + + /* Bind our socket to the appropriate address */ + memset (&sock_addr, 0, sizeof (sock_addr)); + sock_addr.sin_family = host_entry->h_addrtype; + sock_addr.sin_port = htons (portNum); + + if (bind (rsp.server_fd, + (struct sockaddr *)&sock_addr, sizeof (sock_addr)) < 0) + { + fprintf (stderr, "Warning: Unable to bind RSP server socket %d to port " + "%d: %s\n", rsp.server_fd, portNum, + strerror (errno)); + rsp_server_close(); + return; + } + + /* Mark us as a passive port, with a maximum backlog of 1 connection (we + never connect simultaneously to more than one RSP client!) */ + if (listen (rsp.server_fd, 1) < 0) + { + fprintf (stderr, "Warning: Unable to set RSP backlog on server socket " + "%d to %d: %s\n", rsp.server_fd, 1, strerror (errno)); + rsp_server_close(); + return; + } + + // Stall the CPU...it starts off running. + set_stall_state(1); + rsp.target_running = 0; + target_handler_state = 0; // Don't start the polling thread until we have a client + rsp.single_step_mode = 0; + + // Set up the CPU to break to the debug unit on exceptions. + dbg_cpu0_read(SPR_DSR, &tmp); + dbg_cpu0_write(SPR_DSR, tmp|SPR_DSR_TE|SPR_DSR_FPE|SPR_DSR_RE|SPR_DSR_IIE|SPR_DSR_AE|SPR_DSR_BUSEE); + + // Enable TRAP exception, but don't otherwise change the SR + dbg_cpu0_read(SPR_SR, &tmp); + dbg_cpu0_write(SPR_SR, tmp|SPR_SR_SM); // We set 'supervisor mode', which also enables TRAP exceptions + + if(0 > pipe(pipe_fds)) { // pipe_fds[0] is for reading, [1] is for writing + perror("Error creating sockets: "); + rsp_server_close(); + return; + } + + // Create the harware target polling thread + if(pthread_create(&target_handler_thread, NULL, target_handler, NULL)) + { + fprintf(stderr, "Failed to create target handler thread!\n"); + rsp_server_close(); + return; + } + +} /* rsp_init () */ + + +/*---------------------------------------------------------------------------*/ +/*!Look for action on RSP + + This function is called when the processor has stalled, which, except for + initialization, must be due to an interrupt. + + If we have no RSP client, we poll the RSP server for a client requesting to + join. We can make no progress until the client is available. + + Then if the cause is an interrupt, and the interrupt not been notified to + GDB, a packet reporting the cause of the interrupt is sent. + + The function then polls the RSP client port (if open) + for available input. It then processes the GDB RSP request and return. + + If an error occurs when polling the RSP server, other than an interrupt, a + warning message is printed out and the RSP server and client (if open) + connections are closed. + + If an error occurs when polling the RSP client, other than an interrupt, a + warning message is printed out and the RSP client connection is closed. + + Polling is always blocking (i.e. timeout -1). */ +/*---------------------------------------------------------------------------*/ +int handle_rsp (void) +{ + struct pollfd fds[2]; /* The FD to poll for */ + char bitbucket; + + /* Give up if no RSP server port (this should not occur) */ + if (-1 == rsp.server_fd) + { + fprintf (stderr, "Warning: No RSP server port open\n"); + return 0; + } + + /* If we have no RSP client, poll the server until we get one. */ + while (-1 == rsp.client_fd) + { + /* Poll for a client on the RSP server socket */ + fds[0].fd = rsp.server_fd; /* FD for the server socket */ + fds[0].events = POLLIN; /* Poll for input activity */ + + /* Poll is always blocking. We can't do anything more until something + happens here. */ + switch (poll (fds, 1, -1)) + { + case -1: + /* Error. Only one we ignore is an interrupt */ + if (EINTR != errno) + { + fprintf (stderr, "Warning: poll for RSP failed: closing " + "server connection: %s\n", strerror (errno)); + rsp_client_close(); + rsp_server_close(); + return 0; + } + break; + + case 0: + /* Timeout. This can't occur! */ + fprintf (stderr, "Warning: Unexpected RSP server poll timeout\n"); + break; + + default: + /* Is the poll due to input available? If we succeed ignore any + outstanding reports of exceptions. */ + if (POLLIN == (fds[0].revents & POLLIN)) + { + rsp_server_request (); + rsp.client_waiting = 0; /* No longer waiting */ + } + else + { + /* Error leads to closing the client and server */ + fprintf (stderr, "Warning: RSP server received flags " + "0x%08x: closing server connection\n", fds[0].revents); + rsp_client_close(); + rsp_server_close(); + return 0; + } + } + } + + + /* Poll the RSP client socket for a message from GDB */ + /* Also watch for a message from the hardware poller thread. + This might be easier if we used ppoll() and sent a Signal, instead + of using a pipe? */ + + fds[0].fd = rsp.client_fd; /* FD for the client socket */ + fds[0].events = POLLIN; /* Poll for input activity */ + + fds[1].fd = pipe_fds[0]; + fds[1].events = POLLIN; + + /* Poll is always blocking. We can't do anything more until something + happens here. */ + //fprintf(stderr, "Polling...\n"); + switch (poll (fds, 2, -1)) + { + case -1: + /* Error. Only one we ignore is an interrupt */ + if (EINTR != errno) + { + fprintf (stderr, "Warning: poll for RSP failed: closing " + "server connection: %s\n", strerror (errno)); + rsp_client_close(); + rsp_server_close(); + return 0; + } + + return 1; + + case 0: + /* Timeout. This can't occur! */ + fprintf (stderr, "Warning: Unexpected RSP client poll timeout\n"); + return 1; + + default: + /* Is the client activity due to input available? */ + if (POLLIN == (fds[0].revents & POLLIN)) + { + rsp_client_request (); + } + else if(POLLIN == (fds[1].revents & POLLIN)) + { + //fprintf(stderr, "Got pipe event from monitor thread\n"); + bitbucket = read(pipe_fds[0], &bitbucket, 1); // Clear the byte out and discard + /* If we have an unacknowledged exception and a client is available, tell + GDB. If this exception was a trap due to a memory breakpoint, then + adjust the NPC. */ + if (rsp.client_waiting) + { + // Read the PPC + unsigned long ppcval; + dbg_cpu0_read(SPR_PPC, &ppcval); + + if ((TARGET_SIGNAL_TRAP == rsp.sigval) && + (NULL != mp_hash_lookup (BP_MEMORY, ppcval))) // We also get TRAP from a single-step, don't change npc unless it's really a BP + { + set_npc (ppcval); + } + + rsp_report_exception(); + rsp.client_waiting = 0; /* No longer waiting */ + } + } + else + { + /* Error leads to closing the client, but not the server. */ + fprintf (stderr, "Warning: RSP client received flags " + "0x%08x: closing client connection\n", fds[0].revents); + rsp_client_close(); + } + } + + return 1; +} /* handle_rsp () */ + + +//--------------------------------------------------------------------------- +//!Note an exception for future processing +// +// The simulator has encountered an exception. Record it here, so that a +// future call to handle_exception will report it back to the client. The +// signal is supplied in Or1ksim form and recorded in GDB form. + +// We flag up a warning if an exception is already pending, and ignore the +// earlier exception. + +// @param[in] except The exception +//--------------------------------------------------------------------------- + +void rsp_exception (unsigned long int except) +{ + int sigval; // GDB signal equivalent to exception + + switch (except) + { + case SPR_DRR_RSTE: sigval = TARGET_SIGNAL_PWR; break; + case SPR_DRR_BUSEE: sigval = TARGET_SIGNAL_BUS; break; + case SPR_DRR_DPFE: sigval = TARGET_SIGNAL_SEGV; break; + case SPR_DRR_IPFE: sigval = TARGET_SIGNAL_SEGV; break; + case SPR_DRR_TTE: sigval = TARGET_SIGNAL_ALRM; break; + case SPR_DRR_AE: sigval = TARGET_SIGNAL_BUS; break; + case SPR_DRR_IIE: sigval = TARGET_SIGNAL_ILL; break; + case SPR_DRR_IE: sigval = TARGET_SIGNAL_INT; break; + case SPR_DRR_DME: sigval = TARGET_SIGNAL_SEGV; break; + case SPR_DRR_IME: sigval = TARGET_SIGNAL_SEGV; break; + case SPR_DRR_RE: sigval = TARGET_SIGNAL_FPE; break; + case SPR_DRR_SCE: sigval = TARGET_SIGNAL_USR2; break; + case SPR_DRR_FPE: sigval = TARGET_SIGNAL_FPE; break; + case SPR_DRR_TE: sigval = TARGET_SIGNAL_TRAP; break; + + // In the current OR1200 hardware implementation, a single-step does not create a TRAP, + // the DSR reads back 0. GDB expects a TRAP, so... + case 0: sigval = TARGET_SIGNAL_TRAP; break; + + default: + fprintf (stderr, "Warning: Unknown RSP exception %lu: Ignored\n", except); + return; + } + + if ((0 != rsp.sigval) && (sigval != rsp.sigval)) + { + fprintf (stderr, "Warning: RSP signal %d received while signal " + "%d pending: Pending exception replaced\n", sigval, rsp.sigval); + } + + rsp.sigval = sigval; // Save the signal value + +} // rsp_exception () + + + +/*---------------------------------------------------------------------------*/ +/*!Handle a request to the server for a new client + + We may already have a client. If we do, we will accept an immediately close + the new client. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_server_request () +{ + struct sockaddr_in sock_addr; /* The socket address */ + socklen_t len; /* Size of the socket address */ + int fd; /* The client FD */ + int flags; /* fcntl () flags */ + int optval; /* Option value for setsockopt () */ + + /* Get the client FD */ + len = sizeof (sock_addr); + fd = accept (rsp.server_fd, (struct sockaddr *)&sock_addr, &len); + if (fd < 0) + { + /* This is can happen, because a connection could have started, and then + terminated due to a protocol error or user initiation before the + accept could take place. + + Two of the errors we can ignore (a retry is permissible). All other + errors, we assume the server port has gone tits up and close. */ + + if ((errno != EWOULDBLOCK) && (errno != EAGAIN)) + { + fprintf (stderr, "Warning: RSP server error creating client: " + "closing connection %s\n", strerror (errno)); + rsp_client_close (); + rsp_server_close (); + } + + return; + } + + /* If we already have a client, then immediately close the new one */ + if (-1 != rsp.client_fd) + { + fprintf (stderr, "Warning: Additional RSP client request refused\n"); + close (fd); + return; + } + + /* We have a new client, which should be non-blocking. Get the current flags + and then set the non-blocking flags */ + flags = fcntl (fd, F_GETFL); + if (flags < 0) + { + fprintf (stderr, "Warning: Unable to get flags for RSP client socket " + "%d: %s\n", fd, strerror (errno)); + close (fd); + return; + } + + flags |= O_NONBLOCK; + if (fcntl (fd, F_SETFL, flags) < 0) + { + fprintf (stderr, "Warning: Unable to set flags for RSP client socket " + "%d to 0x%08x: %s\n", fd, flags, strerror (errno)); + close (fd); + return; + } + + /* Turn of Nagel's algorithm for the client socket. This means the client + sends stuff immediately, it doesn't wait to fill up a packet. */ + optval = 0; + len = sizeof (optval); + if (setsockopt (fd, rsp.proto_num, TCP_NODELAY, &optval, len) < 0) + { + fprintf (stderr, "Warning: Unable to disable Nagel's algorithm for " + "RSP client socket %d: %s\n", fd, strerror (errno)); + close (fd); + return; + } + + /* We have a new client socket */ + rsp.client_fd = fd; + + // Set the hardware polling thread to run + // This will cause the poll() to be interrupted next time + pthread_mutex_lock(&target_handler_mutex); + target_handler_state = 1; + pthread_mutex_unlock(&target_handler_mutex); + +} /* rsp_server_request () */ + + +/*---------------------------------------------------------------------------*/ +/*!Deal with a request from the GDB client session + + In general, apart from the simplest requests, this function replies on + other functions to implement the functionality. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_client_request () +{ + struct rsp_buf *buf = get_packet (); /* Message sent to us */ + + // Null packet means we hit EOF or the link was closed for some other + // reason. Close the client and return + if (NULL == buf) + { + rsp_client_close (); + return; + } + +#if RSP_TRACE + printf ("Packet received %s: %d chars\n", buf->data, buf->len ); + fflush (stdout); +#endif + + // Check if target is running. + int running = 0; + pthread_mutex_lock(&rsp_mutex); + running = rsp.target_running; + pthread_mutex_unlock(&rsp_mutex); + + // If running, only process async BREAK command + if(running) + { + if(buf->data[0] == 0x03) // 0x03 is the ctrl-C "break" command from GDB + { + // Send the STALL command to the target + set_stall_state (1); + } + else + { + // Send a response to GDB indicating the target is not stalled: "Target not stopped" + put_str_packet("O6154677274656e20746f73206f74707064650a0d"); // Need to hex-encode warning string (I think...) + fprintf(stderr, "WARNING: Received GDB command 0x%X (%c) while target running!\n", buf->data[0], buf->data[0]); + } + return; + } + + switch (buf->data[0]) + { + case 0x03: + fprintf(stderr, "Warning: asynchronous BREAK received while target stopped.\n"); + return; + + case '!': + /* Request for extended remote mode */ + put_str_packet ("OK"); + return; + + case '?': + /* Return last signal ID */ + rsp_report_exception(); + return; + + case 'A': + /* Initialization of argv not supported */ + fprintf (stderr, "Warning: RSP 'A' packet not supported: ignored\n"); + put_str_packet ("E01"); + return; + + case 'b': + /* Setting baud rate is deprecated */ + fprintf (stderr, "Warning: RSP 'b' packet is deprecated and not " + "supported: ignored\n"); + return; + + case 'B': + /* Breakpoints should be set using Z packets */ + fprintf (stderr, "Warning: RSP 'B' packet is deprecated (use 'Z'/'z' " + "packets instead): ignored\n"); + return; + + case 'c': + /* Continue */ + rsp_continue (buf); + return; + + case 'C': + /* Continue with signal */ + rsp_continue_with_signal (buf); + return; + + case 'd': + /* Disable debug using a general query */ + fprintf (stderr, "Warning: RSP 'd' packet is deprecated (define a 'Q' " + "packet instead: ignored\n"); + return; + + case 'D': + /* Detach GDB. Do this by closing the client. The rules say that + execution should continue. TODO. Is this really then intended + meaning? Or does it just mean that only vAttach will be recognized + after this? */ + put_str_packet ("OK"); + rsp_client_close (); + set_stall_state (0); + return; + + case 'F': + /* File I/O is not currently supported */ + fprintf (stderr, "Warning: RSP file I/O not currently supported: 'F' " + "packet ignored\n"); + return; + + case 'g': + rsp_read_all_regs (); + return; + + case 'G': + rsp_write_all_regs (buf); + return; + + case 'H': + /* Set the thread number of subsequent operations. For now ignore + silently and just reply "OK" */ + put_str_packet ("OK"); + return; + + case 'i': + /* Single instruction step */ + rsp_step (buf); + return; + + case 'I': + /* Single instruction step with signal */ + rsp_step_with_signal (buf); + return; + + case 'k': + /* Kill request. Do nothing for now. */ + return; + + case 'm': + /* Read memory (symbolic) */ + rsp_read_mem (buf); + return; + + case 'M': + /* Write memory (symbolic) */ + rsp_write_mem (buf); + return; + + case 'p': + /* Read a register */ + rsp_read_reg (buf); + return; + + case 'P': + /* Write a register */ + rsp_write_reg (buf); + return; + + case 'q': + /* Any one of a number of query packets */ + rsp_query (buf); + return; + + case 'Q': + /* Any one of a number of set packets */ + rsp_set (buf); + return; + + case 'r': + /* Reset the system. Deprecated (use 'R' instead) */ + fprintf (stderr, "Warning: RSP 'r' packet is deprecated (use 'R' " + "packet instead): ignored\n"); + return; + + case 'R': + /* Restart the program being debugged. */ + rsp_restart (); + return; + + case 's': + /* Single step (one high level instruction). This could be hard without + DWARF2 info */ + rsp_step (buf); + return; + + case 'S': + /* Single step (one high level instruction) with signal. This could be + hard without DWARF2 info */ + rsp_step_with_signal (buf); + return; + + case 't': + /* Search. This is not well defined in the manual and for now we don't + support it. No response is defined. */ + fprintf (stderr, "Warning: RSP 't' packet not supported: ignored\n"); + return; + + case 'T': + /* Is the thread alive. We are bare metal, so don't have a thread + context. The answer is always "OK". */ + put_str_packet ("OK"); + return; + + case 'v': + /* Any one of a number of packets to control execution */ + rsp_vpkt (buf); + return; + + case 'X': + /* Write memory (binary) */ + rsp_write_mem_bin (buf); + return; + + case 'z': + /* Remove a breakpoint/watchpoint. */ + rsp_remove_matchpoint (buf); + return; + + case 'Z': + /* Insert a breakpoint/watchpoint. */ + rsp_insert_matchpoint (buf); + return; + + default: + /* Unknown commands are ignored */ + fprintf (stderr, "Warning: Unknown RSP request %s\n", buf->data); + return; + } +} /* rsp_client_request () */ + + +/*---------------------------------------------------------------------------*/ +/*!Close the server if it is open */ +/*---------------------------------------------------------------------------*/ +static void +rsp_server_close () +{ + // Stop the target handler thread + pthread_mutex_lock(&target_handler_mutex); + target_handler_state = 2; + pthread_mutex_unlock(&target_handler_mutex); + + if (-1 != rsp.server_fd) + { + close (rsp.server_fd); + rsp.server_fd = -1; + } +} /* rsp_server_close () */ + + +/*---------------------------------------------------------------------------*/ +/*!Close the client if it is open */ +/*---------------------------------------------------------------------------*/ +static void +rsp_client_close () +{ + unsigned char was_running = 0; + + // If target is running, stop it so we can modify SPRs + pthread_mutex_lock(&rsp_mutex); + was_running = rsp.target_running; + pthread_mutex_unlock(&rsp_mutex); + if(was_running) { + set_stall_state(1); + } + + // Clear the DSR: don't transfer control to the debug unit for any reason + dbg_cpu0_write(SPR_DSR, 0); + + // If target was running, restart it. + if(was_running) { + set_stall_state(0); + } + + // Stop the target handler thread. MUST BE DONE AFTER THE LAST set_stall_state()! + pthread_mutex_lock(&target_handler_mutex); + target_handler_state = 0; + pthread_mutex_unlock(&target_handler_mutex); + + if (-1 != rsp.client_fd) + { + close (rsp.client_fd); + rsp.client_fd = -1; + } +} /* rsp_client_close () */ + + +/*---------------------------------------------------------------------------*/ +/*!Send a packet to the GDB client + + Modeled on the stub version supplied with GDB. Put out the data preceded by + a '$', followed by a '#' and a one byte checksum. '$', '#', '*' and '}' are + escaped by preceding them with '}' and then XORing the character with + 0x20. + + @param[in] buf The data to send */ +/*---------------------------------------------------------------------------*/ +static void +put_packet (struct rsp_buf *buf) +{ + int ch; /* Ack char */ + + /* Construct $#. Repeat until the GDB client + acknowledges satisfactory receipt. */ + do + { + unsigned char checksum = 0; /* Computed checksum */ + int count = 0; /* Index into the buffer */ + +#if RSP_TRACE + printf ("Putting %s\n", buf->data); + fflush (stdout); +#endif + + put_rsp_char ('$'); /* Start char */ + + /* Body of the packet */ + for (count = 0; count < buf->len; count++) + { + unsigned char ch = buf->data[count]; + + /* Check for escaped chars */ + if (('$' == ch) || ('#' == ch) || ('*' == ch) || ('}' == ch)) + { + ch ^= 0x20; + checksum += (unsigned char)'}'; + put_rsp_char ('}'); + } + + checksum += ch; + put_rsp_char (ch); + } + + put_rsp_char ('#'); /* End char */ + + /* Computed checksum */ + put_rsp_char (hexchars[checksum >> 4]); + put_rsp_char (hexchars[checksum % 16]); + + /* Check for ack of connection failure */ + ch = get_rsp_char (); + if (-1 == ch) + { + return; /* Fail the put silently. */ + } + } + while ('+' != ch); + +} /* put_packet () */ + + +/*---------------------------------------------------------------------------*/ +/*!Convenience to put a constant string packet + + param[in] str The text of the packet */ +/*---------------------------------------------------------------------------*/ +static void +put_str_packet (const char *str) +{ + struct rsp_buf buf; + int len = strlen (str); + + /* Construct the packet to send, so long as string is not too big, + otherwise truncate. Add EOS at the end for convenient debug printout */ + + if (len >= GDB_BUF_MAX) + { + fprintf (stderr, "Warning: String %s too large for RSP packet: " + "truncated\n", str); + len = GDB_BUF_MAX - 1; + } + + strncpy (buf.data, str, len); + buf.data[len] = 0; + buf.len = len; + + put_packet (&buf); + +} /* put_str_packet () */ + + +/*---------------------------------------------------------------------------*/ +/*!Get a packet from the GDB client + + Modeled on the stub version supplied with GDB. The data is in a static + buffer. The data should be copied elsewhere if it is to be preserved across + a subsequent call to get_packet(). + + Unlike the reference implementation, we don't deal with sequence + numbers. GDB has never used them, and this implementation is only intended + for use with GDB 6.8 or later. Sequence numbers were removed from the RSP + standard at GDB 5.0. + + @return A pointer to the static buffer containing the data */ +/*---------------------------------------------------------------------------*/ +static struct rsp_buf * +get_packet () +{ + static struct rsp_buf buf; /* Survives the return */ + + /* Keep getting packets, until one is found with a valid checksum */ + while (1) + { + unsigned char checksum; /* The checksum we have computed */ + int count; /* Index into the buffer */ + int ch; /* Current character */ + + /* Wait around for the start character ('$'). Ignore all other + characters */ + ch = get_rsp_char (); + while (ch != '$') + { + if (-1 == ch) + { + return NULL; /* Connection failed */ + } + + // 0x03 is a special case, an out-of-band break when running + if(ch == 0x03) + { + buf.data[0] = ch; + buf.len = 1; + return &buf; + } + + ch = get_rsp_char (); + } + + /* Read until a '#' or end of buffer is found */ + checksum = 0; + count = 0; + while (count < GDB_BUF_MAX - 1) + { + ch = get_rsp_char (); + + /* Check for connection failure */ + if (-1 == ch) + { + return NULL; + } + + /* If we hit a start of line char begin all over again */ + if ('$' == ch) + { + checksum = 0; + count = 0; + + continue; + } + + /* Break out if we get the end of line char */ + if ('#' == ch) + { + break; + } + + /* Update the checksum and add the char to the buffer */ + + checksum = checksum + (unsigned char)ch; + buf.data[count] = (char)ch; + count = count + 1; + } + + /* Mark the end of the buffer with EOS - it's convenient for non-binary + data to be valid strings. */ + buf.data[count] = 0; + buf.len = count; + + /* If we have a valid end of packet char, validate the checksum */ + if ('#' == ch) + { + unsigned char xmitcsum; /* The checksum in the packet */ + + ch = get_rsp_char (); + if (-1 == ch) + { + return NULL; /* Connection failed */ + } + xmitcsum = hex (ch) << 4; + + ch = get_rsp_char (); + if (-1 == ch) + { + return NULL; /* Connection failed */ + } + + xmitcsum += hex (ch); + + /* If the checksums don't match print a warning, and put the + negative ack back to the client. Otherwise put a positive ack. */ + if (checksum != xmitcsum) + { + fprintf (stderr, "Warning: Bad RSP checksum: Computed " + "0x%02x, received 0x%02x\n", checksum, xmitcsum); + + put_rsp_char ('-'); /* Failed checksum */ + } + else + { + put_rsp_char ('+'); /* successful transfer */ + break; + } + } + else + { + fprintf (stderr, "Warning: RSP packet overran buffer\n"); + } + } + + return &buf; /* Success */ + +} /* get_packet () */ + + +/*---------------------------------------------------------------------------*/ +/*!Put a single character out onto the client socket + + This should only be called if the client is open, but we check for safety. + + @param[in] c The character to put out */ +/*---------------------------------------------------------------------------*/ +static void +put_rsp_char (char c) +{ + if (-1 == rsp.client_fd) + { + fprintf (stderr, "Warning: Attempt to write '%c' to unopened RSP " + "client: Ignored\n", c); + return; + } + + /* Write until successful (we retry after interrupts) or catastrophic + failure. */ + while (1) + { + switch (write (rsp.client_fd, &c, sizeof (c))) + { + case -1: + /* Error: only allow interrupts or would block */ + if ((EAGAIN != errno) && (EINTR != errno)) + { + fprintf (stderr, "Warning: Failed to write to RSP client: " + "Closing client connection: %s\n", + strerror (errno)); + rsp_client_close (); + return; + } + + break; + + case 0: + break; /* Nothing written! Try again */ + + default: + return; /* Success, we can return */ + } + } +} /* put_rsp_char () */ + + +/*---------------------------------------------------------------------------*/ +/*!Get a single character from the client socket + + This should only be called if the client is open, but we check for safety. + + @return The character read, or -1 on failure */ +/*---------------------------------------------------------------------------*/ +static int +get_rsp_char () +{ + unsigned char c; /* The character read */ + + if (-1 == rsp.client_fd) + { + fprintf (stderr, "Warning: Attempt to read from unopened RSP " + "client: Ignored\n"); + return -1; + } + + /* Read until successful (we retry after interrupts) or catastrophic + failure. */ + while (1) + { + switch (read (rsp.client_fd, &c, sizeof (c))) + { + case -1: + /* Error: only allow interrupts or would block */ + if ((EAGAIN != errno) && (EINTR != errno)) + { + fprintf (stderr, "Warning: Failed to read from RSP client: " + "Closing client connection: %s\n", + strerror (errno)); + rsp_client_close (); + return -1; + } + + break; + + case 0: + // EOF + rsp_client_close (); + return -1; + + default: + return c & 0xff; /* Success, we can return (no sign extend!) */ + } + } +} /* get_rsp_char () */ + + +/*---------------------------------------------------------------------------*/ +/*!"Unescape" RSP binary data + + '#', '$' and '}' are escaped by preceding them by '}' and oring with 0x20. + + This function reverses that, modifying the data in place. + + @param[in] data The array of bytes to convert + @para[in] len The number of bytes to be converted + + @return The number of bytes AFTER conversion */ +/*---------------------------------------------------------------------------*/ +static int +rsp_unescape (char *data, + int len) +{ + int from_off = 0; /* Offset to source char */ + int to_off = 0; /* Offset to dest char */ + + while (from_off < len) + { + /* Is it escaped */ + if ( '}' == data[from_off]) + { + from_off++; + data[to_off] = data[from_off] ^ 0x20; + } + else + { + data[to_off] = data[from_off]; + } + + from_off++; + to_off++; + } + + return to_off; + +} /* rsp_unescape () */ + + +/*---------------------------------------------------------------------------*/ +/*!Initialize the matchpoint hash table + + This is an open hash table, so this function clears all the links to + NULL. */ +/*---------------------------------------------------------------------------*/ +static void +mp_hash_init () +{ + int i; + + for (i = 0; i < MP_HASH_SIZE; i++) + { + rsp.mp_hash[i] = NULL; + } +} /* mp_hash_init () */ + + +/*---------------------------------------------------------------------------*/ +/*!Add an entry to the matchpoint hash table + + Add the entry if it wasn't already there. If it was there do nothing. The + match just be on type and addr. The instr need not match, since if this is + a duplicate insertion (perhaps due to a lost packet) they will be + different. + + @param[in] type The type of matchpoint + @param[in] addr The address of the matchpoint + @para[in] instr The instruction to associate with the address */ +/*---------------------------------------------------------------------------*/ +static void +mp_hash_add (enum mp_type type, + unsigned long int addr, + unsigned long int instr) +{ + int hv = addr % MP_HASH_SIZE; + struct mp_entry *curr; + + /* See if we already have the entry */ + for(curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) + { + if ((type == curr->type) && (addr == curr->addr)) + { + return; /* We already have the entry */ + } + } + + /* Insert the new entry at the head of the chain */ + curr = malloc (sizeof (*curr)); + + curr->type = type; + curr->addr = addr; + curr->instr = instr; + curr->next = rsp.mp_hash[hv]; + + rsp.mp_hash[hv] = curr; + +} /* mp_hash_add () */ + + +/*---------------------------------------------------------------------------*/ +/*!Look up an entry in the matchpoint hash table + + The match must be on type AND addr. + + @param[in] type The type of matchpoint + @param[in] addr The address of the matchpoint + + @return The entry deleted, or NULL if the entry was not found */ +/*---------------------------------------------------------------------------*/ +static struct mp_entry * +mp_hash_lookup (enum mp_type type, + unsigned long int addr) +{ + int hv = addr % MP_HASH_SIZE; + struct mp_entry *curr; + + /* Search */ + for (curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) + { + if ((type == curr->type) && (addr == curr->addr)) + { + return curr; /* The entry found */ + } + } + + /* Not found */ + return NULL; + +} /* mp_hash_lookup () */ + + +/*---------------------------------------------------------------------------*/ +/*!Delete an entry from the matchpoint hash table + + If it is there the entry is deleted from the hash table. If it is not + there, no action is taken. The match must be on type AND addr. + + The usual fun and games tracking the previous entry, so we can delete + things. + + @note The deletion DOES NOT free the memory associated with the entry, + since that is returned. The caller should free the memory when they + have used the information. + + @param[in] type The type of matchpoint + @param[in] addr The address of the matchpoint + + @return The entry deleted, or NULL if the entry was not found */ +/*---------------------------------------------------------------------------*/ +static struct mp_entry * +mp_hash_delete (enum mp_type type, + unsigned long int addr) +{ + int hv = addr % MP_HASH_SIZE; + struct mp_entry *prev = NULL; + struct mp_entry *curr; + + /* Search */ + for (curr = rsp.mp_hash[hv]; NULL != curr; curr = curr->next) + { + if ((type == curr->type) && (addr == curr->addr)) + { + /* Found - delete. Method depends on whether we are the head of + chain. */ + if (NULL == prev) + { + rsp.mp_hash[hv] = curr->next; + } + else + { + prev->next = curr->next; + } + + return curr; /* The entry deleted */ + } + + prev = curr; + } + + /* Not found */ + return NULL; + +} /* mp_hash_delete () */ + + +/*---------------------------------------------------------------------------*/ +/*!Utility to give the value of a hex char + + @param[in] ch A character representing a hexadecimal digit. Done as -1, + for consistency with other character routines, which can use + -1 as EOF. + + @return The value of the hex character, or -1 if the character is + invalid. */ +/*---------------------------------------------------------------------------*/ +static int +hex (int c) +{ + return ((c >= 'a') && (c <= 'f')) ? c - 'a' + 10 : + ((c >= '0') && (c <= '9')) ? c - '0' : + ((c >= 'A') && (c <= 'F')) ? c - 'A' + 10 : -1; + +} /* hex () */ + + +/*---------------------------------------------------------------------------*/ +/*!Convert a register to a hex digit string + + The supplied 32-bit value is converted to an 8 digit hex string according + the target endianism. It is null terminated for convenient printing. + + @param[in] val The value to convert + @param[out] buf The buffer for the text string */ +/*---------------------------------------------------------------------------*/ +static void +reg2hex (unsigned long int val, + char *buf) +{ + int n; /* Counter for digits */ + + for (n = 0; n < 8; n++) + { +#ifdef WORDSBIGENDIAN + int nyb_shift = n * 4; +#else + int nyb_shift = 28 - (n * 4); +#endif + buf[n] = hexchars[(val >> nyb_shift) & 0xf]; + } + + buf[8] = 0; /* Useful to terminate as string */ + +} /* reg2hex () */ + + +/*---------------------------------------------------------------------------*/ +/*!Convert a hex digit string to a register value + + The supplied 8 digit hex string is converted to a 32-bit value according + the target endianism + + @param[in] buf The buffer with the hex string + + @return The value to convert */ +/*---------------------------------------------------------------------------*/ +static unsigned long int +hex2reg (char *buf) +{ + int n; /* Counter for digits */ + unsigned long int val = 0; /* The result */ + + for (n = 0; n < 8; n++) + { +#ifdef WORDSBIGENDIAN + int nyb_shift = n * 4; +#else + int nyb_shift = 28 - (n * 4); +#endif + val |= hex (buf[n]) << nyb_shift; + } + + return val; + +} /* hex2reg () */ + + +/*---------------------------------------------------------------------------*/ +/*!Convert an ASCII character string to pairs of hex digits + + Both source and destination are null terminated. + + @param[out] dest Buffer to store the hex digit pairs (null terminated) + @param[in] src The ASCII string (null terminated) */ +/*---------------------------------------------------------------------------*/ +static void ascii2hex (char *dest, + char *src) +{ + int i; + + /* Step through converting the source string */ + for (i = 0; src[i] != '\0'; i++) + { + char ch = src[i]; + + dest[i * 2] = hexchars[ch >> 4 & 0xf]; + dest[i * 2 + 1] = hexchars[ch & 0xf]; + } + + dest[i * 2] = '\0'; + +} /* ascii2hex () */ + + +/*---------------------------------------------------------------------------*/ +/*!Convert pairs of hex digits to an ASCII character string + + Both source and destination are null terminated. + + @param[out] dest The ASCII string (null terminated) + @param[in] src Buffer holding the hex digit pairs (null terminated) */ +/*---------------------------------------------------------------------------*/ +static void hex2ascii (char *dest, + char *src) +{ + int i; + + /* Step through convering the source hex digit pairs */ + for (i = 0; src[i * 2] != '\0' && src[i * 2 + 1] != '\0'; i++) + { + dest[i] = ((hex (src[i * 2]) & 0xf) << 4) | (hex (src[i * 2 + 1]) & 0xf); + } + + dest[i] = '\0'; + +} /* hex2ascii () */ + + +/*---------------------------------------------------------------------------*/ +/*!Set the program counter + + This sets the value in the NPC SPR. Not completely trivial, since this is + actually cached in cpu_state.pc. Any reset of the NPC also involves + clearing the delay state and setting the pcnext global. + + Only actually do this if the requested address is different to the current + NPC (avoids clearing the delay pipe). + + @param[in] addr The address to use */ +/*---------------------------------------------------------------------------*/ +static unsigned int set_npc (unsigned long int addr) +{ + int errcode; + + errcode = dbg_cpu0_write(SPR_NPC, addr); + cached_npc = addr; + use_cached_npc = 1; + + /* This was done in the simulator. Is any of this necessary on the hardware? --NAY + if (cpu_state.pc != addr) + { + cpu_state.pc = addr; + cpu_state.delay_insn = 0; + pcnext = addr + 4; + } + */ + return errcode; +} /* set_npc () */ + + +/*---------------------------------------------------------------------------*/ +/*!Send a packet acknowledging an exception has occurred + + This is only called if there is a client FD to talk to */ +/*---------------------------------------------------------------------------*/ +static void +rsp_report_exception () +{ + struct rsp_buf buf; + + /* Construct a signal received packet */ + buf.data[0] = 'S'; + buf.data[1] = hexchars[rsp.sigval >> 4]; + buf.data[2] = hexchars[rsp.sigval % 16]; + buf.data[3] = 0; + buf.len = strlen (buf.data); + + put_packet (&buf); + +} /* rsp_report_exception () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP continue request + + Parse the command to see if there is an address. Uses the underlying + generic continue function, with EXCEPT_NONE. + + @param[in] buf The full continue packet */ +/*---------------------------------------------------------------------------*/ +static void +rsp_continue (struct rsp_buf *buf) +{ + unsigned long int addr; /* Address to continue from, if any */ + + if (strncmp(buf->data, "c", 2)) + { + if(1 != sscanf (buf->data, "c%lx", &addr)) + { + fprintf (stderr, + "Warning: RSP continue address %s not recognized: ignored\n", + buf->data); + } + else + { + /* Set the address as the value of the next program counter */ + // TODO Is support for this really that simple? --NAY + set_npc (addr); + } + } + + rsp_continue_generic (EXCEPT_NONE); + +} /* rsp_continue () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP continue with signal request + + Currently null. Will use the underlying generic continue function. + + @param[in] buf The full continue with signal packet */ +/*---------------------------------------------------------------------------*/ +static void +rsp_continue_with_signal (struct rsp_buf *buf) +{ + printf ("RSP continue with signal '%s' received\n", buf->data); + +} /* rsp_continue_with_signal () */ + + +/*---------------------------------------------------------------------------*/ +/*!Generic processing of a continue request + + The signal may be EXCEPT_NONE if there is no exception to be + handled. Currently the exception is ignored. + + The single step flag is cleared in the debug registers and then the + processor is unstalled. + + @param[in] addr Address from which to step + @param[in] except The exception to use (if any) */ +/*---------------------------------------------------------------------------*/ +static void +rsp_continue_generic (unsigned long int except) +{ + unsigned long tmp; + + /* Clear Debug Reason Register and watchpoint break generation in Debug Mode + Register 2 */ + dbg_cpu0_write(SPR_DRR, 0); + dbg_cpu0_read(SPR_DMR2, &tmp); + tmp &= ~SPR_DMR2_WGB; + dbg_cpu0_write(SPR_DMR2, tmp); + + /* Clear the single step trigger in Debug Mode Register 1 and set traps to be + handled by the debug unit in the Debug Stop Register */ + dbg_cpu0_read(SPR_DMR1, &tmp); + tmp &= ~(SPR_DMR1_ST|SPR_DMR1_BT); // clear single-step and trap-on-branch + dbg_cpu0_write(SPR_DMR1, tmp); + + // *** TODO Is there ever a situation where the DSR will not be set to give us control on a TRAP? --NAY + + /* Unstall the processor (also starts the target handler thread) */ + set_stall_state (0); + + /* Note the GDB client is now waiting for a reply. */ + rsp.client_waiting = 1; + rsp.single_step_mode = 0; + +} /* rsp_continue_generic () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP read all registers request + + The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PPC + (i.e. SPR PPC), NPC (i.e. SPR NPC) and SR (i.e. SPR SR). Each register is + returned as a sequence of bytes in target endian order. + + Each byte is packed as a pair of hex digits. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_read_all_regs () +{ + struct rsp_buf buf; /* Buffer for the reply */ + int r; /* Register index */ + unsigned long regbuf[MAX_GPRS]; + unsigned int errcode = APP_ERR_NONE; + + // Read all the GPRs in a single burst, for efficiency + errcode = dbg_cpu0_read_block(SPR_GPR_BASE, regbuf, MAX_GPRS); + + /* Format the GPR data for output */ + for (r = 0; r < MAX_GPRS; r++) + { + reg2hex(regbuf[r], &(buf.data[r * 8])); + } + + /* PPC, NPC and SR have consecutive addresses, read in one burst */ + errcode |= dbg_cpu0_read_block(SPR_NPC, regbuf, 3); + + // Note that reg2hex adds a NULL terminator; as such, they must be + // put in buf.data in numerical order: PPC, NPC, SR + reg2hex(regbuf[2], &(buf.data[PPC_REGNUM * 8])); + + if(use_cached_npc == 1) { // Hackery to work around CPU hardware quirk + reg2hex(cached_npc, &(buf.data[NPC_REGNUM * 8])); + } + else { + reg2hex(regbuf[0], &(buf.data[NPC_REGNUM * 8])); + } + + reg2hex(regbuf[1], &(buf.data[SR_REGNUM * 8])); + + //fprintf(stderr, "Read SPRs: 0x%08X, 0x%08X, 0x%08X\n", regbuf[0], regbuf[1], regbuf[2]); + + /* + dbg_cpu0_read(SPR_PPC, &tmp); + reg2hex(tmp, &(buf.data[PPC_REGNUM * 8])); + + if(use_cached_npc == 1) { // Hackery to work around CPU hardware quirk + tmp = cached_npc; + } + else { + dbg_cpu0_read(SPR_NPC, &tmp); + } + reg2hex(tmp, &(buf.data[NPC_REGNUM * 8])); + + dbg_cpu0_read(SPR_SR, &tmp); + reg2hex(tmp, &(buf.data[SR_REGNUM * 8])); + */ + + if(errcode == APP_ERR_NONE) { + /* Finalize the packet and send it */ + buf.data[NUM_REGS * 8] = 0; + buf.len = NUM_REGS * 8; + put_packet (&buf); + } + else { + fprintf(stderr, "Error while reading all registers: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_read_all_regs () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP write all registers request + + The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PPC + (i.e. SPR PPC), NPC (i.e. SPR NPC) and SR (i.e. SPR SR). Each register is + supplied as a sequence of bytes in target endian order. + + Each byte is packed as a pair of hex digits. + + @todo There is no error checking at present. Non-hex chars will generate a + warning message, but there is no other check that the right amount + of data is present. The result is always "OK". + + @param[in] buf The original packet request. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_write_all_regs (struct rsp_buf *buf) +{ + int r; /* Register index */ + unsigned long regbuf[MAX_GPRS]; + unsigned int errcode; + + /* The GPRs */ + for (r = 0; r < MAX_GPRS; r++) + { + // Set up the data for a burst access + regbuf[r] = hex2reg (&(buf->data[r * 8])); + } + + errcode = dbg_cpu0_write_block(SPR_GPR_BASE, regbuf, MAX_GPRS); + + /* PPC, NPC and SR */ + regbuf[0] = hex2reg (&(buf->data[NPC_REGNUM * 8])); + regbuf[1] = hex2reg (&(buf->data[SR_REGNUM * 8])); + regbuf[2] = hex2reg (&(buf->data[PPC_REGNUM * 8])); + + errcode |= dbg_cpu0_write_block(SPR_NPC, regbuf, 3); + + /* + tmp = hex2reg (&(buf->data[PPC_REGNUM * 8])); + dbg_cpu0_write(SPR_PPC, tmp); + + tmp = hex2reg (&(buf->data[SR_REGNUM * 8])); + dbg_cpu0_write(SPR_SR, tmp); + + tmp = hex2reg (&(buf->data[NPC_REGNUM * 8])); + dbg_cpu0_write(SPR_NPC, tmp); + */ + + if(errcode == APP_ERR_NONE) + put_str_packet ("OK"); + else { + fprintf(stderr, "Error while writing all registers: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_write_all_regs () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP read memory (symbolic) request + + Syntax is: + + m,: + + The response is the bytes, lowest address first, encoded as pairs of hex + digits. + + The length given is the number of bytes to be read. + + @note This function reuses buf, so trashes the original command. + + @param[in] buf The command received */ +/*---------------------------------------------------------------------------*/ +static void +rsp_read_mem (struct rsp_buf *buf) +{ + unsigned int addr; /* Where to read the memory */ + int len; /* Number of bytes to read */ + int off; /* Offset into the memory */ + unsigned int errcode = APP_ERR_NONE; + + if (2 != sscanf (buf->data, "m%x,%x:", &addr, &len)) + { + fprintf (stderr, "Warning: Failed to recognize RSP read memory " + "command: %s\n", buf->data); + put_str_packet ("E01"); + return; + } + + /* Make sure we won't overflow the buffer (2 chars per byte) */ + if ((len * 2) >= GDB_BUF_MAX) + { + fprintf (stderr, "Warning: Memory read %s too large for RSP packet: " + "truncated\n", buf->data); + len = (GDB_BUF_MAX - 1) / 2; + } + + // Do the memory read into a temporary buffer + unsigned char *tmpbuf = (unsigned char *) malloc(len); // *** TODO check return, don't always malloc (use realloc) + errcode = dbg_wb_read_block8(addr, tmpbuf, len); + + + /* Refill the buffer with the reply */ + for (off = 0; off < len; off++) + { + unsigned char ch; /* The byte at the address */ + + /* Check memory area is valid. Not really possible without knowing hardware configuration. */ + + // Get the memory direct - no translation. + ch = tmpbuf[off]; + buf->data[off * 2] = hexchars[ch >> 4]; + buf->data[off * 2 + 1] = hexchars[ch & 0xf]; + } + + free(tmpbuf); + + if(errcode == APP_ERR_NONE) { + buf->data[off * 2] = 0; /* End of string */ + buf->len = strlen (buf->data); + put_packet (buf); + } + else { + fprintf(stderr, "Error reading memory: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_read_mem () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP write memory (symbolic) request + + Syntax is: + + m,: + + The data is the bytes, lowest address first, encoded as pairs of hex + digits. + + The length given is the number of bytes to be written. + + @note This function reuses buf, so trashes the original command. + + @param[in] buf The command received */ +/*---------------------------------------------------------------------------*/ +static void +rsp_write_mem (struct rsp_buf *buf) +{ + unsigned int addr; /* Where to write the memory */ + int len; /* Number of bytes to write */ + char *symdat; /* Pointer to the symboli data */ + int datlen; /* Number of digits in symbolic data */ + int off; /* Offset into the memory */ + unsigned int errcode; + + if (2 != sscanf (buf->data, "M%x,%x:", &addr, &len)) + { + fprintf (stderr, "Warning: Failed to recognize RSP write memory " + "command: %s\n", buf->data); + put_str_packet ("E01"); + return; + } + + /* Find the start of the data and check there is the amount we expect. */ + symdat = memchr ((const void *)buf->data, ':', GDB_BUF_MAX) + 1; + datlen = buf->len - (symdat - buf->data); + + /* Sanity check */ + if (len * 2 != datlen) + { + fprintf (stderr, "Warning: Write of %d digits requested, but %d digits " + "supplied: packet ignored\n", len * 2, datlen ); + put_str_packet ("E01"); + return; + } + + /* Write the bytes to memory */ + // Put all the data into a single buffer, so it can be burst-written via JTAG. + // One burst is much faster than many single-byte transactions. + unsigned char *tmpbuf = (unsigned char *) malloc(len); + for (off = 0; off < len; off++) + { + unsigned char nyb1 = hex (symdat[off * 2]); + unsigned char nyb2 = hex (symdat[off * 2 + 1]); + tmpbuf[off] = (nyb1 << 4) | nyb2; + } + + errcode = dbg_wb_write_block8(addr, tmpbuf, len); + free(tmpbuf); + + /* Can't really check if the memory addresses are valid on hardware. */ + if(errcode == APP_ERR_NONE) { + put_str_packet ("OK"); + } + else { + fprintf(stderr, "Error writing memory: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_write_mem () */ + + +/*---------------------------------------------------------------------------*/ +/*!Read a single register + + The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC + (i.e. SPR NPC) and SR (i.e. SPR SR). The register is returned as a + sequence of bytes in target endian order. + + Each byte is packed as a pair of hex digits. + + @param[in] buf The original packet request. Reused for the reply. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_read_reg (struct rsp_buf *buf) +{ + unsigned int regnum; + unsigned long tmp; + unsigned int errcode = APP_ERR_NONE; + + /* Break out the fields from the data */ + if (1 != sscanf (buf->data, "p%x", ®num)) + { + fprintf (stderr, "Warning: Failed to recognize RSP read register " + "command: \'%s\'\n", buf->data); + put_str_packet ("E01"); + return; + } + + /* Get the relevant register */ + if (regnum < MAX_GPRS) + { + errcode = dbg_cpu0_read(SPR_GPR_BASE+regnum, &tmp); + } + else if (PPC_REGNUM == regnum) + { + errcode = dbg_cpu0_read(SPR_PPC, &tmp); + } + else if (NPC_REGNUM == regnum) + { + if(use_cached_npc) { + tmp = cached_npc; + } else { + errcode = dbg_cpu0_read(SPR_NPC, &tmp); + } + } + else if (SR_REGNUM == regnum) + { + errcode = dbg_cpu0_read(SPR_SR, &tmp); + } + else + { + /* Error response if we don't know the register */ + fprintf (stderr, "Warning: Attempt to read unknown register 0x%x: " + "ignored\n", regnum); + put_str_packet ("E01"); + return; + } + + if(errcode == APP_ERR_NONE) { + reg2hex(tmp, buf->data); + buf->len = strlen (buf->data); + put_packet (buf); + } + else { + fprintf(stderr, "Error reading register: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_read_reg () */ + + +/*---------------------------------------------------------------------------*/ +/*!Write a single register + + The registers follow the GDB sequence for OR1K: GPR0 through GPR31, PC + (i.e. SPR NPC) and SR (i.e. SPR SR). The register is specified as a + sequence of bytes in target endian order. + + Each byte is packed as a pair of hex digits. + + @param[in] buf The original packet request. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_write_reg (struct rsp_buf *buf) +{ + unsigned int regnum; + char valstr[9]; /* Allow for EOS on the string */ + unsigned int errcode = APP_ERR_NONE; + + /* Break out the fields from the data */ + if (2 != sscanf (buf->data, "P%x=%8s", ®num, valstr)) + { + fprintf (stderr, "Warning: Failed to recognize RSP write register " + "command: %s\n", buf->data); + put_str_packet ("E01"); + return; + } + + /* Set the relevant register. Must translate between GDB register numbering and hardware reg. numbers. */ + if (regnum < MAX_GPRS) + { + errcode = dbg_cpu0_write(SPR_GPR_BASE+regnum, hex2reg(valstr)); + } + else if (PPC_REGNUM == regnum) + { + errcode = dbg_cpu0_write(SPR_PPC, hex2reg(valstr)); + } + else if (NPC_REGNUM == regnum) + { + errcode = set_npc (hex2reg (valstr)); + } + else if (SR_REGNUM == regnum) + { + errcode = dbg_cpu0_write(SPR_SR, hex2reg(valstr)); + } + else + { + /* Error response if we don't know the register */ + fprintf (stderr, "Warning: Attempt to write unknown register 0x%x: " + "ignored\n", regnum); + put_str_packet ("E01"); + return; + } + + if(errcode == APP_ERR_NONE) { + put_str_packet ("OK"); + } + else { + fprintf(stderr, "Error writing register: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_write_reg () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP query request + + @param[in] buf The request */ +/*---------------------------------------------------------------------------*/ +static void +rsp_query (struct rsp_buf *buf) +{ + if (0 == strcmp ("qC", buf->data)) + { + /* Return the current thread ID (unsigned hex). A null response + indicates to use the previously selected thread. Since we do not + support a thread concept, this is the appropriate response. */ + put_str_packet (""); + } + else if (0 == strncmp ("qCRC", buf->data, strlen ("qCRC"))) + { + /* Return CRC of memory area */ + fprintf (stderr, "Warning: RSP CRC query not supported\n"); + put_str_packet ("E01"); + } + else if (0 == strcmp ("qfThreadInfo", buf->data)) + { + /* Return info about active threads. We return just '-1' */ + put_str_packet ("m-1"); + } + else if (0 == strcmp ("qsThreadInfo", buf->data)) + { + /* Return info about more active threads. We have no more, so return the + end of list marker, 'l' */ + put_str_packet ("l"); + } + else if (0 == strncmp ("qGetTLSAddr:", buf->data, strlen ("qGetTLSAddr:"))) + { + /* We don't support this feature */ + put_str_packet (""); + } + else if (0 == strncmp ("qL", buf->data, strlen ("qL"))) + { + /* Deprecated and replaced by 'qfThreadInfo' */ + fprintf (stderr, "Warning: RSP qL deprecated: no info returned\n"); + put_str_packet ("qM001"); + } + else if (0 == strcmp ("qOffsets", buf->data)) + { + /* Report any relocation */ + put_str_packet ("Text=0;Data=0;Bss=0"); + } + else if (0 == strncmp ("qP", buf->data, strlen ("qP"))) + { + /* Deprecated and replaced by 'qThreadExtraInfo' */ + fprintf (stderr, "Warning: RSP qP deprecated: no info returned\n"); + put_str_packet (""); + } + else if (0 == strncmp ("qRcmd,", buf->data, strlen ("qRcmd,"))) + { + /* This is used to interface to commands to do "stuff" */ + rsp_command (buf); + } + else if (0 == strncmp ("qSupported", buf->data, strlen ("qSupported"))) + { + /* Report a list of the features we support. For now we just ignore any + supplied specific feature queries, but in the future these may be + supported as well. Note that the packet size allows for 'G' + all the + registers sent to us, or a reply to 'g' with all the registers and an + EOS so the buffer is a well formed string. */ + + char reply[GDB_BUF_MAX]; + + sprintf (reply, "PacketSize=%x", GDB_BUF_MAX); + put_str_packet (reply); + } + else if (0 == strncmp ("qSymbol:", buf->data, strlen ("qSymbol:"))) + { + /* Offer to look up symbols. Nothing we want (for now). TODO. This just + ignores any replies to symbols we looked up, but we didn't want to + do that anyway! */ + put_str_packet ("OK"); + } + else if (0 == strncmp ("qThreadExtraInfo,", buf->data, + strlen ("qThreadExtraInfo,"))) + { + /* Report that we are runnable, but the text must be hex ASCI + digits. For now do this by steam, reusing the original packet */ + sprintf (buf->data, "%02x%02x%02x%02x%02x%02x%02x%02x%02x", + 'R', 'u', 'n', 'n', 'a', 'b', 'l', 'e', 0); + buf->len = strlen (buf->data); + put_packet (buf); + } + else if (0 == strncmp ("qXfer:", buf->data, strlen ("qXfer:"))) + { + /* For now we support no 'qXfer' requests, but these should not be + expected, since they were not reported by 'qSupported' */ + fprintf (stderr, "Warning: RSP 'qXfer' not supported: ignored\n"); + put_str_packet (""); + } + else + { + fprintf (stderr, "Unrecognized RSP query: ignored\n"); + } +} /* rsp_query () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP qRcmd request + + The actual command follows the "qRcmd," in ASCII encoded to hex + + @param[in] buf The request in full */ +/*---------------------------------------------------------------------------*/ +static void +rsp_command (struct rsp_buf *buf) +{ + char cmd[GDB_BUF_MAX]; + unsigned long tmp; + + hex2ascii (cmd, &(buf->data[strlen ("qRcmd,")])); + + /* Work out which command it is */ + if (0 == strncmp ("readspr ", cmd, strlen ("readspr"))) + { + unsigned int regno; + + /* Parse and return error if we fail */ + if( 1 != sscanf (cmd, "readspr %4x", ®no)) + { + fprintf (stderr, "Warning: qRcmd %s not recognized: ignored\n", + cmd); + put_str_packet ("E01"); + return; + } + + /* SPR out of range */ + if (regno > MAX_SPRS) + { + fprintf (stderr, "Warning: qRcmd readspr %x too large: ignored\n", + regno); + put_str_packet ("E01"); + return; + } + + /* Construct the reply */ + dbg_cpu0_read(regno, &tmp); // TODO Check return value of all hardware accesses + sprintf (cmd, "%8lx", tmp); + ascii2hex (buf->data, cmd); + buf->len = strlen (buf->data); + put_packet (buf); + } + else if (0 == strncmp ("writespr ", cmd, strlen ("writespr"))) + { + unsigned int regno; + unsigned long int val; + + /* Parse and return error if we fail */ + if( 2 != sscanf (cmd, "writespr %4x %8lx", ®no, &val)) + { + fprintf (stderr, "Warning: qRcmd %s not recognized: ignored\n", + cmd); + put_str_packet ("E01"); + return; + } + + /* SPR out of range */ + if (regno > MAX_SPRS) + { + fprintf (stderr, "Warning: qRcmd writespr %x too large: ignored\n", + regno); + put_str_packet ("E01"); + return; + } + + /* Update the SPR and reply "OK" */ + dbg_cpu0_write(regno, val); + put_str_packet ("OK"); + } + +} /* rsp_command () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP set request + + @param[in] buf The request */ +/*---------------------------------------------------------------------------*/ +static void +rsp_set (struct rsp_buf *buf) +{ + if (0 == strncmp ("QPassSignals:", buf->data, strlen ("QPassSignals:"))) + { + /* Passing signals not supported */ + put_str_packet (""); + } + else if ((0 == strncmp ("QTDP", buf->data, strlen ("QTDP"))) || + (0 == strncmp ("QFrame", buf->data, strlen ("QFrame"))) || + (0 == strcmp ("QTStart", buf->data)) || + (0 == strcmp ("QTStop", buf->data)) || + (0 == strcmp ("QTinit", buf->data)) || + (0 == strncmp ("QTro", buf->data, strlen ("QTro")))) + { + /* All tracepoint features are not supported. This reply is really only + needed to 'QTDP', since with that the others should not be + generated. */ + put_str_packet (""); + } + else + { + fprintf (stderr, "Unrecognized RSP set request: ignored\n"); + } +} /* rsp_set () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP restart request + + For now we just put the program counter back to the one used with the last + vRun request. */ +/*---------------------------------------------------------------------------*/ +static void +rsp_restart () +{ + set_npc (rsp.start_addr); + +} /* rsp_restart () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP step request + + Parse the command to see if there is an address. Uses the underlying + generic step function, with EXCEPT_NONE. + + @param[in] buf The full step packet */ +/*---------------------------------------------------------------------------*/ +static void +rsp_step (struct rsp_buf *buf) +{ + unsigned long int addr; /* The address to step from, if any */ + + if(strncmp(buf->data, "s", 2)) + { + if(1 != sscanf (buf->data, "s%lx", &addr)) + { + fprintf (stderr, + "Warning: RSP step address %s not recognized: ignored\n", + buf->data); + } + else + { + /* Set the address as the value of the next program counter */ + // TODO Is implementing this really just this simple? + //set_npc (addr); + } + } + + rsp_step_generic (EXCEPT_NONE); + +} /* rsp_step () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP step with signal request + + Currently null. Will use the underlying generic step function. + + @param[in] buf The full step with signal packet */ +/*---------------------------------------------------------------------------*/ +static void +rsp_step_with_signal (struct rsp_buf *buf) +{ + int val; + printf ("RSP step with signal '%s' received\n", buf->data); + val = strtoul(&buf->data[1], NULL, 10); + rsp_step_generic(val); +} /* rsp_step_with_signal () */ + + +/*---------------------------------------------------------------------------*/ +/*!Generic processing of a step request + + The signal may be EXCEPT_NONE if there is no exception to be + handled. Currently the exception is ignored. + + The single step flag is set in the debug registers and then the processor + is unstalled. + + @param[in] addr Address from which to step + @param[in] except The exception to use (if any) */ +/*---------------------------------------------------------------------------*/ +static void +rsp_step_generic (unsigned long int except) +{ + unsigned long tmp; + + /* Clear Debug Reason Register and watchpoint break generation in Debug Mode + Register 2 */ + tmp = 0; + dbg_cpu0_write(SPR_DRR, tmp); // *** TODO Check return value of all hardware accesses + dbg_cpu0_read(SPR_DMR2, &tmp); + if(tmp & SPR_DMR2_WGB) { + tmp &= ~SPR_DMR2_WGB; + dbg_cpu0_write(SPR_DMR2, tmp); + } + + /* Set the single step trigger in Debug Mode Register 1 and set traps to be + handled by the debug unit in the Debug Stop Register */ + if(!rsp.single_step_mode) + { + dbg_cpu0_read(SPR_DMR1, &tmp); + tmp |= SPR_DMR1_ST|SPR_DMR1_BT; + dbg_cpu0_write(SPR_DMR1, tmp); + dbg_cpu0_read(SPR_DSR, &tmp); + if(!(tmp & SPR_DSR_TE)) { + tmp |= SPR_DSR_TE; + dbg_cpu0_write(SPR_DSR, tmp); + } + rsp.single_step_mode = 1; + } + + /* Unstall the processor */ + set_stall_state (0); + + /* Note the GDB client is now waiting for a reply. */ + rsp.client_waiting = 1; + +} /* rsp_step_generic () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP 'v' packet + + These are commands associated with executing the code on the target + + @param[in] buf The request */ +/*---------------------------------------------------------------------------*/ +static void +rsp_vpkt (struct rsp_buf *buf) +{ + if (0 == strncmp ("vAttach;", buf->data, strlen ("vAttach;"))) + { + /* Attaching is a null action, since we have no other process. We just + return a stop packet (using TRAP) to indicate we are stopped. */ + put_str_packet ("S05"); + return; + } + else if (0 == strcmp ("vCont?", buf->data)) + { + /* For now we don't support this. */ + put_str_packet (""); + return; + } + else if (0 == strncmp ("vCont", buf->data, strlen ("vCont"))) + { + /* This shouldn't happen, because we've reported non-support via vCont? + above */ + fprintf (stderr, "Warning: RSP vCont not supported: ignored\n" ); + return; + } + else if (0 == strncmp ("vFile:", buf->data, strlen ("vFile:"))) + { + /* For now we don't support this. */ + fprintf (stderr, "Warning: RSP vFile not supported: ignored\n" ); + put_str_packet (""); + return; + } + else if (0 == strncmp ("vFlashErase:", buf->data, strlen ("vFlashErase:"))) + { + /* For now we don't support this. */ + fprintf (stderr, "Warning: RSP vFlashErase not supported: ignored\n" ); + put_str_packet ("E01"); + return; + } + else if (0 == strncmp ("vFlashWrite:", buf->data, strlen ("vFlashWrite:"))) + { + /* For now we don't support this. */ + fprintf (stderr, "Warning: RSP vFlashWrite not supported: ignored\n" ); + put_str_packet ("E01"); + return; + } + else if (0 == strcmp ("vFlashDone", buf->data)) + { + /* For now we don't support this. */ + fprintf (stderr, "Warning: RSP vFlashDone not supported: ignored\n" ); + put_str_packet ("E01"); + return; + } + else if (0 == strncmp ("vRun;", buf->data, strlen ("vRun;"))) + { + /* We shouldn't be given any args, but check for this */ + if (buf->len > strlen ("vRun;")) + { + fprintf (stderr, "Warning: Unexpected arguments to RSP vRun " + "command: ignored\n"); + } + + /* Restart the current program. However unlike a "R" packet, "vRun" + should behave as though it has just stopped. We use signal + 5 (TRAP). */ + rsp_restart (); + put_str_packet ("S05"); + } + else + { + fprintf (stderr, "Warning: Unknown RSP 'v' packet type %s: ignored\n", + buf->data); + put_str_packet ("E01"); + return; + } +} /* rsp_vpkt () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP write memory (binary) request + + Syntax is: + + X,: + + Followed by the specified number of bytes as raw binary. Response should be + "OK" if all copied OK, E if error has occurred. + + The length given is the number of bytes to be written. However the number + of data bytes may be greater, since '#', '$' and '}' are escaped by + preceding them by '}' and oring with 0x20. + + @param[in] buf The command received */ +/*---------------------------------------------------------------------------*/ +static void +rsp_write_mem_bin (struct rsp_buf *buf) +{ + unsigned int addr; /* Where to write the memory */ + int len; /* Number of bytes to write */ + char *bindat; /* Pointer to the binary data */ + int off; /* Offset to start of binary data */ + int newlen; /* Number of bytes in bin data */ + unsigned int errcode; + + if (2 != sscanf (buf->data, "X%x,%x:", &addr, &len)) + { + fprintf (stderr, "Warning: Failed to recognize RSP write memory " + "command: %s\n", buf->data); + put_str_packet ("E01"); + return; + } + + /* Find the start of the data and "unescape" it */ + bindat = memchr ((const void *)buf->data, ':', GDB_BUF_MAX) + 1; + off = bindat - buf->data; + newlen = rsp_unescape (bindat, buf->len - off); + + /* Sanity check */ + if (newlen != len) + { + int minlen = len < newlen ? len : newlen; + + fprintf (stderr, "Warning: Write of %d bytes requested, but %d bytes " + "supplied. %d will be written\n", len, newlen, minlen); + len = minlen; + } + + /* Write the bytes to memory */ + errcode = dbg_wb_write_block8(addr, (uint8_t *) bindat, len); + + // We can't really verify if the memory target address exists or not. + // Don't write to non-existant memory unless your system wishbone implementation + // has a hardware bus timeout. + if(errcode == APP_ERR_NONE) { + put_str_packet ("OK"); + } + else { + fprintf(stderr, "Error writing memory: %s\n", get_err_string(errcode)); + put_str_packet("E01"); + } + +} /* rsp_write_mem_bin () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP remove breakpoint or matchpoint request + + For now only memory breakpoints are implemented, which are implemented by + substituting a breakpoint at the specified address. The implementation must + cope with the possibility of duplicate packets. + + @todo This doesn't work with icache/immu yet + + @param[in] buf The command received */ +/*---------------------------------------------------------------------------*/ +static void +rsp_remove_matchpoint (struct rsp_buf *buf) +{ + enum mp_type type; /* What sort of matchpoint */ + unsigned long int addr; /* Address specified */ + int len; /* Matchpoint length (not used) */ + struct mp_entry *mpe; /* Info about the replaced instr */ + unsigned long instbuf[1]; + + /* Break out the instruction */ + if (3 != sscanf (buf->data, "z%1d,%lx,%1d", (int *)&type, &addr, &len)) + { + fprintf (stderr, "Warning: RSP matchpoint deletion request not " + "recognized: ignored\n"); + put_str_packet ("E01"); + return; + } + + /* Sanity check that the length is 4 */ + if (4 != len) + { + fprintf (stderr, "Warning: RSP matchpoint deletion length %d not " + "valid: 4 assumed\n", len); + len = 4; + } + + /* Sort out the type of matchpoint */ + switch (type) + { + case BP_MEMORY: + /* Memory breakpoint - replace the original instruction. */ + mpe = mp_hash_delete (type, addr); + + /* If the BP hasn't yet been deleted, put the original instruction + back. Don't forget to free the hash table entry afterwards. */ + if (NULL != mpe) + { + instbuf[0] = mpe->instr; + dbg_wb_write_block32(addr, instbuf, 1); // *** TODO Check return value + free (mpe); + } + + put_str_packet ("OK"); + + return; + + case BP_HARDWARE: + put_str_packet (""); /* Not supported */ + return; + + case WP_WRITE: + put_str_packet (""); /* Not supported */ + return; + + case WP_READ: + put_str_packet (""); /* Not supported */ + return; + + case WP_ACCESS: + put_str_packet (""); /* Not supported */ + return; + + default: + fprintf (stderr, "Warning: RSP matchpoint type %d not " + "recognized: ignored\n", type); + put_str_packet ("E01"); + return; + + } +} /* rsp_remove_matchpoint () */ + + +/*---------------------------------------------------------------------------*/ +/*!Handle a RSP insert breakpoint or matchpoint request + + For now only memory breakpoints are implemented, which are implemented by + substituting a breakpoint at the specified address. The implementation must + cope with the possibility of duplicate packets. + + @todo This doesn't work with icache/immu yet + + @param[in] buf The command received */ +/*---------------------------------------------------------------------------*/ +static void +rsp_insert_matchpoint (struct rsp_buf *buf) +{ + enum mp_type type; /* What sort of matchpoint */ + unsigned long int addr; /* Address specified */ + int len; /* Matchpoint length (not used) */ + unsigned long instbuf[1]; + + /* Break out the instruction */ + if (3 != sscanf (buf->data, "Z%1d,%lx,%1d", (int *)&type, &addr, &len)) + { + fprintf (stderr, "Warning: RSP matchpoint insertion request not " + "recognized: ignored\n"); + put_str_packet ("E01"); + return; + } + + /* Sanity check that the length is 4 */ + if (4 != len) + { + fprintf (stderr, "Warning: RSP matchpoint insertion length %d not " + "valid: 4 assumed\n", len); + len = 4; + } + + /* Sort out the type of matchpoint */ + switch (type) + { + case BP_MEMORY: + /* Memory breakpoint - substitute a TRAP instruction */ + dbg_wb_read_block32(addr, instbuf, 1); // Get the old instruction. *** TODO Check return value + mp_hash_add (type, addr, instbuf[0]); + instbuf[0] = OR1K_TRAP_INSTR; // Set the TRAP instruction + dbg_wb_write_block32(addr, instbuf, 1); // *** TODO Check return value + put_str_packet ("OK"); + + return; + + case BP_HARDWARE: + put_str_packet (""); /* Not supported */ + return; + + case WP_WRITE: + put_str_packet (""); /* Not supported */ + return; + + case WP_READ: + put_str_packet (""); /* Not supported */ + return; + + case WP_ACCESS: + put_str_packet (""); /* Not supported */ + return; + + default: + fprintf (stderr, "Warning: RSP matchpoint type %d not " + "recognized: ignored\n", type); + put_str_packet ("E01"); + return; + + } + +} /* rsp_insert_matchpoint () */ + + +// Additions from this point on were added solely to handle hardware, +// and did not come from simulator interface code. +/////////////////////////////////////////////////////////////////////////// +// +// Thread to poll for break on remote processor. +/////////////////////////////////////////////////////////////////////////// + +void *target_handler(void *arg) +{ + unsigned char target_status = 0; + int retval = APP_ERR_NONE; + char string[] = "a"; // We send this through the pipe. Content is unimportant. + unsigned int local_state = 0; + + while(1) + { + // Block on condition for GO or DETACH signal + pthread_mutex_lock(&target_handler_mutex); + if(target_handler_state == 0) + { + pthread_cond_wait(&target_handler_cond, &target_handler_mutex); + } + + // if detach, exit thread + if(target_handler_state == 2) // 2 = DETACH + { + target_handler_state = 0; + pthread_mutex_unlock(&target_handler_mutex); + return arg; + } + + local_state = target_handler_state; + pthread_mutex_unlock(&target_handler_mutex); + + + + if(local_state == 1) // Then start target polling loop, but keep checking for DETACH. State 1 == GO + { + while(1) + { + // non-blocking check for DETACH signal + pthread_mutex_lock(&target_handler_mutex); + if(target_handler_state == 2) // state 2 == DETACH + { + pthread_mutex_unlock(&target_handler_mutex); + return arg; + } + pthread_mutex_unlock(&target_handler_mutex); + + // Poll target hardware + retval = dbg_cpu0_read_ctrl(0, &target_status); + if(retval != APP_ERR_NONE) + fprintf(stderr, "ERROR 0x%X while polling target CPU status\n", retval); + else { + if(target_status & 0x01) // Did we get the stall bit? Bit 0 is STALL bit. + { + // clear the RUNNING flag + pthread_mutex_lock(&rsp_mutex); + rsp.target_running = 0; + pthread_mutex_unlock(&rsp_mutex); + + // Log the exception so it can be sent back to GDB + unsigned long drrval; + dbg_cpu0_read(SPR_DRR, &drrval); // Read the DRR, find out why we stopped + rsp_exception(drrval); // Send it to be translated and stored + + // Send message to GDB handler thread via socket (so it can break out of its poll()) + int ret = write(pipe_fds[1], string, 1); + if(!ret) { + fprintf(stderr, "Warning: target monitor write() to pipe returned 0\n"); + } + else if(ret < 0) { + perror("Error in target monitor write to pipe: "); + } + + // Set our own state back to STOP + pthread_mutex_lock(&target_handler_mutex); + target_handler_state = 0; + pthread_mutex_unlock(&target_handler_mutex); + + break; // Stop polling, block on the next GO/DETACH + } + } + + usleep(250000); // wait 1/4 second before polling again. + } + } + + else + { + fprintf(stderr, "Unknown command 0x%X received by target handler thread\n", local_state); + pthread_mutex_lock(&target_handler_mutex); // Set our own state back to STOP + target_handler_state = 0; + pthread_mutex_unlock(&target_handler_mutex); + } + } + + return arg; +} + + + + +void set_stall_state(int stall) +{ + int retval = 0; + unsigned char data = (stall>0)? 1:0; + unsigned char stalled = 0; + + // Set the 'running' variable, if necessary. Do this before actually starting the CPU. + // The 'running' variable prevents us from responding to most GDB requests while the + // CPU is running. + // We don't ever set the 'running' bit to 0 here. Instead, we stall the CPU hardware, and let + // the target handler thread detect the stall, then signal us to send a message up to + // GDB and clear the 'running' bit. + if(stall == 0) + { + use_cached_npc = 0; + pthread_mutex_lock(&rsp_mutex); + rsp.target_running = 1; + pthread_mutex_unlock(&rsp_mutex); + } + + // Actually start or stop the CPU hardware + retval = dbg_cpu0_write_ctrl(0, data); // 0x01 is the STALL command bit + if(retval != APP_ERR_NONE) + fprintf(stderr, "ERROR 0x%X sending async STALL to target.\n", retval); + + dbg_cpu0_read_ctrl(0, &stalled); + /* + if (!(stalled & 0x1)) { + printf("or1k is not stalled!\n"); + } + + fprintf(stderr, "Set STALL to %i\n", data); + */ + + // Wake up the target handler thread to poll for a new STALL + if(stall == 0) + { + pthread_mutex_lock(&target_handler_mutex); + target_handler_state = 1; + pthread_cond_signal(&target_handler_cond); + pthread_mutex_unlock(&target_handler_mutex); + } + + return; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/adv_dbg_commands.h (revision 27) @@ -0,0 +1,73 @@ + +#ifndef _ADV_DBG_COMMANDS_H_ +#define _ADV_DBG_COMMANDS_H_ + + +// Definitions for the top-level debug unit. This really just consists +// of a single register, used to select the active debug module ("chain"). +#define DBG_MODULE_SELECT_REG_SIZE 2 +#define DBG_MAX_MODULES 4 // used to size an array + +#define DC_WISHBONE 0 +#define DC_CPU0 1 +#define DC_CPU1 2 + +// Polynomial for the CRC calculation +// Yes, it's backwards. Yes, this is on purpose. +// The hardware is designed this way to save on logic and routing, +// and it's really all the same to us here. +#define ADBG_CRC_POLY 0xedb88320 + +// These are for the internal registers in the Wishbone module +// The first is the length of the index register, +// the indexes of the various registers are defined after that +#define DBG_WB_REG_SEL_LEN 1 +#define DBG_WB_REG_ERROR 0 + +// Opcode definitions for the Wishbone module +#define DBG_WB_OPCODE_LEN 4 +#define DBG_WB_CMD_NOP 0x0 +#define DBG_WB_CMD_BWRITE8 0x1 +#define DBG_WB_CMD_BWRITE16 0x2 +#define DBG_WB_CMD_BWRITE32 0x3 +#define DBG_WB_CMD_BREAD8 0x5 +#define DBG_WB_CMD_BREAD16 0x6 +#define DBG_WB_CMD_BREAD32 0x7 +#define DBG_WB_CMD_IREG_WR 0x9 // This is both a select and a write +#define DBG_WB_CMD_IREG_SEL 0xd // There is no 'read', the current register is always read. Use a NOP to read. + + +// Internal register definitions for the CPU0 module +#define DBG_CPU0_REG_SEL_LEN 1 +#define DBG_CPU0_REG_STATUS 0 + +// Opcode definitions for the first CPU module +#define DBG_CPU0_OPCODE_LEN 4 +#define DBG_CPU0_CMD_NOP 0x0 +#define DBG_CPU0_CMD_BWRITE32 0x3 +#define DBG_CPU0_CMD_BREAD32 0x7 +#define DBG_CPU0_CMD_IREG_WR 0x9 // This is both a select and a write +#define DBG_CPU0_CMD_IREG_SEL 0xd // There is no 'read', the current register is always read. Use a NOP to read. + +// Internal register definitions for the CPU1 module +#define DBG_CPU1_REG_SEL_LEN 1 +#define DBG_CPU1_REG_STATUS 0 + +// Opcode definitions for the second CPU module +#define DBG_CPU1_OPCODE_LEN 4 +#define DBG_CPU1_CMD_NOP 0x0 +#define DBG_CPU1_CMD_BWRITE32 0x3 +#define DBG_CPU1_CMD_BREAD32 0x7 +#define DBG_CPU1_CMD_IREG_WR 0x9 // This is both a select and a write +#define DBG_CPU1_CMD_IREG_SEL 0xd // There is no 'read', the current register is always read. Use a NOP to read. + +// API to do transactions on the advanced debug interface +int adbg_select_module(int chain); +int adbg_select_ctrl_reg(unsigned long regidx); +int adbg_ctrl_write(unsigned long regidx, uint32_t *cmd_data, int length_bits); +int adbg_ctrl_read(unsigned long regidx, uint32_t *data, int databits); +int adbg_burst_command(unsigned int opcode, unsigned long address, int length_words); +int adbg_wb_burst_read(int word_size_bytes, int word_count, unsigned long start_address, void *data); +int adbg_wb_burst_write(void *data, int word_size_bytes, int word_count, unsigned long start_address); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/README =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/README (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/README (revision 27) @@ -0,0 +1,54 @@ +These are the notes for building the Advanced JTAG Bridge program. +Nathan Yawn, nathan.yawn@opencores.org + +BUILDING + +This program doesn't use automake. It has been developed using the cygwin +environment under winXP, and should also compile under various GNU/Linux +distributions. It has been tested and in known to work with Ubuntu 9.04. +There are two sets of build flags defined in the Makefile, +one for cygwin and one for Linux - one set is used, one is commented out. +Edit the Makefile for your system, type "make," and see what happens... + +The program may be built with support for the Advanced Debug Interface +(the default), or the legacy "debug_if" interface. To compile for the +legacy interface, __LEGACY__ should be added to CFLAGS in the Makefile +(the line is present but commented out by default). Note that support +for the two different debug hardware units is mutually exclusive; both +cannot be supported in the same build. + +DEPENDENCIES + +Adv_jtag_bridge has three dependencies: + +- The pthreads library (probably already installed) +- Cygwin only: libioperm (for parallel port device access permissions) +- libusb + +Since adv_jtag_bridge was written, a newer version of libusb has been +released (1.0), which used a different interface. We still use the old +interface (0.1), so be sure you install the "compatibility layer" if you +install the latest libusb. As of December 2008, libUSB-Win32 still used +v0.1, so cygwin users may not need to install any additional compatibility +layer. + +BUGS + +GDB 6.8 has a bug which prevents it from working when no stack frame is +present (such as at start-up on a bare-metal debugger, such as this one). +A simple patch applied to GDB 6.8 will work around the problem (a general +solution is not yet available). This patch can be found in the source +directory of adv_jtag_bridge as "gdb-6.8-bz436037-reg-no-longer-active.patch". + +LICENSE + +This code is based on "jp2", which was distributed under the GNU Public +License, version 2. Adv_jtag_bridge is therefore also distributed under +this license. + +WARRANTY + +This program is distributed in the hope that it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/dbg_api.h (revision 27) @@ -0,0 +1,31 @@ +#ifndef _DBG_API_H_ +#define _DBG_API_H_ + +#include +#include + + + +// API for GDB +int dbg_wb_read32(unsigned long adr, unsigned long *data); +int dbg_wb_write32(unsigned long adr, unsigned long data); +int dbg_wb_write16(unsigned long adr, uint16_t data); +int dbg_wb_write8(unsigned long adr, uint8_t data); +int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len); +int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len); +int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len); +int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len); +int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len); +int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len); +int dbg_cpu0_read(unsigned long adr, unsigned long *data); +int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count); +int dbg_cpu0_write(unsigned long adr, unsigned long data); +int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count); +int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data); +int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data); +//int dbg_cpu1_read(unsigned long adr, unsigned long *data); +//int dbg_cpu1_write(unsigned long adr, unsigned long data); +//int dbg_cpu1_write_reg(unsigned long adr, unsigned char data); +//int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.c (revision 27) @@ -0,0 +1,639 @@ +/* cable_usbblaster.c - Altera USB Blaster driver for the Advanced JTAG Bridge + Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + +#include +#include +#include // for usleep() +#include // for sleep() +#include // for htons() + +#include "usb.h" // libusb header +#include "cable_common.h" +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +// USB constants for the USB Blaster +// Valid endpoints: 0x81, 0x02, 0x06, 0x88 +#define EP2 0x02 +#define EP1 0x81 +#define ALTERA_VID 0x09FB +#define ALTERA_PID 0x6001 + +//#define USB_TIMEOUT 500 +#define USB_TIMEOUT 10000 + + +// Bit meanings in the command byte sent to the USB-Blaster +#define USBBLASTER_CMD_TCK 0x01 +#define USBBLASTER_CMD_TMS 0x02 +#define USBBLASTER_CMD_nCE 0x04 /* should be left low */ +#define USBBLASTER_CMD_nCS 0x08 /* must be set for byte-shift mode reads to work */ +#define USBBLASTER_CMD_TDI 0x10 +#define USBBLASTER_CMD_OE 0x20 /* appears necessary to set it to make everything work */ +#define USBBLASTER_CMD_READ 0x40 +#define USBBLASTER_CMD_BYTESHIFT 0x80 + + +static struct usb_device *usbblaster_device; + +static char *data_out_scratchpad = NULL; +static int data_out_scratchpad_size = 0; +static char *data_in_scratchpad = NULL; +static int data_in_scratchpad_size = 0; + +/////////////////////////////////////////////////////////////////////////////// +/*-------------------------------------[ USB Blaster specific functions ]---*/ +///////////////////////////////////////////////////////////////////////////// + + +static int usbblaster_start_interface(struct usb_dev_handle *xpcu) +{ + // Need to send a VENDOR request OUT, request = GET_STATUS + // Other parameters are ignored + if(usb_control_msg(xpcu, (USB_ENDPOINT_OUT | USB_TYPE_VENDOR), USB_REQ_GET_STATUS, + 0, 0, NULL, 0, 1000)<0) + { + perror("usb_control_msg(start interface)"); + return APP_ERR_USB; + } + + return APP_ERR_NONE; +} + + +static int usbblaster_read_firmware_version(struct usb_dev_handle *xpcu, uint16_t *buf) +{ + if(usb_control_msg(xpcu, 0xC0, 0x90, 0, 3, (char*)buf, 2, USB_TIMEOUT)<0) + { + perror("usb_control_msg(0x90.0) (read_firmware_version)"); + return APP_ERR_USB; + } + + // Swap endian + *buf = htons(*buf); + //*buf = (*buf << 8) | (*buf >> 8); + + return APP_ERR_NONE; +} + + + +static int usbblaster_enumerate_bus(void) +{ + int flag; // for USB bus scanning stop condition + struct usb_bus *bus; // pointer on the USB bus + + // board detection + usb_init(); + usb_find_busses(); + usb_find_devices(); + + flag = 0; + + for (bus = usb_get_busses(); bus; bus = bus->next) + { + for (usbblaster_device = bus->devices; usbblaster_device; usbblaster_device = usbblaster_device->next) + { + if (usbblaster_device->descriptor.idVendor == ALTERA_VID && + usbblaster_device->descriptor.idProduct == ALTERA_PID) + { + flag = 1; + fprintf(stderr, "Found Altera USB-Blaster\n"); + return APP_ERR_NONE; + } + } + if (flag) + break; + } + + fprintf(stderr, "Failed to find USB-Blaster\n"); + return APP_ERR_CABLENOTFOUND; +} + + +int cable_usbblaster_init(){ + int err = APP_ERR_NONE; + + // Process to reset the usb blaster + if(err |= usbblaster_enumerate_bus()) { + return err; + } + + usb_dev_handle *h_device = usb_open(usbblaster_device); + + if(h_device == NULL) + { + fprintf(stderr, "Init failed to open USB device for reset\n"); + return APP_ERR_USB; + } + + if(usb_reset(h_device) != APP_ERR_NONE) + fprintf(stderr, "Failed to reset USB Blaster\n"); + + usb_close(h_device); + + // Wait for reset!!! + sleep(1); + + // Do device initialization + if(err |= usbblaster_enumerate_bus()) + return err; + + h_device = usb_open(usbblaster_device); + if(h_device == NULL) + { + fprintf(stderr, "Init failed to open USB device for initialization\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, usbblaster_device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USB-reset failed to set configuration\n"); + return APP_ERR_NONE; + } + + while (usb_claim_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)); + + //usb_clear_halt(h_device, EP1); + //usb_clear_halt(h_device, EP2); + + // IMPORTANT: DO NOT SEND A REQUEST TYPE "CLASS" OR TYPE "RESERVED". This may stall the EP. + + // Some clones need this before they will start processing IN/OUT requests + if(usbblaster_start_interface(h_device) != APP_ERR_NONE) + fprintf(stderr, "Failed to start remote interface\n"); + + uint16_t buf; + if(err |= usbblaster_read_firmware_version(h_device, &buf)) + { + usb_close(h_device); + fprintf(stderr, "Failed to read firmware version\n"); + return err; + } + else + { + printf("firmware version = 0x%04X (%u)\n", buf, buf); + } + + + // USB blaster is expecting us to read 2 bytes, which are useless to us... + char ret[2]; + int rv = usb_bulk_read(h_device, EP1, ret, 2, USB_TIMEOUT); + if (rv < 0){ // But if we fail, who cares? + fprintf(stderr, "\nWarning: Failed to read post-init bytes from the EP1 FIFO (%i):\n%s", rv, usb_strerror()); + } + + if (usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)){ + usb_close(h_device); + fprintf(stderr, "USB-out failed to release interface\n"); + return APP_ERR_USB; + } + + usb_close(h_device); + + data_out_scratchpad = (char *) malloc(64); + data_out_scratchpad_size = 64; + data_in_scratchpad = (char *) malloc(64); + data_in_scratchpad_size = 64; + + return APP_ERR_NONE; +} + + +int cable_usbblaster_out(uint8_t value) +{ + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the ubs device + char out; + int err = APP_ERR_NONE; + + // open the device + h_device = usb_open(usbblaster_device); + if (h_device == NULL){ + usb_close(h_device); + fprintf(stderr, "USB-out failed to open device\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, usbblaster_device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USB-out failed to set configuration\n"); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)); + + out = (USBBLASTER_CMD_OE | USBBLASTER_CMD_nCS); // Set output enable (appears necessary) and nCS (necessary for byte-shift reads) + + // Translate to USB blaster protocol + // USB-Blaster has no TRST pin + if(value & TCLK_BIT) + out |= USBBLASTER_CMD_TCK; + if(value & TDI_BIT) + out |= USBBLASTER_CMD_TDI; + if(value & TMS_BIT) + out |= USBBLASTER_CMD_TMS; + + + rv = usb_bulk_write(h_device, EP2, &out, 1, USB_TIMEOUT); + if (rv != 1){ + fprintf(stderr, "\nFailed to write to the FIFO (rv = %d):\n%s", rv, usb_strerror()); + err |= APP_ERR_USB; + } + + // release the interface cleanly + if (usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release usb interface after write\n"); + err |= APP_ERR_USB; + } + + // close the device + usb_close(h_device); + return err; +} + + +int cable_usbblaster_inout(uint8_t value, uint8_t *in_bit) +{ + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the usb device + char ret[3] = {0,0,0}; // Two useless bytes (0x31,0x60) always precede the useful byte + char out; + + out = (USBBLASTER_CMD_OE | USBBLASTER_CMD_nCS); // Set output enable (?) and nCS (necessary for byte-shift reads) + out |= USBBLASTER_CMD_READ; + + // Translate to USB blaster protocol + // USB-Blaster has no TRST pin + if(value & TCLK_BIT) + out |= USBBLASTER_CMD_TCK; + if(value & TDI_BIT) + out |= USBBLASTER_CMD_TDI; + if(value & TMS_BIT) + out |= USBBLASTER_CMD_TMS; + + + // open the device + h_device = usb_open(usbblaster_device); + if (h_device == NULL){ + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, usbblaster_device->config->bConfigurationValue)){ + usb_close(h_device); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)); + + // Send a read request + rv = usb_bulk_write(h_device, EP2, &out, 1, USB_TIMEOUT); + if (rv != 1){ + fprintf(stderr, "\nFailed to write a read request to the EP2 FIFO:\n%s", usb_strerror()); + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_USB; + } + + + // receive the response + // Sometimes, we do a read but just get the useless 0x31,0x60 chars... + // retry until we get a 3rd byte (with real data), for a reasonable number of retries. + int retries = 0; + do { + rv = usb_bulk_read(h_device, EP1, ret, 3, USB_TIMEOUT); + if (rv < 0){ + fprintf(stderr, "\nFailed to read from the EP1 FIFO (%i):\n%s", rv, usb_strerror()); + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_USB; + } + + // fprintf(stderr, "Read %i bytes: 0x%X, 0x%X, 0x%X\n", rv, ret[0], ret[1], ret[2]); + retries++; + } + while((rv < 3) && (retries < 20)); + + + // release the interface cleanly + if (usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release USB interface after read\n"); + usb_close(h_device); + return APP_ERR_USB; + } + + // close the device + usb_close(h_device); + + *in_bit = (ret[2] & 0x01); /* TDO is bit 0. USB-Blaster may also set bit 1. */ + return APP_ERR_NONE; +} + + +// The usbblaster transfers the bits in the stream in the following order: +// bit 0 of the first byte received ... bit 7 of the first byte received +// bit 0 of second byte received ... etc. +int cable_usbblaster_write_stream(uint32_t *stream, int len_bits, int set_last_bit) { + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the ubs device + unsigned int bytes_to_transfer, leftover_bit_length; + uint32_t leftover_bits; + unsigned char i; + int err = APP_ERR_NONE; + + //printf("cable_usbblaster_write_stream(0x%X, %d, %i)\n", stream, len, set_last_bit); + + // This routine must transfer at least 8 bits. Additionally, TMS (the last bit) + // cannot be set by 'byte shift mode'. So we need at least 8 bits to transfer, + // plus one bit to send along with TMS. + bytes_to_transfer = len_bits / 8; + leftover_bit_length = len_bits - (bytes_to_transfer * 8); + + if((!leftover_bit_length) && set_last_bit) { + bytes_to_transfer -= 1; + leftover_bit_length += 8; + } + + //printf("bytes_to_transfer: %d. leftover_bit_length: %d\n", bytes_to_transfer, leftover_bit_length); + + // Not enough bits for high-speed transfer. bit-bang. + if(bytes_to_transfer == 0) { + return cable_common_write_stream(stream, len_bits, set_last_bit); + } + + // Bitbang functions leave clock high. USBBlaster assumes clock low at the start of a burst. + // Lower the clock. + err |= cable_usbblaster_out(0); + + // Set leftover bits + leftover_bits = (stream[bytes_to_transfer>>2] >> ((bytes_to_transfer & 0x3) * 8)) & 0xFF; + + //printf("leftover_bits: 0x%X, LSB_first_xfer = %d\n", leftover_bits, LSB_first_xfer); + + // open the device + h_device = usb_open(usbblaster_device); + if (h_device == NULL){ + usb_close(h_device); + fprintf(stderr, "USBBlaster_write_stream failed to open device\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, usbblaster_device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USBBlaster_write_stream failed to set configuration\n"); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)); + + + // Copy stream into out. Not pretty, but better than changing the interface to the upper layers; + // 32 bits are easier to work with than 8 bits in upper layers. + if(data_out_scratchpad_size < (bytes_to_transfer+1)) { + free(data_out_scratchpad); + data_out_scratchpad = (char *) malloc(bytes_to_transfer+1); // free/malloc instead of realloc will save copy time + if(data_out_scratchpad == NULL) { + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_MALLOC; + } + data_out_scratchpad_size = bytes_to_transfer+1; + } + + data_out_scratchpad[0] = USBBLASTER_CMD_BYTESHIFT | (bytes_to_transfer & 0x3F); + for(i = 0; i < bytes_to_transfer; i++) { + data_out_scratchpad[i+1] = (stream[i>>2] >> (8*(i&0x3))) & 0xFF; + } + + + /* + printf("Data packet: "); + for(i = 0; i <= bytes_to_transfer; i++) + printf("0x%X ", out[i]); + printf("\n"); + */ + + rv = usb_bulk_write(h_device, EP2, data_out_scratchpad, bytes_to_transfer+1, USB_TIMEOUT); + if (rv != (bytes_to_transfer+1)){ + fprintf(stderr, "\nFailed to write to the FIFO (rv = %d):\n%s", rv, usb_strerror()); + err |= APP_ERR_USB; + } + + // release the interface cleanly + if (usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release usb interface after stream write\n"); + } + + // close the device + usb_close(h_device); + + // if we have a number of bits not divisible by 8, or we need to set TMS... + if(leftover_bit_length != 0) { + //printf("Doing leftovers: (0x%X, %d, %d)\n", leftover_bits, leftover_bit_length, set_last_bit); + return cable_common_write_stream(&leftover_bits, leftover_bit_length, set_last_bit); + } + + return err; +} + + +int cable_usbblaster_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit) { + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the ubs device + unsigned int bytes_received = 0; + unsigned int bytes_to_transfer, leftover_bit_length; + uint32_t leftover_bits, leftovers_received = 0; + unsigned char i; + int retval = APP_ERR_NONE; + + debug("cable_usbblaster_read_stream(0x%X, %d, %i)\n", outstream[0], len_bits, set_last_bit); + + // This routine must transfer at least 8 bits. Additionally, TMS (the last bit) + // cannot be set by 'byte shift mode'. So we need at least 8 bits to transfer, + // plus one bit to send along with TMS. + bytes_to_transfer = len_bits / 8; + leftover_bit_length = len_bits - (bytes_to_transfer * 8); + + if((!leftover_bit_length) && set_last_bit) { + bytes_to_transfer -= 1; + leftover_bit_length += 8; + } + + //printf("RD bytes_to_transfer: %d. leftover_bit_length: %d\n", bytes_to_transfer, leftover_bit_length); + + // Not enough bits for high-speed transfer. bit-bang. + if(bytes_to_transfer == 0) { + return cable_common_read_stream(outstream, instream, len_bits, set_last_bit); + //retval |= cable_common_read_stream(&leftover_bits, &leftovers_received, leftover_bit_length, set_last_bit); + } + + // Bitbang functions leave clock high. USBBlaster assumes clock low at the start of a burst. + // Lower the clock. + retval |= cable_usbblaster_out(0); + + // Zero the input, since we add new data by logical-OR + for(i = 0; i < (len_bits/32); i++) + instream[i] = 0; + if(len_bits % 32) + instream[i] = 0; + + // Set leftover bits + leftover_bits = (outstream[bytes_to_transfer>>2] >> ((bytes_to_transfer & 0x3) * 8)) & 0xFF; + debug("leftover_bits: 0x%X\n", leftover_bits); + + // open the device + h_device = usb_open(usbblaster_device); + if (h_device == NULL){ + usb_close(h_device); + fprintf(stderr, "USBBlaster_read_stream failed to open device\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, usbblaster_device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USBBlaster_read_stream failed to set configuration\n"); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)); + + + + // Copy stream into out. Not pretty, but better than changing the interface to the upper layers; + // 32 bits are easier to work with than 8 bits in upper layers. + if(data_out_scratchpad_size < (bytes_to_transfer+1)) { + free(data_out_scratchpad); + data_out_scratchpad = (char *) malloc(bytes_to_transfer+1); // free/malloc instead of realloc will save copy time + if(data_out_scratchpad == NULL) { + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_MALLOC; + } + data_out_scratchpad_size = bytes_to_transfer+1; + } + + data_out_scratchpad[0] = USBBLASTER_CMD_BYTESHIFT | USBBLASTER_CMD_READ | (bytes_to_transfer & 0x3F); // Set command byte + for(i = 0; i < bytes_to_transfer; i++) { + data_out_scratchpad[i+1] = (outstream[i>>2] >> (8*(i&0x3))) & 0xFF; + } + + /* + debug("Data packet: "); + for(i = 0; i <= bytes_to_transfer; i++) + debug("0x%X ", data_out_scratchpad[i]); + debug("\n"); + */ + + rv = usb_bulk_write(h_device, EP2, data_out_scratchpad, bytes_to_transfer+1, USB_TIMEOUT); + if (rv != (bytes_to_transfer+1)){ + fprintf(stderr, "\nFailed to write to the EP2 FIFO (rv = %d):\n%s", rv, usb_strerror()); + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_USB; + } + + + // Make sure we have a big-enough buffer to hold the incoming data + if(data_in_scratchpad_size < (bytes_to_transfer+2)) { + free(data_in_scratchpad); + data_in_scratchpad = (char *) malloc(bytes_to_transfer+2); // free/malloc instead of realloc will save copy time + if(data_in_scratchpad == NULL) { + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_MALLOC; + } + data_in_scratchpad_size = (bytes_to_transfer+2); + } + + // receive the response + // Sometimes, we do a read but just get the useless 0x31,0x60 chars... + // retry until we get at least 3 bytes (with real data), for a reasonable number of retries. + int retries = 0; + bytes_received = 0; + do { + rv = usb_bulk_read(h_device, EP1, data_in_scratchpad, (bytes_to_transfer-bytes_received)+2, USB_TIMEOUT); + if (rv < 0){ + fprintf(stderr, "\nFailed to read stream from the EP1 FIFO (%i):\n%s", rv, usb_strerror()); + usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_USB; + } + + /* + debug("Read %i bytes: ", rv); + for(i = 0; i < rv; i++) + debug("0x%X ", data_in_scratchpad[i]); + debug("\n"); + */ + + if(rv > 2) retries = 0; + else retries++; + + /* Put the received bytes into the return stream. */ + for(i = 0; i < (rv-2); i++) { + // Do size/type promotion before shift. Must cast to unsigned, else the value may be + // sign-extended through the upper 16 bits of the uint32_t. + uint32_t tmp = (unsigned char) data_in_scratchpad[2+i]; + instream[(bytes_received+i)>>2] |= (tmp << ((i & 0x3)*8)); + } + + bytes_received += (rv-2); + } + while((bytes_received < bytes_to_transfer) && (retries < 15)); + + + // release the interface cleanly + if (usb_release_interface(h_device, usbblaster_device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release usb interface after stream read\n"); + } + + // close the device + usb_close(h_device); + + // if we have a number of bits not divisible by 8 + if(leftover_bit_length != 0) { + debug("Doing leftovers: (0x%X, %d, %d)\n", leftover_bits, leftover_bit_length, set_last_bit); + retval |= cable_common_read_stream(&leftover_bits, &leftovers_received, leftover_bit_length, set_last_bit); + instream[bytes_to_transfer>>2] |= (leftovers_received & 0xFF) << (8*(bytes_to_transfer & 0x3)); + } + + return retval; +} + + +int cable_usbblaster_opt(int c, char *str) +{ + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; +} + + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_usbblaster.h (revision 27) @@ -0,0 +1,15 @@ + +#ifndef _CABLE_USBBLASTER_H_ +#define _CABLE_USBBLASTER_H_ + +#include + +int cable_usbblaster_init(); +int cable_usbblaster_out(uint8_t value); +int cable_usbblaster_inout(uint8_t value, uint8_t *in_bit); +int cable_usbblaster_write_stream(uint32_t *stream, int len_bits, int set_last_bit); +int cable_usbblaster_read_stream(uint32_t *outstream, uint32_t *instream, int len_bits, int set_last_bit); +int cable_usbblaster_opt(int c, char *str); +void cable_usbblaster_wait(); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.h (revision 27) @@ -0,0 +1,20 @@ + +#ifndef _CABLE_SIM_H_ +#define _CABLE_SIM_H_ + +#include + +int cable_rtl_sim_init(); +int cable_rtl_sim_out(uint8_t value); +int cable_rtl_sim_inout(uint8_t value, uint8_t *inval); +void cable_rtl_sim_wait(); +int cable_rtl_sim_opt(int c, char *str); + +int cable_vpi_init(); +int cable_vpi_out(uint8_t value); +int cable_vpi_inout(uint8_t value, uint8_t *inval); +void cable_vpi_wait(); +int cable_vpi_opt(int c, char *str); + + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.h (revision 27) @@ -0,0 +1,36 @@ +#ifndef _BSDL_H_ +#define _BSDL_H_ + +#include + +// Used by lower levels. +// should not be used by higher levels (i.e. anything that calls +// the API functions). +struct bsdlinfo_node { + char *name; + uint32_t idcode; + uint32_t idcode_mask; + int IR_size; + uint32_t cmd_debug; + uint32_t cmd_user1; + uint32_t cmd_idcode; + struct bsdlinfo_node *next; +}; + +typedef struct bsdlinfo_node bsdlinfo; + + +#define IDCODE_INVALID 0xFFFFFFFF +#define TAP_CMD_INVALID 0XFFFFFFFF + + +void bsdl_init(void); +void bsdl_add_directory(const char *dirname); + +const char * bsdl_get_name(uint32_t idcode); +int bsdl_get_IR_size(uint32_t idcode); +uint32_t bsdl_get_debug_cmd(uint32_t idcode); +uint32_t bsdl_get_user1_cmd(uint32_t idcode); +uint32_t bsdl_get_idcode_cmd(uint32_t idcode); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/opencores_tap.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/opencores_tap.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/opencores_tap.h (revision 27) @@ -0,0 +1,24 @@ +#ifndef _OPENCORES_TAP_H_ +#define _OPENCODER_TAP_H_ + + +// Information on the OpenCores JTAG TAP +// Included as a default, in place of a BSDL file +// with the data. + +#define JI_SIZE (4) +enum jtag_instr + { + JI_EXTEST = 0x0, + JI_SAMPLE_PRELOAD = 0x1, + JI_IDCODE = 0x2, + JI_CHAIN_SELECT = 0x3, + JI_INTEST = 0x4, + JI_CLAMP = 0x5, + JI_CLAMPZ = 0x6, + JI_HIGHZ = 0x7, + JI_DEBUG = 0x8, + JI_BYPASS = 0xF + }; + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.c (revision 27) @@ -0,0 +1,54 @@ +/* errcodes.c - Error code to plaintext translator for the advanced JTAG bridge + Copyright(C) 2008 Nathan Yawn + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include "errcodes.h" + +// We can declare the error string with a fixed size, because it can't +// have more than ALL of the error strings in it. Be sure to expand it +// as more errors are added. Also, put a space at the end of each +// error string, as there may be multiple errors. +char errstr[256]; +char *get_err_string(int err) +{ + errstr[0] = '\0'; + + if(err & APP_ERR_COMM) + strcat(errstr, "\'JTAG comm error\' "); + if(err & APP_ERR_MALLOC) + strcat(errstr, "\'malloc failed\' "); + if(err & APP_ERR_MAX_RETRY) + strcat(errstr, "\'max retries\' "); + if(err & APP_ERR_CRC) + strcat(errstr, "\'CRC mismatch\' "); + if(err & APP_ERR_MAX_BUS_ERR) + strcat(errstr, "\'max WishBone bus errors\' "); + if(err & APP_ERR_CABLE_INVALID) + strcat(errstr, "\'Invalid cable\' "); + if(err & APP_ERR_INIT_FAILED) + strcat(errstr, "\'init failed\' "); + if(err & APP_ERR_BAD_PARAM) + strcat(errstr, "\'bad command line parameter\' "); + if(err & APP_ERR_CONNECT) + strcat(errstr, "\'connection failed\' "); + if(err & APP_ERR_USB) + strcat(errstr, "\'USB\' "); + if(err & APP_ERR_CABLENOTFOUND) + strcat(errstr, "\'cable not found\' "); + return errstr; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/errcodes.h (revision 27) @@ -0,0 +1,22 @@ +#ifndef _ERRCODES_H_ +#define _ERRCODES_H_ + +// Errors in high-level chain transactions +// An error is a 32-bit bit-encoded value +#define APP_ERR_NONE 0x0 +#define APP_ERR_COMM 0x1 +#define APP_ERR_MALLOC 0x2 +#define APP_ERR_MAX_RETRY 0x4 +#define APP_ERR_CRC 0x08 +#define APP_ERR_MAX_BUS_ERR 0x10 +#define APP_ERR_CABLE_INVALID 0x20 +#define APP_ERR_INIT_FAILED 0x40 +#define APP_ERR_BAD_PARAM 0x080 +#define APP_ERR_CONNECT 0x100 +#define APP_ERR_USB 0x200 +#define APP_ERR_CABLENOTFOUND 0x400 +#define APP_ERR_TEST_FAIL 0x0800 + +char *get_err_string(int errval); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_sim.c (revision 27) @@ -0,0 +1,259 @@ +/* cable_sim.c - Simulation connection drivers for the Advanced JTAG Bridge + Copyright (C) 2001 Marko Mlinar, markom@opencores.org + Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org + + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + + +#include "cable_common.h" +#include "errcodes.h" + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +/* Only used in the vpi */ +static int vpi_comm; +static int vpi_port = 4567; +static char *vpi_server = "localhost"; + +/* Only used for the rtl_sim */ +static char *gdb_in = "gdb_in.dat"; +static char *gdb_out = "gdb_out.dat"; + + + +/*-------------------------------------------[ rtl_sim specific functions ]---*/ +int cable_rtl_sim_init() +{ + FILE *fin = fopen (gdb_in, "wt+"); + if(!fin) { + fprintf(stderr, "Can not open %s\n", gdb_in); + return APP_ERR_INIT_FAILED; + } + fclose(fin); + return APP_ERR_NONE; +} + +int cable_rtl_sim_out(uint8_t value) +{ + FILE *fout; + int num_read; + int r; + debug("O (%x)\n", value); + fout = fopen(gdb_in, "wt+"); + fprintf(fout, "F\n"); + fflush(fout); + fclose(fout); + fout = fopen(gdb_out, "wt+"); + fprintf(fout, "%02X\n", value); + fflush(fout); + fclose(fout); + do { + fout = fopen(gdb_out, "rt"); + r = fscanf(fout,"%x", &num_read); + fclose(fout); + usleep(1000); + debug(" (Ack %x) ", num_read); + } while(!r || (num_read != (0x10 | value))); + debug("\n"); + return APP_ERR_NONE; +} + +uint8_t cable_rtl_sim_inout(uint8_t value, uint8_t *inval) +{ + FILE *fin = 0; + char ch; + uint8_t data; + debug("IO ("); + + while(1) { + fin = fopen(gdb_in, "rt"); + if(!fin) { + usleep(1000); + continue; + } + ch = fgetc(fin); + fclose(fin); + if((ch != '0') && (ch != '1')) { + usleep(1000); + continue; + } + else + break; + } + data = ch == '1' ? 1 : 0; + + debug("%x,", data); + + cable_rtl_sim_out(value); + + debug("%x)\n", value); + + *inval = data; + return APP_ERR_NONE; +} + + +int cable_rtl_sim_opt(int c, char *str) +{ + switch(c) { + case 'd': + if(!(gdb_in = malloc(strlen(str) + 12))) { /* 12 == strlen("gdb_in.dat") + 2 */ + fprintf(stderr, "Unable to allocate enough memory\n"); + return APP_ERR_MALLOC; + } + if(!(gdb_out = malloc(strlen(str) + 13))) { /* 13 == strlen("gdb_out.dat") + 2 */ + fprintf(stderr, "Unable to allocate enough memory\n"); + free(gdb_in); + return APP_ERR_MALLOC; + } + + sprintf(gdb_in, "%s/gdb_in.dat", str); + sprintf(gdb_out, "%s/gdb_out.dat", str); + break; + default: + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; + } + return APP_ERR_NONE; +} + +/*-----------------------------------------------[ VPI specific functions ]---*/ +int cable_vpi_init() +{ + struct sockaddr_in addr; + struct hostent *he; + + if((vpi_comm = socket(PF_INET, SOCK_STREAM, 0)) < 0) { + fprintf(stderr, "Unable to create socket (%s)\n", strerror(errno)); + return APP_ERR_CONNECT; + } + + + if((he = gethostbyname(vpi_server)) == NULL) { + perror("gethostbyname"); + return APP_ERR_CONNECT; + } + + addr.sin_family = AF_INET; + addr.sin_port = vpi_port; + addr.sin_addr = *((struct in_addr *)he->h_addr); + memset(addr.sin_zero, '\0', sizeof(addr.sin_zero)); + + if(connect(vpi_comm, (struct sockaddr *)&addr, sizeof(addr)) == -1) { + fprintf(stderr, "Unable to connect to %s port %d (%s)\n", vpi_server, vpi_port, + strerror(errno)); + return APP_ERR_CONNECT; + } + + debug("VPI connected!"); + + return APP_ERR_NONE; +} + +int cable_vpi_out(uint8_t value) +{ + uint8_t ack; + int ret; + + /* Send the data to the socket */ + ret = send(vpi_comm, &value, 1, 0); + debug("Sent %d, ret %d\n", value, ret); + + do { + /* Ok, read the data */ + ret = recv(vpi_comm, &ack, 1, 0); + if(ret < 0) { + printf("Error during receive (%s)\n", strerror(errno)); + return APP_ERR_CONNECT; + } + } while(ack != (value | 0x10)); + return APP_ERR_NONE; +} + +int cable_vpi_inout(uint8_t value, uint8_t *inval) +{ + uint8_t dat; + + /* ask vpi to send us the out-bit */ + dat = 0x80; + send(vpi_comm, &dat, 1, 0); + + /* Wait and read the data */ + recv(vpi_comm, &dat, 1, 0); + + if(dat > 1) + fprintf(stderr, "Unexpected value: %i\n", dat); + + cable_vpi_out(value); + + *inval = dat; + return APP_ERR_NONE; +} + +void cable_vpi_wait() +{ + uint8_t dat = 0x81; + + /* Get the sim to reply when the timeout has been reached */ + if(send(vpi_comm, &dat, 1, 0) < 1) { + fprintf(stderr, "Failed to send pkt in cable_vpi_wait(): %s\n", strerror(errno)); + } + + /* block, waiting for the data */ + if(recv(vpi_comm, &dat, 1, 0) < 1) { + fprintf(stderr, "Recv failed in cable_vpi_wait(): %s\n", strerror(errno)); + } + + if(dat != 0xFF) + fprintf(stderr, "Warning: got wrong byte waiting for timeout: 0x%X\n", dat); + +} + +int cable_vpi_opt(int c, char *str) +{ + switch(c) { + case 'p': + if((vpi_port = atoi(str)) == 0) { + fprintf(stderr, "Bad port value for VPI sim: %s\n", str); + return APP_ERR_BAD_PARAM; + } + break; + case 's': + vpi_server = strdup(str); + if(vpi_server == NULL) { + fprintf(stderr, "Unable to allocate enough memory for server string\n"); + return APP_ERR_MALLOC; + } + break; + default: + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; + } + return APP_ERR_NONE; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl_parse.h (revision 27) @@ -0,0 +1,9 @@ +#ifndef _BSDL_PARSE_H_ +#define _BSDL_PARSE_H_ + +#include "bsdl.h" // need definition of bsdlinfo here + + +bsdlinfo * parse_extract_values(char *bsdlfilename); + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/spr-defs.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/spr-defs.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/spr-defs.h (revision 27) @@ -0,0 +1,581 @@ +/* spr-defs.h -- Defines OR1K architecture specific special-purpose registers + + Copyright (C) 1999 Damjan Lampret, lampret@opencores.org + Copyright (C) 2008 Embecosm Limited + + Contributor Jeremy Bennett + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License along + with this program. If not, see . */ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + + +#ifndef SPR_DEFS__H +#define SPR_DEFS__H + +/* Definition of special-purpose registers (SPRs). */ + +#define MAX_GRPS (32) +#define MAX_SPRS_PER_GRP_BITS (11) +#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) +#define MAX_SPRS (0x10000) + +/* Base addresses for the groups */ +#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) +#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) + +/* System control and status group */ +#define SPR_VR (SPRGROUP_SYS + 0) +#define SPR_UPR (SPRGROUP_SYS + 1) +#define SPR_CPUCFGR (SPRGROUP_SYS + 2) +#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) +#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) +#define SPR_DCCFGR (SPRGROUP_SYS + 5) +#define SPR_ICCFGR (SPRGROUP_SYS + 6) +#define SPR_DCFGR (SPRGROUP_SYS + 7) +#define SPR_PCCFGR (SPRGROUP_SYS + 8) +#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ +#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ +#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ +#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ +#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ +#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) +#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) +#define SPR_ESR_BASE (SPRGROUP_SYS + 64) +#define SPR_ESR_LAST (SPRGROUP_SYS + 79) +#define SPR_GPR_BASE (SPRGROUP_SYS + 1024) +#define SPR_GPR_LAST (SPRGROUP_SYS + 1535) +#define MAX_GPRS 32 // Does this really belong here? No. --NAY + +/* Data MMU group */ +#define SPR_DMMUCR (SPRGROUP_DMMU + 0) +#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) +#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) +#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) +#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) + +/* Instruction MMU group */ +#define SPR_IMMUCR (SPRGROUP_IMMU + 0) +#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) +#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) +#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) +#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) + +/* Data cache group */ +#define SPR_DCCR (SPRGROUP_DC + 0) +#define SPR_DCBPR (SPRGROUP_DC + 1) +#define SPR_DCBFR (SPRGROUP_DC + 2) +#define SPR_DCBIR (SPRGROUP_DC + 3) +#define SPR_DCBWR (SPRGROUP_DC + 4) +#define SPR_DCBLR (SPRGROUP_DC + 5) +#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) +#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) + +/* Instruction cache group */ +#define SPR_ICCR (SPRGROUP_IC + 0) +#define SPR_ICBPR (SPRGROUP_IC + 1) +#define SPR_ICBIR (SPRGROUP_IC + 2) +#define SPR_ICBLR (SPRGROUP_IC + 3) +#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) +#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) + +/* MAC group */ +#define SPR_MACLO (SPRGROUP_MAC + 1) +#define SPR_MACHI (SPRGROUP_MAC + 2) + +/* Debug group */ +#define SPR_DVR(N) (SPRGROUP_D + (N)) +#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) +#define SPR_DMR1 (SPRGROUP_D + 16) +#define SPR_DMR2 (SPRGROUP_D + 17) +#define SPR_DWCR0 (SPRGROUP_D + 18) +#define SPR_DWCR1 (SPRGROUP_D + 19) +#define SPR_DSR (SPRGROUP_D + 20) +#define SPR_DRR (SPRGROUP_D + 21) + +/* Performance counters group */ +#define SPR_PCCR(N) (SPRGROUP_PC + (N)) +#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) + +/* Power management group */ +#define SPR_PMR (SPRGROUP_PM + 0) + +/* PIC group */ +#define SPR_PICMR (SPRGROUP_PIC + 0) +#define SPR_PICPR (SPRGROUP_PIC + 1) +#define SPR_PICSR (SPRGROUP_PIC + 2) + +/* Tick Timer group */ +#define SPR_TTMR (SPRGROUP_TT + 0) +#define SPR_TTCR (SPRGROUP_TT + 1) + +/* + * Bit definitions for the Version Register + * + */ +#define SPR_VR_VER 0xff000000 /* Processor version */ +#define SPR_VR_CFG 0x00ff0000 /* Processor configuration */ +#define SPR_VR_RES 0x00ff0000 /* Reserved */ +#define SPR_VR_REV 0x0000003f /* Processor revision */ + +#define SPR_VR_VER_OFF 24 +#define SPR_VR_CFG_OFF 16 +#define SPR_VR_REV_OFF 0 + +/* + * Bit definitions for the Unit Present Register + * + */ +#define SPR_UPR_UP 0x00000001 /* UPR present */ +#define SPR_UPR_DCP 0x00000002 /* Data cache present */ +#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ +#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ +#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ +#define SPR_UPR_MP 0x00000020 /* MAC present */ +#define SPR_UPR_DUP 0x00000040 /* Debug unit present */ +#define SPR_UPR_PCUP 0x00000080 /* Performance counters unit present */ +#define SPR_UPR_PMP 0x00000100 /* Power management present */ +#define SPR_UPR_PICP 0x00000200 /* PIC present */ +#define SPR_UPR_TTP 0x00000400 /* Tick timer present */ +#define SPR_UPR_RES 0x00fe0000 /* Reserved */ +#define SPR_UPR_CUP 0xff000000 /* Context units present */ + +/* + * JPB: Bit definitions for the CPU configuration register + * + */ +#define SPR_CPUCFGR_NSGF 0x0000000f /* Number of shadow GPR files */ +#define SPR_CPUCFGR_CGF 0x00000010 /* Custom GPR file */ +#define SPR_CPUCFGR_OB32S 0x00000020 /* ORBIS32 supported */ +#define SPR_CPUCFGR_OB64S 0x00000040 /* ORBIS64 supported */ +#define SPR_CPUCFGR_OF32S 0x00000080 /* ORFPX32 supported */ +#define SPR_CPUCFGR_OF64S 0x00000100 /* ORFPX64 supported */ +#define SPR_CPUCFGR_OV64S 0x00000200 /* ORVDX64 supported */ +#define SPR_CPUCFGR_RES 0xfffffc00 /* Reserved */ + +/* + * JPB: Bit definitions for the Debug configuration register and other + * constants. + * + */ + +#define SPR_DCFGR_NDP 0x00000007 /* Number of matchpoints mask */ +#define SPR_DCFGR_NDP1 0x00000000 /* One matchpoint supported */ +#define SPR_DCFGR_NDP2 0x00000001 /* Two matchpoints supported */ +#define SPR_DCFGR_NDP3 0x00000002 /* Three matchpoints supported */ +#define SPR_DCFGR_NDP4 0x00000003 /* Four matchpoints supported */ +#define SPR_DCFGR_NDP5 0x00000004 /* Five matchpoints supported */ +#define SPR_DCFGR_NDP6 0x00000005 /* Six matchpoints supported */ +#define SPR_DCFGR_NDP7 0x00000006 /* Seven matchpoints supported */ +#define SPR_DCFGR_NDP8 0x00000007 /* Eight matchpoints supported */ +#define SPR_DCFGR_WPCI 0x00000008 /* Watchpoint counters implemented */ + +#define MATCHPOINTS_TO_NDP(n) (1 == n ? SPR_DCFGR_NDP1 : \ + 2 == n ? SPR_DCFGR_NDP2 : \ + 3 == n ? SPR_DCFGR_NDP3 : \ + 4 == n ? SPR_DCFGR_NDP4 : \ + 5 == n ? SPR_DCFGR_NDP5 : \ + 6 == n ? SPR_DCFGR_NDP6 : \ + 7 == n ? SPR_DCFGR_NDP7 : SPR_DCFGR_NDP8) +#define MAX_MATCHPOINTS 8 +#define MAX_WATCHPOINTS (MAX_MATCHPOINTS + 2) + +/* + * Bit definitions for the Supervision Register + * + */ +#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ +#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ +#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ +#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ +#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ +#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ +#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ +#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ +#define SPR_SR_CE 0x00000100 /* CID Enable */ +#define SPR_SR_F 0x00000200 /* Condition Flag */ +#define SPR_SR_CY 0x00000400 /* Carry flag */ +#define SPR_SR_OV 0x00000800 /* Overflow flag */ +#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ +#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ +#define SPR_SR_EPH 0x00004000 /* Exception Prefix High */ +#define SPR_SR_FO 0x00008000 /* Fixed one */ +#define SPR_SR_SUMRA 0x00010000 /* Supervisor SPR read access */ +#define SPR_SR_RES 0x0ffe0000 /* Reserved */ +#define SPR_SR_CID 0xf0000000 /* Context ID */ + +/* + * Bit definitions for the Data MMU Control Register + * + */ +#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Instruction MMU Control Register + * + */ +#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ +#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ +#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ +#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ + +/* + * Bit definitions for the Data TLB Match Register + * + */ +#define SPR_DTLBMR_V 0x00000001 /* Valid */ +#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ +#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Data TLB Translate Register + * + */ +#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_DTLBTR_A 0x00000010 /* Accessed */ +#define SPR_DTLBTR_D 0x00000020 /* Dirty */ +#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ +#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ +#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ +#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ +#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for the Instruction TLB Match Register + * + */ +#define SPR_ITLBMR_V 0x00000001 /* Valid */ +#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ +#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ +#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ +#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ + +/* + * Bit definitions for the Instruction TLB Translate Register + * + */ +#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ +#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ +#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ +#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ +#define SPR_ITLBTR_A 0x00000010 /* Accessed */ +#define SPR_ITLBTR_D 0x00000020 /* Dirty */ +#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ +#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ +#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ + +/* + * Bit definitions for Data Cache Control register + * + */ +#define SPR_DCCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Insn Cache Control register + * + */ +#define SPR_ICCR_EW 0x000000ff /* Enable ways */ + +/* + * Bit definitions for Data Cache Configuration Register + * + */ + +#define SPR_DCCFGR_NCW 0x00000007 +#define SPR_DCCFGR_NCS 0x00000078 +#define SPR_DCCFGR_CBS 0x00000080 +#define SPR_DCCFGR_CWS 0x00000100 +#define SPR_DCCFGR_CCRI 0x00000200 +#define SPR_DCCFGR_CBIRI 0x00000400 +#define SPR_DCCFGR_CBPRI 0x00000800 +#define SPR_DCCFGR_CBLRI 0x00001000 +#define SPR_DCCFGR_CBFRI 0x00002000 +#define SPR_DCCFGR_CBWBRI 0x00004000 + +#define SPR_DCCFGR_NCW_OFF 0 +#define SPR_DCCFGR_NCS_OFF 3 +#define SPR_DCCFGR_CBS_OFF 7 + +/* + * Bit definitions for Instruction Cache Configuration Register + * + */ +#define SPR_ICCFGR_NCW 0x00000007 +#define SPR_ICCFGR_NCS 0x00000078 +#define SPR_ICCFGR_CBS 0x00000080 +#define SPR_ICCFGR_CCRI 0x00000200 +#define SPR_ICCFGR_CBIRI 0x00000400 +#define SPR_ICCFGR_CBPRI 0x00000800 +#define SPR_ICCFGR_CBLRI 0x00001000 + +#define SPR_ICCFGR_NCW_OFF 0 +#define SPR_ICCFGR_NCS_OFF 3 +#define SPR_ICCFGR_CBS_OFF 7 + +/* + * Bit definitions for Data MMU Configuration Register + * + */ + +#define SPR_DMMUCFGR_NTW 0x00000003 +#define SPR_DMMUCFGR_NTS 0x0000001C +#define SPR_DMMUCFGR_NAE 0x000000E0 +#define SPR_DMMUCFGR_CRI 0x00000100 +#define SPR_DMMUCFGR_PRI 0x00000200 +#define SPR_DMMUCFGR_TEIRI 0x00000400 +#define SPR_DMMUCFGR_HTR 0x00000800 + +#define SPR_DMMUCFGR_NTW_OFF 0 +#define SPR_DMMUCFGR_NTS_OFF 2 + +/* + * Bit definitions for Instruction MMU Configuration Register + * + */ + +#define SPR_IMMUCFGR_NTW 0x00000003 +#define SPR_IMMUCFGR_NTS 0x0000001C +#define SPR_IMMUCFGR_NAE 0x000000E0 +#define SPR_IMMUCFGR_CRI 0x00000100 +#define SPR_IMMUCFGR_PRI 0x00000200 +#define SPR_IMMUCFGR_TEIRI 0x00000400 +#define SPR_IMMUCFGR_HTR 0x00000800 + +#define SPR_IMMUCFGR_NTW_OFF 0 +#define SPR_IMMUCFGR_NTS_OFF 2 + +/* + * Bit definitions for Debug Control registers + * + */ +#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ +#define SPR_DCR_CC 0x0000000e /* Compare condition */ +#define SPR_DCR_SC 0x00000010 /* Signed compare */ +#define SPR_DCR_CT 0x000000e0 /* Compare to */ + +/* Bit results with SPR_DCR_CC mask */ +#define SPR_DCR_CC_MASKED 0x00000000 +#define SPR_DCR_CC_EQUAL 0x00000002 +#define SPR_DCR_CC_LESS 0x00000004 +#define SPR_DCR_CC_LESSE 0x00000006 +#define SPR_DCR_CC_GREAT 0x00000008 +#define SPR_DCR_CC_GREATE 0x0000000a +#define SPR_DCR_CC_NEQUAL 0x0000000c + +/* Bit results with SPR_DCR_CT mask */ +#define SPR_DCR_CT_DISABLED 0x00000000 +#define SPR_DCR_CT_IFEA 0x00000020 +#define SPR_DCR_CT_LEA 0x00000040 +#define SPR_DCR_CT_SEA 0x00000060 +#define SPR_DCR_CT_LD 0x00000080 +#define SPR_DCR_CT_SD 0x000000a0 +#define SPR_DCR_CT_LSEA 0x000000c0 +#define SPR_DCR_CT_LSD 0x000000e0 +/* SPR_DCR_CT_LSD doesn't seem to be implemented anywhere in or1ksim. 2004-1-30 HP */ + +/* + * Bit definitions for Debug Mode 1 register + * + */ +#define SPR_DMR1_CW 0x000fffff /* Chain register pair data */ +#define SPR_DMR1_CW0_AND 0x00000001 +#define SPR_DMR1_CW0_OR 0x00000002 +#define SPR_DMR1_CW0 (SPR_DMR1_CW0_AND | SPR_DMR1_CW0_OR) +#define SPR_DMR1_CW1_AND 0x00000004 +#define SPR_DMR1_CW1_OR 0x00000008 +#define SPR_DMR1_CW1 (SPR_DMR1_CW1_AND | SPR_DMR1_CW1_OR) +#define SPR_DMR1_CW2_AND 0x00000010 +#define SPR_DMR1_CW2_OR 0x00000020 +#define SPR_DMR1_CW2 (SPR_DMR1_CW2_AND | SPR_DMR1_CW2_OR) +#define SPR_DMR1_CW3_AND 0x00000040 +#define SPR_DMR1_CW3_OR 0x00000080 +#define SPR_DMR1_CW3 (SPR_DMR1_CW3_AND | SPR_DMR1_CW3_OR) +#define SPR_DMR1_CW4_AND 0x00000100 +#define SPR_DMR1_CW4_OR 0x00000200 +#define SPR_DMR1_CW4 (SPR_DMR1_CW4_AND | SPR_DMR1_CW4_OR) +#define SPR_DMR1_CW5_AND 0x00000400 +#define SPR_DMR1_CW5_OR 0x00000800 +#define SPR_DMR1_CW5 (SPR_DMR1_CW5_AND | SPR_DMR1_CW5_OR) +#define SPR_DMR1_CW6_AND 0x00001000 +#define SPR_DMR1_CW6_OR 0x00002000 +#define SPR_DMR1_CW6 (SPR_DMR1_CW6_AND | SPR_DMR1_CW6_OR) +#define SPR_DMR1_CW7_AND 0x00004000 +#define SPR_DMR1_CW7_OR 0x00008000 +#define SPR_DMR1_CW7 (SPR_DMR1_CW7_AND | SPR_DMR1_CW7_OR) +#define SPR_DMR1_CW8_AND 0x00010000 +#define SPR_DMR1_CW8_OR 0x00020000 +#define SPR_DMR1_CW8 (SPR_DMR1_CW8_AND | SPR_DMR1_CW8_OR) +#define SPR_DMR1_CW9_AND 0x00040000 +#define SPR_DMR1_CW9_OR 0x00080000 +#define SPR_DMR1_CW9 (SPR_DMR1_CW9_AND | SPR_DMR1_CW9_OR) +#define SPR_DMR1_RES1 0x00300000 /* Reserved */ +#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ +#define SPR_DMR1_BT 0x00800000 /* Branch trace */ +#define SPR_DMR1_RES2 0xff000000 /* Reserved */ + +/* + * Bit definitions for Debug Mode 2 register. AWTC and WGB corrected by JPB + * + */ +#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ +#define SPR_DMR2_AWTC 0x00000ffc /* Assign watchpoints to counters */ +#define SPR_DMR2_AWTC_OFF 2 /* Bit offset to AWTC field */ +#define SPR_DMR2_WGB 0x003ff000 /* Watchpoints generating breakpoint */ +#define SPR_DMR2_WGB_OFF 12 /* Bit offset to WGB field */ +#define SPR_DMR2_WBS 0xffc00000 /* JPB: Watchpoint status */ +#define SPR_DMR2_WBS_OFF 22 /* Bit offset to WBS field */ + +/* + * Bit definitions for Debug watchpoint counter registers + * + */ +#define SPR_DWCR_COUNT 0x0000ffff /* Count */ +#define SPR_DWCR_MATCH 0xffff0000 /* Match */ +#define SPR_DWCR_MATCH_OFF 16 /* Match bit offset */ + +/* + * Bit definitions for Debug stop register + * + */ +#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DSR_AE 0x00000020 /* Alignment exception */ +#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DSR_RE 0x00000400 /* Range exception */ +#define SPR_DSR_SCE 0x00000800 /* System call exception */ +#define SPR_DSR_FPE 0x00001000 /* Floating point Exception */ +#define SPR_DSR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Debug reason register + * + */ +#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ +#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ +#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ +#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ +#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ +#define SPR_DRR_AE 0x00000020 /* Alignment exception */ +#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ +#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ +#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ +#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ +#define SPR_DRR_RE 0x00000400 /* Range exception */ +#define SPR_DRR_SCE 0x00000800 /* System call exception */ +#define SPR_DRR_FPE 0x00001000 /* Floating point exception */ +#define SPR_DRR_TE 0x00002000 /* Trap exception */ + +/* + * Bit definitions for Performance counters mode registers + * + */ +#define SPR_PCMR_CP 0x00000001 /* Counter present */ +#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ +#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ +#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ +#define SPR_PCMR_LA 0x00000010 /* Load access event */ +#define SPR_PCMR_SA 0x00000020 /* Store access event */ +#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ +#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ +#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ +#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ +#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ +#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ +#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ +#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ +#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ +#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ + +/* + * Bit definitions for the Power management register + * + */ +#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ +#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ +#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ +#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ +#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ + +/* + * Bit definitions for PICMR + * + */ +#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ + +/* + * Bit definitions for PICPR + * + */ +#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ + +/* + * Bit definitions for PICSR + * + */ +#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ + +/* + * Bit definitions for Tick Timer Control Register + * + */ +#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ +#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD +#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ +#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ +#define SPR_TTMR_RT 0x40000000 /* Restart tick */ +#define SPR_TTMR_SR 0x80000000 /* Single run */ +#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ +#define SPR_TTMR_M 0xc0000000 /* Tick mode */ + +/* + * l.nop constants + * + */ +#define NOP_NOP 0x0000 /* Normal nop instruction */ +#define NOP_EXIT 0x0001 /* End of simulation */ +#define NOP_REPORT 0x0002 /* Simple report */ +#define NOP_PRINTF 0x0003 /* Simprintf instruction */ +#define NOP_PUTC 0x0004 /* JPB: Simputc instruction */ +#define NOP_CNT_RESET 0x0005 /* Reset statistics counters */ +#define NOP_REPORT_FIRST 0x0400 /* Report with number */ +#define NOP_REPORT_LAST 0x03ff /* Report with number */ + +#endif /* SPR_DEFS__H */ Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/except.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/except.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/except.h (revision 27) @@ -0,0 +1,52 @@ +/* except.h -- OR1K architecture specific exceptions + +Copyright (C) 1999 Damjan Lampret, lampret@opencores.org +Copyright (C) 2008 Embecosm Limited + +Contributor Jeremy Bennett + +This file is part of Or1ksim, the OpenRISC 1000 Architectural Simulator. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3 of the License, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. + +You should have received a copy of the GNU General Public License along +with this program. If not, see . +*/ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + + +#ifndef EXCEPT__H +#define EXCEPT__H + + +/* Package includes */ +//#include "arch.h" + +/* Definition of OR1K exceptions */ +#define EXCEPT_NONE 0x0000 +#define EXCEPT_RESET 0x0100 +#define EXCEPT_BUSERR 0x0200 +#define EXCEPT_DPF 0x0300 +#define EXCEPT_IPF 0x0400 +#define EXCEPT_TICK 0x0500 +#define EXCEPT_ALIGN 0x0600 +#define EXCEPT_ILLEGAL 0x0700 +#define EXCEPT_INT 0x0800 +#define EXCEPT_DTLBMISS 0x0900 +#define EXCEPT_ITLBMISS 0x0a00 +#define EXCEPT_RANGE 0x0b00 +#define EXCEPT_SYSCALL 0x0c00 +#define EXCEPT_FPE 0x0d00 +#define EXCEPT_TRAP 0x0e00 + +#endif /* EXCEPT__H */ Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/or32_selftest.h (revision 27) @@ -0,0 +1,78 @@ + +#ifndef _JP2_SELFTEST_H_ +#define _JP2_SELFTEST_H_ + +// Static memory controller defines +#define MC_BAR_0 0x00 +#define MC_AMR_0 0x04 +#define MC_WTR_0 0x30 +#define MC_RTR_0 0x34 +#define MC_OSR 0xe8 +#define MC_BAR_1 0x08 +#define MC_BAR_4 0x80 +#define MC_AMR_1 0x0c +#define MC_AMR_4 0x84 +#define MC_CCR_1 0x24 +#define MC_CCR_4 0xa0 +#define MC_RATR 0xb0 +#define MC_RCDR 0xc8 +#define MC_RCTR 0xb4 +#define MC_REFCTR 0xc4 +#define MC_PTR 0xbc +#define MC_RRDR 0xb8 +#define MC_RIR 0xcc +#define MC_ORR 0xe4 + +// Static flash defines +#define FLASH_AMR_VAL 0xf0000000 +#define FLASH_WTR_VAL 0x00011009 +#define FLASH_RTR_VAL 0x01002009 + +// Static SDRAM defines +#define SDRAM_RATR_VAL 0x00000006 +#define SDRAM_RCDR_VAL 0x00000002 +#define SDRAM_RCTR_VAL 0x00000006 +#define SDRAM_REFCTR_VAL 0x00000006 +#define SDRAM_PTR_VAL 0x00000001 +#define SDRAM_RRDR_VAL 0x00000000 +#define SDRAM_RIR_VAL 0x000000C0 + +// CPU defines +#define CPU_OP_ADR 0 +#define CPU_SEL_ADR 1 + + + +// None of the TC_* defines are currently used +#define TC_RESET 0 +#define TC_BRIGHT 1 +#define TC_DIM 2 +#define TC_UNDERLINE 3 +#define TC_BLINK 4 +#define TC_REVERSE 7 +#define TC_HIDDEN 8 + +#define TC_BLACK 0 +#define TC_RED 1 +#define TC_GREEN 2 +#define TC_YELLOW 3 +#define TC_BLUE 4 +#define TC_MAGENTA 5 +#define TC_CYAN 6 +#define TC_WHITE 7 + + + +// Prototypes //////////////////////////////////////////// +int dbg_test(); +int stall_cpus(void); +void init_mc(void); +void init_sram(void); +int test_sdram (void); +int test_sdram_2(void); +int test_sram(void); +int test_or1k_cpu0(void); +//int test_8051_cpu1(void); + +#endif // _JP2_SELFTEST_H_ + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/gdb-6.8-bz436037-reg-no-longer-active.patch (revision 27) @@ -0,0 +1,24 @@ +diff -d -urpN src.0/gdb/valops.c src.1/gdb/valops.c +--- src.0/gdb/valops.c 2008-07-27 04:00:03.000000000 +0200 ++++ src.1/gdb/valops.c 2008-07-31 15:17:42.000000000 +0200 +@@ -813,10 +813,18 @@ value_assign (struct value *toval, struc + struct frame_info *frame; + int value_reg; + +- /* Figure out which frame this is in currently. */ +- frame = frame_find_by_id (VALUE_FRAME_ID (toval)); + value_reg = VALUE_REGNUM (toval); + ++ /* Figure out which frame this is in currently. */ ++ frame = frame_find_by_id (VALUE_FRAME_ID (toval)); ++ /* "set $reg+=1" should work on programs with no debug info, ++ but frame_find_by_id returns NULL here (RH bug 436037). ++ Use current frame, it represents CPU state in this case. ++ If frame_find_by_id is changed to do it internally ++ (it is contemplated there), remove this. */ ++ if (!frame) ++ frame = get_current_frame (); ++ /* Probably never happens. */ + if (!frame) + error (_("Value being assigned to is no longer active.")); + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/rsp-server.h (revision 27) @@ -0,0 +1,36 @@ +/* rsp-server.c -- Remote Serial Protocol server for GDB + +Copyright (C) 2008 Embecosm Limited + +Contributor Jeremy Bennett + +This file was part of Or1ksim, the OpenRISC 1000 Architectural Simulator. +Was actually purchased by Mom when I decided it was nice, but not affordable after two other recent pen purchases. + +This program is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3 of the License, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, but WITHOUT +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +more details. + +You should have received a copy of the GNU General Public License along +with this program. If not, see . +*/ + +/* This program is commented throughout in a fashion suitable for processing + with Doxygen. */ + + +#ifndef RSP_SERVER__H +#define RSP_SERVER__H + + +/* Function prototypes for external use */ +void rsp_init (int portNum); +int handle_rsp (void); // returns 1 normally, 0 for an unrecoverable error + +#endif /* RSP_SERVER__H */ Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/bsdl.c (revision 27) @@ -0,0 +1,238 @@ +/* bsdl.c - BSDL file handler for the advanced JTAG bridge + Copyright(C) 2008 Nathan Yawn + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#include +#include +#include +#include +#include "bsdl.h" +#include "bsdl_parse.h" + + +#define debug(...) //fprintf(stderr, __VA_ARGS__ ) + +// Globals to deal with directory names +#define MAX_BSDL_DIRS 64 // Any more than this would take a looooong time... +static char *bsdl_dirs[MAX_BSDL_DIRS]; +static int bsdl_current_dir = 0; // We try them in reverse order + +// Globals to hold the current, open directory +DIR *bsdl_open_dir = NULL; + +// Globals to hold BSDL info +static bsdlinfo *bsdl_head = NULL; +static bsdlinfo *bsdl_tail = NULL; +static bsdlinfo *bsdl_last = NULL; // optimization: pointer to the last struct we used (not necessarily the last in the linked list) + +// Prototypes for local functions +bsdlinfo *get_bsdl_info(uint32_t idcode); + + + +////////////////////////////////////////////////////////////////////// +// API for init and config + +void bsdl_init(void) +{ + bsdl_dirs[0] = strdup("/opt/bsdl"); + bsdl_dirs[1] = strdup("/usr/share/bsdl"); + bsdl_dirs[2] = strdup("~/.bsdl"); + bsdl_dirs[3] = strdup("."); + bsdl_current_dir = 3; +} + +void bsdl_add_directory(const char *dirname) +{ + if(bsdl_current_dir >= (MAX_BSDL_DIRS-1)) { + printf("Max BSDL dirs (%d) exceeded; failed to add directory %s\n", MAX_BSDL_DIRS, dirname); + return; + } + + bsdl_current_dir++; + bsdl_dirs[bsdl_current_dir] = strdup(dirname); +} + + +/////////////////////////////////////////////////////////////////// +// API to get device info from BSDL files, if available + + +const char * bsdl_get_name(uint32_t idcode) +{ + bsdlinfo *info; + info = get_bsdl_info(idcode); + if(info != NULL) + return info->name; + + return NULL; + + +} + +// Return the IR length of the device with the given IDCODE, +// if its BSDL file is available. Returns -1 on +// error, which is an invalid size. + +int bsdl_get_IR_size(uint32_t idcode) +{ + bsdlinfo *info; + info = get_bsdl_info(idcode); + if(info != NULL) + return info->IR_size; + + return -1; +} + + +// Returns the DEBUG command for the device with the gived IDCODE, +// if its BSDL file is available. Returns 0xFFFFFFFF on error, +// which is as invalid command (because it's the BYPASS command) +uint32_t bsdl_get_debug_cmd(uint32_t idcode) +{ + bsdlinfo *info; + info = get_bsdl_info(idcode); + if(info != NULL) + return info->cmd_debug; + return TAP_CMD_INVALID; +} + +// Returns the USER1 command for the device with the gived IDCODE, +// if its BSDL file is available. Returns 0xFFFFFFFF on error, +// which is as invalid command (because it's the BYPASS command) +uint32_t bsdl_get_user1_cmd(uint32_t idcode) +{ + bsdlinfo *info; + info = get_bsdl_info(idcode); + if(info != NULL) + return info->cmd_user1; + return TAP_CMD_INVALID; +} + +// Returns the IDCODE command for the device with the gived IDCODE, +// if its BSDL file is available. Returns 0xFFFFFFFF on error, +// which is as invalid command (because it's the BYPASS command) +uint32_t bsdl_get_idcode_cmd(uint32_t idcode) +{ + bsdlinfo *info; + info = get_bsdl_info(idcode); + if(info != NULL) + return info->cmd_idcode; + return TAP_CMD_INVALID; +} + +///////////////////////////////////////////////////////////////////////////// +// Internal routines + + +// This uses a lazy algorithm...first, search data we already have. +// Then, parse new files (storing all data) only until we find +// the data we want. +bsdlinfo *get_bsdl_info(uint32_t idcode) +{ + struct dirent *direntry = NULL; + bsdlinfo *ptr = bsdl_head; + char *c; + + // Check the last place we looked + if(bsdl_last != NULL) + if((bsdl_last->idcode & bsdl_last->idcode_mask) == (idcode & bsdl_last->idcode_mask)) + return bsdl_last; + + // First, search through the info already parsed + while(ptr != NULL) + { + if((ptr->idcode & ptr->idcode_mask) == (idcode & ptr->idcode_mask)) + { + bsdl_last = ptr; + return ptr; + } + ptr = ptr->next; + } + + // Parse files until we get the IDCODE we want + while(1) + { + // Find and open a valid directory + while(bsdl_open_dir == NULL) + { + if(bsdl_current_dir < 0) + return NULL; // There are no more directories to check + debug("Trying BSDL dir \'%s\'\n", bsdl_dirs[bsdl_current_dir]); + bsdl_open_dir = opendir(bsdl_dirs[bsdl_current_dir]); + if((bsdl_open_dir == NULL) && (bsdl_current_dir > 2)) // Don't warn if default dirs not found + printf("Warning: unable to open BSDL directory \'%s\'\n", bsdl_dirs[bsdl_current_dir]); + bsdl_current_dir--; + direntry = NULL; + } + + // Find a BSDL file + do + { + direntry = readdir(bsdl_open_dir); + if(direntry == NULL) + { // We've exhausted this directory + closedir(bsdl_open_dir); + bsdl_open_dir = NULL; + break; + } + + // *** If a subdirectory, continue!! + + // Check if it's a BSDL file: .bsd, .bsdl, .BSD, .BSDL + debug("Checking file \'%s\'\n", direntry->d_name); + c = strrchr(direntry->d_name, '.'); + debug("File extension is \'%s\'\n", c); + if(c == NULL) + continue; + if(!strcmp(c, ".bsd") || !strcmp(c, ".bsdl") || !strcmp(c, ".BSD") || !strcmp(c, ".BSDL")) + break; + + } + while(1); + + if(direntry == NULL) // We need a new directory + continue; + + // Parse the BSDL file we found + debug("Parsing file \'%s\'\n", direntry->d_name); + ptr = parse_extract_values(direntry->d_name); + + // If we got good data... + if(ptr != NULL) + { + // Store the values... + if(bsdl_head == NULL) { + bsdl_head = ptr; + bsdl_tail = ptr; + } else { + bsdl_tail->next = ptr; + bsdl_tail = ptr; + } + + // ...and return if we got an IDCODE match + if((ptr->idcode & ptr->idcode_mask) == (idcode & ptr->idcode_mask)) { + bsdl_last = ptr; + return ptr; + } + } + } // while(1), parse files until we find a match or run out of dirs / files + + + // If no more files to parse and not found, return NULL + return NULL; +} Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/altera_virtual_jtag.h =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/altera_virtual_jtag.h (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/altera_virtual_jtag.h (revision 27) @@ -0,0 +1,19 @@ +#ifndef _ALTERA_VIRTUAL_JTAG_H_ +#define _ALTERA_VIRTUAL_JTAG_H_ + +// Contains constants relevant to the Altera Virtual JTAG +// device, which are not included in the BSDL. +// As of this writing, these are constant across every +// device which supports virtual JTAG. + +// These are commands for the FPGA's IR +#define ALTERA_CYCLONE_CMD_VIR 0x0E +#define ALTERA_CYCLONE_CMD_VDR 0x0C + +// These defines are for the virtual IR (not the FPGA's) +// The virtual TAP was defined in hardware to match the OpenCores native +// TAP in both IR size and DEBUG command. +#define ALT_VJTAG_IR_SIZE 4 +#define ALT_VJTAG_CMD_DEBUG 0x8 + +#endif Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm_vpi.v =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm_vpi.v (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm_vpi.v (revision 27) @@ -0,0 +1,178 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// dbg_comm_vpi.v //// +//// //// +//// //// +//// This file is part of the SoC/OpenRISC Development Interface //// +//// http://www.opencores.org/cores/DebugInterface/ //// +//// //// +//// //// +//// Author(s): //// +//// Igor Mohor (igorm@opencores.org) //// +//// Gyorgy Jeney (nog@sdf.lonestar.net) //// +//// Nathan Yawn (nathan.yawn@opencores.org) //// +//// //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000-2008 Authors //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: dbg_comm_vpi.v,v $ +// Revision 1.2 2009/05/17 20:55:57 Nathan +// Changed email address to opencores.org +// +// Revision 1.1 2008/07/26 17:33:20 Nathan +// Added debug comm module for use with VPI / network communication. +// +// Revision 1.1 2002/03/28 19:59:54 lampret +// Added bench directory +// +// Revision 1.1.1.1 2001/11/04 18:51:07 lampret +// First import. +// +// Revision 1.3 2001/09/24 14:06:13 mohor +// Changes connected to the OpenRISC access (SPR read, SPR write). +// +// Revision 1.2 2001/09/20 10:10:30 mohor +// Working version. Few bugs fixed, comments added. +// +// Revision 1.1.1.1 2001/09/13 13:49:19 mohor +// Initial official release. +// +// +// +// +// + + +`define JP_PORT "4567" +`define TIMEOUT_COUNT 6'd20 // 1/2 of a TCK clock will be this many SYS_CLK ticks. Must be less than 6 bits. + + module dbg_comm_vpi ( + SYS_CLK, + SYS_RSTN, + P_TMS, + P_TCK, + P_TRST, + P_TDI, + P_TDO + ); + + //parameter Tp = 20; + + output SYS_CLK; + output SYS_RSTN; + output P_TMS; + output P_TCK; + output P_TRST; + output P_TDI; + input P_TDO; + + reg SYS_CLK; + reg SYS_RSTN; + + + reg [4:0] memory; // [0:0]; + + + wire P_TCK; + wire P_TRST; + wire P_TDI; + wire P_TMS; + wire P_TDO; + + reg [3:0] in_word_r; + reg [5:0] clk_count; + + + // Provide the wishbone / CPU / system clock + initial + begin + SYS_CLK = 1'b0; + clk_count[5:0] <= `TIMEOUT_COUNT + 1; // Start with the timeout clock stopped + forever #5 SYS_CLK = ~SYS_CLK; + end + + // Provide the system reset + initial + begin + SYS_RSTN = 1'b1; + #200 SYS_RSTN = 1'b0; + #5000 SYS_RSTN = 1'b1; + end + + + // Handle commands from the upper level + initial + begin + in_word_r = 5'b0; + memory = 5'b0; + $jp_init(`JP_PORT); + #5500; // Wait until reset is complete + + while(1) + begin + #1; + $jp_in(memory); // This will not change memory[][] if no command has been sent from jp + if(memory[4]) // was memory[0][4] + begin + in_word_r = memory[3:0]; + memory = memory & 4'b1111; + clk_count = 6'b000000; // Reset the timeout clock in case jp wants to wait for a timeout / half TCK period + end + end + end + + + + // Send the output bit to the upper layer + always @ (P_TDO) + begin + $jp_out(P_TDO); + end + + + assign P_TCK = in_word_r[0]; + assign P_TRST = in_word_r[1]; + assign P_TDI = in_word_r[2]; + assign P_TMS = in_word_r[3]; + + + // Send timeouts / wait periods to the upper layer + always @ (posedge SYS_CLK) + begin + if(clk_count < `TIMEOUT_COUNT) clk_count[5:0] = clk_count[5:0] + 1; + else if(clk_count == `TIMEOUT_COUNT) begin + $jp_wait_time(); + clk_count[5:0] = clk_count[5:0] + 1; + end + // else it's already timed out, don't do anything + end + +endmodule + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm.v =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm.v (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_rtl/dbg_comm.v (revision 27) @@ -0,0 +1,174 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// dbg_comm.v //// +//// //// +//// //// +//// This file is part of the SoC/OpenRISC Development Interface //// +//// http://www.opencores.org/cores/DebugInterface/ //// +//// //// +//// //// +//// Author(s): //// +//// Igor Mohor (igorm@opencores.org) //// +//// Nathan Yawn (nathan.yawn@opencores.org) //// +//// //// +//// //// +//// //// +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2000-2008 Authors //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// +// CVS Revision History +// +// $Log: dbg_comm.v,v $ +// Revision 1.3 2009/05/17 20:55:57 Nathan +// Changed email address to opencores.org +// +// Revision 1.2 2008/07/22 18:23:25 Nathan +// Added clock and reset outputs to make simulation system simpler. Fixed P_TRST signal name. Added fflush calls to make file IO work as quickly as possible. Write the data out bit on falling clock edge. Cleanup. +// +// Revision 1.1 2002/03/28 19:59:54 lampret +// Added bench directory +// +// Revision 1.1.1.1 2001/11/04 18:51:07 lampret +// First import. +// +// Revision 1.3 2001/09/24 14:06:13 mohor +// Changes connected to the OpenRISC access (SPR read, SPR write). +// +// Revision 1.2 2001/09/20 10:10:30 mohor +// Working version. Few bugs fixed, comments added. +// +// Revision 1.1.1.1 2001/09/13 13:49:19 mohor +// Initial official release. +// +// +// +// +// + + + +`define GDB_IN "e:/tmp/gdb_in.dat" +`define GDB_OUT "e:/tmp/gdb_out.dat" + + +module dbg_comm( + SYS_CLK, + SYS_RSTN, + P_TMS, + P_TCK, + P_TRST, + P_TDI, + P_TDO + ); + +parameter Tp = 20; + +output SYS_CLK; +output SYS_RSTN; +output P_TMS; +output P_TCK; +output P_TRST; +output P_TDI; +input P_TDO; + +// Signal for the whole system +reg SYS_CLK; +reg SYS_RSTN; + +// For handling data from the input file +integer handle1, handle2; +reg [4:0] memory[0:0]; + +wire P_TCK; +wire P_TRST; +wire P_TDI; +wire P_TMS; +wire P_TDO; + +// Temp. signal +reg [3:0] in_word_r; + + + +// Provide the wishbone / CPU / system clock +initial +begin + SYS_CLK = 1'b0; + forever #5 SYS_CLK = ~SYS_CLK; +end + +// Provide the system reset +initial +begin + SYS_RSTN = 1'b1; + #200 SYS_RSTN = 1'b0; + #5000 SYS_RSTN = 1'b1; +end + +// Set the initial state of the JTAG pins +initial +begin + in_word_r = 4'h0; // This sets the TRSTN output active... +end + +// Handle input from a file for the JTAG pins +initial +begin + #5500; // Wait until reset is complete + while(1) + begin + #Tp; + $readmemh(`GDB_OUT, memory); + if(!(memory[0] & 5'b10000)) + begin + in_word_r = memory[0][3:0]; + handle1 = $fopen(`GDB_OUT); + $fwrite(handle1, "%h", 5'b10000 | memory[0]); // To ack that we read dgb_out.dat + $fflush(handle1); + $fclose(handle1); + end + end +end + +// Send the current state of the JTAG output to a file +always @ (P_TDO or negedge P_TCK) +begin + handle2 = $fopen(`GDB_IN); + $fdisplay(handle2, "%b", P_TDO); + $fflush(handle2); + $fclose(handle2); +end + +// Note these must match the bit definitions in the JTAG bridge program (adv_jtag_bridge) +assign P_TCK = in_word_r[0]; +assign P_TRST = in_word_r[1]; +assign P_TDI = in_word_r[2]; +assign P_TMS = in_word_r[3]; + + +endmodule // TAP + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/cable_xpc_dlc9.c (revision 27) @@ -0,0 +1,415 @@ +/* cable_xpc_dlc9.c - Xilinx Platform Cable (DLC9) driver for the Advanced JTAG Bridge + Copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + + +#include +#include +#include // for usleep() +#include // for sleep() + + +#include "usb.h" // libusb header +#include "cable_common.h" +#include "errcodes.h" + +#define USB_TIMEOUT 500 + +// Note that this is based on the UrJTAG driver for the XPC-USB, +// which was 'experimental' at the time. +// It only supports bit-bang mode, and therefore will not be fast. + +// USB constants for the DLC9 +#define XPCUSB_VID 0x3fd +#define XPCUSB_PID 0x08 + +// Bit meanings in the command byte sent to the DLC9 +// DLC9 has no TRST bit +#define XPCUSB_CMD_TDI 0x01 +#define XPCUSB_CMD_TDO 0x01 +#define XPCUSB_CMD_TMS 0x02 +#define XPCUSB_CMD_TCK 0x04 +#define XPCUSB_CMD_PROG 0x08 + + +static struct usb_device *device; + + +/////////////////////////////////////////////////////////////////////////////// +/*----- Functions for the Xilinx Platform Cable USB (Model DLC9) */ +///////////////////////////////////////////////////////////////////////////// + + +static int xpcu_request_28(struct usb_dev_handle *xpcu, int value) +{ + // Maybe clock speed setting? + if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0028, value, NULL, 0, USB_TIMEOUT)<0) + { + fprintf(stderr, "Error sending usb_control_msg(0x28.x)\n"); + return APP_ERR_USB; + } + + return APP_ERR_NONE; +} + + +static int xpcu_raise_ioa5(struct usb_dev_handle *xpcu) +{ + if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0018, 0x0000, NULL, 0, USB_TIMEOUT)<0) + { + fprintf(stderr, "Error sending usb_control_msg(0x18.0x00) (raise IOA.5{\n"); + return APP_ERR_USB; + } + + return APP_ERR_NONE; +} + +static int xpcu_select_gpio(struct usb_dev_handle *xpcu, int chain) +{ + if(usb_control_msg(xpcu, 0x40, 0xB0, 0x0052, chain, NULL, 0, USB_TIMEOUT)<0) + { + fprintf(stderr, "Error sending usb_control_msg(0x52.x) (select gpio)\n"); + return APP_ERR_USB; + } + + return APP_ERR_NONE; +} + +static int xpcu_read_firmware_version(struct usb_dev_handle *xpcu, uint16_t *buf) +{ + if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0050, 0x0000, (char*)buf, 2, USB_TIMEOUT)<0) + { + fprintf(stderr,"Error sending usb_control_msg(0x50.0) (read_firmware_version)\n"); + return APP_ERR_USB; + } + return APP_ERR_NONE; +} + +static int xpcu_read_cpld_version(struct usb_dev_handle *xpcu, uint16_t *buf) +{ + if(usb_control_msg(xpcu, 0xC0, 0xB0, 0x0050, 0x0001, (char*)buf, 2, USB_TIMEOUT)<0) + { + fprintf(stderr, "Error sending usb_control_msg(0x50.1) (read_cpld_version)\n"); + return APP_ERR_USB; + } + return APP_ERR_NONE; +} + + +static int xpcusb_enumerate_bus(void) +{ + int flag; // for USB bus scanning stop condition + struct usb_bus *bus; // pointer on the USB bus + + // board detection + usb_init(); + usb_find_busses(); + usb_find_devices(); + + flag = 0; + + for (bus = usb_get_busses(); bus; bus = bus->next) + { + for (device = bus->devices; device; device = device->next) + { + if (device->descriptor.idVendor == XPCUSB_VID && + device->descriptor.idProduct == XPCUSB_PID) + { + flag = 1; + fprintf(stderr, "Found Xilinx Platform Cable USB (DLC9)\n"); + return APP_ERR_NONE; + } + } + if (flag) + break; + } + + fprintf(stderr, "Failed to find Xilinx Platform Cable USB\n"); + return APP_ERR_CABLENOTFOUND; +} + + +int cable_xpcusb_init() +{ + int err = APP_ERR_NONE; + + // Process to reset the XPC USB (DLC9) + if(err |= xpcusb_enumerate_bus()) { + return err; + } + + usb_dev_handle *h_device = usb_open(device); + + if(h_device == NULL) + { + fprintf(stderr, "Init failed to open USB device for reset\n"); + return APP_ERR_USB; + } + + if(usb_reset(h_device) != APP_ERR_NONE) + fprintf(stderr, "Failed to reset XPC-USB\n"); + + usb_close(h_device); + + // Wait for reset!!! + sleep(1); + + // Do device initialization + if(err |= xpcusb_enumerate_bus()) + return err; + + h_device = usb_open(device); + if(h_device == NULL) + { + fprintf(stderr, "Init failed to open USB device for initialization\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USB-reset failed to set configuration\n"); + return APP_ERR_USB; + } + + while (usb_claim_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)); + + // DO DEVICE-SPECIFIC INIT HERE + // Don't mess with the order here, it's easy to break. + + // Maybe set the clock speed? + if(xpcu_request_28(h_device, 0x11) != APP_ERR_NONE) { + fprintf(stderr, "Request 28 (set clock speed?) failed.\n"); + } + + // Set internal TCK,TMS,TDO to 0 + if(usb_control_msg(h_device, 0x40, 0xB0, 0x0030, 0x08, NULL, 0, USB_TIMEOUT)!= APP_ERR_NONE) { + fprintf(stderr, "usb_control_msg(0x30.0x00) (write port E) failed\n"); + } + + // Read firmware version (constant embedded in firmware) + uint16_t buf; + + if(xpcu_read_firmware_version(h_device, &buf) != APP_ERR_NONE) { + fprintf(stderr, "Failed to read firmware version.\n"); + } + else { + printf("firmware version = 0x%04X (%u)\n", buf, buf); + } + + // Read CPLD version (uses the internal GPIF interface) + if(xpcu_read_cpld_version(h_device, &buf) != APP_ERR_NONE) { + fprintf(stderr, "Failed to read CPLD version.\n"); + } + else + { + printf("cable CPLD version = 0x%04X (%u)\n", buf, buf); + if(buf == 0) { + printf("Warning: version '0' can't be correct. Please try resetting the cable\n"); + } + } + + // Set IOA bit 5, which enables output buffers + if(xpcu_raise_ioa5(h_device) != APP_ERR_NONE) { + fprintf(stderr, "Failed to enable XPC output buffers\n"); + } + + // access external chain for normal operation + if(xpcu_select_gpio(h_device, 0) != APP_ERR_NONE) { + fprintf(stderr, "Failed to select external JTAG chain\n"); + } + + // Init all done, release cable + if (usb_release_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)){ + usb_close(h_device); + fprintf(stderr, "USB-out failed to release interface\n"); + return APP_ERR_USB; + } + + usb_close(h_device); + + return APP_ERR_NONE; +} + + +int cable_xpcusb_out(uint8_t value) +{ + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the ubs device + uint8_t out; + + // open the device + h_device = usb_open(device); + if (h_device == NULL){ + usb_close(h_device); + fprintf(stderr, "USB-out failed to open device\n"); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, device->config->bConfigurationValue)) + { + usb_close(h_device); + fprintf(stderr, "USB-out failed to set configuration\n"); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)); + + // send the buffer + // Translate to USB blaster protocol + out = 0; + if(value & TCLK_BIT) + out |= XPCUSB_CMD_TCK; + if(value & TDI_BIT) + out |= XPCUSB_CMD_TDI; + if(value & TMS_BIT) + out |= XPCUSB_CMD_TMS; + + out |= XPCUSB_CMD_PROG; // Set output PROG (always necessary) + + /* debug + if(value & TDI_BIT) + printf("Write 1\n"); + else + printf("Write 0\n"); + */ + + rv = usb_control_msg(h_device, 0x40, 0xB0, 0x0030, out, NULL, 0, USB_TIMEOUT); + if (rv < 0){ + fprintf(stderr, "\nFailed to send a write control message (rv = %d):\n%s\n", rv, usb_strerror()); + } + + // release the interface cleanly + if (usb_release_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release usb interface after write\n"); + } + + // close the device + usb_close(h_device); + return APP_ERR_NONE; +} + + +int cable_xpcusb_inout(uint8_t value, uint8_t *inval) +{ + int rv; // to catch return values of functions + usb_dev_handle *h_device; // handle on the usb device + char ret = 0; + uint8_t out; + + // Translate to USB blaster protocol + out = 0; + if(value & TCLK_BIT) + out |= XPCUSB_CMD_TCK; + if(value & TDI_BIT) + out |= XPCUSB_CMD_TDI; + if(value & TMS_BIT) + out |= XPCUSB_CMD_TMS; + + out |= XPCUSB_CMD_PROG; // Set output PROG (always necessary) + + // open the device + h_device = usb_open(device); + if (h_device == NULL){ + usb_close(h_device); + return APP_ERR_USB; + } + + // set the configuration + if (usb_set_configuration(h_device, device->config->bConfigurationValue)){ + usb_close(h_device); + return APP_ERR_USB; + } + + // wait until device is ready + while (usb_claim_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)); + + // Send the output + rv = usb_control_msg(h_device, 0x40, 0xB0, 0x0030, out, NULL, 0, USB_TIMEOUT); + if (rv < 0){ + fprintf(stderr, "\nFailed to send a write control message (rv = %x):\n%s\n", rv, usb_strerror()); + goto usbblaster_in_fail; + } + + + // receive the response + rv = usb_control_msg(h_device, 0xC0, 0xB0, 0x0038, 0, (char*)&ret, 1, USB_TIMEOUT); + if (rv < 0){ + fprintf(stderr, "\nFailed to execute a read control message:\n%s\n", usb_strerror()); + goto usbblaster_in_fail; + } + + + // release the interface cleanly + if (usb_release_interface(h_device, device->config->interface->altsetting->bInterfaceNumber)){ + fprintf(stderr, "Warning: failed to release USB interface after read\n"); + usb_close(h_device); + return APP_ERR_USB; + } + + // close the device + usb_close(h_device); + + /* debug + if(value & TDI_BIT) + printf("Write 1, "); + else + printf("Write 0, "); + */ + + if(ret & XPCUSB_CMD_TDO) + *inval = 1; + else + *inval = 0; + + //printf("Read 0\n"); + return APP_ERR_NONE; + +usbblaster_in_fail: + usb_release_interface(h_device, device->config->interface->altsetting->bInterfaceNumber); + usb_close(h_device); + return APP_ERR_USB; +} + + +// Xilinx couldn't be like everyone else. Oh, no. +// For some reason, "set data/drop TCK" then "read data/raise TCK" won't work. +// So we have our very own bit read/write function. @whee. +int cable_xpcusb_read_write_bit(uint8_t packet_out, uint8_t *bit_in) { + uint8_t data = TRST_BIT; // TRST is active low, don't clear unless /set/ in 'packet' + int err = APP_ERR_NONE; + + /* Write data, drop clock */ + if(packet_out & TDO) data |= TDI_BIT; + if(packet_out & TMS) data |= TMS_BIT; + if(packet_out & TRST) data &= ~TRST_BIT; + + err |= cable_xpcusb_inout(data, bit_in); // read in bit, set data, drop clock + err |= cable_xpcusb_out(data|TCLK_BIT); // clk hi + + return err; +} + + +int cable_xpcusb_opt(int c, char *str) +{ + fprintf(stderr, "Unknown parameter '%c'\n", c); + return APP_ERR_BAD_PARAM; +} + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/icarus/Makefile =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/icarus/Makefile (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/icarus/Makefile (revision 27) @@ -0,0 +1,12 @@ + +SRCDIR=../src/ + + + +default: vpi + +# This is for the Icarus simulator. +jp-io-vpi.vpi: $(SRCDIR)jp-io-vpi.c + iverilog-vpi $(SRCDIR)jp-io-vpi.c + +vpi: jp-io-vpi.vpi Makefile \ No newline at end of file Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/src/jp-io-vpi.c (revision 27) @@ -0,0 +1,371 @@ +/* jp-io-vpi.c -- JTAG communications vpi plugin + Copyright (C) 2004 György Jeney, nog@sdf.lonestar.org + Modifications copyright (C) 2008 Nathan Yawn, nathan.yawn@opencores.org + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ + +/* This plugs into an rtl simulator via vpi */ + +#include +#include +#include +#include +#include + +#ifdef WIN32 +#include +#else +#include +#include +#include +#include +#include +#endif + +#include + +/* The vpi<->jp connection is `mastered' by jp1. Therefore we just sit doing + * `nothing', waiting for jp1 to request or send us some data */ +static uint8_t vpi_out; /* data that the sim gives to us */ + +#ifdef WIN32 +SOCKET jp_comm_m; +SOCKET jp_comm; +char msgbuf[64]; +char * get_ws_error(void); +#define GET_ERR_MSG get_ws_error() +#ifndef EAGAIN +#define EAGAIN WSAEWOULDBLOCK +#endif +#ifndef EWOULDBLOCK +#define EWOULDBLOCK WSAEWOULDBLOCK +#endif +#else +static int jp_comm_m; /* The listening socket */ +static int jp_comm; /* The socket for communitateing with jp1 */ +#define GET_ERR_MSG strerror(errno) +#endif + +#ifndef SOCKET_ERROR +#define SOCKET_ERROR -1 +#endif + + +static int jp_got_con; /* Have we got a connection ? */ + +static int count_comp; /* Has the predetermined cycle-count been reached ? */ +static int jp_waiting; /* Is jp-waiting for count_comp ? */ + +int jp_check_con(); + +/*---------------------------------------------[ VPI interface to the sim ]---*/ +/* Sends a byte from the sim */ +int vpi_jp_out(char *xx) +{ + vpiHandle sys = vpi_handle(vpiSysTfCall, 0); + vpiHandle argv = vpi_iterate(vpiArgument, sys); + s_vpi_value value; + + if(!argv) { + vpi_printf("$jp_out: missing destination argument\n"); + vpi_free_object(argv); + return 0; + } + vpiHandle dat_to = vpi_scan(argv); + if(vpi_get(vpiType, dat_to) != vpiNet) { + vpi_printf("$jp_out: Must have a net as argument!!\n"); + vpi_free_object(argv); + return 0; + } + + value.format = vpiVectorVal; + vpi_get_value(dat_to, &value); + + if((value.value.vector->bval & 1)) { + vpi_free_object(argv); + return 0; + } + vpi_out = value.value.vector->aval & 1; + + vpi_free_object(argv); + + return 0; +} + +/* Sends a byte to the sim */ +int vpi_jp_in(char *xx) +{ + int ret; + uint8_t dat; + s_vpi_vecval vec; + + s_vpi_value value; + vpiHandle sys = vpi_handle(vpiSysTfCall, 0); + vpiHandle argv; + vpiHandle dat_to; + + vpiHandle dat_to_index; + + if(!jp_got_con) { + if(!jp_check_con()) + return 0; + } + + ret = recv(jp_comm, &dat, 1, 0); + if(!ret) + return 0; + if(ret == SOCKET_ERROR) + { +#ifdef WIN32 + if(WSAGetLastError() == WSAEWOULDBLOCK) +#else + if(errno == EAGAIN) +#endif + { + return 0; + } + else { + vpi_printf("Socket recv error: %s\n", GET_ERR_MSG); + return 0; + } + +} + + + if(dat & 0x80) { + switch(dat & 0x7f) { + case 0: + /* jp1 wants the TDO */ + send(jp_comm, &vpi_out, 1, 0); + return 0; + case 1: + /* jp wants a time-out */ + if(count_comp) { + dat = 0xFF; /* A value of 0xFF is expected, but not required */ + send(jp_comm, &dat, 1, 0); + } + else { + jp_waiting = 1; + } + return 0; + } + } + + argv = vpi_iterate(vpiArgument, sys); + + /* We got the data, acknowledge it and send it on to the sim */ + if(!argv) { + vpi_printf("$jp_in: missing destination argument\n"); + vpi_free_object(argv); + return 0; + } + dat_to = vpi_scan(argv); + if(vpi_get(vpiType, dat_to) != vpiReg) { + vpi_printf("$jp_in: Must have a register (vpiReg) as argument (type is %d)!!\n", vpi_get(vpiType, dat_to)); + vpi_free_object(argv); + return 0; + } + + value.format = vpiVectorVal; + + vec.aval = (dat & 0xf) | 0x10; + vec.bval = 0; + value.value.vector = &vec; + vpi_put_value(dat_to, &value, 0, vpiNoDelay); + + vpi_free_object(argv); + + dat |= 0x10; + ret = send(jp_comm, &dat, 1, 0); + + count_comp = 0; + + return 0; +} + +/* tells us that we reached a predetermined cycle count */ +int jp_wait_time(char *xx) +{ + uint8_t dat = 0xFF; + if(jp_waiting) { + send(jp_comm, &dat, 1, 0); + jp_waiting = 0; + } + + count_comp = 1; + return 0; +} + +/*---------------------------------------------------[ VPI<->jp functions ]---*/ +int init_sock(char *xx) +{ + + struct sockaddr_in addr; + int ret; + vpiHandle sys = vpi_handle(vpiSysTfCall, 0); + vpiHandle argv = vpi_iterate(vpiArgument, sys); + s_vpi_value value; + + if(!argv) { + vpi_printf("$jp_init: missing port argument\n"); + return 0; + } + vpiHandle sock = vpi_scan(argv); +/* orig + if(vpi_get(vpiConstType, sock) != vpiStringConst) { + vpi_printf("$jp_init: Must have a string as argument!!\n"); + vpi_free_object(argv); + return 0; + } +*/ + +#ifdef WIN32 + WSADATA wsaData; + ret = WSAStartup(MAKEWORD(2,2), &wsaData); // must be called before all socket operations + if(ret != 0) { + vpi_printf("$jp_init: Winsock startup failed."); + return 0; + } +#endif + + value.format = vpiStringVal; + vpi_get_value(sock, &value); + + addr.sin_family = AF_INET; + addr.sin_port = atoi(value.value.str); + addr.sin_addr.s_addr = INADDR_ANY; + memset(addr.sin_zero, '\0', sizeof(addr.sin_zero)); + + jp_comm_m = socket(PF_INET, SOCK_STREAM, 0); +#ifdef WIN32 + if(jp_comm_m == INVALID_SOCKET) +#else + if(jp_comm_m < 0) +#endif + { + fprintf(stderr, "Unable to create comm socket: %s\n", GET_ERR_MSG); + return 0; + } + + if(bind(jp_comm_m, (struct sockaddr *)&addr, sizeof(addr)) == SOCKET_ERROR) { + fprintf(stderr, "Unable to bind the socket: %s\n", GET_ERR_MSG); + return 0; + } + + if(listen(jp_comm_m, 1) == SOCKET_ERROR) { + fprintf(stderr, "Unable to listen: %s\n", GET_ERR_MSG); + return 0; + } + +#ifdef WIN32 + u_long arg = 1; + ioctlsocket(jp_comm_m, FIONBIO, &arg); +#else + ret = fcntl(jp_comm_m, F_GETFL); + ret |= O_NONBLOCK; + fcntl(jp_comm_m, F_SETFL, ret); +#endif + + jp_got_con = 0; + jp_waiting = 0; + return 0; +} + +/* Checks to see if we got a connection */ +int jp_check_con() +{ + int ret; + + if((jp_comm = accept(jp_comm_m, NULL, NULL)) == SOCKET_ERROR) { +#ifdef WIN32 + if(WSAGetLastError() == WSAEWOULDBLOCK) +#else + if(errno == EAGAIN) +#endif + return 0; + fprintf(stderr, "Unable to accept connection: %s\n", GET_ERR_MSG); + return 0; + } + + + // Set the comm socket to non-blocking. + // Close the server socket, so that the port can be taken again + // if the simulator is reset. +#ifdef WIN32 + u_long arg = 1; + ioctlsocket(jp_comm, FIONBIO, &arg); + closesocket(jp_comm_m); +#else + ret = fcntl(jp_comm, F_GETFL); + ret |= O_NONBLOCK; + fcntl(jp_comm, F_SETFL, ret); + close(jp_comm_m); +#endif + + vpi_printf("JTAG communication connected!\n"); + jp_got_con = 1; + return 1; +} + +/*------------------------------------------------------------[ VPI stuff ]---*/ +static void jtag_register() +{ + s_vpi_systf_data tf_data; + + tf_data.type = vpiSysTask; + tf_data.tfname = "$jp_in"; + tf_data.calltf = vpi_jp_in; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); + + tf_data.type = vpiSysTask; + tf_data.tfname = "$jp_out"; + tf_data.calltf = vpi_jp_out; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); + + tf_data.type = vpiSysTask; + tf_data.tfname = "$jp_init"; + tf_data.calltf = init_sock; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); + + tf_data.type = vpiSysTask; + tf_data.tfname = "$jp_wait_time"; + tf_data.calltf = jp_wait_time; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); +} + +void (*vlog_startup_routines[])() = { + jtag_register, + 0 +}; + + +#ifdef WIN32 +char *get_ws_error(void) +{ + snprintf(msgbuf, 64, "%d", WSAGetLastError()); + return msgbuf; +} +#endif + Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll (revision 27)
ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/jp-io-vpi.dll Property changes : Added: svn:executable Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/Makefile =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/Makefile (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_win32/Makefile (revision 27) @@ -0,0 +1,27 @@ + +SRCDIR=../src/ + +# The location of the ModelSim installation, used +# to build the C lib for VPI. Used by MinGW, so use windows dir name, not /cygdrive/... +MODEL=c:/altera/70/modelsim_ae + +# Different installs of Modelsim keep their libraries in different +# directories (e.g. the version that comes with the Altera web version). +# This directory must contain mtipli.dll +MODEL_LIB=$(MODEL)/win32aloem + +# If building under windows, Modelsim requires that the VPI +# library be compiled with MinGW, NOT cygwin GCC. The location +# here is the default used by the auto-installer. +MINGW_CC = c:/MinGW/bin/mingw32-gcc.exe + + +default: vpi + +# This is for ModelSim under cygwin. Modelsim requires the shared lib +# to be compiled with MinGW, not cygwin GCC. +jp-io-vpi.dll: $(SRCDIR)jp-io-vpi.c Makefile + $(MINGW_CC) -DWIN32 -c -I$(MODEL)/include $(SRCDIR)jp-io-vpi.c -o jp-io-vpi.o + $(MINGW_CC) -DWIN32 -shared -Bsymbolic -o jp-io-vpi.dll jp-io-vpi.o -L$(MODEL_LIB) -lmtipli -lws2_32 + +vpi: jp-io-vpi.dll Makefile \ No newline at end of file Index: ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile =================================================================== --- ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile (nonexistent) +++ ADS_RELEASE_1_2_0/Software/adv_jtag_bridge/sim_lib/modelsim_linux_x86/Makefile (revision 27) @@ -0,0 +1,20 @@ + +SRCDIR=../src/ +CC = gcc + +# The location of the ModelSim installation, used +# to build the C lib for VPI. Must contain a subdir with +# vpi_user.h. +MODEL=/opt/modelsim + + + +default: vpi + +# This is for ModelSim under Linux (x86/32) +# If RH v7.1 or lower, add -noinhibit-exec +jp-io-vpi.so: $(SRCDIR)jp-io-vpi.c Makefile + $(CC) -c -I$(MODEL)/modeltech/include $(SRCDIR)jp-io-vpi.c -o jp-io-vpi.o + $(CC) -shared -Bsymbolic -o jp-io-vpi.so jp-io-vpi.o -lc + +vpi: jp-io-vpi.so Makefile \ No newline at end of file

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