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URL https://opencores.org/ocsvn/artificial_neural_network/artificial_neural_network/trunk

Subversion Repositories artificial_neural_network

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  • This comparison shows the changes necessary to convert path
    /artificial_neural_network
    from Rev 10 to Rev 11
    Reverse comparison

Rev 10 → Rev 11

/trunk/ANN_kernel/RTL_VHDL_files/activation_function.vhd
21,7 → 21,6
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
 
 
entity activation_function is
generic
(
/trunk/ANN_kernel/RTL_VHDL_files/adder_tree.vhd
46,6 → 46,29
 
architecture Behavioral of adder_tree is
 
 
 
component adder_tree is
generic
(
NumIn : integer := 9; -- Number of inputs
Nbit : integer := 12 -- Bit width of the input data
);
 
port
(
-- Input ports
reset : in std_logic;
clk : in std_logic;
en : in std_logic; -- Enable
inputs : in std_logic_vector((Nbit*NumIn)-1 downto 0); -- Input data
 
-- Output ports
en_out : out std_logic; -- Output enable (output data validation)
output : out std_logic_vector(Nbit-1 downto 0) -- Output of the tree adder
);
end component;
 
constant NumIn2 : integer := NumIn/2; -- Number of imputs of the next adder tree layer
 
signal next_en : std_logic := '0'; -- Next adder tree layer enable
107,7 → 130,7
recursion:
if (NumIn > 2) generate
 
sub_adder_tree: entity work.adder_tree
sub_adder_tree: adder_tree
generic map
(
NumIn => (NumIn2)+(NumIn mod 2),
/trunk/test_bench/makefile
5,7 → 5,9
${SRC_KER_DIR}/support_pkg.vhd \
${SRC_KER_DIR}/wb_init.vhd \
${SRC_KER_DIR}/mac.vhd \
${SRC_KER_DIR}/af_sigmoid.vhd \
${SRC_KER_DIR}/af_sigmoid2.vhd \
${SRC_KER_DIR}/af_sigmoid_mat.vhd \
${SRC_KER_DIR}/activation_function.vhd \
${SRC_KER_DIR}/shiftreg_pl.vhd \
${SRC_KER_DIR}/shiftreg_pu.vhd \

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