URL
https://opencores.org/ocsvn/ddr3_synthesizable_bfm/ddr3_synthesizable_bfm/trunk
Subversion Repositories ddr3_synthesizable_bfm
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 3 to Rev 2
- ↔ Reverse comparison
Rev 3 → Rev 2
/ddr3_synthesizable_bfm/trunk/rtl/ddr3_simple4.v
18,7 → 18,7
* USA |
* |
* |
* Simple implementation of DDR3 Memory |
* simple implementation of DDR3 Memory |
* will only reponse to write and read request |
* parameter |
* count start from t0,t2,t2... |
29,6 → 29,9
* | | | |
* t0 t1 t2 .... |
* |
*2/12/2011: not able to handle multiple bank opening |
*2/12/2011: not using DM signals |
* |
*/ |
|
`timescale 1ps / 1ps |