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  • This comparison shows the changes necessary to convert path
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    from Rev 133 to Rev 132
    Reverse comparison

Rev 133 → Rev 132

/trunk/rtl/verilog/eth_miim.v
41,9 → 41,6
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.3 2002/01/23 10:28:16 mohor
// Link in the header changed.
//
// Revision 1.2 2001/10/19 08:43:51 mohor
// eth_timescale.v changed to timescale.v This is done because of the
// simulation of the few cores in a one joined project.
283,7 → 280,7
Nvalid <= #Tp 1'b0;
else
begin
if(~InProgress_q2 & InProgress_q3)
if(~InProgress & InProgress_q1)
begin
Nvalid <= #Tp 1'b0;
end
346,7 → 343,7
assign StartOp = WriteDataOp | ReadStatusOp | ScanStatusOp;
 
// Busy
assign Busy = WCtrlDataStart | RStatStart | SyncStatMdcEn | EndBusy | InProgress | InProgress_q3 | Nvalid;
assign Busy = WCtrlDataStart | RStatStart | SyncStatMdcEn | EndBusy | InProgress | InProgress_q3;
 
 
// Generation of the InProgress signal (indicates when an operation is in progress)

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