OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 319 to Rev 318
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  •

Rev 319 → Rev 318

/trunk/sim/rtl_sim/ncsim_sim/run/run_eth_sim_regr.scr
11,24 → 11,22
set ok = 1;
 
# Process argument
set i = 1;
set arg_waves = 0;
set arg_regression = 0;
 
 
if ($arg_num == 0) then
echo " Verification without any parameter !"
else
while ($i <= $arg_num);
if (("$argv[$i]" == "waves") | ("$argv[$i]" == "-w")) then
if ($arg_num == 1) then
if (("$1" == "waves") | ("$1" == "-w")) then
@ arg_waves = 1;
echo " Verification with parameter : waves !"
else
if (("$argv[$i]" == "regression") | ("$argv[$i]" == "-r")) then
else
if (("$1" == "regression") | ("$1" == "-r")) then
@ arg_regression = 1;
echo " Verification with parameter : regression !"
else
echo " Not correct parameter ( $i )"
echo " Not correct parameter ( $1 )"
echo " Correct parameters are:"
echo " 'waves' or '-w'"
echo " 'regression' or '-r'"
35,70 → 33,49
exit
endif
endif
@ i = $i + 1;
end
else
if ($arg_num == 2) then
if (("$1" == "waves") | ("$1" == "-w")) then
@ arg_waves = 1;
if (("$2" == "regression") | ("$2" == "-r")) then
@ arg_regression = 1;
echo " Verification with parameter : waves, regression !"
else
echo " Not correct parameter ( $2 )"
echo " Correct 2. parameter is:"
echo " 'regression' or '-r'"
exit
endif
else
if (("$1" == "regression") | ("$1" == "-r")) then
@ arg_regression = 1;
if (("$2" == "waves") | ("$2" == "-w")) then
@ arg_waves = 1;
echo " Verification with parameter : waves, regression !"
else
echo " Not correct parameter ( $2 )"
echo " Correct 2. parameter is:"
echo " 'waves' or '-w'"
exit
endif
else
echo " Not correct parameter ( $1 )"
echo " Correct parameters are:"
echo " 'waves' or '-w'"
echo " 'regression' or '-r'"
exit
endif
endif
else
echo " Too many parameters ( $arg_num )"
echo " Maximum number of parameters is 2:"
echo " 'waves' or '-w'"
echo " 'regression' or '-r'"
exit
endif
endif
endif
 
 
# if ($arg_num == 1) then
# if (("$1" == "waves") | ("$1" == "-w")) then
# @ arg_waves = 1;
# echo " Verification with parameter : waves !"
# else
# if (("$1" == "regression") | ("$1" == "-r")) then
# @ arg_regression = 1;
# echo " Verification with parameter : regression !"
# else
# echo " Not correct parameter ( $1 )"
# echo " Correct parameters are:"
# echo " 'waves' or '-w'"
# echo " 'regression' or '-r'"
# exit
# endif
# endif
# else
# if ($arg_num == 2) then
# if (("$1" == "waves") | ("$1" == "-w")) then
# @ arg_waves = 1;
# if (("$2" == "regression") | ("$2" == "-r")) then
# @ arg_regression = 1;
# echo " Verification with parameter : waves, regression !"
# else
# echo " Not correct parameter ( $2 )"
# echo " Correct 2. parameter is:"
# echo " 'regression' or '-r'"
# exit
# endif
# else
# if (("$1" == "regression") | ("$1" == "-r")) then
# @ arg_regression = 1;
# if (("$2" == "waves") | ("$2" == "-w")) then
# @ arg_waves = 1;
# echo " Verification with parameter : waves, regression !"
# else
# echo " Not correct parameter ( $2 )"
# echo " Correct 2. parameter is:"
# echo " 'waves' or '-w'"
# exit
# endif
# else
# echo " Not correct parameter ( $1 )"
# echo " Correct parameters are:"
# echo " 'waves' or '-w'"
# echo " 'regression' or '-r'"
# exit
# endif
# endif
# else
# echo " Too many parameters ( $arg_num )"
# echo " Maximum number of parameters is 2:"
# echo " 'waves' or '-w'"
# echo " 'regression' or '-r'"
# exit
# endif
# endif
# endif
 
echo ""
echo "<<<"
echo "<<< Ethernet MAC VERIFICATION "
189,7 → 166,7
endif
echo "worklib.ethernet:fun" >> ./ncsim.args
 
ncsim -file ./ncsim.args > ../log/tb_eth_display.log #| tee ../log/tb_eth_display.log
ncsim -file ./ncsim.args# > /dev/null
if ($status != 0) then
echo ""
echo "TESTS couldn't start due to Errors!"
/trunk/sim/rtl_sim/ncsim_sim/run/top_groups.do
116,8 → 116,8
define variable nofullpathfilenames
include bookmark with filenames
include scope history without filenames
define waveform window listpane 11
define waveform window namepane 16
define waveform window listpane 5.84
define waveform window namepane 16.26
define multivalueindication
define pattern curpos dot
define pattern cursor1 dot
160,8 → 160,6
 
add group \
"WISHBONE slave signals" \
tb_ethernet.eth_sl_wb_dat_i[31:0]'h \
tb_ethernet.eth_sl_wb_dat_o[31:0]'h \
tb_ethernet.eth_top.wb_adr_i[11:2]'h \
tb_ethernet.eth_top.wb_sel_i[3:0]'h \
tb_ethernet.eth_top.wb_we_i \
182,104 → 180,6
tb_ethernet.eth_top.m_wb_err_i \
 
add group \
"WISHBONE RX memory" \
tb_ethernet.eth_top.wishbone.TxLength[15:0]'h \
tb_ethernet.eth_top.wishbone.TxLengthEq0 \
tb_ethernet.eth_top.wishbone.TxLengthLt4 \
tb_ethernet.eth_top.wishbone.TxPointerLSB[1:0]'h \
tb_ethernet.eth_top.wishbone.TxPointerLSB_rst[1:0]'h \
tb_ethernet.eth_top.wishbone.TxPointerMSB[31:2]'h \
tb_ethernet.eth_top.wishbone.TxPointerRead \
tb_ethernet.eth_top.wishbone.TxBDReady \
tb_ethernet.eth_top.wishbone.TxBufferAlmostEmpty \
tb_ethernet.eth_top.wishbone.TxBufferAlmostFull \
tb_ethernet.eth_top.wishbone.TxBufferEmpty \
tb_ethernet.eth_top.wishbone.TxBufferFull \
tb_ethernet.eth_top.wishbone.TxData_wb[31:0]'h \
tb_ethernet.eth_top.wishbone.TxData[7:0]'h \
tb_ethernet.eth_top.wishbone.TxDataLatched[31:0]'h \
tb_ethernet.eth_top.wishbone.TxByteCnt[1:0]'h \
tb_ethernet.eth_top.wishbone.TxStatus[14:11]'h \
tb_ethernet.eth_top.wishbone.TxStatusInLatched[8:0]'h \
tb_ethernet.test_mac_full_duplex_transmit.max_tmp[15:0]'h \
tb_ethernet.test_mac_full_duplex_transmit.min_tmp[15:0]'h \
tb_ethernet.test_mac_full_duplex_transmit.i_length'h \
tb_ethernet.eth_phy.tx_len[31:0]'h \
tb_ethernet.eth_phy.tx_len_err[31:0]'h \
tb_ethernet.eth_phy.tx_cnt[31:0]'h \
tb_ethernet.eth_phy.tx_byte_aligned_ok \
tb_ethernet.wb_slave.CYC_I \
tb_ethernet.wb_slave.STB_I \
tb_ethernet.wb_slave.WE_I \
tb_ethernet.wb_slave.ADR_I[31:0]'h \
tb_ethernet.wb_slave.DAT_I[31:0]'h \
tb_ethernet.wb_slave.SEL_I[3:0]'h \
tb_ethernet.wb_slave.ACK_O \
tb_ethernet.wb_slave.ERR_O \
tb_ethernet.wb_slave.RTY_O \
tb_ethernet.wb_slave.mem_wr_data_out[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.num_of_frames's \
tb_ethernet.test_mac_full_duplex_receive.first_fr_received \
tb_ethernet.test_mac_full_duplex_receive.bit_end_1's \
tb_ethernet.test_mac_full_duplex_receive.bit_end_2's \
tb_ethernet.test_mac_full_duplex_receive.bit_start_1's \
tb_ethernet.test_mac_full_duplex_receive.bit_start_2's \
tb_ethernet.test_mac_full_duplex_receive.burst_data[32767:0]'h \
tb_ethernet.test_mac_full_duplex_receive.burst_tmp_data[32767:0]'h \
tb_ethernet.test_mac_full_duplex_receive.check_frame \
tb_ethernet.test_mac_full_duplex_receive.data[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.end_task[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.fail's \
tb_ethernet.test_mac_full_duplex_receive.first_fr_received \
tb_ethernet.test_mac_full_duplex_receive.frame_ended \
tb_ethernet.test_mac_full_duplex_receive.frame_started \
tb_ethernet.test_mac_full_duplex_receive.i's \
tb_ethernet.test_mac_full_duplex_receive.i1's \
tb_ethernet.test_mac_full_duplex_receive.i2's \
tb_ethernet.test_mac_full_duplex_receive.i3's \
tb_ethernet.test_mac_full_duplex_receive.i_addr's \
tb_ethernet.test_mac_full_duplex_receive.i_data's \
tb_ethernet.test_mac_full_duplex_receive.i_length's \
tb_ethernet.test_mac_full_duplex_receive.max_tmp[15:0]'h \
tb_ethernet.test_mac_full_duplex_receive.min_tmp[15:0]'h \
tb_ethernet.test_mac_full_duplex_receive.num_of_bd's \
tb_ethernet.test_mac_full_duplex_receive.num_of_frames's \
tb_ethernet.test_mac_full_duplex_receive.num_of_reg's \
tb_ethernet.test_mac_full_duplex_receive.speed's \
tb_ethernet.test_mac_full_duplex_receive.st_data[7:0]'h \
tb_ethernet.test_mac_full_duplex_receive.start_task[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.stop_checking_frame \
tb_ethernet.test_mac_full_duplex_receive.test_num's \
tb_ethernet.test_mac_full_duplex_receive.tmp[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.tmp_bd'h \
tb_ethernet.test_mac_full_duplex_receive.tmp_bd_num's \
tb_ethernet.test_mac_full_duplex_receive.tmp_data's \
tb_ethernet.test_mac_full_duplex_receive.tmp_ipgt's \
tb_ethernet.test_mac_full_duplex_receive.tmp_len's \
tb_ethernet.test_mac_full_duplex_receive.tx_bd_num[31:0]'h \
tb_ethernet.test_mac_full_duplex_receive.wait_for_frame \
tb_ethernet.wbm_working \
tb_ethernet.check_rx_packet.addr_phy[31:0]'h \
tb_ethernet.check_rx_packet.addr_wb[31:0]'h \
tb_ethernet.check_rx_packet.buffer[21:0]'h \
tb_ethernet.check_rx_packet.data_phy'h \
tb_ethernet.check_rx_packet.data_wb'h \
tb_ethernet.check_rx_packet.delta_t \
tb_ethernet.check_rx_packet.failure[31:0]'h \
tb_ethernet.check_rx_packet.i's \
tb_ethernet.check_rx_packet.len[15:0]'h \
tb_ethernet.check_rx_packet.plus_dribble_nibble \
tb_ethernet.check_rx_packet.rxpnt_phy[31:0]'h \
tb_ethernet.check_rx_packet.rxpnt_wb[31:0]'h \
tb_ethernet.check_rx_packet.successful_dribble_nibble \
tb_ethernet.wb_slave.rd_mem.adr_i[31:0]'h \
tb_ethernet.wb_slave.rd_mem.dat_o[31:0]'h \
tb_ethernet.wb_slave.rd_mem.sel_i[3:0]'h \
tb_ethernet.wb_slave.ADR_I[31:0]'h \
tb_ethernet.wb_slave.mem_wr_data_out[31:0]'h \
tb_ethernet.wb_slave.SEL_I[3:0]'h \
 
add group \
"MAC FIFO" \
tb_ethernet.eth_top.wishbone.rx_fifo.write \
tb_ethernet.eth_top.wishbone.rx_fifo.data_in[31:0]'h \
438,4 → 338,6
 
 
deselect all
open window designbrowser 1 geometry 56 121 855 550
open window designbrowser 1 geometry 56 119 855 550
open window waveform 1 geometry 10 59 1592 1094
zoom at 0(0)ns 0.00000403 0.00000000
/trunk/sim/rtl_sim/ncsim_sim/log/tb_eth_display.log File deleted
/trunk/sim/rtl_sim/ncsim_sim/log/eth_tb.log File deleted

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