OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /ethmac
    from Rev 365 to Rev 364
    Reverse comparison

Rev 365 → Rev 364

/trunk/rtl/verilog/ethmac.v
263,7 → 263,7
mtx_clk_pad_i, mtxd_pad_o, mtxen_pad_o, mtxerr_pad_o,
 
//RX
mrx_clk_pad_i, mrxd_pad_i, mrxdv_pad_i, mrxerr_pad_i, mcoll_pad_i, mcrs_pad_i,
mrx_clk_pad_i, mrxd_pad_i, mrxdv_pad_i, mrxerr_pad_i, mcoll_pad_i, mcrs_pad_i,
// MIIM
mdc_pad_o, md_pad_i, md_pad_o, md_padoe_o,
396,27 → 396,13
// Connecting Miim module
eth_miim miim1
(
.Clk(wb_clk_i),
.Reset(wb_rst_i),
.Divider(r_ClkDiv),
.NoPre(r_MiiNoPre),
.CtrlData(r_CtrlData),
.Rgad(r_RGAD),
.Fiad(r_FIAD),
.WCtrlData(r_WCtrlData),
.RStat(r_RStat),
.ScanStat(r_ScanStat),
.Mdi(md_pad_i),
.Mdo(md_pad_o),
.MdoEn(md_padoe_o),
.Mdc(mdc_pad_o),
.Busy(Busy_stat),
.Prsd(Prsd),
.LinkFail(LinkFail),
.Nvalid(NValid_stat),
.WCtrlDataStart(WCtrlDataStart),
.RStatStart(RStatStart),
.UpdateMIIRX_DATAReg(UpdateMIIRX_DATAReg)
.Clk(wb_clk_i), .Reset(wb_rst_i), .Divider(r_ClkDiv),
.NoPre(r_MiiNoPre), .CtrlData(r_CtrlData), .Rgad(r_RGAD),
.Fiad(r_FIAD), .WCtrlData(r_WCtrlData), .RStat(r_RStat),
.ScanStat(r_ScanStat), .Mdi(md_pad_i), .Mdo(md_pad_o),
.MdoEn(md_padoe_o), .Mdc(mdc_pad_o), .Busy(Busy_stat),
.Prsd(Prsd), .LinkFail(LinkFail), .Nvalid(NValid_stat),
.WCtrlDataStart(WCtrlDataStart), .RStatStart(RStatStart), .UpdateMIIRX_DATAReg(UpdateMIIRX_DATAReg)
);
 
 
468,11 → 454,9
//wire DWord;
wire ByteSelected;
wire BDAck;
wire [31:0] BD_WB_DAT_O; // wb_dat_o that comes from the Wishbone module
//(for buffer descriptors read/write)
wire [31:0] BD_WB_DAT_O; // wb_dat_o that comes from the Wishbone module (for buffer descriptors read/write)
wire [3:0] BDCs; // Buffer descriptor CS
wire CsMiss; // When access to the address between 0x800
// and 0xfff occurs, acknowledge is set
wire CsMiss; // When access to the address between 0x800 and 0xfff occurs, acknowledge is set
// but data is not valid.
wire r_Pad;
wire r_CrcEn;
571,71 → 555,30
// Connecting Ethernet registers
eth_registers ethreg1
(
.DataIn(wb_dat_i),
.Address(wb_adr_i[9:2]),
.Rw(wb_we_i),
.Cs(RegCs),
.Clk(wb_clk_i),
.Reset(wb_rst_i),
.DataOut(RegDataOut),
.r_RecSmall(r_RecSmall),
.r_Pad(r_Pad),
.r_HugEn(r_HugEn),
.r_CrcEn(r_CrcEn),
.r_DlyCrcEn(r_DlyCrcEn),
.r_FullD(r_FullD),
.r_ExDfrEn(r_ExDfrEn),
.r_NoBckof(r_NoBckof),
.r_LoopBck(r_LoopBck),
.r_IFG(r_IFG),
.r_Pro(r_Pro),
.r_Iam(),
.r_Bro(r_Bro),
.r_NoPre(r_NoPre),
.r_TxEn(r_TxEn),
.r_RxEn(r_RxEn),
.Busy_IRQ(Busy_IRQ),
.RxE_IRQ(RxE_IRQ),
.RxB_IRQ(RxB_IRQ),
.TxE_IRQ(TxE_IRQ),
.TxB_IRQ(TxB_IRQ),
.r_IPGT(r_IPGT),
.r_IPGR1(r_IPGR1),
.r_IPGR2(r_IPGR2),
.r_MinFL(r_MinFL),
.r_MaxFL(r_MaxFL),
.r_MaxRet(r_MaxRet),
.r_CollValid(r_CollValid),
.r_TxFlow(r_TxFlow),
.r_RxFlow(r_RxFlow),
.r_PassAll(r_PassAll),
.r_MiiNoPre(r_MiiNoPre),
.r_ClkDiv(r_ClkDiv),
.r_WCtrlData(r_WCtrlData),
.r_RStat(r_RStat),
.r_ScanStat(r_ScanStat),
.r_RGAD(r_RGAD),
.r_FIAD(r_FIAD),
.r_CtrlData(r_CtrlData),
.NValid_stat(NValid_stat),
.Busy_stat(Busy_stat),
.LinkFail(LinkFail),
.r_MAC(r_MAC),
.WCtrlDataStart(WCtrlDataStart),
.RStatStart(RStatStart),
.UpdateMIIRX_DATAReg(UpdateMIIRX_DATAReg),
.Prsd(Prsd),
.r_TxBDNum(r_TxBDNum),
.int_o(int_o),
.r_HASH0(r_HASH0),
.r_HASH1(r_HASH1),
.r_TxPauseRq(r_TxPauseRq),
.r_TxPauseTV(r_TxPauseTV),
.RstTxPauseRq(RstTxPauseRq),
.TxCtrlEndFrm(TxCtrlEndFrm),
.StartTxDone(StartTxDone),
.TxClk(mtx_clk_pad_i),
.RxClk(mrx_clk_pad_i),
.DataIn(wb_dat_i), .Address(wb_adr_i[9:2]), .Rw(wb_we_i),
.Cs(RegCs), .Clk(wb_clk_i), .Reset(wb_rst_i),
.DataOut(RegDataOut), .r_RecSmall(r_RecSmall),
.r_Pad(r_Pad), .r_HugEn(r_HugEn), .r_CrcEn(r_CrcEn),
.r_DlyCrcEn(r_DlyCrcEn), .r_FullD(r_FullD),
.r_ExDfrEn(r_ExDfrEn), .r_NoBckof(r_NoBckof), .r_LoopBck(r_LoopBck),
.r_IFG(r_IFG), .r_Pro(r_Pro), .r_Iam(),
.r_Bro(r_Bro), .r_NoPre(r_NoPre), .r_TxEn(r_TxEn),
.r_RxEn(r_RxEn), .Busy_IRQ(Busy_IRQ), .RxE_IRQ(RxE_IRQ),
.RxB_IRQ(RxB_IRQ), .TxE_IRQ(TxE_IRQ), .TxB_IRQ(TxB_IRQ),
.r_IPGT(r_IPGT),
.r_IPGR1(r_IPGR1), .r_IPGR2(r_IPGR2), .r_MinFL(r_MinFL),
.r_MaxFL(r_MaxFL), .r_MaxRet(r_MaxRet), .r_CollValid(r_CollValid),
.r_TxFlow(r_TxFlow), .r_RxFlow(r_RxFlow), .r_PassAll(r_PassAll),
.r_MiiNoPre(r_MiiNoPre), .r_ClkDiv(r_ClkDiv),
.r_WCtrlData(r_WCtrlData), .r_RStat(r_RStat), .r_ScanStat(r_ScanStat),
.r_RGAD(r_RGAD), .r_FIAD(r_FIAD), .r_CtrlData(r_CtrlData),
.NValid_stat(NValid_stat), .Busy_stat(Busy_stat),
.LinkFail(LinkFail), .r_MAC(r_MAC), .WCtrlDataStart(WCtrlDataStart),
.RStatStart(RStatStart), .UpdateMIIRX_DATAReg(UpdateMIIRX_DATAReg), .Prsd(Prsd),
.r_TxBDNum(r_TxBDNum), .int_o(int_o),
.r_HASH0(r_HASH0), .r_HASH1(r_HASH1), .r_TxPauseRq(r_TxPauseRq),
.r_TxPauseTV(r_TxPauseTV), .RstTxPauseRq(RstTxPauseRq), .TxCtrlEndFrm(TxCtrlEndFrm),
.StartTxDone(StartTxDone), .TxClk(mtx_clk_pad_i), .RxClk(mrx_clk_pad_i),
.dbg_dat(wb_dbg_dat0),
.SetPauseTimer(SetPauseTimer)
650,8 → 593,7
wire RxAbort;
 
wire WillTransmit; // Will transmit (to RxEthMAC)
wire ResetCollision; // Reset Collision (for synchronizing
// collision)
wire ResetCollision; // Reset Collision (for synchronizing collision)
wire [7:0] TxDataOut; // Transmit Packet Data (to TxEthMAC)
wire WillSendControlFrame;
wire ReceiveEnd;
671,46 → 613,27
// Connecting MACControl
eth_maccontrol maccontrol1
(
.MTxClk(mtx_clk_pad_i),
.TPauseRq(TPauseRq),
.TxPauseTV(r_TxPauseTV),
.TxDataIn(TxData),
.TxStartFrmIn(TxStartFrm),
.TxEndFrmIn(TxEndFrm),
.TxUsedDataIn(TxUsedDataIn),
.TxDoneIn(TxDoneIn),
.TxAbortIn(TxAbortIn),
.MRxClk(mrx_clk_pad_i),
.RxData(RxData),
.RxValid(RxValid),
.RxStartFrm(RxStartFrm),
.RxEndFrm(RxEndFrm),
.ReceiveEnd(ReceiveEnd),
.ReceivedPacketGood(ReceivedPacketGood),
.TxFlow(r_TxFlow),
.RxFlow(r_RxFlow),
.DlyCrcEn(r_DlyCrcEn),
.MAC(r_MAC),
.PadIn(r_Pad | PerPacketPad),
.PadOut(PadOut),
.CrcEnIn(r_CrcEn | PerPacketCrcEn),
.CrcEnOut(CrcEnOut),
.TxReset(wb_rst_i),
.RxReset(wb_rst_i),
.ReceivedLengthOK(ReceivedLengthOK),
.TxDataOut(TxDataOut),
.TxStartFrmOut(TxStartFrmOut),
.TxEndFrmOut(TxEndFrmOut),
.TxUsedDataOut(TxUsedData),
.TxDoneOut(TxDone),
.TxAbortOut(TxAbort),
.WillSendControlFrame(WillSendControlFrame),
.TxCtrlEndFrm(TxCtrlEndFrm),
.ReceivedPauseFrm(ReceivedPauseFrm),
.ControlFrmAddressOK(ControlFrmAddressOK),
.MTxClk(mtx_clk_pad_i), .TPauseRq(TPauseRq),
.TxPauseTV(r_TxPauseTV), .TxDataIn(TxData),
.TxStartFrmIn(TxStartFrm), .TxEndFrmIn(TxEndFrm),
.TxUsedDataIn(TxUsedDataIn), .TxDoneIn(TxDoneIn),
.TxAbortIn(TxAbortIn), .MRxClk(mrx_clk_pad_i),
.RxData(RxData), .RxValid(RxValid),
.RxStartFrm(RxStartFrm), .RxEndFrm(RxEndFrm),
.ReceiveEnd(ReceiveEnd), .ReceivedPacketGood(ReceivedPacketGood),
.TxFlow(r_TxFlow),
.RxFlow(r_RxFlow), .DlyCrcEn(r_DlyCrcEn),
.MAC(r_MAC), .PadIn(r_Pad | PerPacketPad),
.PadOut(PadOut), .CrcEnIn(r_CrcEn | PerPacketCrcEn),
.CrcEnOut(CrcEnOut), .TxReset(wb_rst_i),
.RxReset(wb_rst_i), .ReceivedLengthOK(ReceivedLengthOK),
.TxDataOut(TxDataOut), .TxStartFrmOut(TxStartFrmOut),
.TxEndFrmOut(TxEndFrmOut), .TxUsedDataOut(TxUsedData),
.TxDoneOut(TxDone), .TxAbortOut(TxAbort),
.WillSendControlFrame(WillSendControlFrame), .TxCtrlEndFrm(TxCtrlEndFrm),
.ReceivedPauseFrm(ReceivedPauseFrm), .ControlFrmAddressOK(ControlFrmAddressOK),
.SetPauseTimer(SetPauseTimer),
.RxStatusWriteLatched_sync2(RxStatusWriteLatched_sync2),
.r_PassAll(r_PassAll)
.RxStatusWriteLatched_sync2(RxStatusWriteLatched_sync2), .r_PassAll(r_PassAll)
);
 
 
743,45 → 666,19
// Connecting TxEthMAC
eth_txethmac txethmac1
(
.MTxClk(mtx_clk_pad_i),
.Reset(wb_rst_i),
.CarrierSense(TxCarrierSense),
.Collision(Collision),
.TxData(TxDataOut),
.TxStartFrm(TxStartFrmOut),
.TxUnderRun(TxUnderRun),
.TxEndFrm(TxEndFrmOut),
.Pad(PadOut),
.MinFL(r_MinFL),
.CrcEn(CrcEnOut),
.FullD(r_FullD),
.HugEn(r_HugEn),
.DlyCrcEn(r_DlyCrcEn),
.IPGT(r_IPGT),
.IPGR1(r_IPGR1),
.IPGR2(r_IPGR2),
.CollValid(r_CollValid),
.MaxRet(r_MaxRet),
.NoBckof(r_NoBckof),
.ExDfrEn(r_ExDfrEn),
.MaxFL(r_MaxFL),
.MTxEn(mtxen_pad_o),
.MTxD(mtxd_pad_o),
.MTxErr(mtxerr_pad_o),
.TxUsedData(TxUsedDataIn),
.TxDone(TxDoneIn),
.TxRetry(TxRetry),
.TxAbort(TxAbortIn),
.WillTransmit(WillTransmit),
.ResetCollision(ResetCollision),
.RetryCnt(RetryCnt),
.StartTxDone(StartTxDone),
.StartTxAbort(StartTxAbort),
.MaxCollisionOccured(MaxCollisionOccured),
.LateCollision(LateCollision),
.DeferIndication(DeferIndication),
.StatePreamble(StatePreamble),
.StateData(StateData)
.MTxClk(mtx_clk_pad_i), .Reset(wb_rst_i), .CarrierSense(TxCarrierSense),
.Collision(Collision), .TxData(TxDataOut), .TxStartFrm(TxStartFrmOut),
.TxUnderRun(TxUnderRun), .TxEndFrm(TxEndFrmOut), .Pad(PadOut),
.MinFL(r_MinFL), .CrcEn(CrcEnOut), .FullD(r_FullD),
.HugEn(r_HugEn), .DlyCrcEn(r_DlyCrcEn), .IPGT(r_IPGT),
.IPGR1(r_IPGR1), .IPGR2(r_IPGR2), .CollValid(r_CollValid),
.MaxRet(r_MaxRet), .NoBckof(r_NoBckof), .ExDfrEn(r_ExDfrEn),
.MaxFL(r_MaxFL), .MTxEn(mtxen_pad_o), .MTxD(mtxd_pad_o),
.MTxErr(mtxerr_pad_o), .TxUsedData(TxUsedDataIn), .TxDone(TxDoneIn),
.TxRetry(TxRetry), .TxAbort(TxAbortIn), .WillTransmit(WillTransmit),
.ResetCollision(ResetCollision), .RetryCnt(RetryCnt), .StartTxDone(StartTxDone),
.StartTxAbort(StartTxAbort), .MaxCollisionOccured(MaxCollisionOccured), .LateCollision(LateCollision),
.DeferIndication(DeferIndication), .StatePreamble(StatePreamble), .StateData(StateData)
);
 
 
803,37 → 700,17
// Connecting RxEthMAC
eth_rxethmac rxethmac1
(
.MRxClk(mrx_clk_pad_i),
.MRxDV(MRxDV_Lb),
.MRxD(MRxD_Lb),
.Transmitting(Transmitting),
.HugEn(r_HugEn),
.DlyCrcEn(r_DlyCrcEn),
.MaxFL(r_MaxFL),
.r_IFG(r_IFG),
.Reset(wb_rst_i),
.RxData(RxData),
.RxValid(RxValid),
.RxStartFrm(RxStartFrm),
.RxEndFrm(RxEndFrm),
.ByteCnt(RxByteCnt),
.ByteCntEq0(RxByteCntEq0),
.ByteCntGreat2(RxByteCntGreat2),
.ByteCntMaxFrame(RxByteCntMaxFrame),
.CrcError(RxCrcError),
.StateIdle(RxStateIdle),
.StatePreamble(RxStatePreamble),
.StateSFD(RxStateSFD),
.StateData(RxStateData),
.MAC(r_MAC),
.r_Pro(r_Pro),
.r_Bro(r_Bro),
.r_HASH0(r_HASH0),
.r_HASH1(r_HASH1),
.RxAbort(RxAbort),
.AddressMiss(AddressMiss),
.PassAll(r_PassAll),
.ControlFrmAddressOK(ControlFrmAddressOK)
.MRxClk(mrx_clk_pad_i), .MRxDV(MRxDV_Lb), .MRxD(MRxD_Lb),
.Transmitting(Transmitting), .HugEn(r_HugEn), .DlyCrcEn(r_DlyCrcEn),
.MaxFL(r_MaxFL), .r_IFG(r_IFG), .Reset(wb_rst_i),
.RxData(RxData), .RxValid(RxValid), .RxStartFrm(RxStartFrm),
.RxEndFrm(RxEndFrm), .ByteCnt(RxByteCnt),
.ByteCntEq0(RxByteCntEq0), .ByteCntGreat2(RxByteCntGreat2), .ByteCntMaxFrame(RxByteCntMaxFrame),
.CrcError(RxCrcError), .StateIdle(RxStateIdle), .StatePreamble(RxStatePreamble),
.StateSFD(RxStateSFD), .StateData(RxStateData),
.MAC(r_MAC), .r_Pro(r_Pro), .r_Bro(r_Bro),
.r_HASH0(r_HASH0), .r_HASH1(r_HASH1), .RxAbort(RxAbort),
.AddressMiss(AddressMiss), .PassAll(r_PassAll), .ControlFrmAddressOK(ControlFrmAddressOK)
);
 
 
979,8 → 856,7
begin
if(wb_rst_i)
RxAbort_latch <= 1'b0;
else if(RxAbort | (ShortFrame & ~r_RecSmall) | LatchedMRxErr &
~InvalidSymbol | (ReceivedPauseFrm & (~r_PassAll)))
else if(RxAbort | (ShortFrame & ~r_RecSmall) | LatchedMRxErr & ~InvalidSymbol | (ReceivedPauseFrm & (~r_PassAll)))
RxAbort_latch <= 1'b1;
else if(RxAbortRst)
RxAbort_latch <= 1'b0;
1026,84 → 902,50
.RX_FIFO_CNT_WIDTH (RX_FIFO_CNT_WIDTH))
wishbone
(
.WB_CLK_I(wb_clk_i),
.WB_DAT_I(wb_dat_i),
.WB_DAT_O(BD_WB_DAT_O),
.WB_CLK_I(wb_clk_i), .WB_DAT_I(wb_dat_i),
.WB_DAT_O(BD_WB_DAT_O),
 
// WISHBONE slave
.WB_ADR_I(wb_adr_i[9:2]),
.WB_WE_I(wb_we_i),
.BDCs(BDCs),
.WB_ACK_O(BDAck),
.Reset(wb_rst_i),
.WB_ADR_I(wb_adr_i[9:2]), .WB_WE_I(wb_we_i),
.BDCs(BDCs), .WB_ACK_O(BDAck),
 
.Reset(wb_rst_i),
 
// WISHBONE master
.m_wb_adr_o(m_wb_adr_tmp),
.m_wb_sel_o(m_wb_sel_o),
.m_wb_we_o(m_wb_we_o),
.m_wb_dat_i(m_wb_dat_i),
.m_wb_dat_o(m_wb_dat_o),
.m_wb_cyc_o(m_wb_cyc_o),
.m_wb_stb_o(m_wb_stb_o),
.m_wb_ack_i(m_wb_ack_i),
.m_wb_err_i(m_wb_err_i),
.m_wb_adr_o(m_wb_adr_tmp), .m_wb_sel_o(m_wb_sel_o), .m_wb_we_o(m_wb_we_o),
.m_wb_dat_i(m_wb_dat_i), .m_wb_dat_o(m_wb_dat_o), .m_wb_cyc_o(m_wb_cyc_o),
.m_wb_stb_o(m_wb_stb_o), .m_wb_ack_i(m_wb_ack_i), .m_wb_err_i(m_wb_err_i),
`ifdef ETH_WISHBONE_B3
.m_wb_cti_o(m_wb_cti_o),
.m_wb_bte_o(m_wb_bte_o),
.m_wb_cti_o(m_wb_cti_o), .m_wb_bte_o(m_wb_bte_o),
`endif
 
//TX
.MTxClk(mtx_clk_pad_i),
.TxStartFrm(TxStartFrm),
.TxEndFrm(TxEndFrm),
.TxUsedData(TxUsedData),
.TxData(TxData),
.TxRetry(TxRetry),
.TxAbort(TxAbort),
.TxUnderRun(TxUnderRun),
.TxDone(TxDone),
.PerPacketCrcEn(PerPacketCrcEn),
.PerPacketPad(PerPacketPad),
.MTxClk(mtx_clk_pad_i), .TxStartFrm(TxStartFrm), .TxEndFrm(TxEndFrm),
.TxUsedData(TxUsedData), .TxData(TxData),
.TxRetry(TxRetry), .TxAbort(TxAbort), .TxUnderRun(TxUnderRun),
.TxDone(TxDone),
.PerPacketCrcEn(PerPacketCrcEn), .PerPacketPad(PerPacketPad),
 
// Register
.r_TxEn(r_TxEn),
.r_RxEn(r_RxEn),
.r_TxBDNum(r_TxBDNum),
.r_RxFlow(r_RxFlow),
.r_PassAll(r_PassAll),
.r_TxEn(r_TxEn), .r_RxEn(r_RxEn), .r_TxBDNum(r_TxBDNum),
.r_RxFlow(r_RxFlow), .r_PassAll(r_PassAll),
 
//RX
.MRxClk(mrx_clk_pad_i),
.RxData(RxData),
.RxValid(RxValid),
.RxStartFrm(RxStartFrm),
.RxEndFrm(RxEndFrm),
.Busy_IRQ(Busy_IRQ),
.RxE_IRQ(RxE_IRQ),
.RxB_IRQ(RxB_IRQ),
.TxE_IRQ(TxE_IRQ),
.TxB_IRQ(TxB_IRQ),
.MRxClk(mrx_clk_pad_i), .RxData(RxData), .RxValid(RxValid),
.RxStartFrm(RxStartFrm), .RxEndFrm(RxEndFrm),
.Busy_IRQ(Busy_IRQ), .RxE_IRQ(RxE_IRQ), .RxB_IRQ(RxB_IRQ),
.TxE_IRQ(TxE_IRQ), .TxB_IRQ(TxB_IRQ),
 
.RxAbort(RxAbort_wb),
.RxStatusWriteLatched_sync2(RxStatusWriteLatched_sync2),
.RxAbort(RxAbort_wb), .RxStatusWriteLatched_sync2(RxStatusWriteLatched_sync2),
 
.InvalidSymbol(InvalidSymbol),
.LatchedCrcError(LatchedCrcError),
.RxLength(RxByteCnt),
.RxLateCollision(RxLateCollision),
.ShortFrame(ShortFrame),
.DribbleNibble(DribbleNibble),
.ReceivedPacketTooBig(ReceivedPacketTooBig),
.LoadRxStatus(LoadRxStatus),
.RetryCntLatched(RetryCntLatched),
.RetryLimit(RetryLimit),
.LateCollLatched(LateCollLatched),
.DeferLatched(DeferLatched),
.RstDeferLatched(RstDeferLatched),
.CarrierSenseLost(CarrierSenseLost),
.ReceivedPacketGood(ReceivedPacketGood),
.AddressMiss(AddressMiss),
.InvalidSymbol(InvalidSymbol), .LatchedCrcError(LatchedCrcError), .RxLength(RxByteCnt),
.RxLateCollision(RxLateCollision), .ShortFrame(ShortFrame), .DribbleNibble(DribbleNibble),
.ReceivedPacketTooBig(ReceivedPacketTooBig), .LoadRxStatus(LoadRxStatus), .RetryCntLatched(RetryCntLatched),
.RetryLimit(RetryLimit), .LateCollLatched(LateCollLatched), .DeferLatched(DeferLatched),
.RstDeferLatched(RstDeferLatched),
.CarrierSenseLost(CarrierSenseLost),.ReceivedPacketGood(ReceivedPacketGood), .AddressMiss(AddressMiss),
.ReceivedPauseFrm(ReceivedPauseFrm)
`ifdef ETH_BIST
1124,58 → 966,25
// Connecting MacStatus module
eth_macstatus macstatus1
(
.MRxClk(mrx_clk_pad_i),
.Reset(wb_rst_i),
.ReceiveEnd(ReceiveEnd),
.ReceivedPacketGood(ReceivedPacketGood),
.ReceivedLengthOK(ReceivedLengthOK),
.RxCrcError(RxCrcError),
.MRxErr(MRxErr_Lb),
.MRxDV(MRxDV_Lb),
.RxStateSFD(RxStateSFD),
.RxStateData(RxStateData),
.RxStatePreamble(RxStatePreamble),
.RxStateIdle(RxStateIdle),
.Transmitting(Transmitting),
.RxByteCnt(RxByteCnt),
.RxByteCntEq0(RxByteCntEq0),
.RxByteCntGreat2(RxByteCntGreat2),
.RxByteCntMaxFrame(RxByteCntMaxFrame),
.MRxClk(mrx_clk_pad_i), .Reset(wb_rst_i),
.ReceiveEnd(ReceiveEnd), .ReceivedPacketGood(ReceivedPacketGood), .ReceivedLengthOK(ReceivedLengthOK),
.RxCrcError(RxCrcError), .MRxErr(MRxErr_Lb), .MRxDV(MRxDV_Lb),
.RxStateSFD(RxStateSFD), .RxStateData(RxStateData), .RxStatePreamble(RxStatePreamble),
.RxStateIdle(RxStateIdle), .Transmitting(Transmitting), .RxByteCnt(RxByteCnt),
.RxByteCntEq0(RxByteCntEq0), .RxByteCntGreat2(RxByteCntGreat2), .RxByteCntMaxFrame(RxByteCntMaxFrame),
.InvalidSymbol(InvalidSymbol),
.MRxD(MRxD_Lb),
.LatchedCrcError(LatchedCrcError),
.Collision(mcoll_pad_i),
.CollValid(r_CollValid),
.RxLateCollision(RxLateCollision),
.r_RecSmall(r_RecSmall),
.r_MinFL(r_MinFL),
.r_MaxFL(r_MaxFL),
.ShortFrame(ShortFrame),
.DribbleNibble(DribbleNibble),
.ReceivedPacketTooBig(ReceivedPacketTooBig),
.r_HugEn(r_HugEn),
.LoadRxStatus(LoadRxStatus),
.RetryCnt(RetryCnt),
.StartTxDone(StartTxDone),
.StartTxAbort(StartTxAbort),
.RetryCntLatched(RetryCntLatched),
.MTxClk(mtx_clk_pad_i),
.MaxCollisionOccured(MaxCollisionOccured),
.RetryLimit(RetryLimit),
.LateCollision(LateCollision),
.LateCollLatched(LateCollLatched),
.DeferIndication(DeferIndication),
.DeferLatched(DeferLatched),
.RstDeferLatched(RstDeferLatched),
.TxStartFrm(TxStartFrmOut),
.StatePreamble(StatePreamble),
.StateData(StateData),
.CarrierSense(CarrierSense_Tx2),
.CarrierSenseLost(CarrierSenseLost),
.TxUsedData(TxUsedDataIn),
.LatchedMRxErr(LatchedMRxErr),
.Loopback(r_LoopBck),
.r_FullD(r_FullD)
.MRxD(MRxD_Lb), .LatchedCrcError(LatchedCrcError), .Collision(mcoll_pad_i),
.CollValid(r_CollValid), .RxLateCollision(RxLateCollision), .r_RecSmall(r_RecSmall),
.r_MinFL(r_MinFL), .r_MaxFL(r_MaxFL), .ShortFrame(ShortFrame),
.DribbleNibble(DribbleNibble), .ReceivedPacketTooBig(ReceivedPacketTooBig), .r_HugEn(r_HugEn),
.LoadRxStatus(LoadRxStatus), .RetryCnt(RetryCnt), .StartTxDone(StartTxDone),
.StartTxAbort(StartTxAbort), .RetryCntLatched(RetryCntLatched), .MTxClk(mtx_clk_pad_i),
.MaxCollisionOccured(MaxCollisionOccured), .RetryLimit(RetryLimit), .LateCollision(LateCollision),
.LateCollLatched(LateCollLatched), .DeferIndication(DeferIndication), .DeferLatched(DeferLatched),
.RstDeferLatched(RstDeferLatched),
.TxStartFrm(TxStartFrmOut), .StatePreamble(StatePreamble), .StateData(StateData),
.CarrierSense(CarrierSense_Tx2), .CarrierSenseLost(CarrierSenseLost), .TxUsedData(TxUsedDataIn),
.LatchedMRxErr(LatchedMRxErr), .Loopback(r_LoopBck), .r_FullD(r_FullD)
);
 
 
/trunk/rtl/verilog/eth_fifo.v
152,14 → 152,14
);
`else // !ETH_FIFO_XILINX
`ifdef ETH_ALTERA_ALTSYNCRAM
altera_dpram_16x32 altera_dpram_16x32_inst
altera_dpram_16x32 altera_dpram_16x32_inst
(
.data (data_in),
.wren (write & ~full),
.wraddress (clear ? {CNT_WIDTH-1{1'b0}} : write_pointer),
.rdaddress (clear ? {CNT_WIDTH-1{1'b0}} : read_pointer ),
.clock (clk),
.q (data_out)
.data (data_in),
.wren (write & ~full),
.wraddress (clear ? {CNT_WIDTH-1{1'b0}} : write_pointer),
.rdaddress (clear ? {CNT_WIDTH-1{1'b0}} : read_pointer ),
.clock (clk),
.q (data_out)
); //exemplar attribute altera_dpram_16x32_inst NOOPT TRUE
`else // !ETH_ALTERA_ALTSYNCRAM
always @ (posedge clk)

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