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URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /ethmac/trunk/bench/verilog
    from Rev 345 to Rev 346
    Reverse comparison

Rev 345 → Rev 346

/eth_host.v
3,7 → 3,7
//// eth_host.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
/eth_phy_defines.v
3,7 → 3,7
//// File name: eth_phy_defines.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Tadej Markovic, tadej@opencores.org ////
/wb_slave_behavioral.v
3,7 → 3,7
//// File name: wb_slave_behavioral.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Tadej Markovic, tadej@opencores.org ////
/tb_ethernet_with_cop.v
3,7 → 3,7
//// tb_ethernet_with_cop.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
/wb_master_behavioral.v
3,7 → 3,7
//// File name "wb_master_behavioral.v" ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Miha Dolenc (mihad@opencores.org) ////
/eth_phy.v
3,7 → 3,7
//// File name: eth_phy.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Tadej Markovic, tadej@opencores.org ////
/tb_eth_defines.v
3,7 → 3,7
//// tb_eth_defines.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
/tb_ethernet.v
3,7 → 3,7
//// tb_ethernet.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Tadej Markovic, tadej@opencores.org ////
/wb_model_defines.v
3,7 → 3,7
//// File name "wb_model_defines.v" ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Miha Dolenc (mihad@opencores.org) ////
/tb_eth_top.v
26,7 → 26,7
//// tb_eth_top.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
/eth_memory.v
3,7 → 3,7
//// eth_memory.v ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Igor Mohor (igorM@opencores.org) ////
/wb_master32.v
3,7 → 3,7
//// File name "wb_master32.v" ////
//// ////
//// This file is part of the Ethernet IP core project ////
//// http://www.opencores.org/projects/ethmac/ ////
//// http://www.opencores.org/project,ethmac ////
//// ////
//// Author(s): ////
//// - Miha Dolenc (mihad@opencores.org) ////

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