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URL https://opencores.org/ocsvn/fpuvhdl/fpuvhdl/trunk

Subversion Repositories fpuvhdl

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 7 to Rev 8
    Reverse comparison

Rev 7 → Rev 8

/fpuvhdl/trunk/fpuvhdl/adder/fpadd_normalize_struct.vhd
60,8 → 60,9
SIGNAL shift_RL : std_logic;
SIGNAL word : std_logic_vector(26 DOWNTO 0);
SIGNAL zero_int : std_logic;
SIGNAL denormal : std_logic;
SIGNAL lshift_cnt : std_logic_vector(4 DOWNTO 0);
 
 
-- Component Declarations
COMPONENT FPlzc
PORT (
87,9 → 88,21
-- eb2 2
add_in <= "000" & count;
 
-- limit the count to the exponent value
PROCESS(count,EXP_in)
BEGIN
IF (signed(count) > signed(EXP_in)) THEN
lshift_cnt <= EXP_in(4 downto 0)-1;
denormal <= '1';
ELSE
lshift_cnt <= count;
denormal <= '0';
END IF;
END PROCESS;
 
-- HDL Embedded Text Block 3 eb3
-- eb3 3
PROCESS( isDN, shift_RL, EXP_lshift, EXP_rshift, EXP_in, SIG_lshift, SIG_rshift, SIG_in)
PROCESS( isDN, shift_RL, EXP_lshift, EXP_rshift, EXP_in, SIG_lshift, SIG_rshift, SIG_in, denormal)
BEGIN
IF (isDN='1') THEN
EXP_out <= X"00";
106,8 → 119,13
END IF;
ELSE
-- Shift Left
EXP_out <= EXP_lshift;
SIG_out <= SIG_lshift;
IF (denormal='1') THEN
EXP_out <= (OTHERS => '0');
SIG_out <= SIG_lshift;
ELSE
EXP_out <= EXP_lshift;
SIG_out <= SIG_lshift;
END IF;
END IF;
END IF;
END PROCESS;
153,13 → 171,13
END PROCESS I4combo;
 
-- ModuleWare code(v1.1) for instance 'I1' of 'lshift'
I1combo : PROCESS (SIG_in, count)
I1combo : PROCESS (SIG_in, lshift_cnt)
VARIABLE stemp : std_logic_vector (4 DOWNTO 0);
VARIABLE dtemp : std_logic_vector (27 DOWNTO 0);
VARIABLE temp : std_logic_vector (27 DOWNTO 0);
BEGIN
temp := (OTHERS=> 'X');
stemp := count;
stemp := lshift_cnt;
temp := SIG_in;
FOR i IN 4 DOWNTO 0 LOOP
IF (i < 5) THEN
/fpuvhdl/trunk/fpuvhdl.zip Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream

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