URL
https://opencores.org/ocsvn/i2c/i2c/trunk
Subversion Repositories i2c
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 15 to Rev 16
- ↔ Reverse comparison
Rev 15 → Rev 16
/trunk/rtl/verilog/i2c_master_top.v
37,10 → 37,10
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// CVS Log |
// |
// $Id: i2c_master_top.v,v 1.4 2001-11-05 11:59:25 rherveille Exp $ |
// $Id: i2c_master_top.v,v 1.5 2001-11-10 10:52:55 rherveille Exp $ |
// |
// $Date: 2001-11-05 11:59:25 $ |
// $Revision: 1.4 $ |
// $Date: 2001-11-10 10:52:55 $ |
// $Revision: 1.5 $ |
// $Author: rherveille $ |
// $Locker: $ |
// $State: Exp $ |
145,7 → 145,7
always@(posedge wb_clk_i or negedge rst_i) |
if (!rst_i) |
begin |
prer <= #1 16'h0; |
prer <= #1 16'hffff; |
ctr <= #1 8'h0; |
txr <= #1 8'h0; |
cr <= #1 8'h0; |
152,7 → 152,7
end |
else if (wb_rst_i) |
begin |
prer <= #1 16'h0; |
prer <= #1 16'hffff; |
ctr <= #1 8'h0; |
txr <= #1 8'h0; |
cr <= #1 8'h0; |
266,3 → 266,4
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/trunk/rtl/vhdl/i2c_master_top.vhd
37,10 → 37,10
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-- CVS Log |
-- |
-- $Id: i2c_master_top.vhd,v 1.1 2001-11-05 12:02:33 rherveille Exp $ |
-- $Id: i2c_master_top.vhd,v 1.2 2001-11-10 10:52:44 rherveille Exp $ |
-- |
-- $Date: 2001-11-05 12:02:33 $ |
-- $Revision: 1.1 $ |
-- $Date: 2001-11-10 10:52:44 $ |
-- $Revision: 1.2 $ |
-- $Author: rherveille $ |
-- $Locker: $ |
-- $State: Exp $ |
200,13 → 200,13
regs_block: process(rst_i, wb_clk_i) |
begin |
if (rst_i = '0') then |
prer <= (others => '0') after Tcq; |
prer <= (others => '1') after Tcq; |
ctr <= (others => '0') after Tcq; |
txr <= (others => '0') after Tcq; |
cr <= (others => '0') after Tcq; |
elsif (wb_clk_i'event and wb_clk_i = '1') then |
if (wb_rst_i = '1') then |
prer <= (others => '0') after Tcq; |
prer <= (others => '1') after Tcq; |
ctr <= (others => '0') after Tcq; |
txr <= (others => '0') after Tcq; |
cr <= (others => '0') after Tcq; |
335,8 → 335,3
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end architecture structural; |
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