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URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

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    from Rev 46 to Rev 45
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Rev 46 → Rev 45

/trunk/bench/verilog/i2c_slave_model.v
36,10 → 36,10
 
// CVS Log
//
// $Id: i2c_slave_model.v,v 1.5 2003-12-05 11:05:19 rherveille Exp $
// $Id: i2c_slave_model.v,v 1.4 2003-09-11 08:25:37 rherveille Exp $
//
// $Date: 2003-12-05 11:05:19 $
// $Revision: 1.5 $
// $Date: 2003-09-11 08:25:37 $
// $Revision: 1.4 $
// $Author: rherveille $
// $Locker: $
// $State: Exp $
46,9 → 46,6
//
// Change History:
// $Log: not supported by cvs2svn $
// Revision 1.4 2003/09/11 08:25:37 rherveille
// Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'.
//
// Revision 1.3 2002/10/30 18:11:06 rherveille
// Added timing tests to i2c_model.
// Updated testbench.
150,9 → 147,7
always @(negedge sda)
if(scl)
begin
sta <= #1 1'b1;
d_sta <= #1 1'b0;
sto <= #1 1'b0;
sta <= #1 1'b1;
 
if(debug)
$display("DEBUG i2c_slave; start condition detected at %t", $time);
167,7 → 162,6
always @(posedge sda)
if(scl)
begin
sta <= #1 1'b0;
sto <= #1 1'b1;
 
if(debug)

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