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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

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  • This comparison shows the changes necessary to convert path
    /minsoc/trunk/backend/std
    from Rev 105 to Rev 141
    Reverse comparison

Rev 105 → Rev 141

/configure
47,15 → 47,33
echo ""
echo ""
 
echo "Copying board specific SoC files from $BOARD_DIR to $BACKEND_DIR directory."
echo "__________________________________________________________________________"
echo ""
for file in "${BOARD_FILES[@]}"
do
if [ $file != NONE ]
then
echo "Copying $file, to backend directory..."
cp $BOARD_DIR/$file $BACKEND_DIR
fi
done
echo ""
echo ""
 
echo "Generating project files for simulation and synthesis..."
echo "__________________________________________________________________________"
echo ""
make -C $MINSOC_DIR/prj
echo "Generation complete."
echo "__________________________________________________________________________"
echo ""
echo ""
 
if [ $CONSTRAINT_FILE == 'NONE' ]
then
echo "Skipping synthesis preparation. Standard implementation can only be simulated."
echo ""
echo ""
else
echo "Device part for files under $SYNSRC_DIR will be patched and stored "
echo "temporarily."
79,21 → 97,8
sed "s/$FIND_CONSTRAINT/$CONSTRAINT_FILE/g" TMPFILE > TMPFILE2 && mv TMPFILE2 $SYN_DIR/$MAKEFILE
rm TMPFILE
cp $MAKEFILE_DIR/setup.bat $SYN_DIR/setup.bat
echo ""
echo ""
fi
echo ""
echo ""
 
 
echo "Copying board specific SoC files from $BOARD_DIR to $BACKEND_DIR directory."
echo "__________________________________________________________________________"
echo ""
for file in "${BOARD_FILES[@]}"
do
if [ $file != NONE ]
then
echo "Copying $file, to backend directory..."
cp $BOARD_DIR/$file $BACKEND_DIR
fi
done
echo ""
echo ""
echo "Configuration done."
/minsoc_bench_defines.v
4,7 → 4,7
`define NO_CLOCK_DIVISION //if commented out, generic clock division is implemented (odd divisors are rounded down)
//~set RTL for simulation, override FPGA specific definitions (JTAG TAP, MEMORY and CLOCK DIVIDER)
 
`define FREQ_NUM_FOR_NS 1000000000
`define FREQ_NUM_FOR_NS 100000000
 
`define FREQ 25000000
`define CLK_PERIOD (`FREQ_NUM_FOR_NS/`FREQ)
24,3 → 24,6
//only use with the memory model.
//If you use the original memory (`define MEMORY_MODEL
//commented out), comment this too.
 
`define TEST_UART
//`define TEST_ETHERNET

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