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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

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  • This comparison shows the changes necessary to convert path
    /minsoc/trunk/backend/std
    from Rev 149 to Rev 158
    Reverse comparison

Rev 149 → Rev 158

/configure
107,6 → 107,7
make -C ../../sw/support
make -C ../../sw/drivers
make -C ../../sw/uart
make -C ../../sw/jsp
make -C ../../sw/eth
echo "done."
echo ""
/minsoc_defines.v
98,6 → 98,7
// Connected modules
//
`define UART
`define JSP
`define ETHERNET
 
//
107,32 → 108,6
//`define ETH_RESET 1'b1
 
//
// Interrupts
//
`define APP_INT_RES1 1:0
`define APP_INT_UART 2
`define APP_INT_RES2 3
`define APP_INT_ETH 4
`define APP_INT_PS2 5
`define APP_INT_RES3 19:6
 
//
// Address map
//
`define APP_ADDR_DEC_W 8
`define APP_ADDR_SRAM `APP_ADDR_DEC_W'h00
`define APP_ADDR_FLASH `APP_ADDR_DEC_W'h04
`define APP_ADDR_DECP_W 4
`define APP_ADDR_PERIP `APP_ADDR_DECP_W'h9
`define APP_ADDR_SPI `APP_ADDR_DEC_W'h97
`define APP_ADDR_ETH `APP_ADDR_DEC_W'h92
`define APP_ADDR_AUDIO `APP_ADDR_DEC_W'h9d
`define APP_ADDR_UART `APP_ADDR_DEC_W'h90
`define APP_ADDR_PS2 `APP_ADDR_DEC_W'h94
`define APP_ADDR_RES1 `APP_ADDR_DEC_W'h9e
`define APP_ADDR_RES2 `APP_ADDR_DEC_W'h9f
 
//
// Set-up GENERIC_TAP, GENERIC_MEMORY if GENERIC_FPGA was chosen
// and GENERIC_CLOCK_DIVISION if NO_CLOCK_DIVISION was not set
//
/board.h
8,28 → 8,12
#define DC_ENABLE 0
#define DC_SIZE 8192
 
 
#define IN_CLK 25000000
 
 
#define STACK_SIZE 0x01000
 
#define UART_BAUD_RATE 115200
 
#define UART_BASE 0x90000000
#define UART_IRQ 2
#define ETH_BASE 0x92000000
#define ETH_IRQ 4
#define I2C_BASE 0x9D000000
#define I2C_IRQ 3
#define CAN_BASE 0x94000000
#define CAN_IRQ 5
 
#define MC_BASE_ADDR 0x60000000
#define SPI_BASE 0xa0000000
 
#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */
 
#define ETH_MACADDR0 0x00
#define ETH_MACADDR1 0x12
#define ETH_MACADDR2 0x34

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