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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /minsoc/trunk/syn/buildSupport
    from Rev 63 to Rev 64
    Reverse comparison

Rev 63 → Rev 64

/minsoc_startup_top.xst File deleted \ No newline at end of file
/or1200_top.xst File deleted \ No newline at end of file
/eth_top.xst File deleted \ No newline at end of file
/minsoc_startup_top.prj File deleted \ No newline at end of file
/uart_top.xst File deleted \ No newline at end of file
/adbg_top.xst File deleted \ No newline at end of file
/minsoc_top.xst File deleted \ No newline at end of file
/minsoc_top.prj
1,5 → 1,5
`include "../backend/minsoc_defines.v"
`include "../rtl/verilog/minsoc_xilinx_internal_jtag.v"
`include "../rtl/verilog/minsoc_defines.v"
`include "../rtl/verilog/minsoc_clock_manager.v"
`include "../rtl/verilog/altera_pll.v"
`include "../rtl/verilog/minsoc_tc_top.v"
7,8 → 7,12
`include "../rtl/verilog/minsoc_top.v"
`include "../rtl/verilog/minsoc_onchip_ram.v"
`include "../rtl/verilog/xilinx_dcm.v"
`include "../rtl/verilog/minsoc_startup/spi_shift.v"
`include "../rtl/verilog/minsoc_startup/spi_clgen.v"
`include "../rtl/verilog/minsoc_startup/spi_top.v"
`include "../rtl/verilog/minsoc_startup/spi_defines.v"
`include "../rtl/verilog/minsoc_startup/OR1K_startup_generic.v"
`include "./blackboxes/adbg_top.v"
`include "./blackboxes/eth_top.v"
`include "./blackboxes/uart_top.v"
`include "./blackboxes/or1200_top.v"
`include "./blackboxes/OR1K_startup_generic.v"
`include "./blackboxes/or1200_top.v"

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