OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /minsoc/trunk
    from Rev 106 to Rev 107
    Reverse comparison

Rev 106 → Rev 107

/syn/altera/setup.bat
0,0 → 1,12
@echo off
set /p quartus_path=Input the path to Quartus e.g. C:\altera\11.0sp1\quartus:
if EXIST %quartus_path% (
set path=%path%;%quartus_path%\bin\cygwin\bin;%quartus_path%\bin
make all
echo Finished...
set /p exit=Press ENTER to close this window...
make clean
) ELSE (
echo %quartus_path% could not be found.
set /p exit=Press ENTER to close this window...
)
syn/altera/setup.bat Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: prj/scripts/altprj.sh =================================================================== --- prj/scripts/altprj.sh (revision 106) +++ prj/scripts/altprj.sh (revision 107) @@ -6,6 +6,20 @@ PROJECT=$1 OUTPUT=$2 +ENV=`uname -o` + +function adaptpath +{ + if [ "$ENV" == "Cygwin" ] + then + local cygpath=`cygpath -w $1` + local result=`echo $cygpath | sed 's/\\\\/\\//g'` + echo "$result" + else + echo "$1" + fi +} + if [ ! -f $PROJECT ] then echo "Unexistent project file." @@ -23,7 +37,8 @@ for dir in "${PROJECT_DIR[@]}" do - echo "set_global_assignment -name SEARCH_PATH $MINSOC_DIR/$dir" >> $OUTPUT + adapted_dir=`adaptpath $MINSOC_DIR/$dir` + echo "set_global_assignment -name SEARCH_PATH $adapted_dir" >> $OUTPUT done for file in "${PROJECT_SRC[@]}" @@ -34,12 +49,13 @@ do if [ -f $MINSOC_DIR/$dir/$file ] then - is_vhdl=`ls $MINSOC_DIR/$dir/$file | grep vhd` + adapted_file=`adaptpath $MINSOC_DIR/$dir/$file` + is_vhdl=`ls $MINSOC_DIR/$dir/$file | grep vhd` if [ -z $is_vhdl ] then - echo "set_global_assignment -name VERILOG_FILE $MINSOC_DIR/$dir/$file" >> $OUTPUT + echo "set_global_assignment -name VERILOG_FILE $adapted_file" >> $OUTPUT else - echo "set_global_assignment -name VHDL_FILE $MINSOC_DIR/$dir/$file" >> $OUTPUT + echo "set_global_assignment -name VHDL_FILE $adapted_file" >> $OUTPUT fi FOUND=1 break

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.