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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /minsoc/trunk
    from Rev 17 to Rev 18
    Reverse comparison

Rev 17 → Rev 18

/sim/bin/minsoc_model.txt
12,9 → 12,6
../../bench/verilog/minsoc_bench_defines.v
../../bench/verilog/minsoc_bench.v
../../bench/verilog/minsoc_memory_model.v
#../../bench/verilog/tb_eth_defines.v
#../../bench/verilog/eth_phy_defines.v
#../../bench/verilog/eth_phy.v
../../bench/verilog/vpi/dbg_comm_vpi.v
../../bench/verilog/sim_lib/fpga_memory_primitives.v
../../rtl/verilog/minsoc_top.v
/sim/bin/minsoc_memory.txt
12,9 → 12,6
../../bench/verilog/minsoc_bench_defines.v
../../bench/verilog/minsoc_bench.v
#../../bench/verilog/minsoc_memory_model.v
#../../bench/verilog/tb_eth_defines.v
#../../bench/verilog/eth_phy_defines.v
#../../bench/verilog/eth_phy.v
../../bench/verilog/vpi/dbg_comm_vpi.v
../../bench/verilog/sim_lib/fpga_memory_primitives.v
../../rtl/verilog/minsoc_top.v

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