Subversion Repositories minsoc

rtl/verilog/minsoc_onchip_ram.v Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: rtl/verilog/minsoc_onchip_ram_top.v =================================================================== --- rtl/verilog/minsoc_onchip_ram_top.v (revision 2) +++ rtl/verilog/minsoc_onchip_ram_top.v (nonexistent) @@ -1,186 +0,0 @@ -////////////////////////////////////////////////////////////////////// -//// //// -//// Generic Wishbone controller for //// -//// Single-Port Synchronous RAM //// -//// //// -//// This file is part of memory library available from //// -//// http://www.opencores.org/cvsweb.shtml/minsoc/ //// -//// //// -//// Description //// -//// This Wishbone controller connects to the wrapper of //// -//// the single-port synchronous memory interface. //// -//// Besides universal memory due to onchip_ram it provides a //// -//// generic way to set the depth of the memory. //// -//// //// -//// To Do: //// -//// //// -//// Author(s): //// -//// - Raul Fajardo, rfajardo@gmail.com //// -//// //// -////////////////////////////////////////////////////////////////////// -//// //// -//// Copyright (C) 2000 Authors and OPENCORES.ORG //// -//// //// -//// This source file may be used and distributed without //// -//// restriction provided that this copyright statement is not //// -//// removed from the file and that any derivative work contains //// -//// the original copyright notice and the associated disclaimer. //// -//// //// -//// This source file is free software; you can redistribute it //// -//// and/or modify it under the terms of the GNU Lesser General //// -//// Public License as published by the Free Software Foundation; //// -//// either version 2.1 of the License, or (at your option) any //// -//// later version. //// -//// //// -//// This source is distributed in the hope that it will be //// -//// useful, but WITHOUT ANY WARRANTY; without even the implied //// -//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// -//// PURPOSE. See the GNU Lesser General Public License for more //// -//// details. //// -//// //// -//// You should have received a copy of the GNU Lesser General //// -//// Public License along with this source; if not, download it //// -//// from http://www.gnu.org/licenses/lgpl.html //// -//// //// -////////////////////////////////////////////////////////////////////// -// -// Revision History -// -// -// Revision 1.0 2009/08/18 15:15:00 fajardo -// Created interface and tested -// - - -module minsoc_onchip_ram_top ( - wb_clk_i, wb_rst_i, - - wb_dat_i, wb_dat_o, wb_adr_i, wb_sel_i, wb_we_i, wb_cyc_i, - wb_stb_i, wb_ack_o, wb_err_o -); - -// -// Parameters -// -parameter aw_int = 11; //11 = 2048 -parameter adr_width = 13; //Memory address width, is composed by blocks of aw_int, is not allowed to be less than 12 -parameter blocks = (1<<(adr_width-aw_int)); //generated memory contains "blocks" memory blocks of 2048x32 2048 depth x32 bit data - -// -// I/O Ports -// -input wb_clk_i; -input wb_rst_i; - -// -// WB slave i/f -// -input [31:0] wb_dat_i; -output [31:0] wb_dat_o; -input [31:0] wb_adr_i; -input [3:0] wb_sel_i; -input wb_we_i; -input wb_cyc_i; -input wb_stb_i; -output wb_ack_o; -output wb_err_o; - -// -// Internal regs and wires -// -wire we; -wire [3:0] be_i; -wire [31:0] wb_dat_o; -reg ack_we; -reg ack_re; -// -// Aliases and simple assignments -// -assign wb_ack_o = ack_re | ack_we; -assign wb_err_o = wb_cyc_i & wb_stb_i & (|wb_adr_i[23:adr_width+2]); // If Access to > (8-bit leading prefix ignored) -assign we = wb_cyc_i & wb_stb_i & wb_we_i & (|wb_sel_i[3:0]); -assign be_i = (wb_cyc_i & wb_stb_i) * wb_sel_i; - -// -// Write acknowledge -// -always @ (negedge wb_clk_i or posedge wb_rst_i) -begin -if (wb_rst_i) - ack_we <= 1'b0; - else - if (wb_cyc_i & wb_stb_i & wb_we_i & ~ack_we) - ack_we <= #1 1'b1; - else - ack_we <= #1 1'b0; -end - -// -// read acknowledge -// -always @ (posedge wb_clk_i or posedge wb_rst_i) -begin - if (wb_rst_i) - ack_re <= 1'b0; - else - if (wb_cyc_i & wb_stb_i & ~wb_err_o & ~wb_we_i & ~ack_re) - ack_re <= #1 1'b1; - else - ack_re <= #1 1'b0; -end - -wire [blocks-1:0] bank; - -generate -genvar i; - for (i=0; i < blocks; i=i+1) begin : MEM - - assign bank[i] = wb_adr_i[adr_width+1:aw_int+2] == i; - - //BANK0 - minsoc_onchip_ram block_ram_0 ( - .clk(wb_clk_i), - .rst(wb_rst_i), - .addr(wb_adr_i[aw_int+1:2]), - .di(wb_dat_i[7:0]), - .doq(wb_dat_o[7:0]), - .we(we & bank[i]), - .oe(bank[i]), - .ce(be_i[0])); - - - minsoc_onchip_ram block_ram_1 ( - .clk(wb_clk_i), - .rst(wb_rst_i), - .addr(wb_adr_i[aw_int+1:2]), - .di(wb_dat_i[15:8]), - .doq(wb_dat_o[15:8]), - .we(we & bank[i]), - .oe(bank[i]), - .ce(be_i[1])); - - minsoc_onchip_ram block_ram_2 ( - .clk(wb_clk_i), - .rst(wb_rst_i), - .addr(wb_adr_i[aw_int+1:2]), - .di(wb_dat_i[23:16]), - .doq(wb_dat_o[23:16]), - .we(we & bank[i]), - .oe(bank[i]), - .ce(be_i[2])); - - minsoc_onchip_ram block_ram_3 ( - .clk(wb_clk_i), - .rst(wb_rst_i), - .addr(wb_adr_i[aw_int+1:2]), - .di(wb_dat_i[31:24]), - .doq(wb_dat_o[31:24]), - .we(we & bank[i]), - .oe(bank[i]), - .ce(be_i[3])); - - end -endgenerate - -endmodule -

rtl/verilog/minsoc_onchip_ram_top.v Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: rtl/verilog/minsoc_top.v =================================================================== --- rtl/verilog/minsoc_top.v (revision 2) +++ rtl/verilog/minsoc_top.v (nonexistent) @@ -1,1090 +0,0 @@ -////////////////////////////////////////////////////////////////////// -//// //// -//// OR1K test application for XESS XSV board, Top Level //// -//// //// -//// This file is part of the OR1K test application //// -//// http://www.opencores.org/cores/or1k/ //// -//// //// -//// Description //// -//// Top level instantiating all the blocks. //// -//// //// -//// To Do: //// -//// - nothing really //// -//// //// -//// Author(s): //// -//// - Damjan Lampret, lampret@opencores.org //// -//// //// -////////////////////////////////////////////////////////////////////// -//// //// -//// Copyright (C) 2001 Authors //// -//// //// -//// This source file may be used and distributed without //// -//// restriction provided that this copyright statement is not //// -//// removed from the file and that any derivative work contains //// -//// the original copyright notice and the associated disclaimer. //// -//// //// -//// This source file is free software; you can redistribute it //// -//// and/or modify it under the terms of the GNU Lesser General //// -//// Public License as published by the Free Software Foundation; //// -//// either version 2.1 of the License, or (at your option) any //// -//// later version. //// -//// //// -//// This source is distributed in the hope that it will be //// -//// useful, but WITHOUT ANY WARRANTY; without even the implied //// -//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// -//// PURPOSE. See the GNU Lesser General Public License for more //// -//// details. //// -//// //// -//// You should have received a copy of the GNU Lesser General //// -//// Public License along with this source; if not, download it //// -//// from http://www.opencores.org/lgpl.shtml //// -//// //// -////////////////////////////////////////////////////////////////////// -// -// CVS Revision History -// -// $Log: xsv_fpga_top.v,v $ -// Revision 1.10 2004/04/05 08:44:35 lampret -// Merged branch_qmem into main tree. -// -// Revision 1.8 2003/04/07 21:05:58 lampret -// WB = 1/2 RISC clock test code enabled. -// -// Revision 1.7 2003/04/07 01:28:17 lampret -// Adding OR1200_CLMODE_1TO2 test code. -// -// Revision 1.6 2002/08/12 05:35:12 lampret -// rty_i are unused - tied to zero. -// -// Revision 1.5 2002/03/29 20:58:51 lampret -// Changed hardcoded address for fake MC to use a define. -// -// Revision 1.4 2002/03/29 16:30:47 lampret -// Fixed port names that changed. -// -// Revision 1.3 2002/03/29 15:50:03 lampret -// Added response from memory controller (addr 0x60000000) -// -// Revision 1.2 2002/03/21 17:39:16 lampret -// Fixed some typos -// -// - -`include "minsoc_defines.v" -`include "or1200_defines.v" - -module minsoc_top ( - clk,reset - - //JTAG ports -`ifdef GENERIC_TAP - , jtag_tdi,jtag_tms,jtag_tck, - jtag_tdo,jtag_vref,jtag_gnd -`endif - - //SPI ports -`ifdef START_UP - , spi_flash_mosi, spi_flash_miso, spi_flash_sclk, spi_flash_ss -`endif - - //UART ports -`ifdef UART - , uart_stx,uart_srx -`endif - - // Ethernet ports -`ifdef ETHERNET - , eth_col, eth_crs, eth_trste, eth_tx_clk, - eth_tx_en, eth_tx_er, eth_txd, eth_rx_clk, - eth_rx_dv, eth_rx_er, eth_rxd, eth_fds_mdint, - eth_mdc, eth_mdio -`endif -); - -// -// I/O Ports -// - - input clk; - input reset; - -// -// SPI controller external i/f wires -// -`ifdef START_UP -output spi_flash_mosi; -input spi_flash_miso; -output spi_flash_sclk; -output [1:0] spi_flash_ss; -`endif - -// -// UART -// -`ifdef UART - output uart_stx; - input uart_srx; -`endif - -// -// Ethernet -// -`ifdef ETHERNET -output eth_tx_er; -input eth_tx_clk; -output eth_tx_en; -output [3:0] eth_txd; -input eth_rx_er; -input eth_rx_clk; -input eth_rx_dv; -input [3:0] eth_rxd; -input eth_col; -input eth_crs; -output eth_trste; -input eth_fds_mdint; -inout eth_mdio; -output eth_mdc; -`endif - -// -// JTAG -// -`ifdef GENERIC_TAP - input jtag_tdi; - input jtag_tms; - input jtag_tck; - output jtag_tdo; - output jtag_vref; - output jtag_gnd; - - -assign jtag_vref = 1'b1; -assign jtag_gnd = 1'b0; -`endif - -wire rstn; - -assign rstn = ~reset; - -// -// Internal wires -// - -// -// Debug core master i/f wires -// -wire [31:0] wb_dm_adr_o; -wire [31:0] wb_dm_dat_i; -wire [31:0] wb_dm_dat_o; -wire [3:0] wb_dm_sel_o; -wire wb_dm_we_o; -wire wb_dm_stb_o; -wire wb_dm_cyc_o; -wire wb_dm_cab_o; -wire wb_dm_ack_i; -wire wb_dm_err_i; - -// -// Debug <-> RISC wires -// -wire [3:0] dbg_lss; -wire [1:0] dbg_is; -wire [10:0] dbg_wp; -wire dbg_bp; -wire [31:0] dbg_dat_dbg; -wire [31:0] dbg_dat_risc; -wire [31:0] dbg_adr; -wire dbg_ewt; -wire dbg_stall; -wire [2:0] dbg_op; //dbg_op[0] = dbg_we //dbg_op[2] = dbg_stb (didn't change for backward compatibility with DBG_IF_MODEL -wire dbg_ack; - -// -// RISC instruction master i/f wires -// -wire [31:0] wb_rim_adr_o; -wire wb_rim_cyc_o; -wire [31:0] wb_rim_dat_i; -wire [31:0] wb_rim_dat_o; -wire [3:0] wb_rim_sel_o; -wire wb_rim_ack_i; -wire wb_rim_err_i; -wire wb_rim_rty_i = 1'b0; -wire wb_rim_we_o; -wire wb_rim_stb_o; -wire wb_rim_cab_o; -wire [31:0] wb_rif_dat_i; -wire wb_rif_ack_i; - -// -// RISC data master i/f wires -// -wire [31:0] wb_rdm_adr_o; -wire wb_rdm_cyc_o; -wire [31:0] wb_rdm_dat_i; -wire [31:0] wb_rdm_dat_o; -wire [3:0] wb_rdm_sel_o; -wire wb_rdm_ack_i; -wire wb_rdm_err_i; -wire wb_rdm_rty_i = 1'b0; -wire wb_rdm_we_o; -wire wb_rdm_stb_o; -wire wb_rdm_cab_o; - -// -// RISC misc -// -wire [19:0] pic_ints; - -// -// Flash controller slave i/f wires -// -wire [31:0] wb_fs_dat_i; -wire [31:0] wb_fs_dat_o; -wire [31:0] wb_fs_adr_i; -wire [3:0] wb_fs_sel_i; -wire wb_fs_we_i; -wire wb_fs_cyc_i; -wire wb_fs_stb_i; -wire wb_fs_ack_o; -wire wb_fs_err_o; - -// -// SPI controller slave i/f wires -// -wire [31:0] wb_sp_dat_i; -wire [31:0] wb_sp_dat_o; -wire [31:0] wb_sp_adr_i; -wire [3:0] wb_sp_sel_i; -wire wb_sp_we_i; -wire wb_sp_cyc_i; -wire wb_sp_stb_i; -wire wb_sp_ack_o; -wire wb_sp_err_o; - -// -// SPI controller external i/f wires -// -wire spi_flash_mosi; -wire spi_flash_miso; -wire spi_flash_sclk; -wire [1:0] spi_flash_ss; - -// -// SRAM controller slave i/f wires -// -wire [31:0] wb_ss_dat_i; -wire [31:0] wb_ss_dat_o; -wire [31:0] wb_ss_adr_i; -wire [3:0] wb_ss_sel_i; -wire wb_ss_we_i; -wire wb_ss_cyc_i; -wire wb_ss_stb_i; -wire wb_ss_ack_o; -wire wb_ss_err_o; - -// -// Ethernet core master i/f wires -// -wire [31:0] wb_em_adr_o; -wire [31:0] wb_em_dat_i; -wire [31:0] wb_em_dat_o; -wire [3:0] wb_em_sel_o; -wire wb_em_we_o; -wire wb_em_stb_o; -wire wb_em_cyc_o; -wire wb_em_cab_o; -wire wb_em_ack_i; -wire wb_em_err_i; - -// -// Ethernet core slave i/f wires -// -wire [31:0] wb_es_dat_i; -wire [31:0] wb_es_dat_o; -wire [31:0] wb_es_adr_i; -wire [3:0] wb_es_sel_i; -wire wb_es_we_i; -wire wb_es_cyc_i; -wire wb_es_stb_i; -wire wb_es_ack_o; -wire wb_es_err_o; - -// -// Ethernet external i/f wires -// -wire eth_mdo; -wire eth_mdoe; - -// -// UART16550 core slave i/f wires -// -wire [31:0] wb_us_dat_i; -wire [31:0] wb_us_dat_o; -wire [31:0] wb_us_adr_i; -wire [3:0] wb_us_sel_i; -wire wb_us_we_i; -wire wb_us_cyc_i; -wire wb_us_stb_i; -wire wb_us_ack_o; -wire wb_us_err_o; - -// -// UART external i/f wires -// -wire uart_stx; -wire uart_srx; - -// -// Reset debounce -// -reg rst_r; -reg wb_rst; - -// -// Global clock -// -`ifdef OR1200_CLMODE_1TO2 -reg wb_clk; -`else -wire wb_clk; -`endif - -// -// Reset debounce -// -always @(posedge wb_clk or negedge rstn) - if (~rstn) - rst_r <= 1'b1; - else - rst_r <= #1 1'b0; - -// -// Reset debounce -// -always @(posedge wb_clk) - wb_rst <= #1 rst_r; - -// -// This is purely for testing 1/2 WB clock -// This should never be used when implementing in -// an FPGA. It is used only for simulation regressions. -// -`ifdef OR1200_CLMODE_1TO2 -initial wb_clk = 0; -always @(posedge clk) - wb_clk = ~wb_clk; -`else -minsoc_clock_manager # -( - .divisor(`CLOCK_DIVISOR) -) -clk_adjust ( - .clk_i(clk), - .clk_o(wb_clk) -); -`endif // OR1200_CLMODE_1TO2 - -// -// Unused WISHBONE signals -// -assign wb_us_err_o = 1'b0; -assign wb_em_cab_o = 1'b0; -assign wb_fs_err_o = 1'b0; -assign wb_sp_err_o = 1'b0; - -// -// Unused interrupts -// -assign pic_ints[`APP_INT_RES1] = 'b0; -assign pic_ints[`APP_INT_RES2] = 'b0; -assign pic_ints[`APP_INT_RES3] = 'b0; -assign pic_ints[`APP_INT_PS2] = 'b0; - -// -// Ethernet tri-state -// -`ifdef ETHERNET -assign eth_mdio = eth_mdoe ? eth_mdo : 1'bz; -assign eth_trste = `ETH_RESET; -`endif - - -// -// RISC Instruction address for Flash -// -// Until first access to real Flash area, -// CPU instruction is fixed to jump to the Flash area. -// After Flash area is accessed, CPU instructions -// come from the tc_top (wishbone "switch"). -// -`ifdef START_UP -reg jump_flash; -reg [3:0] rif_counter; -reg [31:0] rif_dat_int; -reg rif_ack_int; - -always @(posedge wb_clk or negedge rstn) -begin - if (!rstn) begin - jump_flash <= #1 1'b1; - rif_counter <= 4'h0; - rif_ack_int <= 1'b0; - end - else begin - rif_ack_int <= 1'b0; - - if (wb_rim_cyc_o && (wb_rim_adr_o[31:32-`APP_ADDR_DEC_W] == `APP_ADDR_FLASH)) - jump_flash <= #1 1'b0; - - if ( jump_flash == 1'b1 ) begin - if ( wb_rim_cyc_o && wb_rim_stb_o && ~wb_rim_we_o ) begin - rif_counter <= rif_counter + 1'b1; - rif_ack_int <= 1'b1; - end - end - end -end - -always @ (rif_counter) -begin - case ( rif_counter ) - 4'h0: rif_dat_int = { `OR1200_OR32_MOVHI , 5'h01 , 4'h0 , 1'b0 , `APP_ADDR_FLASH , 8'h00 }; - 4'h1: rif_dat_int = { `OR1200_OR32_ORI , 5'h01 , 5'h01 , 16'h0000 }; - 4'h2: rif_dat_int = { `OR1200_OR32_JR , 10'h000 , 5'h01 , 11'h000 }; - 4'h3: rif_dat_int = { `OR1200_OR32_NOP , 10'h000 , 16'h0000 }; - default: rif_dat_int = 32'h0000_0000; - endcase -end - -assign wb_rif_dat_i = jump_flash ? rif_dat_int : wb_rim_dat_i; - -assign wb_rif_ack_i = jump_flash ? rif_ack_int : wb_rim_ack_i; - -`else -assign wb_rif_dat_i = wb_rim_dat_i; -assign wb_rif_ack_i = wb_rim_ack_i; -`endif - - -// -// TAP<->dbg_interface -// -wire jtag_tck; -wire debug_tdi; -wire debug_tdo; -wire capture_dr; -wire shift_dr; -wire pause_dr; -wire update_dr; - -wire debug_select; -wire test_logic_reset; - -// -// Instantiation of the development i/f -// -adbg_top dbg_top ( - - // JTAG pins - .tck_i ( jtag_tck ), - .tdi_i ( debug_tdi ), - .tdo_o ( debug_tdo ), - .rst_i ( test_logic_reset ), //cable without rst - - // Boundary Scan signals - .capture_dr_i ( capture_dr ), - .shift_dr_i ( shift_dr ), - .pause_dr_i ( pause_dr ), - .update_dr_i ( update_dr ), - - .debug_select_i( debug_select ), - // WISHBONE common - .wb_clk_i ( wb_clk ), - - // WISHBONE master interface - .wb_adr_o ( wb_dm_adr_o ), - .wb_dat_i ( wb_dm_dat_i ), - .wb_dat_o ( wb_dm_dat_o ), - .wb_sel_o ( wb_dm_sel_o ), - .wb_we_o ( wb_dm_we_o ), - .wb_stb_o ( wb_dm_stb_o ), - .wb_cyc_o ( wb_dm_cyc_o ), - .wb_cab_o ( wb_dm_cab_o ), - .wb_ack_i ( wb_dm_ack_i ), - .wb_err_i ( wb_dm_err_i ), - .wb_cti_o ( ), - .wb_bte_o ( ), - - // RISC signals - .cpu0_clk_i ( wb_clk ), - .cpu0_addr_o ( dbg_adr ), - .cpu0_data_i ( dbg_dat_risc ), - .cpu0_data_o ( dbg_dat_dbg ), - .cpu0_bp_i ( dbg_bp ), - .cpu0_stall_o( dbg_stall ), - .cpu0_stb_o ( dbg_op[2] ), - .cpu0_we_o ( dbg_op[0] ), - .cpu0_ack_i ( dbg_ack ), - .cpu0_rst_o ( ) - -); - -// -// JTAG TAP controller instantiation -// -`ifdef GENERIC_TAP -tap_top tap_top( - // JTAG pads - .tms_pad_i(jtag_tms), - .tck_pad_i(jtag_tck), - .trstn_pad_i(rstn), - .tdi_pad_i(jtag_tdi), - .tdo_pad_o(jtag_tdo), - .tdo_padoe_o( ), - - // TAP states - .test_logic_reset_o( test_logic_reset ), - .run_test_idle_o(), - .shift_dr_o(shift_dr), - .pause_dr_o(pause_dr), - .update_dr_o(update_dr), - .capture_dr_o(capture_dr), - - // Select signals for boundary scan or mbist - .extest_select_o(), - .sample_preload_select_o(), - .mbist_select_o(), - .debug_select_o(debug_select), - - // TDO signal that is connected to TDI of sub-modules. - .tdi_o(debug_tdi), - - // TDI signals from sub-modules - .debug_tdo_i(debug_tdo), // from debug module - .bs_chain_tdo_i(1'b0), // from Boundary Scan Chain - .mbist_tdo_i(1'b0) // from Mbist Chain -); -`elsif FPGA_TAP -`ifdef ALTERA_FPGA -altera_virtual_jtag tap_top( - .tck_o(jtag_tck), - .debug_tdo_o(debug_tdo), - .tdi_o(debug_tdi), - .test_logic_reset_o(test_logic_reset), - .run_test_idle_o(), - .shift_dr_o(shift_dr), - .capture_dr_o(capture_dr), - .pause_dr_o(pause_dr), - .update_dr_o(update_dr), - .debug_select_o(debug_select) -); -`elsif XILINX_FPGA -minsoc_xilinx_internal_jtag tap_top( - .tck_o( jtag_tck ), - .debug_tdo_i( debug_tdo ), - .tdi_o( debug_tdi ), - - .test_logic_reset_o( test_logic_reset ), - .run_test_idle_o( ), - - .shift_dr_o( shift_dr ), - .capture_dr_o( capture_dr ), - .pause_dr_o( pause_dr ), - .update_dr_o( update_dr ), - .debug_select_o( debug_select ) -); -`endif // !FPGA_TAP - -`endif // !GENERIC_TAP - -// -// Instantiation of the OR1200 RISC -// -or1200_top or1200_top ( - - // Common - .rst_i ( wb_rst ), - .clk_i ( wb_clk ), -`ifdef OR1200_CLMODE_1TO2 - .clmode_i ( 2'b01 ), -`else -`ifdef OR1200_CLMODE_1TO4 - .clmode_i ( 2'b11 ), -`else - .clmode_i ( 2'b00 ), -`endif -`endif - - // WISHBONE Instruction Master - .iwb_clk_i ( wb_clk ), - .iwb_rst_i ( wb_rst ), - .iwb_cyc_o ( wb_rim_cyc_o ), - .iwb_adr_o ( wb_rim_adr_o ), - .iwb_dat_i ( wb_rif_dat_i ), - .iwb_dat_o ( wb_rim_dat_o ), - .iwb_sel_o ( wb_rim_sel_o ), - .iwb_ack_i ( wb_rif_ack_i ), - .iwb_err_i ( wb_rim_err_i ), - .iwb_rty_i ( wb_rim_rty_i ), - .iwb_we_o ( wb_rim_we_o ), - .iwb_stb_o ( wb_rim_stb_o ), - .iwb_cab_o ( wb_rim_cab_o ), - - // WISHBONE Data Master - .dwb_clk_i ( wb_clk ), - .dwb_rst_i ( wb_rst ), - .dwb_cyc_o ( wb_rdm_cyc_o ), - .dwb_adr_o ( wb_rdm_adr_o ), - .dwb_dat_i ( wb_rdm_dat_i ), - .dwb_dat_o ( wb_rdm_dat_o ), - .dwb_sel_o ( wb_rdm_sel_o ), - .dwb_ack_i ( wb_rdm_ack_i ), - .dwb_err_i ( wb_rdm_err_i ), - .dwb_rty_i ( wb_rdm_rty_i ), - .dwb_we_o ( wb_rdm_we_o ), - .dwb_stb_o ( wb_rdm_stb_o ), - .dwb_cab_o ( wb_rdm_cab_o ), - - // Debug - .dbg_stall_i ( dbg_stall ), - .dbg_dat_i ( dbg_dat_dbg ), - .dbg_adr_i ( dbg_adr ), - .dbg_ewt_i ( 1'b0 ), - .dbg_lss_o ( dbg_lss ), - .dbg_is_o ( dbg_is ), - .dbg_wp_o ( dbg_wp ), - .dbg_bp_o ( dbg_bp ), - .dbg_dat_o ( dbg_dat_risc ), - .dbg_ack_o ( dbg_ack ), - .dbg_stb_i ( dbg_op[2] ), - .dbg_we_i ( dbg_op[0] ), - - // Power Management - .pm_clksd_o ( ), - .pm_cpustall_i ( 1'b0 ), - .pm_dc_gate_o ( ), - .pm_ic_gate_o ( ), - .pm_dmmu_gate_o ( ), - .pm_immu_gate_o ( ), - .pm_tt_gate_o ( ), - .pm_cpu_gate_o ( ), - .pm_wakeup_o ( ), - .pm_lvolt_o ( ), - - // Interrupts - .pic_ints_i ( pic_ints ) -); - -// -// Startup OR1k -// -`ifdef START_UP -OR1K_startup OR1K_startup0 -( - .wb_adr_i(wb_fs_adr_i[6:2]), - .wb_stb_i(wb_fs_stb_i), - .wb_cyc_i(wb_fs_cyc_i), - .wb_dat_o(wb_fs_dat_o), - .wb_ack_o(wb_fs_ack_o), - .wb_clk(wb_clk), - .wb_rst(wb_rst) -); - -spi_flash_top # -( - .divider(0), - .divider_len(2) -) -spi_flash_top0 -( - .wb_clk_i(wb_clk), - .wb_rst_i(wb_rst), - .wb_adr_i(wb_sp_adr_i[4:2]), - .wb_dat_i(wb_sp_dat_i), - .wb_dat_o(wb_sp_dat_o), - .wb_sel_i(wb_sp_sel_i), - .wb_we_i(wb_sp_we_i), - .wb_stb_i(wb_sp_stb_i), - .wb_cyc_i(wb_sp_cyc_i), - .wb_ack_o(wb_sp_ack_o), - - .mosi_pad_o(spi_flash_mosi), - .miso_pad_i(spi_flash_miso), - .sclk_pad_o(spi_flash_sclk), - .ss_pad_o(spi_flash_ss) -); -`else -assign wb_fs_dat_o = 32'h0000_0000; -assign wb_fs_ack_o = 1'b0; -assign wb_sp_dat_o = 32'h0000_0000; -assign wb_sp_ack_o = 1'b0; -`endif - -// -// Instantiation of the SRAM controller -// -minsoc_onchip_ram_top # -( - .adr_width(`MEMORY_ADR_WIDTH) //16 blocks of 2048 bytes memory 32768 -) -onchip_ram_top ( - - // WISHBONE common - .wb_clk_i ( wb_clk ), - .wb_rst_i ( wb_rst ), - - // WISHBONE slave - .wb_dat_i ( wb_ss_dat_i ), - .wb_dat_o ( wb_ss_dat_o ), - .wb_adr_i ( wb_ss_adr_i ), - .wb_sel_i ( wb_ss_sel_i ), - .wb_we_i ( wb_ss_we_i ), - .wb_cyc_i ( wb_ss_cyc_i ), - .wb_stb_i ( wb_ss_stb_i ), - .wb_ack_o ( wb_ss_ack_o ), - .wb_err_o ( wb_ss_err_o ) -); - -// -// Instantiation of the UART16550 -// -`ifdef UART -uart_top uart_top ( - - // WISHBONE common - .wb_clk_i ( wb_clk ), - .wb_rst_i ( wb_rst ), - - // WISHBONE slave - .wb_adr_i ( wb_us_adr_i[4:0] ), - .wb_dat_i ( wb_us_dat_i ), - .wb_dat_o ( wb_us_dat_o ), - .wb_we_i ( wb_us_we_i ), - .wb_stb_i ( wb_us_stb_i ), - .wb_cyc_i ( wb_us_cyc_i ), - .wb_ack_o ( wb_us_ack_o ), - .wb_sel_i ( wb_us_sel_i ), - - // Interrupt request - .int_o ( pic_ints[`APP_INT_UART] ), - - // UART signals - // serial input/output - .stx_pad_o ( uart_stx ), - .srx_pad_i ( uart_srx ), - - // modem signals - .rts_pad_o ( ), - .cts_pad_i ( 1'b0 ), - .dtr_pad_o ( ), - .dsr_pad_i ( 1'b0 ), - .ri_pad_i ( 1'b0 ), - .dcd_pad_i ( 1'b0 ) -); -`else -assign wb_us_dat_o = 32'h0000_0000; -assign wb_us_ack_o = 1'b0; -`endif - -// -// Instantiation of the Ethernet 10/100 MAC -// -`ifdef ETHERNET -eth_top eth_top ( - - // WISHBONE common - .wb_clk_i ( wb_clk ), - .wb_rst_i ( wb_rst ), - - // WISHBONE slave - .wb_dat_i ( wb_es_dat_i ), - .wb_dat_o ( wb_es_dat_o ), - .wb_adr_i ( wb_es_adr_i[11:2] ), - .wb_sel_i ( wb_es_sel_i ), - .wb_we_i ( wb_es_we_i ), - .wb_cyc_i ( wb_es_cyc_i ), - .wb_stb_i ( wb_es_stb_i ), - .wb_ack_o ( wb_es_ack_o ), - .wb_err_o ( wb_es_err_o ), - - // WISHBONE master - .m_wb_adr_o ( wb_em_adr_o ), - .m_wb_sel_o ( wb_em_sel_o ), - .m_wb_we_o ( wb_em_we_o ), - .m_wb_dat_o ( wb_em_dat_o ), - .m_wb_dat_i ( wb_em_dat_i ), - .m_wb_cyc_o ( wb_em_cyc_o ), - .m_wb_stb_o ( wb_em_stb_o ), - .m_wb_ack_i ( wb_em_ack_i ), - .m_wb_err_i ( wb_em_err_i ), - - // TX - .mtx_clk_pad_i ( eth_tx_clk ), - .mtxd_pad_o ( eth_txd ), - .mtxen_pad_o ( eth_tx_en ), - .mtxerr_pad_o ( eth_tx_er ), - - // RX - .mrx_clk_pad_i ( eth_rx_clk ), - .mrxd_pad_i ( eth_rxd ), - .mrxdv_pad_i ( eth_rx_dv ), - .mrxerr_pad_i ( eth_rx_er ), - .mcoll_pad_i ( eth_col ), - .mcrs_pad_i ( eth_crs ), - - // MIIM - .mdc_pad_o ( eth_mdc ), - .md_pad_i ( eth_mdio ), - .md_pad_o ( eth_mdo ), - .md_padoe_o ( eth_mdoe ), - - // Interrupt - .int_o ( pic_ints[`APP_INT_ETH] ) -); -`else -assign wb_es_dat_o = 32'h0000_0000; -assign wb_es_ack_o = 1'b0; - -assign wb_em_adr_o = 32'h0000_0000; -assign wb_em_sel_o = 4'h0; -assign wb_em_we_o = 1'b0; -assign wb_em_dat_o = 32'h0000_0000; -assign wb_em_cyc_o = 1'b0; -assign wb_em_stb_o = 1'b0; -`endif - -// -// Instantiation of the Traffic COP -// -minsoc_tc_top #(`APP_ADDR_DEC_W, - `APP_ADDR_SRAM, - `APP_ADDR_DEC_W, - `APP_ADDR_FLASH, - `APP_ADDR_DECP_W, - `APP_ADDR_PERIP, - `APP_ADDR_DEC_W, - `APP_ADDR_SPI, - `APP_ADDR_ETH, - `APP_ADDR_AUDIO, - `APP_ADDR_UART, - `APP_ADDR_PS2, - `APP_ADDR_RES1, - `APP_ADDR_RES2 - ) tc_top ( - - // WISHBONE common - .wb_clk_i ( wb_clk ), - .wb_rst_i ( wb_rst ), - - // WISHBONE Initiator 0 - .i0_wb_cyc_i ( 1'b0 ), - .i0_wb_stb_i ( 1'b0 ), - .i0_wb_cab_i ( 1'b0 ), - .i0_wb_adr_i ( 32'h0000_0000 ), - .i0_wb_sel_i ( 4'b0000 ), - .i0_wb_we_i ( 1'b0 ), - .i0_wb_dat_i ( 32'h0000_0000 ), - .i0_wb_dat_o ( ), - .i0_wb_ack_o ( ), - .i0_wb_err_o ( ), - - // WISHBONE Initiator 1 - .i1_wb_cyc_i ( wb_em_cyc_o ), - .i1_wb_stb_i ( wb_em_stb_o ), - .i1_wb_cab_i ( wb_em_cab_o ), - .i1_wb_adr_i ( wb_em_adr_o ), - .i1_wb_sel_i ( wb_em_sel_o ), - .i1_wb_we_i ( wb_em_we_o ), - .i1_wb_dat_i ( wb_em_dat_o ), - .i1_wb_dat_o ( wb_em_dat_i ), - .i1_wb_ack_o ( wb_em_ack_i ), - .i1_wb_err_o ( wb_em_err_i ), - - // WISHBONE Initiator 2 - .i2_wb_cyc_i ( 1'b0 ), - .i2_wb_stb_i ( 1'b0 ), - .i2_wb_cab_i ( 1'b0 ), - .i2_wb_adr_i ( 32'h0000_0000 ), - .i2_wb_sel_i ( 4'b0000 ), - .i2_wb_we_i ( 1'b0 ), - .i2_wb_dat_i ( 32'h0000_0000 ), - .i2_wb_dat_o ( ), - .i2_wb_ack_o ( ), - .i2_wb_err_o ( ), - - // WISHBONE Initiator 3 - .i3_wb_cyc_i ( wb_dm_cyc_o ), - .i3_wb_stb_i ( wb_dm_stb_o ), - .i3_wb_cab_i ( wb_dm_cab_o ), - .i3_wb_adr_i ( wb_dm_adr_o ), - .i3_wb_sel_i ( wb_dm_sel_o ), - .i3_wb_we_i ( wb_dm_we_o ), - .i3_wb_dat_i ( wb_dm_dat_o ), - .i3_wb_dat_o ( wb_dm_dat_i ), - .i3_wb_ack_o ( wb_dm_ack_i ), - .i3_wb_err_o ( wb_dm_err_i ), - - // WISHBONE Initiator 4 - .i4_wb_cyc_i ( wb_rdm_cyc_o ), - .i4_wb_stb_i ( wb_rdm_stb_o ), - .i4_wb_cab_i ( wb_rdm_cab_o ), - .i4_wb_adr_i ( wb_rdm_adr_o ), - .i4_wb_sel_i ( wb_rdm_sel_o ), - .i4_wb_we_i ( wb_rdm_we_o ), - .i4_wb_dat_i ( wb_rdm_dat_o ), - .i4_wb_dat_o ( wb_rdm_dat_i ), - .i4_wb_ack_o ( wb_rdm_ack_i ), - .i4_wb_err_o ( wb_rdm_err_i ), - - // WISHBONE Initiator 5 - .i5_wb_cyc_i ( wb_rim_cyc_o ), - .i5_wb_stb_i ( wb_rim_stb_o ), - .i5_wb_cab_i ( wb_rim_cab_o ), - .i5_wb_adr_i ( wb_rim_adr_o ), - .i5_wb_sel_i ( wb_rim_sel_o ), - .i5_wb_we_i ( wb_rim_we_o ), - .i5_wb_dat_i ( wb_rim_dat_o ), - .i5_wb_dat_o ( wb_rim_dat_i ), - .i5_wb_ack_o ( wb_rim_ack_i ), - .i5_wb_err_o ( wb_rim_err_i ), - - // WISHBONE Initiator 6 - .i6_wb_cyc_i ( 1'b0 ), - .i6_wb_stb_i ( 1'b0 ), - .i6_wb_cab_i ( 1'b0 ), - .i6_wb_adr_i ( 32'h0000_0000 ), - .i6_wb_sel_i ( 4'b0000 ), - .i6_wb_we_i ( 1'b0 ), - .i6_wb_dat_i ( 32'h0000_0000 ), - .i6_wb_dat_o ( ), - .i6_wb_ack_o ( ), - .i6_wb_err_o ( ), - - // WISHBONE Initiator 7 - .i7_wb_cyc_i ( 1'b0 ), - .i7_wb_stb_i ( 1'b0 ), - .i7_wb_cab_i ( 1'b0 ), - .i7_wb_adr_i ( 32'h0000_0000 ), - .i7_wb_sel_i ( 4'b0000 ), - .i7_wb_we_i ( 1'b0 ), - .i7_wb_dat_i ( 32'h0000_0000 ), - .i7_wb_dat_o ( ), - .i7_wb_ack_o ( ), - .i7_wb_err_o ( ), - - // WISHBONE Target 0 - .t0_wb_cyc_o ( wb_ss_cyc_i ), - .t0_wb_stb_o ( wb_ss_stb_i ), - .t0_wb_cab_o ( wb_ss_cab_i ), - .t0_wb_adr_o ( wb_ss_adr_i ), - .t0_wb_sel_o ( wb_ss_sel_i ), - .t0_wb_we_o ( wb_ss_we_i ), - .t0_wb_dat_o ( wb_ss_dat_i ), - .t0_wb_dat_i ( wb_ss_dat_o ), - .t0_wb_ack_i ( wb_ss_ack_o ), - .t0_wb_err_i ( wb_ss_err_o ), - - // WISHBONE Target 1 - .t1_wb_cyc_o ( wb_fs_cyc_i ), - .t1_wb_stb_o ( wb_fs_stb_i ), - .t1_wb_cab_o ( wb_fs_cab_i ), - .t1_wb_adr_o ( wb_fs_adr_i ), - .t1_wb_sel_o ( wb_fs_sel_i ), - .t1_wb_we_o ( wb_fs_we_i ), - .t1_wb_dat_o ( wb_fs_dat_i ), - .t1_wb_dat_i ( wb_fs_dat_o ), - .t1_wb_ack_i ( wb_fs_ack_o ), - .t1_wb_err_i ( wb_fs_err_o ), - - // WISHBONE Target 2 - .t2_wb_cyc_o ( wb_sp_cyc_i ), - .t2_wb_stb_o ( wb_sp_stb_i ), - .t2_wb_cab_o ( wb_sp_cab_i ), - .t2_wb_adr_o ( wb_sp_adr_i ), - .t2_wb_sel_o ( wb_sp_sel_i ), - .t2_wb_we_o ( wb_sp_we_i ), - .t2_wb_dat_o ( wb_sp_dat_i ), - .t2_wb_dat_i ( wb_sp_dat_o ), - .t2_wb_ack_i ( wb_sp_ack_o ), - .t2_wb_err_i ( wb_sp_err_o ), - - // WISHBONE Target 3 - .t3_wb_cyc_o ( wb_es_cyc_i ), - .t3_wb_stb_o ( wb_es_stb_i ), - .t3_wb_cab_o ( wb_es_cab_i ), - .t3_wb_adr_o ( wb_es_adr_i ), - .t3_wb_sel_o ( wb_es_sel_i ), - .t3_wb_we_o ( wb_es_we_i ), - .t3_wb_dat_o ( wb_es_dat_i ), - .t3_wb_dat_i ( wb_es_dat_o ), - .t3_wb_ack_i ( wb_es_ack_o ), - .t3_wb_err_i ( wb_es_err_o ), - - // WISHBONE Target 4 - .t4_wb_cyc_o ( ), - .t4_wb_stb_o ( ), - .t4_wb_cab_o ( ), - .t4_wb_adr_o ( ), - .t4_wb_sel_o ( ), - .t4_wb_we_o ( ), - .t4_wb_dat_o ( ), - .t4_wb_dat_i ( 32'h0000_0000 ), - .t4_wb_ack_i ( 1'b0 ), - .t4_wb_err_i ( 1'b1 ), - - // WISHBONE Target 5 - .t5_wb_cyc_o ( wb_us_cyc_i ), - .t5_wb_stb_o ( wb_us_stb_i ), - .t5_wb_cab_o ( wb_us_cab_i ), - .t5_wb_adr_o ( wb_us_adr_i ), - .t5_wb_sel_o ( wb_us_sel_i ), - .t5_wb_we_o ( wb_us_we_i ), - .t5_wb_dat_o ( wb_us_dat_i ), - .t5_wb_dat_i ( wb_us_dat_o ), - .t5_wb_ack_i ( wb_us_ack_o ), - .t5_wb_err_i ( wb_us_err_o ), - - // WISHBONE Target 6 - .t6_wb_cyc_o ( ), - .t6_wb_stb_o ( ), - .t6_wb_cab_o ( ), - .t6_wb_adr_o ( ), - .t6_wb_sel_o ( ), - .t6_wb_we_o ( ), - .t6_wb_dat_o ( ), - .t6_wb_dat_i ( 32'h0000_0000 ), - .t6_wb_ack_i ( 1'b0 ), - .t6_wb_err_i ( 1'b1 ), - - // WISHBONE Target 7 - .t7_wb_cyc_o ( ), - .t7_wb_stb_o ( ), - .t7_wb_cab_o ( ), - .t7_wb_adr_o ( ), - .t7_wb_sel_o ( ), - .t7_wb_we_o ( ), - .t7_wb_dat_o ( ), - .t7_wb_dat_i ( 32'h0000_0000 ), - .t7_wb_ack_i ( 1'b0 ), - .t7_wb_err_i ( 1'b1 ), - - // WISHBONE Target 8 - .t8_wb_cyc_o ( ), - .t8_wb_stb_o ( ), - .t8_wb_cab_o ( ), - .t8_wb_adr_o ( ), - .t8_wb_sel_o ( ), - .t8_wb_we_o ( ), - .t8_wb_dat_o ( ), - .t8_wb_dat_i ( 32'h0000_0000 ), - .t8_wb_ack_i ( 1'b0 ), - .t8_wb_err_i ( 1'b1 ) -); - -//initial begin -// $dumpvars(0); -// $dumpfile("dump.vcd"); -//end - -endmodule

rtl/verilog/minsoc_top.v Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: rtl/verilog/minsoc_clock_manager.v =================================================================== --- rtl/verilog/minsoc_clock_manager.v (revision 2) +++ rtl/verilog/minsoc_clock_manager.v (nonexistent) @@ -1,255 +0,0 @@ - -`include "minsoc_defines.v" - -module minsoc_clock_manager( - clk_i, - clk_o -); - -// -// Parameters -// -parameter divisor = 5; - -input clk_i; -output clk_o; - -`ifdef NO_CLOCK_DIVISION -assign clk_o = clk_i; - -`elsif GENERIC_CLOCK_DIVISION -reg [31:0] clock_divisor; -reg clk_int; -always @ (posedge clk_i) -begin - clock_divisor <= clock_divisor + 1'b1; - if ( clock_divisor >= divisor/2 - 1 ) begin - clk_int <= ~clk_int; - clock_divisor <= 32'h0000_0000; - end -end -assign clk_o = clk_int; -`elsif FPGA_CLOCK_DIVISION - -`ifdef ALTERA_FPGA -reg [31:0] clock_divisor; -reg clk_int; -always @ (posedge clk_i) -begin - clock_divisor <= clock_divisor + 1'b1; - if ( clock_divisor >= divisor/2 - 1 ) begin - clk_int <= ~clk_int; - clock_divisor <= 32'h0000_0000; - end -end -assign clk_o = clk_int; - -`elsif XILINX_FPGA - -`ifdef SPARTAN2 - `define MINSOC_DLL -`elsif VIRTEX - `define MINSOC_DLL -`endif // !SPARTAN2/VIRTEX - -`ifdef SPARTAN3 - `define MINSOC_DCM -`elsif VIRTEX2 - `define MINSOC_DCM -`endif // !SPARTAN3/VIRTEX2 - -`ifdef SPARTAN3E - `define MINSOC_DCM_SP -`elsif SPARTAN3A - `define MINSOC_DCM_SP -`endif // !SPARTAN3E/SPARTAN3A - -`ifdef VIRTEX4 - `define MINSOC_DCM_ADV - `define MINSOC_DCM_COMPONENT "VIRTEX4" -`elsif VIRTEX5 - `define MINSOC_DCM_ADV - `define MINSOC_DCM_COMPONENT "VIRTEX5" -`endif // !VIRTEX4/VIRTEX5 - -wire CLKIN_IN; -wire CLKDV_OUT; - -assign CLKIN_IN = clk_i; -assign clk_o = CLKDV_OUT; - -wire CLKIN_IBUFG; -wire CLK0_BUF; -wire CLKFB_IN; -wire CLKDV_BUF; - -IBUFG CLKIN_IBUFG_INST ( - .I(CLKIN_IN), - .O(CLKIN_IBUFG) -); - -BUFG CLK0_BUFG_INST ( - .I(CLK0_BUF), - .O(CLKFB_IN) -); - -BUFG CLKDV_BUFG_INST ( - .I(CLKDV_BUF), - .O(CLKDV_OUT) -); - -`ifdef MINSOC_DLL - -CLKDLL #( - .CLKDV_DIVIDE(divisor), // Divide by: 1.5,2.0,2.5,3.0,4.0,5.0,8.0 or 16.0 - .DUTY_CYCLE_CORRECTION("TRUE"), // Duty cycle correction, TRUE or FALSE - .FACTORY_JF(16'hC080), // FACTORY JF Values - .STARTUP_WAIT("FALSE") // Delay config DONE until DLL LOCK, TRUE/FALSE -) CLKDLL_inst ( - .CLK0(CLK0_BUF), // 0 degree DLL CLK output - .CLK180(), // 180 degree DLL CLK output - .CLK270(), // 270 degree DLL CLK output - .CLK2X(), // 2X DLL CLK output - .CLK90(), // 90 degree DLL CLK output - .CLKDV(CLKDV_BUF), // Divided DLL CLK out (CLKDV_DIVIDE) - .LOCKED(), // DLL LOCK status output - .CLKFB(CLKFB_IN), // DLL clock feedback - .CLKIN(CLKIN_IBUFG), // Clock input (from IBUFG, BUFG or DLL) - .RST(1'b0) // DLL asynchronous reset input -); - -`elsif MINSOC_DCM - -DCM #( - .SIM_MODE("SAFE"), // Simulation: "SAFE" vs. "FAST", see "Synthesis and Simulation Design Guide" for details - .CLKDV_DIVIDE(divisor), // Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - // 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - .CLKFX_DIVIDE(1), // Can be any integer from 1 to 32 - .CLKFX_MULTIPLY(4), // Can be any integer from 2 to 32 - .CLKIN_DIVIDE_BY_2("FALSE"), // TRUE/FALSE to enable CLKIN divide by two feature - .CLKIN_PERIOD(0.0), // Specify period of input clock - .CLKOUT_PHASE_SHIFT("NONE"), // Specify phase shift of NONE, FIXED or VARIABLE - .CLK_FEEDBACK("1X"), // Specify clock feedback of NONE, 1X or 2X - .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"), // SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - // an integer from 0 to 15 - .DFS_FREQUENCY_MODE("LOW"), // HIGH or LOW frequency mode for frequency synthesis - .DLL_FREQUENCY_MODE("LOW"), // HIGH or LOW frequency mode for DLL - .DUTY_CYCLE_CORRECTION("TRUE"), // Duty cycle correction, TRUE or FALSE - .FACTORY_JF(16'hC080), // FACTORY JF values - .PHASE_SHIFT(0), // Amount of fixed phase shift from -255 to 255 - .STARTUP_WAIT("FALSE") // Delay configuration DONE until DCM LOCK, TRUE/FALSE -) DCM_inst ( - .CLK0(CLK0_BUF), // 0 degree DCM CLK output - .CLK180(), // 180 degree DCM CLK output - .CLK270(), // 270 degree DCM CLK output - .CLK2X(), // 2X DCM CLK output - .CLK2X180(), // 2X, 180 degree DCM CLK out - .CLK90(), // 90 degree DCM CLK output - .CLKDV(CLKDV_BUF), // Divided DCM CLK out (CLKDV_DIVIDE) - .CLKFX(), // DCM CLK synthesis out (M/D) - .CLKFX180(), // 180 degree CLK synthesis out - .LOCKED(), // DCM LOCK status output - .PSDONE(), // Dynamic phase adjust done output - .STATUS(), // 8-bit DCM status bits output - .CLKFB(CLKFB_IN), // DCM clock feedback - .CLKIN(CLKIN_IBUFG), // Clock input (from IBUFG, BUFG or DCM) - .PSCLK(1'b0), // Dynamic phase adjust clock input - .PSEN(1'b0), // Dynamic phase adjust enable input - .PSINCDEC(1'b0), // Dynamic phase adjust increment/decrement - .RST(1'b0) // DCM asynchronous reset input -); - -`elsif MINSOC_DCM_SP - -DCM_SP #( - .CLKDV_DIVIDE(divisor), // Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - // 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - .CLKFX_DIVIDE(1), // Can be any integer from 1 to 32 - .CLKFX_MULTIPLY(4), // Can be any integer from 2 to 32 - .CLKIN_DIVIDE_BY_2("FALSE"), // TRUE/FALSE to enable CLKIN divide by two feature - .CLKIN_PERIOD(0.0), // Specify period of input clock - .CLKOUT_PHASE_SHIFT("NONE"), // Specify phase shift of NONE, FIXED or VARIABLE - .CLK_FEEDBACK("1X"), // Specify clock feedback of NONE, 1X or 2X - .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"), // SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - // an integer from 0 to 15 - .DLL_FREQUENCY_MODE("LOW"), // HIGH or LOW frequency mode for DLL - .DUTY_CYCLE_CORRECTION("TRUE"), // Duty cycle correction, TRUE or FALSE - .PHASE_SHIFT(0), // Amount of fixed phase shift from -255 to 255 - .STARTUP_WAIT("FALSE") // Delay configuration DONE until DCM LOCK, TRUE/FALSE -) DCM_SP_inst ( - .CLK0(CLK0_BUF), // 0 degree DCM CLK output - .CLK180(), // 180 degree DCM CLK output - .CLK270(), // 270 degree DCM CLK output - .CLK2X(), // 2X DCM CLK output - .CLK2X180(), // 2X, 180 degree DCM CLK out - .CLK90(), // 90 degree DCM CLK output - .CLKDV(CLKDV_BUF), // Divided DCM CLK out (CLKDV_DIVIDE) - .CLKFX(), // DCM CLK synthesis out (M/D) - .CLKFX180(), // 180 degree CLK synthesis out - .LOCKED(), // DCM LOCK status output - .PSDONE(), // Dynamic phase adjust done output - .STATUS(), // 8-bit DCM status bits output - .CLKFB(CLKFB_IN), // DCM clock feedback - .CLKIN(CLKIN_IBUFG), // Clock input (from IBUFG, BUFG or DCM) - .PSCLK(1'b0), // Dynamic phase adjust clock input - .PSEN(1'b0), // Dynamic phase adjust enable input - .PSINCDEC(1'b0), // Dynamic phase adjust increment/decrement - .RST(1'b0) // DCM asynchronous reset input -); - -`elsif MINSOC_DCM_ADV - -DCM_ADV #( - .CLKDV_DIVIDE(divisor), // Divide by: 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5 - // 7.0,7.5,8.0,9.0,10.0,11.0,12.0,13.0,14.0,15.0 or 16.0 - .CLKFX_DIVIDE(1), // Can be any integer from 1 to 32 - .CLKFX_MULTIPLY(4), // Can be any integer from 2 to 32 - .CLKIN_DIVIDE_BY_2("FALSE"), // TRUE/FALSE to enable CLKIN divide by two feature - .CLKIN_PERIOD(10.0), // Specify period of input clock in ns from 1.25 to 1000.00 - .CLKOUT_PHASE_SHIFT("NONE"), // Specify phase shift mode of NONE, FIXED, - // VARIABLE_POSITIVE, VARIABLE_CENTER or DIRECT - .CLK_FEEDBACK("1X"), // Specify clock feedback of NONE, 1X or 2X - .DCM_AUTOCALIBRATION("TRUE"), // DCM calibration circuitry "TRUE"/"FALSE" - .DCM_PERFORMANCE_MODE("MAX_SPEED"), // Can be MAX_SPEED or MAX_RANGE - .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"), // SOURCE_SYNCHRONOUS, SYSTEM_SYNCHRONOUS or - // an integer from 0 to 15 - .DFS_FREQUENCY_MODE("LOW"), // HIGH or LOW frequency mode for frequency synthesis - .DLL_FREQUENCY_MODE("LOW"), // LOW, HIGH, or HIGH_SER frequency mode for DLL - .DUTY_CYCLE_CORRECTION("TRUE"), // Duty cycle correction, "TRUE"/"FALSE" - .FACTORY_JF(16'hf0f0), // FACTORY JF value suggested to be set to 16’hf0f0 - .PHASE_SHIFT(0), // Amount of fixed phase shift from -255 to 1023 - .SIM_DEVICE(`MINSOC_DCM_COMPONENT), // Set target device, "VIRTEX4" or "VIRTEX5" - .STARTUP_WAIT("FALSE") // Delay configuration DONE until DCM LOCK, "TRUE"/"FALSE" -) DCM_ADV_inst ( - .CLK0(CLK0_BUF), // 0 degree DCM CLK output - .CLK180(), // 180 degree DCM CLK output - .CLK270(), // 270 degree DCM CLK output - .CLK2X(), // 2X DCM CLK output - .CLK2X180(), // 2X, 180 degree DCM CLK out - .CLK90(), // 90 degree DCM CLK output - .CLKDV(CLKDV_BUF), // Divided DCM CLK out (CLKDV_DIVIDE) - .CLKFX(), // DCM CLK synthesis out (M/D) - .CLKFX180(), // 180 degree CLK synthesis out - .DO(), // 16-bit data output for Dynamic Reconfiguration Port (DRP) - .DRDY(), // Ready output signal from the DRP - .LOCKED(), // DCM LOCK status output - .PSDONE(), // Dynamic phase adjust done output - .CLKFB(CLKFB_IN), // DCM clock feedback - .CLKIN(CLKIN_IBUFG), // Clock input (from IBUFG, BUFG or DCM) - .DADDR(7'h00), // 7-bit address for the DRP - .DCLK(1'b0), // Clock for the DRP - .DEN(1'b0), // Enable input for the DRP - .DI(16'h0000), // 16-bit data input for the DRP - .DWE(1'b0), // Active high allows for writing configuration memory - .PSCLK(1'b0), // Dynamic phase adjust clock input - .PSEN(1'b0), // Dynamic phase adjust enable input - .PSINCDEC(1'b0), // Dynamic phase adjust increment/decrement - .RST(1'b0) // DCM asynchronous reset input -); - -`endif // !MINSOC_DLL/MINSOC_DCM/MINSOC_DCM_SP/MINSOC_DCM_ADV -`endif // !ALTERA_FPGA/XILINX_FPGA -`endif // !NO_CLOCK_DIVISION/GENERIC_CLOCK_DIVISION/FPGA_CLOCK_DIVISION - - -endmodule

rtl/verilog/minsoc_clock_manager.v Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: rtl/verilog/minsoc_tc_top.v =================================================================== --- rtl/verilog/minsoc_tc_top.v (revision 2) +++ rtl/verilog/minsoc_tc_top.v (nonexistent) @@ -1,1782 +0,0 @@ -////////////////////////////////////////////////////////////////////// -//// //// -//// Xess Traffic Cop //// -//// //// -//// This file is part of the OR1K test application //// -//// http://www.opencores.org/cores/or1k/ //// -//// //// -//// Description //// -//// This block connectes the RISC and peripheral controller //// -//// cores together. //// -//// //// -//// To Do: //// -//// - nothing really //// -//// //// -//// Author(s): //// -//// - Damjan Lampret, lampret@opencores.org //// -//// //// -////////////////////////////////////////////////////////////////////// -//// //// -//// Copyright (C) 2002 OpenCores //// -//// //// -//// This source file may be used and distributed without //// -//// restriction provided that this copyright statement is not //// -//// removed from the file and that any derivative work contains //// -//// the original copyright notice and the associated disclaimer. //// -//// //// -//// This source file is free software; you can redistribute it //// -//// and/or modify it under the terms of the GNU Lesser General //// -//// Public License as published by the Free Software Foundation; //// -//// either version 2.1 of the License, or (at your option) any //// -//// later version. //// -//// //// -//// This source is distributed in the hope that it will be //// -//// useful, but WITHOUT ANY WARRANTY; without even the implied //// -//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// -//// PURPOSE. See the GNU Lesser General Public License for more //// -//// details. //// -//// //// -//// You should have received a copy of the GNU Lesser General //// -//// Public License along with this source; if not, download it //// -//// from http://www.opencores.org/lgpl.shtml //// -//// //// -////////////////////////////////////////////////////////////////////// -// -// CVS Revision History -// -// $Log: tc_top.v,v $ -// Revision 1.4 2004/04/05 08:44:34 lampret -// Merged branch_qmem into main tree. -// -// Revision 1.2 2002/03/29 20:57:30 lampret -// Removed unused ports wb_clki and wb_rst_i -// -// Revision 1.1.1.1 2002/03/21 16:55:44 lampret -// First import of the "new" XESS XSV environment. -// -// -// - -// synopsys translate_off -`include "timescale.v" -// synopsys translate_on - -// -// Width of address bus -// -`define TC_AW 32 - -// -// Width of data bus -// -`define TC_DW 32 - -// -// Width of byte select bus -// -`define TC_BSW 4 - -// -// Width of WB target inputs (coming from WB slave) -// -// data bus width + ack + err -// -`define TC_TIN_W `TC_DW+1+1 - -// -// Width of WB initiator inputs (coming from WB masters) -// -// cyc + stb + cab + address bus width + -// byte select bus width + we + data bus width -// -`define TC_IIN_W 1+1+1+`TC_AW+`TC_BSW+1+`TC_DW - -// -// Traffic Cop Top -// -module minsoc_tc_top ( - wb_clk_i, - wb_rst_i, - - i0_wb_cyc_i, - i0_wb_stb_i, - i0_wb_cab_i, - i0_wb_adr_i, - i0_wb_sel_i, - i0_wb_we_i, - i0_wb_dat_i, - i0_wb_dat_o, - i0_wb_ack_o, - i0_wb_err_o, - - i1_wb_cyc_i, - i1_wb_stb_i, - i1_wb_cab_i, - i1_wb_adr_i, - i1_wb_sel_i, - i1_wb_we_i, - i1_wb_dat_i, - i1_wb_dat_o, - i1_wb_ack_o, - i1_wb_err_o, - - i2_wb_cyc_i, - i2_wb_stb_i, - i2_wb_cab_i, - i2_wb_adr_i, - i2_wb_sel_i, - i2_wb_we_i, - i2_wb_dat_i, - i2_wb_dat_o, - i2_wb_ack_o, - i2_wb_err_o, - - i3_wb_cyc_i, - i3_wb_stb_i, - i3_wb_cab_i, - i3_wb_adr_i, - i3_wb_sel_i, - i3_wb_we_i, - i3_wb_dat_i, - i3_wb_dat_o, - i3_wb_ack_o, - i3_wb_err_o, - - i4_wb_cyc_i, - i4_wb_stb_i, - i4_wb_cab_i, - i4_wb_adr_i, - i4_wb_sel_i, - i4_wb_we_i, - i4_wb_dat_i, - i4_wb_dat_o, - i4_wb_ack_o, - i4_wb_err_o, - - i5_wb_cyc_i, - i5_wb_stb_i, - i5_wb_cab_i, - i5_wb_adr_i, - i5_wb_sel_i, - i5_wb_we_i, - i5_wb_dat_i, - i5_wb_dat_o, - i5_wb_ack_o, - i5_wb_err_o, - - i6_wb_cyc_i, - i6_wb_stb_i, - i6_wb_cab_i, - i6_wb_adr_i, - i6_wb_sel_i, - i6_wb_we_i, - i6_wb_dat_i, - i6_wb_dat_o, - i6_wb_ack_o, - i6_wb_err_o, - - i7_wb_cyc_i, - i7_wb_stb_i, - i7_wb_cab_i, - i7_wb_adr_i, - i7_wb_sel_i, - i7_wb_we_i, - i7_wb_dat_i, - i7_wb_dat_o, - i7_wb_ack_o, - i7_wb_err_o, - - t0_wb_cyc_o, - t0_wb_stb_o, - t0_wb_cab_o, - t0_wb_adr_o, - t0_wb_sel_o, - t0_wb_we_o, - t0_wb_dat_o, - t0_wb_dat_i, - t0_wb_ack_i, - t0_wb_err_i, - - t1_wb_cyc_o, - t1_wb_stb_o, - t1_wb_cab_o, - t1_wb_adr_o, - t1_wb_sel_o, - t1_wb_we_o, - t1_wb_dat_o, - t1_wb_dat_i, - t1_wb_ack_i, - t1_wb_err_i, - - t2_wb_cyc_o, - t2_wb_stb_o, - t2_wb_cab_o, - t2_wb_adr_o, - t2_wb_sel_o, - t2_wb_we_o, - t2_wb_dat_o, - t2_wb_dat_i, - t2_wb_ack_i, - t2_wb_err_i, - - t3_wb_cyc_o, - t3_wb_stb_o, - t3_wb_cab_o, - t3_wb_adr_o, - t3_wb_sel_o, - t3_wb_we_o, - t3_wb_dat_o, - t3_wb_dat_i, - t3_wb_ack_i, - t3_wb_err_i, - - t4_wb_cyc_o, - t4_wb_stb_o, - t4_wb_cab_o, - t4_wb_adr_o, - t4_wb_sel_o, - t4_wb_we_o, - t4_wb_dat_o, - t4_wb_dat_i, - t4_wb_ack_i, - t4_wb_err_i, - - t5_wb_cyc_o, - t5_wb_stb_o, - t5_wb_cab_o, - t5_wb_adr_o, - t5_wb_sel_o, - t5_wb_we_o, - t5_wb_dat_o, - t5_wb_dat_i, - t5_wb_ack_i, - t5_wb_err_i, - - t6_wb_cyc_o, - t6_wb_stb_o, - t6_wb_cab_o, - t6_wb_adr_o, - t6_wb_sel_o, - t6_wb_we_o, - t6_wb_dat_o, - t6_wb_dat_i, - t6_wb_ack_i, - t6_wb_err_i, - - t7_wb_cyc_o, - t7_wb_stb_o, - t7_wb_cab_o, - t7_wb_adr_o, - t7_wb_sel_o, - t7_wb_we_o, - t7_wb_dat_o, - t7_wb_dat_i, - t7_wb_ack_i, - t7_wb_err_i, - - t8_wb_cyc_o, - t8_wb_stb_o, - t8_wb_cab_o, - t8_wb_adr_o, - t8_wb_sel_o, - t8_wb_we_o, - t8_wb_dat_o, - t8_wb_dat_i, - t8_wb_ack_i, - t8_wb_err_i - -); - -// -// Parameters -// -parameter t0_addr_w = 4; -parameter t0_addr = 4'd8; -parameter t1_addr_w = 4; -parameter t1_addr = 4'd0; -parameter t28c_addr_w = 4; -parameter t28_addr = 4'd0; -parameter t28i_addr_w = 4; -parameter t2_addr = 4'd1; -parameter t3_addr = 4'd2; -parameter t4_addr = 4'd3; -parameter t5_addr = 4'd4; -parameter t6_addr = 4'd5; -parameter t7_addr = 4'd6; -parameter t8_addr = 4'd7; - -// -// I/O Ports -// -input wb_clk_i; -input wb_rst_i; - -// -// WB slave i/f connecting initiator 0 -// -input i0_wb_cyc_i; -input i0_wb_stb_i; -input i0_wb_cab_i; -input [`TC_AW-1:0] i0_wb_adr_i; -input [`TC_BSW-1:0] i0_wb_sel_i; -input i0_wb_we_i; -input [`TC_DW-1:0] i0_wb_dat_i; -output [`TC_DW-1:0] i0_wb_dat_o; -output i0_wb_ack_o; -output i0_wb_err_o; - -// -// WB slave i/f connecting initiator 1 -// -input i1_wb_cyc_i; -input i1_wb_stb_i; -input i1_wb_cab_i; -input [`TC_AW-1:0] i1_wb_adr_i; -input [`TC_BSW-1:0] i1_wb_sel_i; -input i1_wb_we_i; -input [`TC_DW-1:0] i1_wb_dat_i; -output [`TC_DW-1:0] i1_wb_dat_o; -output i1_wb_ack_o; -output i1_wb_err_o; - -// -// WB slave i/f connecting initiator 2 -// -input i2_wb_cyc_i; -input i2_wb_stb_i; -input i2_wb_cab_i; -input [`TC_AW-1:0] i2_wb_adr_i; -input [`TC_BSW-1:0] i2_wb_sel_i; -input i2_wb_we_i; -input [`TC_DW-1:0] i2_wb_dat_i; -output [`TC_DW-1:0] i2_wb_dat_o; -output i2_wb_ack_o; -output i2_wb_err_o; - -// -// WB slave i/f connecting initiator 3 -// -input i3_wb_cyc_i; -input i3_wb_stb_i; -input i3_wb_cab_i; -input [`TC_AW-1:0] i3_wb_adr_i; -input [`TC_BSW-1:0] i3_wb_sel_i; -input i3_wb_we_i; -input [`TC_DW-1:0] i3_wb_dat_i; -output [`TC_DW-1:0] i3_wb_dat_o; -output i3_wb_ack_o; -output i3_wb_err_o; - -// -// WB slave i/f connecting initiator 4 -// -input i4_wb_cyc_i; -input i4_wb_stb_i; -input i4_wb_cab_i; -input [`TC_AW-1:0] i4_wb_adr_i; -input [`TC_BSW-1:0] i4_wb_sel_i; -input i4_wb_we_i; -input [`TC_DW-1:0] i4_wb_dat_i; -output [`TC_DW-1:0] i4_wb_dat_o; -output i4_wb_ack_o; -output i4_wb_err_o; - -// -// WB slave i/f connecting initiator 5 -// -input i5_wb_cyc_i; -input i5_wb_stb_i; -input i5_wb_cab_i; -input [`TC_AW-1:0] i5_wb_adr_i; -input [`TC_BSW-1:0] i5_wb_sel_i; -input i5_wb_we_i; -input [`TC_DW-1:0] i5_wb_dat_i; -output [`TC_DW-1:0] i5_wb_dat_o; -output i5_wb_ack_o; -output i5_wb_err_o; - -// -// WB slave i/f connecting initiator 6 -// -input i6_wb_cyc_i; -input i6_wb_stb_i; -input i6_wb_cab_i; -input [`TC_AW-1:0] i6_wb_adr_i; -input [`TC_BSW-1:0] i6_wb_sel_i; -input i6_wb_we_i; -input [`TC_DW-1:0] i6_wb_dat_i; -output [`TC_DW-1:0] i6_wb_dat_o; -output i6_wb_ack_o; -output i6_wb_err_o; - -// -// WB slave i/f connecting initiator 7 -// -input i7_wb_cyc_i; -input i7_wb_stb_i; -input i7_wb_cab_i; -input [`TC_AW-1:0] i7_wb_adr_i; -input [`TC_BSW-1:0] i7_wb_sel_i; -input i7_wb_we_i; -input [`TC_DW-1:0] i7_wb_dat_i; -output [`TC_DW-1:0] i7_wb_dat_o; -output i7_wb_ack_o; -output i7_wb_err_o; - -// -// WB master i/f connecting target 0 -// -output t0_wb_cyc_o; -output t0_wb_stb_o; -output t0_wb_cab_o; -output [`TC_AW-1:0] t0_wb_adr_o; -output [`TC_BSW-1:0] t0_wb_sel_o; -output t0_wb_we_o; -output [`TC_DW-1:0] t0_wb_dat_o; -input [`TC_DW-1:0] t0_wb_dat_i; -input t0_wb_ack_i; -input t0_wb_err_i; - -// -// WB master i/f connecting target 1 -// -output t1_wb_cyc_o; -output t1_wb_stb_o; -output t1_wb_cab_o; -output [`TC_AW-1:0] t1_wb_adr_o; -output [`TC_BSW-1:0] t1_wb_sel_o; -output t1_wb_we_o; -output [`TC_DW-1:0] t1_wb_dat_o; -input [`TC_DW-1:0] t1_wb_dat_i; -input t1_wb_ack_i; -input t1_wb_err_i; - -// -// WB master i/f connecting target 2 -// -output t2_wb_cyc_o; -output t2_wb_stb_o; -output t2_wb_cab_o; -output [`TC_AW-1:0] t2_wb_adr_o; -output [`TC_BSW-1:0] t2_wb_sel_o; -output t2_wb_we_o; -output [`TC_DW-1:0] t2_wb_dat_o; -input [`TC_DW-1:0] t2_wb_dat_i; -input t2_wb_ack_i; -input t2_wb_err_i; - -// -// WB master i/f connecting target 3 -// -output t3_wb_cyc_o; -output t3_wb_stb_o; -output t3_wb_cab_o; -output [`TC_AW-1:0] t3_wb_adr_o; -output [`TC_BSW-1:0] t3_wb_sel_o; -output t3_wb_we_o; -output [`TC_DW-1:0] t3_wb_dat_o; -input [`TC_DW-1:0] t3_wb_dat_i; -input t3_wb_ack_i; -input t3_wb_err_i; - -// -// WB master i/f connecting target 4 -// -output t4_wb_cyc_o; -output t4_wb_stb_o; -output t4_wb_cab_o; -output [`TC_AW-1:0] t4_wb_adr_o; -output [`TC_BSW-1:0] t4_wb_sel_o; -output t4_wb_we_o; -output [`TC_DW-1:0] t4_wb_dat_o; -input [`TC_DW-1:0] t4_wb_dat_i; -input t4_wb_ack_i; -input t4_wb_err_i; - -// -// WB master i/f connecting target 5 -// -output t5_wb_cyc_o; -output t5_wb_stb_o; -output t5_wb_cab_o; -output [`TC_AW-1:0] t5_wb_adr_o; -output [`TC_BSW-1:0] t5_wb_sel_o; -output t5_wb_we_o; -output [`TC_DW-1:0] t5_wb_dat_o; -input [`TC_DW-1:0] t5_wb_dat_i; -input t5_wb_ack_i; -input t5_wb_err_i; - -// -// WB master i/f connecting target 6 -// -output t6_wb_cyc_o; -output t6_wb_stb_o; -output t6_wb_cab_o; -output [`TC_AW-1:0] t6_wb_adr_o; -output [`TC_BSW-1:0] t6_wb_sel_o; -output t6_wb_we_o; -output [`TC_DW-1:0] t6_wb_dat_o; -input [`TC_DW-1:0] t6_wb_dat_i; -input t6_wb_ack_i; -input t6_wb_err_i; - -// -// WB master i/f connecting target 7 -// -output t7_wb_cyc_o; -output t7_wb_stb_o; -output t7_wb_cab_o; -output [`TC_AW-1:0] t7_wb_adr_o; -output [`TC_BSW-1:0] t7_wb_sel_o; -output t7_wb_we_o; -output [`TC_DW-1:0] t7_wb_dat_o; -input [`TC_DW-1:0] t7_wb_dat_i; -input t7_wb_ack_i; -input t7_wb_err_i; - -// -// WB master i/f connecting target 8 -// -output t8_wb_cyc_o; -output t8_wb_stb_o; -output t8_wb_cab_o; -output [`TC_AW-1:0] t8_wb_adr_o; -output [`TC_BSW-1:0] t8_wb_sel_o; -output t8_wb_we_o; -output [`TC_DW-1:0] t8_wb_dat_o; -input [`TC_DW-1:0] t8_wb_dat_i; -input t8_wb_ack_i; -input t8_wb_err_i; - -// -// Internal wires & registers -// - -// -// Outputs for initiators from both mi_to_st blocks -// -wire [`TC_DW-1:0] xi0_wb_dat_o; -wire xi0_wb_ack_o; -wire xi0_wb_err_o; -wire [`TC_DW-1:0] xi1_wb_dat_o; -wire xi1_wb_ack_o; -wire xi1_wb_err_o; -wire [`TC_DW-1:0] xi2_wb_dat_o; -wire xi2_wb_ack_o; -wire xi2_wb_err_o; -wire [`TC_DW-1:0] xi3_wb_dat_o; -wire xi3_wb_ack_o; -wire xi3_wb_err_o; -wire [`TC_DW-1:0] xi4_wb_dat_o; -wire xi4_wb_ack_o; -wire xi4_wb_err_o; -wire [`TC_DW-1:0] xi5_wb_dat_o; -wire xi5_wb_ack_o; -wire xi5_wb_err_o; -wire [`TC_DW-1:0] xi6_wb_dat_o; -wire xi6_wb_ack_o; -wire xi6_wb_err_o; -wire [`TC_DW-1:0] xi7_wb_dat_o; -wire xi7_wb_ack_o; -wire xi7_wb_err_o; -wire [`TC_DW-1:0] yi0_wb_dat_o; -wire yi0_wb_ack_o; -wire yi0_wb_err_o; -wire [`TC_DW-1:0] yi1_wb_dat_o; -wire yi1_wb_ack_o; -wire yi1_wb_err_o; -wire [`TC_DW-1:0] yi2_wb_dat_o; -wire yi2_wb_ack_o; -wire yi2_wb_err_o; -wire [`TC_DW-1:0] yi3_wb_dat_o; -wire yi3_wb_ack_o; -wire yi3_wb_err_o; -wire [`TC_DW-1:0] yi4_wb_dat_o; -wire yi4_wb_ack_o; -wire yi4_wb_err_o; -wire [`TC_DW-1:0] yi5_wb_dat_o; -wire yi5_wb_ack_o; -wire yi5_wb_err_o; -wire [`TC_DW-1:0] yi6_wb_dat_o; -wire yi6_wb_ack_o; -wire yi6_wb_err_o; -wire [`TC_DW-1:0] yi7_wb_dat_o; -wire yi7_wb_ack_o; -wire yi7_wb_err_o; - -// -// Intermediate signals connecting peripheral channel's -// mi_to_st and si_to_mt blocks. -// -wire z_wb_cyc_i; -wire z_wb_stb_i; -wire z_wb_cab_i; -wire [`TC_AW-1:0] z_wb_adr_i; -wire [`TC_BSW-1:0] z_wb_sel_i; -wire z_wb_we_i; -wire [`TC_DW-1:0] z_wb_dat_i; -wire [`TC_DW-1:0] z_wb_dat_t; -wire z_wb_ack_t; -wire z_wb_err_t; - -// -// Outputs for initiators are ORed from both mi_to_st blocks -// -assign i0_wb_dat_o = xi0_wb_dat_o | yi0_wb_dat_o; -assign i0_wb_ack_o = xi0_wb_ack_o | yi0_wb_ack_o; -assign i0_wb_err_o = xi0_wb_err_o | yi0_wb_err_o; -assign i1_wb_dat_o = xi1_wb_dat_o | yi1_wb_dat_o; -assign i1_wb_ack_o = xi1_wb_ack_o | yi1_wb_ack_o; -assign i1_wb_err_o = xi1_wb_err_o | yi1_wb_err_o; -assign i2_wb_dat_o = xi2_wb_dat_o | yi2_wb_dat_o; -assign i2_wb_ack_o = xi2_wb_ack_o | yi2_wb_ack_o; -assign i2_wb_err_o = xi2_wb_err_o | yi2_wb_err_o; -assign i3_wb_dat_o = xi3_wb_dat_o | yi3_wb_dat_o; -assign i3_wb_ack_o = xi3_wb_ack_o | yi3_wb_ack_o; -assign i3_wb_err_o = xi3_wb_err_o | yi3_wb_err_o; -assign i4_wb_dat_o = xi4_wb_dat_o | yi4_wb_dat_o; -assign i4_wb_ack_o = xi4_wb_ack_o | yi4_wb_ack_o; -assign i4_wb_err_o = xi4_wb_err_o | yi4_wb_err_o; -assign i5_wb_dat_o = xi5_wb_dat_o | yi5_wb_dat_o; -assign i5_wb_ack_o = xi5_wb_ack_o | yi5_wb_ack_o; -assign i5_wb_err_o = xi5_wb_err_o | yi5_wb_err_o; -assign i6_wb_dat_o = xi6_wb_dat_o | yi6_wb_dat_o; -assign i6_wb_ack_o = xi6_wb_ack_o | yi6_wb_ack_o; -assign i6_wb_err_o = xi6_wb_err_o | yi6_wb_err_o; -assign i7_wb_dat_o = xi7_wb_dat_o | yi7_wb_dat_o; -assign i7_wb_ack_o = xi7_wb_ack_o | yi7_wb_ack_o; -assign i7_wb_err_o = xi7_wb_err_o | yi7_wb_err_o; - -// -// From initiators to target 0 -// -tc_mi_to_st #(t0_addr_w, t0_addr, - 0, t0_addr_w, t0_addr) t0_ch( - .wb_clk_i(wb_clk_i), - .wb_rst_i(wb_rst_i), - - .i0_wb_cyc_i(i0_wb_cyc_i), - .i0_wb_stb_i(i0_wb_stb_i), - .i0_wb_cab_i(i0_wb_cab_i), - .i0_wb_adr_i(i0_wb_adr_i), - .i0_wb_sel_i(i0_wb_sel_i), - .i0_wb_we_i(i0_wb_we_i), - .i0_wb_dat_i(i0_wb_dat_i), - .i0_wb_dat_o(xi0_wb_dat_o), - .i0_wb_ack_o(xi0_wb_ack_o), - .i0_wb_err_o(xi0_wb_err_o), - - .i1_wb_cyc_i(i1_wb_cyc_i), - .i1_wb_stb_i(i1_wb_stb_i), - .i1_wb_cab_i(i1_wb_cab_i), - .i1_wb_adr_i(i1_wb_adr_i), - .i1_wb_sel_i(i1_wb_sel_i), - .i1_wb_we_i(i1_wb_we_i), - .i1_wb_dat_i(i1_wb_dat_i), - .i1_wb_dat_o(xi1_wb_dat_o), - .i1_wb_ack_o(xi1_wb_ack_o), - .i1_wb_err_o(xi1_wb_err_o), - - .i2_wb_cyc_i(i2_wb_cyc_i), - .i2_wb_stb_i(i2_wb_stb_i), - .i2_wb_cab_i(i2_wb_cab_i), - .i2_wb_adr_i(i2_wb_adr_i), - .i2_wb_sel_i(i2_wb_sel_i), - .i2_wb_we_i(i2_wb_we_i), - .i2_wb_dat_i(i2_wb_dat_i), - .i2_wb_dat_o(xi2_wb_dat_o), - .i2_wb_ack_o(xi2_wb_ack_o), - .i2_wb_err_o(xi2_wb_err_o), - - .i3_wb_cyc_i(i3_wb_cyc_i), - .i3_wb_stb_i(i3_wb_stb_i), - .i3_wb_cab_i(i3_wb_cab_i), - .i3_wb_adr_i(i3_wb_adr_i), - .i3_wb_sel_i(i3_wb_sel_i), - .i3_wb_we_i(i3_wb_we_i), - .i3_wb_dat_i(i3_wb_dat_i), - .i3_wb_dat_o(xi3_wb_dat_o), - .i3_wb_ack_o(xi3_wb_ack_o), - .i3_wb_err_o(xi3_wb_err_o), - - .i4_wb_cyc_i(i4_wb_cyc_i), - .i4_wb_stb_i(i4_wb_stb_i), - .i4_wb_cab_i(i4_wb_cab_i), - .i4_wb_adr_i(i4_wb_adr_i), - .i4_wb_sel_i(i4_wb_sel_i), - .i4_wb_we_i(i4_wb_we_i), - .i4_wb_dat_i(i4_wb_dat_i), - .i4_wb_dat_o(xi4_wb_dat_o), - .i4_wb_ack_o(xi4_wb_ack_o), - .i4_wb_err_o(xi4_wb_err_o), - - .i5_wb_cyc_i(i5_wb_cyc_i), - .i5_wb_stb_i(i5_wb_stb_i), - .i5_wb_cab_i(i5_wb_cab_i), - .i5_wb_adr_i(i5_wb_adr_i), - .i5_wb_sel_i(i5_wb_sel_i), - .i5_wb_we_i(i5_wb_we_i), - .i5_wb_dat_i(i5_wb_dat_i), - .i5_wb_dat_o(xi5_wb_dat_o), - .i5_wb_ack_o(xi5_wb_ack_o), - .i5_wb_err_o(xi5_wb_err_o), - - .i6_wb_cyc_i(i6_wb_cyc_i), - .i6_wb_stb_i(i6_wb_stb_i), - .i6_wb_cab_i(i6_wb_cab_i), - .i6_wb_adr_i(i6_wb_adr_i), - .i6_wb_sel_i(i6_wb_sel_i), - .i6_wb_we_i(i6_wb_we_i), - .i6_wb_dat_i(i6_wb_dat_i), - .i6_wb_dat_o(xi6_wb_dat_o), - .i6_wb_ack_o(xi6_wb_ack_o), - .i6_wb_err_o(xi6_wb_err_o), - - .i7_wb_cyc_i(i7_wb_cyc_i), - .i7_wb_stb_i(i7_wb_stb_i), - .i7_wb_cab_i(i7_wb_cab_i), - .i7_wb_adr_i(i7_wb_adr_i), - .i7_wb_sel_i(i7_wb_sel_i), - .i7_wb_we_i(i7_wb_we_i), - .i7_wb_dat_i(i7_wb_dat_i), - .i7_wb_dat_o(xi7_wb_dat_o), - .i7_wb_ack_o(xi7_wb_ack_o), - .i7_wb_err_o(xi7_wb_err_o), - - .t0_wb_cyc_o(t0_wb_cyc_o), - .t0_wb_stb_o(t0_wb_stb_o), - .t0_wb_cab_o(t0_wb_cab_o), - .t0_wb_adr_o(t0_wb_adr_o), - .t0_wb_sel_o(t0_wb_sel_o), - .t0_wb_we_o(t0_wb_we_o), - .t0_wb_dat_o(t0_wb_dat_o), - .t0_wb_dat_i(t0_wb_dat_i), - .t0_wb_ack_i(t0_wb_ack_i), - .t0_wb_err_i(t0_wb_err_i) - -); - -// -// From initiators to targets 1-8 (upper part) -// -tc_mi_to_st #(t1_addr_w, t1_addr, - 1, t28c_addr_w, t28_addr) t18_ch_upper( - .wb_clk_i(wb_clk_i), - .wb_rst_i(wb_rst_i), - - .i0_wb_cyc_i(i0_wb_cyc_i), - .i0_wb_stb_i(i0_wb_stb_i), - .i0_wb_cab_i(i0_wb_cab_i), - .i0_wb_adr_i(i0_wb_adr_i), - .i0_wb_sel_i(i0_wb_sel_i), - .i0_wb_we_i(i0_wb_we_i), - .i0_wb_dat_i(i0_wb_dat_i), - .i0_wb_dat_o(yi0_wb_dat_o), - .i0_wb_ack_o(yi0_wb_ack_o), - .i0_wb_err_o(yi0_wb_err_o), - - .i1_wb_cyc_i(i1_wb_cyc_i), - .i1_wb_stb_i(i1_wb_stb_i), - .i1_wb_cab_i(i1_wb_cab_i), - .i1_wb_adr_i(i1_wb_adr_i), - .i1_wb_sel_i(i1_wb_sel_i), - .i1_wb_we_i(i1_wb_we_i), - .i1_wb_dat_i(i1_wb_dat_i), - .i1_wb_dat_o(yi1_wb_dat_o), - .i1_wb_ack_o(yi1_wb_ack_o), - .i1_wb_err_o(yi1_wb_err_o), - - .i2_wb_cyc_i(i2_wb_cyc_i), - .i2_wb_stb_i(i2_wb_stb_i), - .i2_wb_cab_i(i2_wb_cab_i), - .i2_wb_adr_i(i2_wb_adr_i), - .i2_wb_sel_i(i2_wb_sel_i), - .i2_wb_we_i(i2_wb_we_i), - .i2_wb_dat_i(i2_wb_dat_i), - .i2_wb_dat_o(yi2_wb_dat_o), - .i2_wb_ack_o(yi2_wb_ack_o), - .i2_wb_err_o(yi2_wb_err_o), - - .i3_wb_cyc_i(i3_wb_cyc_i), - .i3_wb_stb_i(i3_wb_stb_i), - .i3_wb_cab_i(i3_wb_cab_i), - .i3_wb_adr_i(i3_wb_adr_i), - .i3_wb_sel_i(i3_wb_sel_i), - .i3_wb_we_i(i3_wb_we_i), - .i3_wb_dat_i(i3_wb_dat_i), - .i3_wb_dat_o(yi3_wb_dat_o), - .i3_wb_ack_o(yi3_wb_ack_o), - .i3_wb_err_o(yi3_wb_err_o), - - .i4_wb_cyc_i(i4_wb_cyc_i), - .i4_wb_stb_i(i4_wb_stb_i), - .i4_wb_cab_i(i4_wb_cab_i), - .i4_wb_adr_i(i4_wb_adr_i), - .i4_wb_sel_i(i4_wb_sel_i), - .i4_wb_we_i(i4_wb_we_i), - .i4_wb_dat_i(i4_wb_dat_i), - .i4_wb_dat_o(yi4_wb_dat_o), - .i4_wb_ack_o(yi4_wb_ack_o), - .i4_wb_err_o(yi4_wb_err_o), - - .i5_wb_cyc_i(i5_wb_cyc_i), - .i5_wb_stb_i(i5_wb_stb_i), - .i5_wb_cab_i(i5_wb_cab_i), - .i5_wb_adr_i(i5_wb_adr_i), - .i5_wb_sel_i(i5_wb_sel_i), - .i5_wb_we_i(i5_wb_we_i), - .i5_wb_dat_i(i5_wb_dat_i), - .i5_wb_dat_o(yi5_wb_dat_o), - .i5_wb_ack_o(yi5_wb_ack_o), - .i5_wb_err_o(yi5_wb_err_o), - - .i6_wb_cyc_i(i6_wb_cyc_i), - .i6_wb_stb_i(i6_wb_stb_i), - .i6_wb_cab_i(i6_wb_cab_i), - .i6_wb_adr_i(i6_wb_adr_i), - .i6_wb_sel_i(i6_wb_sel_i), - .i6_wb_we_i(i6_wb_we_i), - .i6_wb_dat_i(i6_wb_dat_i), - .i6_wb_dat_o(yi6_wb_dat_o), - .i6_wb_ack_o(yi6_wb_ack_o), - .i6_wb_err_o(yi6_wb_err_o), - - .i7_wb_cyc_i(i7_wb_cyc_i), - .i7_wb_stb_i(i7_wb_stb_i), - .i7_wb_cab_i(i7_wb_cab_i), - .i7_wb_adr_i(i7_wb_adr_i), - .i7_wb_sel_i(i7_wb_sel_i), - .i7_wb_we_i(i7_wb_we_i), - .i7_wb_dat_i(i7_wb_dat_i), - .i7_wb_dat_o(yi7_wb_dat_o), - .i7_wb_ack_o(yi7_wb_ack_o), - .i7_wb_err_o(yi7_wb_err_o), - - .t0_wb_cyc_o(z_wb_cyc_i), - .t0_wb_stb_o(z_wb_stb_i), - .t0_wb_cab_o(z_wb_cab_i), - .t0_wb_adr_o(z_wb_adr_i), - .t0_wb_sel_o(z_wb_sel_i), - .t0_wb_we_o(z_wb_we_i), - .t0_wb_dat_o(z_wb_dat_i), - .t0_wb_dat_i(z_wb_dat_t), - .t0_wb_ack_i(z_wb_ack_t), - .t0_wb_err_i(z_wb_err_t) - -); - -// -// From initiators to targets 1-8 (lower part) -// -tc_si_to_mt #(t1_addr_w, t1_addr, t28i_addr_w, t2_addr, t3_addr, - t4_addr, t5_addr, t6_addr, t7_addr, t8_addr) t18_ch_lower( - - .i0_wb_cyc_i(z_wb_cyc_i), - .i0_wb_stb_i(z_wb_stb_i), - .i0_wb_cab_i(z_wb_cab_i), - .i0_wb_adr_i(z_wb_adr_i), - .i0_wb_sel_i(z_wb_sel_i), - .i0_wb_we_i(z_wb_we_i), - .i0_wb_dat_i(z_wb_dat_i), - .i0_wb_dat_o(z_wb_dat_t), - .i0_wb_ack_o(z_wb_ack_t), - .i0_wb_err_o(z_wb_err_t), - - .t0_wb_cyc_o(t1_wb_cyc_o), - .t0_wb_stb_o(t1_wb_stb_o), - .t0_wb_cab_o(t1_wb_cab_o), - .t0_wb_adr_o(t1_wb_adr_o), - .t0_wb_sel_o(t1_wb_sel_o), - .t0_wb_we_o(t1_wb_we_o), - .t0_wb_dat_o(t1_wb_dat_o), - .t0_wb_dat_i(t1_wb_dat_i), - .t0_wb_ack_i(t1_wb_ack_i), - .t0_wb_err_i(t1_wb_err_i), - - .t1_wb_cyc_o(t2_wb_cyc_o), - .t1_wb_stb_o(t2_wb_stb_o), - .t1_wb_cab_o(t2_wb_cab_o), - .t1_wb_adr_o(t2_wb_adr_o), - .t1_wb_sel_o(t2_wb_sel_o), - .t1_wb_we_o(t2_wb_we_o), - .t1_wb_dat_o(t2_wb_dat_o), - .t1_wb_dat_i(t2_wb_dat_i), - .t1_wb_ack_i(t2_wb_ack_i), - .t1_wb_err_i(t2_wb_err_i), - - .t2_wb_cyc_o(t3_wb_cyc_o), - .t2_wb_stb_o(t3_wb_stb_o), - .t2_wb_cab_o(t3_wb_cab_o), - .t2_wb_adr_o(t3_wb_adr_o), - .t2_wb_sel_o(t3_wb_sel_o), - .t2_wb_we_o(t3_wb_we_o), - .t2_wb_dat_o(t3_wb_dat_o), - .t2_wb_dat_i(t3_wb_dat_i), - .t2_wb_ack_i(t3_wb_ack_i), - .t2_wb_err_i(t3_wb_err_i), - - .t3_wb_cyc_o(t4_wb_cyc_o), - .t3_wb_stb_o(t4_wb_stb_o), - .t3_wb_cab_o(t4_wb_cab_o), - .t3_wb_adr_o(t4_wb_adr_o), - .t3_wb_sel_o(t4_wb_sel_o), - .t3_wb_we_o(t4_wb_we_o), - .t3_wb_dat_o(t4_wb_dat_o), - .t3_wb_dat_i(t4_wb_dat_i), - .t3_wb_ack_i(t4_wb_ack_i), - .t3_wb_err_i(t4_wb_err_i), - - .t4_wb_cyc_o(t5_wb_cyc_o), - .t4_wb_stb_o(t5_wb_stb_o), - .t4_wb_cab_o(t5_wb_cab_o), - .t4_wb_adr_o(t5_wb_adr_o), - .t4_wb_sel_o(t5_wb_sel_o), - .t4_wb_we_o(t5_wb_we_o), - .t4_wb_dat_o(t5_wb_dat_o), - .t4_wb_dat_i(t5_wb_dat_i), - .t4_wb_ack_i(t5_wb_ack_i), - .t4_wb_err_i(t5_wb_err_i), - - .t5_wb_cyc_o(t6_wb_cyc_o), - .t5_wb_stb_o(t6_wb_stb_o), - .t5_wb_cab_o(t6_wb_cab_o), - .t5_wb_adr_o(t6_wb_adr_o), - .t5_wb_sel_o(t6_wb_sel_o), - .t5_wb_we_o(t6_wb_we_o), - .t5_wb_dat_o(t6_wb_dat_o), - .t5_wb_dat_i(t6_wb_dat_i), - .t5_wb_ack_i(t6_wb_ack_i), - .t5_wb_err_i(t6_wb_err_i), - - .t6_wb_cyc_o(t7_wb_cyc_o), - .t6_wb_stb_o(t7_wb_stb_o), - .t6_wb_cab_o(t7_wb_cab_o), - .t6_wb_adr_o(t7_wb_adr_o), - .t6_wb_sel_o(t7_wb_sel_o), - .t6_wb_we_o(t7_wb_we_o), - .t6_wb_dat_o(t7_wb_dat_o), - .t6_wb_dat_i(t7_wb_dat_i), - .t6_wb_ack_i(t7_wb_ack_i), - .t6_wb_err_i(t7_wb_err_i), - - .t7_wb_cyc_o(t8_wb_cyc_o), - .t7_wb_stb_o(t8_wb_stb_o), - .t7_wb_cab_o(t8_wb_cab_o), - .t7_wb_adr_o(t8_wb_adr_o), - .t7_wb_sel_o(t8_wb_sel_o), - .t7_wb_we_o(t8_wb_we_o), - .t7_wb_dat_o(t8_wb_dat_o), - .t7_wb_dat_i(t8_wb_dat_i), - .t7_wb_ack_i(t8_wb_ack_i), - .t7_wb_err_i(t8_wb_err_i) - -); - -endmodule - -// -// Multiple initiator to single target -// -module tc_mi_to_st ( - wb_clk_i, - wb_rst_i, - - i0_wb_cyc_i, - i0_wb_stb_i, - i0_wb_cab_i, - i0_wb_adr_i, - i0_wb_sel_i, - i0_wb_we_i, - i0_wb_dat_i, - i0_wb_dat_o, - i0_wb_ack_o, - i0_wb_err_o, - - i1_wb_cyc_i, - i1_wb_stb_i, - i1_wb_cab_i, - i1_wb_adr_i, - i1_wb_sel_i, - i1_wb_we_i, - i1_wb_dat_i, - i1_wb_dat_o, - i1_wb_ack_o, - i1_wb_err_o, - - i2_wb_cyc_i, - i2_wb_stb_i, - i2_wb_cab_i, - i2_wb_adr_i, - i2_wb_sel_i, - i2_wb_we_i, - i2_wb_dat_i, - i2_wb_dat_o, - i2_wb_ack_o, - i2_wb_err_o, - - i3_wb_cyc_i, - i3_wb_stb_i, - i3_wb_cab_i, - i3_wb_adr_i, - i3_wb_sel_i, - i3_wb_we_i, - i3_wb_dat_i, - i3_wb_dat_o, - i3_wb_ack_o, - i3_wb_err_o, - - i4_wb_cyc_i, - i4_wb_stb_i, - i4_wb_cab_i, - i4_wb_adr_i, - i4_wb_sel_i, - i4_wb_we_i, - i4_wb_dat_i, - i4_wb_dat_o, - i4_wb_ack_o, - i4_wb_err_o, - - i5_wb_cyc_i, - i5_wb_stb_i, - i5_wb_cab_i, - i5_wb_adr_i, - i5_wb_sel_i, - i5_wb_we_i, - i5_wb_dat_i, - i5_wb_dat_o, - i5_wb_ack_o, - i5_wb_err_o, - - i6_wb_cyc_i, - i6_wb_stb_i, - i6_wb_cab_i, - i6_wb_adr_i, - i6_wb_sel_i, - i6_wb_we_i, - i6_wb_dat_i, - i6_wb_dat_o, - i6_wb_ack_o, - i6_wb_err_o, - - i7_wb_cyc_i, - i7_wb_stb_i, - i7_wb_cab_i, - i7_wb_adr_i, - i7_wb_sel_i, - i7_wb_we_i, - i7_wb_dat_i, - i7_wb_dat_o, - i7_wb_ack_o, - i7_wb_err_o, - - t0_wb_cyc_o, - t0_wb_stb_o, - t0_wb_cab_o, - t0_wb_adr_o, - t0_wb_sel_o, - t0_wb_we_o, - t0_wb_dat_o, - t0_wb_dat_i, - t0_wb_ack_i, - t0_wb_err_i - -); - -// -// Parameters -// -parameter t0_addr_w = 2; -parameter t0_addr = 2'b00; -parameter multitarg = 1'b0; -parameter t17_addr_w = 2; -parameter t17_addr = 2'b00; - -// -// I/O Ports -// -input wb_clk_i; -input wb_rst_i; - -// -// WB slave i/f connecting initiator 0 -// -input i0_wb_cyc_i; -input i0_wb_stb_i; -input i0_wb_cab_i; -input [`TC_AW-1:0] i0_wb_adr_i; -input [`TC_BSW-1:0] i0_wb_sel_i; -input i0_wb_we_i; -input [`TC_DW-1:0] i0_wb_dat_i; -output [`TC_DW-1:0] i0_wb_dat_o; -output i0_wb_ack_o; -output i0_wb_err_o; - -// -// WB slave i/f connecting initiator 1 -// -input i1_wb_cyc_i; -input i1_wb_stb_i; -input i1_wb_cab_i; -input [`TC_AW-1:0] i1_wb_adr_i; -input [`TC_BSW-1:0] i1_wb_sel_i; -input i1_wb_we_i; -input [`TC_DW-1:0] i1_wb_dat_i; -output [`TC_DW-1:0] i1_wb_dat_o; -output i1_wb_ack_o; -output i1_wb_err_o; - -// -// WB slave i/f connecting initiator 2 -// -input i2_wb_cyc_i; -input i2_wb_stb_i; -input i2_wb_cab_i; -input [`TC_AW-1:0] i2_wb_adr_i; -input [`TC_BSW-1:0] i2_wb_sel_i; -input i2_wb_we_i; -input [`TC_DW-1:0] i2_wb_dat_i; -output [`TC_DW-1:0] i2_wb_dat_o; -output i2_wb_ack_o; -output i2_wb_err_o; - -// -// WB slave i/f connecting initiator 3 -// -input i3_wb_cyc_i; -input i3_wb_stb_i; -input i3_wb_cab_i; -input [`TC_AW-1:0] i3_wb_adr_i; -input [`TC_BSW-1:0] i3_wb_sel_i; -input i3_wb_we_i; -input [`TC_DW-1:0] i3_wb_dat_i; -output [`TC_DW-1:0] i3_wb_dat_o; -output i3_wb_ack_o; -output i3_wb_err_o; - -// -// WB slave i/f connecting initiator 4 -// -input i4_wb_cyc_i; -input i4_wb_stb_i; -input i4_wb_cab_i; -input [`TC_AW-1:0] i4_wb_adr_i; -input [`TC_BSW-1:0] i4_wb_sel_i; -input i4_wb_we_i; -input [`TC_DW-1:0] i4_wb_dat_i; -output [`TC_DW-1:0] i4_wb_dat_o; -output i4_wb_ack_o; -output i4_wb_err_o; - -// -// WB slave i/f connecting initiator 5 -// -input i5_wb_cyc_i; -input i5_wb_stb_i; -input i5_wb_cab_i; -input [`TC_AW-1:0] i5_wb_adr_i; -input [`TC_BSW-1:0] i5_wb_sel_i; -input i5_wb_we_i; -input [`TC_DW-1:0] i5_wb_dat_i; -output [`TC_DW-1:0] i5_wb_dat_o; -output i5_wb_ack_o; -output i5_wb_err_o; - -// -// WB slave i/f connecting initiator 6 -// -input i6_wb_cyc_i; -input i6_wb_stb_i; -input i6_wb_cab_i; -input [`TC_AW-1:0] i6_wb_adr_i; -input [`TC_BSW-1:0] i6_wb_sel_i; -input i6_wb_we_i; -input [`TC_DW-1:0] i6_wb_dat_i; -output [`TC_DW-1:0] i6_wb_dat_o; -output i6_wb_ack_o; -output i6_wb_err_o; - -// -// WB slave i/f connecting initiator 7 -// -input i7_wb_cyc_i; -input i7_wb_stb_i; -input i7_wb_cab_i; -input [`TC_AW-1:0] i7_wb_adr_i; -input [`TC_BSW-1:0] i7_wb_sel_i; -input i7_wb_we_i; -input [`TC_DW-1:0] i7_wb_dat_i; -output [`TC_DW-1:0] i7_wb_dat_o; -output i7_wb_ack_o; -output i7_wb_err_o; - -// -// WB master i/f connecting target -// -output t0_wb_cyc_o; -output t0_wb_stb_o; -output t0_wb_cab_o; -output [`TC_AW-1:0] t0_wb_adr_o; -output [`TC_BSW-1:0] t0_wb_sel_o; -output t0_wb_we_o; -output [`TC_DW-1:0] t0_wb_dat_o; -input [`TC_DW-1:0] t0_wb_dat_i; -input t0_wb_ack_i; -input t0_wb_err_i; - -// -// Internal wires & registers -// -wire [`TC_IIN_W-1:0] i0_in, i1_in, - i2_in, i3_in, - i4_in, i5_in, - i6_in, i7_in; -wire [`TC_TIN_W-1:0] i0_out, i1_out, - i2_out, i3_out, - i4_out, i5_out, - i6_out, i7_out; -wire [`TC_IIN_W-1:0] t0_out; -wire [`TC_TIN_W-1:0] t0_in; -wire [7:0] req_i; -wire [2:0] req_won; -reg req_cont; -reg [2:0] req_r; - -// -// Group WB initiator 0 i/f inputs and outputs -// -assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_cab_i, i0_wb_adr_i, - i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i}; -assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out; - -// -// Group WB initiator 1 i/f inputs and outputs -// -assign i1_in = {i1_wb_cyc_i, i1_wb_stb_i, i1_wb_cab_i, i1_wb_adr_i, - i1_wb_sel_i, i1_wb_we_i, i1_wb_dat_i}; -assign {i1_wb_dat_o, i1_wb_ack_o, i1_wb_err_o} = i1_out; - -// -// Group WB initiator 2 i/f inputs and outputs -// -assign i2_in = {i2_wb_cyc_i, i2_wb_stb_i, i2_wb_cab_i, i2_wb_adr_i, - i2_wb_sel_i, i2_wb_we_i, i2_wb_dat_i}; -assign {i2_wb_dat_o, i2_wb_ack_o, i2_wb_err_o} = i2_out; - -// -// Group WB initiator 3 i/f inputs and outputs -// -assign i3_in = {i3_wb_cyc_i, i3_wb_stb_i, i3_wb_cab_i, i3_wb_adr_i, - i3_wb_sel_i, i3_wb_we_i, i3_wb_dat_i}; -assign {i3_wb_dat_o, i3_wb_ack_o, i3_wb_err_o} = i3_out; - -// -// Group WB initiator 4 i/f inputs and outputs -// -assign i4_in = {i4_wb_cyc_i, i4_wb_stb_i, i4_wb_cab_i, i4_wb_adr_i, - i4_wb_sel_i, i4_wb_we_i, i4_wb_dat_i}; -assign {i4_wb_dat_o, i4_wb_ack_o, i4_wb_err_o} = i4_out; - -// -// Group WB initiator 5 i/f inputs and outputs -// -assign i5_in = {i5_wb_cyc_i, i5_wb_stb_i, i5_wb_cab_i, i5_wb_adr_i, - i5_wb_sel_i, i5_wb_we_i, i5_wb_dat_i}; -assign {i5_wb_dat_o, i5_wb_ack_o, i5_wb_err_o} = i5_out; - -// -// Group WB initiator 6 i/f inputs and outputs -// -assign i6_in = {i6_wb_cyc_i, i6_wb_stb_i, i6_wb_cab_i, i6_wb_adr_i, - i6_wb_sel_i, i6_wb_we_i, i6_wb_dat_i}; -assign {i6_wb_dat_o, i6_wb_ack_o, i6_wb_err_o} = i6_out; - -// -// Group WB initiator 7 i/f inputs and outputs -// -assign i7_in = {i7_wb_cyc_i, i7_wb_stb_i, i7_wb_cab_i, i7_wb_adr_i, - i7_wb_sel_i, i7_wb_we_i, i7_wb_dat_i}; -assign {i7_wb_dat_o, i7_wb_ack_o, i7_wb_err_o} = i7_out; - -// -// Group WB target 0 i/f inputs and outputs -// -assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_cab_o, t0_wb_adr_o, - t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out; -assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i}; - -// -// Assign to WB initiator i/f outputs -// -// Either inputs from the target are assigned or zeros. -// -assign i0_out = (req_won == 3'd0) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i1_out = (req_won == 3'd1) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i2_out = (req_won == 3'd2) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i3_out = (req_won == 3'd3) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i4_out = (req_won == 3'd4) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i5_out = (req_won == 3'd5) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i6_out = (req_won == 3'd6) ? t0_in : {`TC_TIN_W{1'b0}}; -assign i7_out = (req_won == 3'd7) ? t0_in : {`TC_TIN_W{1'b0}}; - -// -// Assign to WB target i/f outputs -// -// Assign inputs from initiator to target outputs according to -// which initiator has won. If there is no request for the target, -// assign zeros. -// -assign t0_out = (req_won == 3'd0) ? i0_in : - (req_won == 3'd1) ? i1_in : - (req_won == 3'd2) ? i2_in : - (req_won == 3'd3) ? i3_in : - (req_won == 3'd4) ? i4_in : - (req_won == 3'd5) ? i5_in : - (req_won == 3'd6) ? i6_in : - (req_won == 3'd7) ? i7_in : {`TC_IIN_W{1'b0}}; - -// -// Determine if an initiator has address of the target. -// -assign req_i[0] = i0_wb_cyc_i & - ((i0_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[1] = i1_wb_cyc_i & - ((i1_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i1_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[2] = i2_wb_cyc_i & - ((i2_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i2_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[3] = i3_wb_cyc_i & - ((i3_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i3_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[4] = i4_wb_cyc_i & - ((i4_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i4_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[5] = i5_wb_cyc_i & - ((i5_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i5_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[6] = i6_wb_cyc_i & - ((i6_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i6_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); -assign req_i[7] = i7_wb_cyc_i & - ((i7_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr) | - multitarg & (i7_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t17_addr)); - -// -// Determine who gets current access to the target. -// -// If current initiator still asserts request, do nothing -// (keep current initiator). -// Otherwise check each initiator's request, starting from initiator 0 -// (highest priority). -// If there is no requests from initiators, park initiator 0. -// -assign req_won = req_cont ? req_r : - req_i[0] ? 3'd0 : - req_i[1] ? 3'd1 : - req_i[2] ? 3'd2 : - req_i[3] ? 3'd3 : - req_i[4] ? 3'd4 : - req_i[5] ? 3'd5 : - req_i[6] ? 3'd6 : - req_i[7] ? 3'd7 : 3'd0; - -// -// Check if current initiator still wants access to the target and if -// it does, assert req_cont. -// -always @(req_r or req_i) - case (req_r) // synopsys parallel_case - 3'd0: req_cont = req_i[0]; - 3'd1: req_cont = req_i[1]; - 3'd2: req_cont = req_i[2]; - 3'd3: req_cont = req_i[3]; - 3'd4: req_cont = req_i[4]; - 3'd5: req_cont = req_i[5]; - 3'd6: req_cont = req_i[6]; - 3'd7: req_cont = req_i[7]; - endcase - -// -// Register who has current access to the target. -// -always @(posedge wb_clk_i or posedge wb_rst_i) - if (wb_rst_i) - req_r <= #1 3'd0; - else - req_r <= #1 req_won; - -endmodule - -// -// Single initiator to multiple targets -// -module tc_si_to_mt ( - - i0_wb_cyc_i, - i0_wb_stb_i, - i0_wb_cab_i, - i0_wb_adr_i, - i0_wb_sel_i, - i0_wb_we_i, - i0_wb_dat_i, - i0_wb_dat_o, - i0_wb_ack_o, - i0_wb_err_o, - - t0_wb_cyc_o, - t0_wb_stb_o, - t0_wb_cab_o, - t0_wb_adr_o, - t0_wb_sel_o, - t0_wb_we_o, - t0_wb_dat_o, - t0_wb_dat_i, - t0_wb_ack_i, - t0_wb_err_i, - - t1_wb_cyc_o, - t1_wb_stb_o, - t1_wb_cab_o, - t1_wb_adr_o, - t1_wb_sel_o, - t1_wb_we_o, - t1_wb_dat_o, - t1_wb_dat_i, - t1_wb_ack_i, - t1_wb_err_i, - - t2_wb_cyc_o, - t2_wb_stb_o, - t2_wb_cab_o, - t2_wb_adr_o, - t2_wb_sel_o, - t2_wb_we_o, - t2_wb_dat_o, - t2_wb_dat_i, - t2_wb_ack_i, - t2_wb_err_i, - - t3_wb_cyc_o, - t3_wb_stb_o, - t3_wb_cab_o, - t3_wb_adr_o, - t3_wb_sel_o, - t3_wb_we_o, - t3_wb_dat_o, - t3_wb_dat_i, - t3_wb_ack_i, - t3_wb_err_i, - - t4_wb_cyc_o, - t4_wb_stb_o, - t4_wb_cab_o, - t4_wb_adr_o, - t4_wb_sel_o, - t4_wb_we_o, - t4_wb_dat_o, - t4_wb_dat_i, - t4_wb_ack_i, - t4_wb_err_i, - - t5_wb_cyc_o, - t5_wb_stb_o, - t5_wb_cab_o, - t5_wb_adr_o, - t5_wb_sel_o, - t5_wb_we_o, - t5_wb_dat_o, - t5_wb_dat_i, - t5_wb_ack_i, - t5_wb_err_i, - - t6_wb_cyc_o, - t6_wb_stb_o, - t6_wb_cab_o, - t6_wb_adr_o, - t6_wb_sel_o, - t6_wb_we_o, - t6_wb_dat_o, - t6_wb_dat_i, - t6_wb_ack_i, - t6_wb_err_i, - - t7_wb_cyc_o, - t7_wb_stb_o, - t7_wb_cab_o, - t7_wb_adr_o, - t7_wb_sel_o, - t7_wb_we_o, - t7_wb_dat_o, - t7_wb_dat_i, - t7_wb_ack_i, - t7_wb_err_i - -); - -// -// Parameters -// -parameter t0_addr_w = 3; -parameter t0_addr = 3'd0; -parameter t17_addr_w = 3; -parameter t1_addr = 3'd1; -parameter t2_addr = 3'd2; -parameter t3_addr = 3'd3; -parameter t4_addr = 3'd4; -parameter t5_addr = 3'd5; -parameter t6_addr = 3'd6; -parameter t7_addr = 3'd7; - -// -// I/O Ports -// - -// -// WB slave i/f connecting initiator 0 -// -input i0_wb_cyc_i; -input i0_wb_stb_i; -input i0_wb_cab_i; -input [`TC_AW-1:0] i0_wb_adr_i; -input [`TC_BSW-1:0] i0_wb_sel_i; -input i0_wb_we_i; -input [`TC_DW-1:0] i0_wb_dat_i; -output [`TC_DW-1:0] i0_wb_dat_o; -output i0_wb_ack_o; -output i0_wb_err_o; - -// -// WB master i/f connecting target 0 -// -output t0_wb_cyc_o; -output t0_wb_stb_o; -output t0_wb_cab_o; -output [`TC_AW-1:0] t0_wb_adr_o; -output [`TC_BSW-1:0] t0_wb_sel_o; -output t0_wb_we_o; -output [`TC_DW-1:0] t0_wb_dat_o; -input [`TC_DW-1:0] t0_wb_dat_i; -input t0_wb_ack_i; -input t0_wb_err_i; - -// -// WB master i/f connecting target 1 -// -output t1_wb_cyc_o; -output t1_wb_stb_o; -output t1_wb_cab_o; -output [`TC_AW-1:0] t1_wb_adr_o; -output [`TC_BSW-1:0] t1_wb_sel_o; -output t1_wb_we_o; -output [`TC_DW-1:0] t1_wb_dat_o; -input [`TC_DW-1:0] t1_wb_dat_i; -input t1_wb_ack_i; -input t1_wb_err_i; - -// -// WB master i/f connecting target 2 -// -output t2_wb_cyc_o; -output t2_wb_stb_o; -output t2_wb_cab_o; -output [`TC_AW-1:0] t2_wb_adr_o; -output [`TC_BSW-1:0] t2_wb_sel_o; -output t2_wb_we_o; -output [`TC_DW-1:0] t2_wb_dat_o; -input [`TC_DW-1:0] t2_wb_dat_i; -input t2_wb_ack_i; -input t2_wb_err_i; - -// -// WB master i/f connecting target 3 -// -output t3_wb_cyc_o; -output t3_wb_stb_o; -output t3_wb_cab_o; -output [`TC_AW-1:0] t3_wb_adr_o; -output [`TC_BSW-1:0] t3_wb_sel_o; -output t3_wb_we_o; -output [`TC_DW-1:0] t3_wb_dat_o; -input [`TC_DW-1:0] t3_wb_dat_i; -input t3_wb_ack_i; -input t3_wb_err_i; - -// -// WB master i/f connecting target 4 -// -output t4_wb_cyc_o; -output t4_wb_stb_o; -output t4_wb_cab_o; -output [`TC_AW-1:0] t4_wb_adr_o; -output [`TC_BSW-1:0] t4_wb_sel_o; -output t4_wb_we_o; -output [`TC_DW-1:0] t4_wb_dat_o; -input [`TC_DW-1:0] t4_wb_dat_i; -input t4_wb_ack_i; -input t4_wb_err_i; - -// -// WB master i/f connecting target 5 -// -output t5_wb_cyc_o; -output t5_wb_stb_o; -output t5_wb_cab_o; -output [`TC_AW-1:0] t5_wb_adr_o; -output [`TC_BSW-1:0] t5_wb_sel_o; -output t5_wb_we_o; -output [`TC_DW-1:0] t5_wb_dat_o; -input [`TC_DW-1:0] t5_wb_dat_i; -input t5_wb_ack_i; -input t5_wb_err_i; - -// -// WB master i/f connecting target 6 -// -output t6_wb_cyc_o; -output t6_wb_stb_o; -output t6_wb_cab_o; -output [`TC_AW-1:0] t6_wb_adr_o; -output [`TC_BSW-1:0] t6_wb_sel_o; -output t6_wb_we_o; -output [`TC_DW-1:0] t6_wb_dat_o; -input [`TC_DW-1:0] t6_wb_dat_i; -input t6_wb_ack_i; -input t6_wb_err_i; - -// -// WB master i/f connecting target 7 -// -output t7_wb_cyc_o; -output t7_wb_stb_o; -output t7_wb_cab_o; -output [`TC_AW-1:0] t7_wb_adr_o; -output [`TC_BSW-1:0] t7_wb_sel_o; -output t7_wb_we_o; -output [`TC_DW-1:0] t7_wb_dat_o; -input [`TC_DW-1:0] t7_wb_dat_i; -input t7_wb_ack_i; -input t7_wb_err_i; - -// -// Internal wires & registers -// -wire [`TC_IIN_W-1:0] i0_in; -wire [`TC_TIN_W-1:0] i0_out; -wire [`TC_IIN_W-1:0] t0_out, t1_out, - t2_out, t3_out, - t4_out, t5_out, - t6_out, t7_out; -wire [`TC_TIN_W-1:0] t0_in, t1_in, - t2_in, t3_in, - t4_in, t5_in, - t6_in, t7_in; -wire [7:0] req_t; - -// -// Group WB initiator 0 i/f inputs and outputs -// -assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_cab_i, i0_wb_adr_i, - i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i}; -assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out; - -// -// Group WB target 0 i/f inputs and outputs -// -assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_cab_o, t0_wb_adr_o, - t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out; -assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i}; - -// -// Group WB target 1 i/f inputs and outputs -// -assign {t1_wb_cyc_o, t1_wb_stb_o, t1_wb_cab_o, t1_wb_adr_o, - t1_wb_sel_o, t1_wb_we_o, t1_wb_dat_o} = t1_out; -assign t1_in = {t1_wb_dat_i, t1_wb_ack_i, t1_wb_err_i}; - -// -// Group WB target 2 i/f inputs and outputs -// -assign {t2_wb_cyc_o, t2_wb_stb_o, t2_wb_cab_o, t2_wb_adr_o, - t2_wb_sel_o, t2_wb_we_o, t2_wb_dat_o} = t2_out; -assign t2_in = {t2_wb_dat_i, t2_wb_ack_i, t2_wb_err_i}; - -// -// Group WB target 3 i/f inputs and outputs -// -assign {t3_wb_cyc_o, t3_wb_stb_o, t3_wb_cab_o, t3_wb_adr_o, - t3_wb_sel_o, t3_wb_we_o, t3_wb_dat_o} = t3_out; -assign t3_in = {t3_wb_dat_i, t3_wb_ack_i, t3_wb_err_i}; - -// -// Group WB target 4 i/f inputs and outputs -// -assign {t4_wb_cyc_o, t4_wb_stb_o, t4_wb_cab_o, t4_wb_adr_o, - t4_wb_sel_o, t4_wb_we_o, t4_wb_dat_o} = t4_out; -assign t4_in = {t4_wb_dat_i, t4_wb_ack_i, t4_wb_err_i}; - -// -// Group WB target 5 i/f inputs and outputs -// -assign {t5_wb_cyc_o, t5_wb_stb_o, t5_wb_cab_o, t5_wb_adr_o, - t5_wb_sel_o, t5_wb_we_o, t5_wb_dat_o} = t5_out; -assign t5_in = {t5_wb_dat_i, t5_wb_ack_i, t5_wb_err_i}; - -// -// Group WB target 6 i/f inputs and outputs -// -assign {t6_wb_cyc_o, t6_wb_stb_o, t6_wb_cab_o, t6_wb_adr_o, - t6_wb_sel_o, t6_wb_we_o, t6_wb_dat_o} = t6_out; -assign t6_in = {t6_wb_dat_i, t6_wb_ack_i, t6_wb_err_i}; - -// -// Group WB target 7 i/f inputs and outputs -// -assign {t7_wb_cyc_o, t7_wb_stb_o, t7_wb_cab_o, t7_wb_adr_o, - t7_wb_sel_o, t7_wb_we_o, t7_wb_dat_o} = t7_out; -assign t7_in = {t7_wb_dat_i, t7_wb_ack_i, t7_wb_err_i}; - -// -// Assign to WB target i/f outputs -// -// Either inputs from the initiator are assigned or zeros. -// -assign t0_out = req_t[0] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t1_out = req_t[1] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t2_out = req_t[2] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t3_out = req_t[3] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t4_out = req_t[4] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t5_out = req_t[5] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t6_out = req_t[6] ? i0_in : {`TC_IIN_W{1'b0}}; -assign t7_out = req_t[7] ? i0_in : {`TC_IIN_W{1'b0}}; - -// -// Assign to WB initiator i/f outputs -// -// Assign inputs from target to initiator outputs according to -// which target is accessed. If there is no request for a target, -// assign zeros. -// -assign i0_out = req_t[0] ? t0_in : - req_t[1] ? t1_in : - req_t[2] ? t2_in : - req_t[3] ? t3_in : - req_t[4] ? t4_in : - req_t[5] ? t5_in : - req_t[6] ? t6_in : - req_t[7] ? t7_in : {`TC_TIN_W{1'b0}}; - -// -// Determine which target is being accessed. -// -assign req_t[0] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t0_addr_w] == t0_addr); -assign req_t[1] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t1_addr); -assign req_t[2] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t2_addr); -assign req_t[3] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t3_addr); -assign req_t[4] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t4_addr); -assign req_t[5] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t5_addr); -assign req_t[6] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t6_addr); -assign req_t[7] = i0_wb_cyc_i & (i0_wb_adr_i[`TC_AW-1:`TC_AW-t17_addr_w] == t7_addr); - -endmodule

rtl/verilog/minsoc_tc_top.v Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: doc/minsoc.odt =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: doc/minsoc.odt =================================================================== --- doc/minsoc.odt (revision 2) +++ doc/minsoc.odt (nonexistent)

doc/minsoc.odt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: doc/minsoc.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: doc/minsoc.pdf =================================================================== --- doc/minsoc.pdf (revision 2) +++ doc/minsoc.pdf (nonexistent)

doc/minsoc.pdf Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: doc/lgpl-3.0.txt =================================================================== --- doc/lgpl-3.0.txt (revision 2) +++ doc/lgpl-3.0.txt (nonexistent) @@ -1,165 +0,0 @@ - GNU LESSER GENERAL PUBLIC LICENSE - Version 3, 29 June 2007 - - Copyright (C) 2007 Free Software Foundation, Inc. - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - - This version of the GNU Lesser General Public License incorporates -the terms and conditions of version 3 of the GNU General Public -License, supplemented by the additional permissions listed below. - - 0. Additional Definitions. - - As used herein, "this License" refers to version 3 of the GNU Lesser -General Public License, and the "GNU GPL" refers to version 3 of the GNU -General Public License. - - "The Library" refers to a covered work governed by this License, -other than an Application or a Combined Work as defined below. - - An "Application" is any work that makes use of an interface provided -by the Library, but which is not otherwise based on the Library. -Defining a subclass of a class defined by the Library is deemed a mode -of using an interface provided by the Library. - - A "Combined Work" is a work produced by combining or linking an -Application with the Library. The particular version of the Library -with which the Combined Work was made is also called the "Linked -Version". - - The "Minimal Corresponding Source" for a Combined Work means the -Corresponding Source for the Combined Work, excluding any source code -for portions of the Combined Work that, considered in isolation, are -based on the Application, and not on the Linked Version. - - The "Corresponding Application Code" for a Combined Work means the -object code and/or source code for the Application, including any data -and utility programs needed for reproducing the Combined Work from the -Application, but excluding the System Libraries of the Combined Work. - - 1. Exception to Section 3 of the GNU GPL. - - You may convey a covered work under sections 3 and 4 of this License -without being bound by section 3 of the GNU GPL. - - 2. Conveying Modified Versions. - - If you modify a copy of the Library, and, in your modifications, a -facility refers to a function or data to be supplied by an Application -that uses the facility (other than as an argument passed when the -facility is invoked), then you may convey a copy of the modified -version: - - a) under this License, provided that you make a good faith effort to - ensure that, in the event an Application does not supply the - function or data, the facility still operates, and performs - whatever part of its purpose remains meaningful, or - - b) under the GNU GPL, with none of the additional permissions of - this License applicable to that copy. - - 3. Object Code Incorporating Material from Library Header Files. - - The object code form of an Application may incorporate material from -a header file that is part of the Library. You may convey such object -code under terms of your choice, provided that, if the incorporated -material is not limited to numerical parameters, data structure -layouts and accessors, or small macros, inline functions and templates -(ten or fewer lines in length), you do both of the following: - - a) Give prominent notice with each copy of the object code that the - Library is used in it and that the Library and its use are - covered by this License. - - b) Accompany the object code with a copy of the GNU GPL and this license - document. - - 4. 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doc/lgpl-3.0.txt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/run/start_server =================================================================== --- sim/run/start_server (revision 2) +++ sim/run/start_server (nonexistent) @@ -1,2 +0,0 @@ -#!/bin/bash -adv_jtag_bridge -x0 -l 0:4 -c 0x8 -t vpi

sim/run/start_server Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/run/run_bench =================================================================== --- sim/run/run_bench (revision 2) +++ sim/run/run_bench (nonexistent) @@ -1,2 +0,0 @@ -#!/bin/bash -vvp -M ../../bench/verilog/vpi/ -mjp-io-vpi minsoc_bench +file_name=$1

sim/run/run_bench Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/run/generate_bench =================================================================== --- sim/run/generate_bench (revision 2) +++ sim/run/generate_bench (nonexistent) @@ -1,2 +0,0 @@ -#!/bin/bash -iverilog -c ../bin/minsoc_model_fast.txt -o minsoc_bench

sim/run/generate_bench Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/bin/minsoc_model_fast.txt =================================================================== --- sim/bin/minsoc_model_fast.txt (revision 2) +++ sim/bin/minsoc_model_fast.txt (nonexistent) @@ -1,135 +0,0 @@ -+incdir+../../bench/verilog -+incdir+../../bench/verilog/vpi -+incdir+../../rtl/verilog -+incdir+../../rtl/verilog/minsoc_startup -+incdir+../../rtl/verilog/or1200/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_rtl -+incdir+../../rtl/verilog/uart16550/rtl/verilog -+incdir+../../rtl/verilog/ethmac/rtl/verilog -../../bench/verilog/minsoc_bench_defines.v -../../bench/verilog/minsoc_bench.v -../../bench/verilog/minsoc_memory_model.v -#../../bench/verilog/tb_eth_defines.v -#../../bench/verilog/eth_phy_defines.v -#../../bench/verilog/eth_phy.v -../../bench/verilog/vpi/dbg_comm_vpi.v -../../rtl/verilog/minsoc_top.v -../../rtl/verilog/minsoc_startup/spi_top.v -../../rtl/verilog/minsoc_startup/spi_defines.v -../../rtl/verilog/minsoc_startup/spi_shift.v -../../rtl/verilog/minsoc_startup/spi_clgen.v -../../rtl/verilog/minsoc_startup/OR1K_startup_generic.v -../../rtl/verilog/minsoc_tc_top.v -../../rtl/verilog/minsoc_onchip_ram.v -../../rtl/verilog/minsoc_clock_manager.v -#../../rtl/verilog/minsoc_onchip_ram_top.v -../../rtl/verilog/minsoc_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_512x20.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_du.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rf.v -../../rtl/verilog/or1200/rtl/verilog/or1200_alu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_lsu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cpu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_gmultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_256x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tt.v -../../rtl/verilog/or1200/rtl/verilog/or1200_iwb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rfram_generic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_32x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_xcv_ram32x8d.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mem2reg.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_256x21.v -../../rtl/verilog/or1200/rtl/verilog/or1200_operandmuxes.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cfgr.v -../../rtl/verilog/or1200/rtl/verilog/or1200_if.v -../../rtl/verilog/or1200/rtl/verilog/or1200_qmem_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_genpc.v -../../rtl/verilog/or1200/rtl/verilog/or1200_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wbmux.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb_fifo.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sprs.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ctrl.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mult_mac.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_amultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_reg2mem.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_except.v -../../rtl/verilog/or1200/rtl/verilog/or1200_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_freeze.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_128x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_crc32.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_status_reg.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_defines.v -../../rtl/verilog/uart16550/rtl/verilog/uart_top.v -../../rtl/verilog/uart16550/rtl/verilog/uart_sync_flops.v -../../rtl/verilog/uart16550/rtl/verilog/uart_transmitter.v -../../rtl/verilog/uart16550/rtl/verilog/uart_debug_if.v -../../rtl/verilog/uart16550/rtl/verilog/uart_wb.v -../../rtl/verilog/uart16550/rtl/verilog/uart_receiver.v -../../rtl/verilog/uart16550/rtl/verilog/uart_tfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_regs.v -../../rtl/verilog/uart16550/rtl/verilog/uart_rfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_defines.v -../../rtl/verilog/uart16550/rtl/verilog/raminfr.v -../../rtl/verilog/ethmac/rtl/verilog/eth_cop.v -../../rtl/verilog/ethmac/rtl/verilog/eth_registers.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_miim.v -../../rtl/verilog/ethmac/rtl/verilog/eth_top.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxaddrcheck.v -../../rtl/verilog/ethmac/rtl/verilog/eth_outputcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_wishbone.v -../../rtl/verilog/ethmac/rtl/verilog/eth_maccontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_defines.v -../../rtl/verilog/ethmac/rtl/verilog/eth_spram_256x32.v -../../rtl/verilog/ethmac/rtl/verilog/eth_shiftreg.v -../../rtl/verilog/ethmac/rtl/verilog/eth_clockgen.v -../../rtl/verilog/ethmac/rtl/verilog/eth_crc.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxcounters.v -../../rtl/verilog/ethmac/rtl/verilog/eth_macstatus.v -../../rtl/verilog/ethmac/rtl/verilog/eth_random.v -../../rtl/verilog/ethmac/rtl/verilog/eth_register.v -../../rtl/verilog/ethmac/rtl/verilog/eth_fifo.v -../../rtl/verilog/ethmac/rtl/verilog/eth_receivecontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_transmitcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txcounters.v

sim/bin/minsoc_model_fast.txt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/bin/minsoc_memory_complete.txt =================================================================== --- sim/bin/minsoc_memory_complete.txt (revision 2) +++ sim/bin/minsoc_memory_complete.txt (nonexistent) @@ -1,135 +0,0 @@ -+incdir+../../bench/verilog -+incdir+../../bench/verilog/vpi -+incdir+../../rtl/verilog -+incdir+../../rtl/verilog/minsoc_startup -+incdir+../../rtl/verilog/or1200/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_rtl -+incdir+../../rtl/verilog/uart16550/rtl/verilog -+incdir+../../rtl/verilog/ethmac/rtl/verilog -../../bench/verilog/minsoc_bench_defines.v -../../bench/verilog/minsoc_bench.v -#../../bench/verilog/minsoc_memory_model.v -../../bench/verilog/tb_eth_defines.v -../../bench/verilog/eth_phy_defines.v -../../bench/verilog/eth_phy.v -../../bench/verilog/vpi/dbg_comm_vpi.v -../../rtl/verilog/minsoc_top.v -../../rtl/verilog/minsoc_startup/spi_top.v -../../rtl/verilog/minsoc_startup/spi_defines.v -../../rtl/verilog/minsoc_startup/spi_shift.v -../../rtl/verilog/minsoc_startup/spi_clgen.v -../../rtl/verilog/minsoc_startup/OR1K_startup_generic.v -../../rtl/verilog/minsoc_tc_top.v -../../rtl/verilog/minsoc_onchip_ram.v -../../rtl/verilog/minsoc_clock_manager.v -../../rtl/verilog/minsoc_onchip_ram_top.v -../../rtl/verilog/minsoc_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_512x20.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_du.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rf.v -../../rtl/verilog/or1200/rtl/verilog/or1200_alu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_lsu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cpu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_gmultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_256x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tt.v -../../rtl/verilog/or1200/rtl/verilog/or1200_iwb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rfram_generic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_32x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_xcv_ram32x8d.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mem2reg.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_256x21.v -../../rtl/verilog/or1200/rtl/verilog/or1200_operandmuxes.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cfgr.v -../../rtl/verilog/or1200/rtl/verilog/or1200_if.v -../../rtl/verilog/or1200/rtl/verilog/or1200_qmem_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_genpc.v -../../rtl/verilog/or1200/rtl/verilog/or1200_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wbmux.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb_fifo.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sprs.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ctrl.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mult_mac.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_amultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_reg2mem.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_except.v -../../rtl/verilog/or1200/rtl/verilog/or1200_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_freeze.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_128x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_crc32.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_status_reg.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_defines.v -../../rtl/verilog/uart16550/rtl/verilog/uart_top.v -../../rtl/verilog/uart16550/rtl/verilog/uart_sync_flops.v -../../rtl/verilog/uart16550/rtl/verilog/uart_transmitter.v -../../rtl/verilog/uart16550/rtl/verilog/uart_debug_if.v -../../rtl/verilog/uart16550/rtl/verilog/uart_wb.v -../../rtl/verilog/uart16550/rtl/verilog/uart_receiver.v -../../rtl/verilog/uart16550/rtl/verilog/uart_tfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_regs.v -../../rtl/verilog/uart16550/rtl/verilog/uart_rfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_defines.v -../../rtl/verilog/uart16550/rtl/verilog/raminfr.v -../../rtl/verilog/ethmac/rtl/verilog/eth_cop.v -../../rtl/verilog/ethmac/rtl/verilog/eth_registers.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_miim.v -../../rtl/verilog/ethmac/rtl/verilog/eth_top.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxaddrcheck.v -../../rtl/verilog/ethmac/rtl/verilog/eth_outputcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_wishbone.v -../../rtl/verilog/ethmac/rtl/verilog/eth_maccontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_defines.v -../../rtl/verilog/ethmac/rtl/verilog/eth_spram_256x32.v -../../rtl/verilog/ethmac/rtl/verilog/eth_shiftreg.v -../../rtl/verilog/ethmac/rtl/verilog/eth_clockgen.v -../../rtl/verilog/ethmac/rtl/verilog/eth_crc.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxcounters.v -../../rtl/verilog/ethmac/rtl/verilog/eth_macstatus.v -../../rtl/verilog/ethmac/rtl/verilog/eth_random.v -../../rtl/verilog/ethmac/rtl/verilog/eth_register.v -../../rtl/verilog/ethmac/rtl/verilog/eth_fifo.v -../../rtl/verilog/ethmac/rtl/verilog/eth_receivecontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_transmitcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txcounters.v

sim/bin/minsoc_memory_complete.txt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/bin/minsoc_memory_fast.txt =================================================================== --- sim/bin/minsoc_memory_fast.txt (revision 2) +++ sim/bin/minsoc_memory_fast.txt (nonexistent) @@ -1,135 +0,0 @@ -+incdir+../../bench/verilog -+incdir+../../bench/verilog/vpi -+incdir+../../rtl/verilog -+incdir+../../rtl/verilog/minsoc_startup -+incdir+../../rtl/verilog/or1200/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_rtl -+incdir+../../rtl/verilog/uart16550/rtl/verilog -+incdir+../../rtl/verilog/ethmac/rtl/verilog -../../bench/verilog/minsoc_bench_defines.v -../../bench/verilog/minsoc_bench.v -#../../bench/verilog/minsoc_memory_model.v -#../../bench/verilog/tb_eth_defines.v -#../../bench/verilog/eth_phy_defines.v -#../../bench/verilog/eth_phy.v -../../bench/verilog/vpi/dbg_comm_vpi.v -../../rtl/verilog/minsoc_top.v -../../rtl/verilog/minsoc_startup/spi_top.v -../../rtl/verilog/minsoc_startup/spi_defines.v -../../rtl/verilog/minsoc_startup/spi_shift.v -../../rtl/verilog/minsoc_startup/spi_clgen.v -../../rtl/verilog/minsoc_startup/OR1K_startup_generic.v -../../rtl/verilog/minsoc_tc_top.v -../../rtl/verilog/minsoc_onchip_ram.v -../../rtl/verilog/minsoc_clock_manager.v -../../rtl/verilog/minsoc_onchip_ram_top.v -../../rtl/verilog/minsoc_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_512x20.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_du.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rf.v -../../rtl/verilog/or1200/rtl/verilog/or1200_alu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_lsu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cpu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_gmultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_256x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tt.v -../../rtl/verilog/or1200/rtl/verilog/or1200_iwb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rfram_generic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_32x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_xcv_ram32x8d.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mem2reg.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_256x21.v -../../rtl/verilog/or1200/rtl/verilog/or1200_operandmuxes.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cfgr.v -../../rtl/verilog/or1200/rtl/verilog/or1200_if.v -../../rtl/verilog/or1200/rtl/verilog/or1200_qmem_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_genpc.v -../../rtl/verilog/or1200/rtl/verilog/or1200_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wbmux.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb_fifo.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sprs.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ctrl.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mult_mac.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_amultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_reg2mem.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_except.v -../../rtl/verilog/or1200/rtl/verilog/or1200_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_freeze.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_128x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_crc32.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_status_reg.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_defines.v -../../rtl/verilog/uart16550/rtl/verilog/uart_top.v -../../rtl/verilog/uart16550/rtl/verilog/uart_sync_flops.v -../../rtl/verilog/uart16550/rtl/verilog/uart_transmitter.v -../../rtl/verilog/uart16550/rtl/verilog/uart_debug_if.v -../../rtl/verilog/uart16550/rtl/verilog/uart_wb.v -../../rtl/verilog/uart16550/rtl/verilog/uart_receiver.v -../../rtl/verilog/uart16550/rtl/verilog/uart_tfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_regs.v -../../rtl/verilog/uart16550/rtl/verilog/uart_rfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_defines.v -../../rtl/verilog/uart16550/rtl/verilog/raminfr.v -../../rtl/verilog/ethmac/rtl/verilog/eth_cop.v -../../rtl/verilog/ethmac/rtl/verilog/eth_registers.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_miim.v -../../rtl/verilog/ethmac/rtl/verilog/eth_top.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxaddrcheck.v -../../rtl/verilog/ethmac/rtl/verilog/eth_outputcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_wishbone.v -../../rtl/verilog/ethmac/rtl/verilog/eth_maccontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_defines.v -../../rtl/verilog/ethmac/rtl/verilog/eth_spram_256x32.v -../../rtl/verilog/ethmac/rtl/verilog/eth_shiftreg.v -../../rtl/verilog/ethmac/rtl/verilog/eth_clockgen.v -../../rtl/verilog/ethmac/rtl/verilog/eth_crc.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxcounters.v -../../rtl/verilog/ethmac/rtl/verilog/eth_macstatus.v -../../rtl/verilog/ethmac/rtl/verilog/eth_random.v -../../rtl/verilog/ethmac/rtl/verilog/eth_register.v -../../rtl/verilog/ethmac/rtl/verilog/eth_fifo.v -../../rtl/verilog/ethmac/rtl/verilog/eth_receivecontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_transmitcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txcounters.v

sim/bin/minsoc_memory_fast.txt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/bin/minsoc_model_complete.txt =================================================================== --- sim/bin/minsoc_model_complete.txt (revision 2) +++ sim/bin/minsoc_model_complete.txt (nonexistent) @@ -1,135 +0,0 @@ -+incdir+../../bench/verilog -+incdir+../../bench/verilog/vpi -+incdir+../../rtl/verilog -+incdir+../../rtl/verilog/minsoc_startup -+incdir+../../rtl/verilog/or1200/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog -+incdir+../../rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_rtl -+incdir+../../rtl/verilog/uart16550/rtl/verilog -+incdir+../../rtl/verilog/ethmac/rtl/verilog -../../bench/verilog/minsoc_bench_defines.v -../../bench/verilog/minsoc_bench.v -../../bench/verilog/minsoc_memory_model.v -../../bench/verilog/tb_eth_defines.v -../../bench/verilog/eth_phy_defines.v -../../bench/verilog/eth_phy.v -../../bench/verilog/vpi/dbg_comm_vpi.v -../../rtl/verilog/minsoc_top.v -../../rtl/verilog/minsoc_startup/spi_top.v -../../rtl/verilog/minsoc_startup/spi_defines.v -../../rtl/verilog/minsoc_startup/spi_shift.v -../../rtl/verilog/minsoc_startup/spi_clgen.v -../../rtl/verilog/minsoc_startup/OR1K_startup_generic.v -../../rtl/verilog/minsoc_tc_top.v -../../rtl/verilog/minsoc_onchip_ram.v -../../rtl/verilog/minsoc_clock_manager.v -#../../rtl/verilog/minsoc_onchip_ram_top.v -../../rtl/verilog/minsoc_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_512x20.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_du.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rf.v -../../rtl/verilog/or1200/rtl/verilog/or1200_alu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_lsu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cpu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_gmultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_256x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tt.v -../../rtl/verilog/or1200/rtl/verilog/or1200_iwb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_rfram_generic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_immu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_tag.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_32x24.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_xcv_ram32x8d.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x8.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mem2reg.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_256x21.v -../../rtl/verilog/or1200/rtl/verilog/or1200_operandmuxes.v -../../rtl/verilog/or1200/rtl/verilog/or1200_pic.v -../../rtl/verilog/or1200/rtl/verilog/or1200_cfgr.v -../../rtl/verilog/or1200/rtl/verilog/or1200_if.v -../../rtl/verilog/or1200/rtl/verilog/or1200_qmem_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_genpc.v -../../rtl/verilog/or1200/rtl/verilog/or1200_defines.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wbmux.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dmmu_tlb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb_fifo.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sprs.v -../../rtl/verilog/or1200/rtl/verilog/or1200_tpram_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ctrl.v -../../rtl/verilog/or1200/rtl/verilog/or1200_sb.v -../../rtl/verilog/or1200/rtl/verilog/or1200_mult_mac.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_amultp2_32x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_reg2mem.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_2048x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_except.v -../../rtl/verilog/or1200/rtl/verilog/or1200_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_ic_top.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_ram.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_1024x32_bw.v -../../rtl/verilog/or1200/rtl/verilog/or1200_freeze.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_128x32.v -../../rtl/verilog/or1200/rtl/verilog/or1200_dc_fsm.v -../../rtl/verilog/or1200/rtl/verilog/or1200_wb_biu.v -../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_module.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_wb_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_crc32.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_biu.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_defines.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_or1k_status_reg.v -../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog/adbg_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_top.v -../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog/tap_defines.v -../../rtl/verilog/uart16550/rtl/verilog/uart_top.v -../../rtl/verilog/uart16550/rtl/verilog/uart_sync_flops.v -../../rtl/verilog/uart16550/rtl/verilog/uart_transmitter.v -../../rtl/verilog/uart16550/rtl/verilog/uart_debug_if.v -../../rtl/verilog/uart16550/rtl/verilog/uart_wb.v -../../rtl/verilog/uart16550/rtl/verilog/uart_receiver.v -../../rtl/verilog/uart16550/rtl/verilog/uart_tfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_regs.v -../../rtl/verilog/uart16550/rtl/verilog/uart_rfifo.v -../../rtl/verilog/uart16550/rtl/verilog/uart_defines.v -../../rtl/verilog/uart16550/rtl/verilog/raminfr.v -../../rtl/verilog/ethmac/rtl/verilog/eth_cop.v -../../rtl/verilog/ethmac/rtl/verilog/eth_registers.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_miim.v -../../rtl/verilog/ethmac/rtl/verilog/eth_top.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxaddrcheck.v -../../rtl/verilog/ethmac/rtl/verilog/eth_outputcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txethmac.v -../../rtl/verilog/ethmac/rtl/verilog/eth_wishbone.v -../../rtl/verilog/ethmac/rtl/verilog/eth_maccontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txstatem.v -../../rtl/verilog/ethmac/rtl/verilog/eth_defines.v -../../rtl/verilog/ethmac/rtl/verilog/eth_spram_256x32.v -../../rtl/verilog/ethmac/rtl/verilog/eth_shiftreg.v -../../rtl/verilog/ethmac/rtl/verilog/eth_clockgen.v -../../rtl/verilog/ethmac/rtl/verilog/eth_crc.v -../../rtl/verilog/ethmac/rtl/verilog/eth_rxcounters.v -../../rtl/verilog/ethmac/rtl/verilog/eth_macstatus.v -../../rtl/verilog/ethmac/rtl/verilog/eth_random.v -../../rtl/verilog/ethmac/rtl/verilog/eth_register.v -../../rtl/verilog/ethmac/rtl/verilog/eth_fifo.v -../../rtl/verilog/ethmac/rtl/verilog/eth_receivecontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_transmitcontrol.v -../../rtl/verilog/ethmac/rtl/verilog/eth_txcounters.v

sim/bin/minsoc_model_complete.txt Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sim/results/wave.do.sav =================================================================== --- sim/results/wave.do.sav (revision 2) +++ sim/results/wave.do.sav (nonexistent) @@ -1,49 +0,0 @@ -[size] 1280 1001 -[pos] -1 -1 -*-29.000000 16828000000 285000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -[treeopen] minsoc_bench. -[treeopen] minsoc_bench.minsoc_top_0. -@28 -minsoc_bench.reset -minsoc_bench.minsoc_top_0.or1200_top.iwb_cyc_o -minsoc_bench.minsoc_top_0.or1200_top.iwb_stb_o -minsoc_bench.minsoc_top_0.or1200_top.iwb_we_o -@22 -minsoc_bench.minsoc_top_0.or1200_top.iwb_adr_o[31:0] -minsoc_bench.minsoc_top_0.or1200_top.iwb_dat_i[31:0] -@28 -minsoc_bench.minsoc_top_0.or1200_top.iwb_ack_i -minsoc_bench.minsoc_top_0.or1200_top.dwb_cyc_o -minsoc_bench.minsoc_top_0.or1200_top.dwb_stb_o -minsoc_bench.minsoc_top_0.or1200_top.dwb_we_o -@22 -minsoc_bench.minsoc_top_0.or1200_top.dwb_adr_o[31:0] -minsoc_bench.minsoc_top_0.or1200_top.dwb_dat_o[31:0] -@28 -minsoc_bench.minsoc_top_0.or1200_top.dwb_ack_i -@22 -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_sprs.sr[15:0] -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.rf_dataa[31:0] -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.rf_datab[31:0] -@28 -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.flag -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.flag_we -@22 -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.result[31:0] -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.alu_op[3:0] -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.operand_a[31:0] -minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.operand_b[31:0] -@28 -minsoc_bench.uart_stx -minsoc_bench.minsoc_top_0.uart_top.wb_cyc_i -minsoc_bench.minsoc_top_0.uart_top.wb_stb_i -minsoc_bench.minsoc_top_0.uart_top.wb_we_i -@22 -minsoc_bench.minsoc_top_0.uart_top.wb_adr_i[4:0] -minsoc_bench.minsoc_top_0.uart_top.wb_dat8_i[7:0] -minsoc_bench.minsoc_top_0.uart_top.wb_dat8_o[7:0] -@28 -minsoc_bench.minsoc_top_0.uart_top.wb_ack_o -minsoc_bench.minsoc_top_0.spi_flash_ss[1:0] -minsoc_bench.minsoc_top_0.spi_flash_sclk -minsoc_bench.minsoc_top_0.spi_flash_miso

sim/results/wave.do.sav Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: backend/spartan3a_dsp_kit.ucf =================================================================== --- backend/spartan3a_dsp_kit.ucf (revision 2) +++ backend/spartan3a_dsp_kit.ucf (nonexistent) @@ -1,60 +0,0 @@ -########################### -## -## Global signals -## -net "clk" loc = "f13"; #125MHz clock -net "reset" loc = "j17"; #SW5 -########################### - -########################### -## -## UART -## -net "uart_stx" loc = "p22"; -net "uart_srx" loc = "n21"; -########################### - -########################### -## -## ETH -## -NET "eth_txd(3)" LOC = "b1"; -NET "eth_txd(2)" LOC = "b2"; -NET "eth_txd(1)" LOC = "j9"; -NET "eth_txd(0)" LOC = "j8"; - -NET "eth_tx_en" LOC = "d3"; -NET "eth_tx_clk" LOC = "p2"; -NET "eth_tx_er" LOC = "e4"; - -NET "eth_rxd(3)" LOC = "d2"; -NET "eth_rxd(2)" LOC = "g5"; -NET "eth_rxd(1)" LOC = "g2"; -NET "eth_rxd(0)" LOC = "c2"; - -NET "eth_rx_er" LOC = "j3"; -NET "eth_rx_dv" LOC = "d1"; - -NET "eth_rx_clk" LOC = "p1"; - -NET "eth_mdio" LOC = "f5" | PULLUP; -NET "eth_crs" LOC = "g1"; -NET "eth_col" LOC = "y3"; -NET "eth_mdc" LOC = "f4"; - -NET "eth_trste" LOC = "g4"; - -NET "eth_fds_mdint" LOC = "j1"; -########################### - -########################### -## -## JTAG -## -#net "jtag_tms" loc = "aa23"; #SAM D0 -#net "jtag_tdi" loc = "u20"; #SAM D2 -#net "jtag_tdo" loc = "aa25"; #SAM D4 -#net "jtag_tck" loc = "u18" | CLOCK_DEDICATED_ROUTE = FALSE; #SAM D6 -#net "jtag_gnd" loc = "y23"; #SAM D8 -#net "jtag_vref" loc = "t20"; #SAM D10 -###########################

backend/spartan3a_dsp_kit.ucf Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: backend/spartan3e_starter_kit.ucf =================================================================== --- backend/spartan3e_starter_kit.ucf (revision 2) +++ backend/spartan3e_starter_kit.ucf (nonexistent) @@ -1,64 +0,0 @@ -# -# Soldered 50MHz clock. -# -NET "clk" LOC = "C9" | IOSTANDARD = LVTTL; - -# -# Use button "south" as reset. -# -NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ; - -# -# UART serial port (RS232 DCE) - connector DB9 female. -# -NET "uart_srx" LOC = "R7" | IOSTANDARD = LVTTL ; -NET "uart_stx" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ; - -########################### -## -## ETH -## -#NET "eth_txd(3)" LOC = "t5"; -#NET "eth_txd(2)" LOC = "r5"; -#NET "eth_txd(1)" LOC = "t15"; -#NET "eth_txd(0)" LOC = "r11"; -# -#NET "eth_tx_en" LOC = "p15"; -#NET "eth_tx_clk" LOC = "t7"; -#NET "eth_tx_er" LOC = "r6"; -# -#NET "eth_rxd(3)" LOC = "v14"; -#NET "eth_rxd(2)" LOC = "u11"; -#NET "eth_rxd(1)" LOC = "t11"; -#NET "eth_rxd(0)" LOC = "v8"; -# -#NET "eth_rx_er" LOC = "u14"; -#NET "eth_rx_dv" LOC = "v2"; -# -#NET "eth_rx_clk" LOC = "v3"; -# -#NET "eth_mdio" LOC = "u5" | PULLUP; -#NET "eth_crs" LOC = "u13"; -#NET "eth_col" LOC = "u6"; -#NET "eth_mdc" LOC = "p9"; -# -#NET "eth_trste" LOC = "n2"; #put it to a non connected FPGA pin (starter kit schematic BANK3) -# -#NET "eth_fds_mdint" LOC = "n1" | PULLUP; #put it to a non connected FPGA pin (starter kit schematic BANK3)(pullup not to generate interrupts) -########################### - -# -# JTAG signals - on J4 6-pin accessory header. -# - -#NET "jtag_tms" LOC = "D7" | IOSTANDARD = LVCMOS33 | PULLDOWN ; -#NET "jtag_tdi" LOC = "C7" | IOSTANDARD = LVCMOS33 | PULLDOWN ; -#NET "jtag_tdo" LOC = "F8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ; -#NET "jtag_tck" LOC = "E8" | IOSTANDARD = LVCMOS33 | PULLDOWN ; - -#net "jtag_gnd" loc = "k2"; #put it to a non connected FPGA pin (starter kit schematic BANK3) -#net "jtag_vref" loc = "k7"; #put it to a non connected FPGA pin (starter kit schematic BANK3) - -# -# End of file. -#

backend/spartan3e_starter_kit.ucf Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/uart/uart.c =================================================================== --- sw/uart/uart.c (revision 2) +++ sw/uart/uart.c (nonexistent) @@ -1,107 +0,0 @@ -#include "../support/support.h" -#include "../support/board.h" -#include "../support/uart.h" - -#include "../support/spr_defs.h" - -void uart_print_str(char *); -void uart_print_long(unsigned long); - -// Dummy or32 except vectors -void buserr_except(){} -void dpf_except(){} -void ipf_except(){} -void lpint_except(){} -void align_except(){} -void illegal_except(){} -/*void hpint_except(){ - -}*/ -void dtlbmiss_except(){} -void itlbmiss_except(){} -void range_except(){} -void syscall_except(){} -void res1_except(){} -void trap_except(){} -void res2_except(){} - - -void uart_interrupt() -{ - char lala; - unsigned char interrupt_id; - interrupt_id = REG8(UART_BASE + UART_IIR); - if ( interrupt_id & UART_IIR_RDI ) - { - lala = uart_getc(); - uart_putc(lala+1); - } -} - - -void uart_print_str(char *p) -{ - while(*p != 0) { - uart_putc(*p); - p++; - } -} - -void uart_print_long(unsigned long ul) -{ - int i; - char c; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - uart_putc(c); - } - -} - -void uart_print_short(unsigned long ul) -{ - int i; - char c; - char flag=0; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - if ((c != '0') || (i==7)) - flag=1; - if(flag) - uart_putc(c); - } - -} - - - -int main() -{ - uart_init(); - - int_init(); - int_add(2,&uart_interrupt); - - /* We can't use printf because in this simple example - we don't link C library. */ - uart_print_str("Hello World.\n\r"); - - report(0xdeaddead); - or32_exit(0); -}

sw/uart/uart.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/uart/Makefile =================================================================== --- sw/uart/Makefile (revision 2) +++ sw/uart/Makefile (nonexistent) @@ -1,23 +0,0 @@ -include ../support/Makefile.inc -cases = uart-nocache uart-icdc -common = ../support/libsupport.a ../support/except.o - -all: $(cases) - -uart-nocache: uart.o ../support/reset-nocache.o $(common) - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 - $(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin - ../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex - ../utils/bin2vmem $@.bin > $@.vmem - - -uart-icdc: uart.o ../support/reset-icdc.o - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 $(common) - $(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin - ../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex - ../utils/bin2vmem $@.bin > $@.vmem - - -uart.o: uart.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ -

sw/uart/Makefile Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/uart/uart.h =================================================================== --- sw/uart/uart.h (revision 2) +++ sw/uart/uart.h (nonexistent)

sw/uart/uart.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/int.c =================================================================== --- sw/support/int.c (revision 2) +++ sw/support/int.c (nonexistent) @@ -1,82 +0,0 @@ -/* This file is part of test microkernel for OpenRISC 1000. */ -/* (C) 2001 Simon Srot, srot@opencores.org */ - -#include "support.h" -#include "spr_defs.h" -#include "int.h" - -#ifdef OR1K - -/* Interrupt handlers table */ -struct ihnd int_handlers[MAX_INT_HANDLERS]; - -/* Initialize routine */ -int int_init() -{ - int i; - - for(i = 0; i < MAX_INT_HANDLERS; i++) { - int_handlers[i].handler = 0; - int_handlers[i].arg = 0; - } - mtspr(SPR_PICMR, 0x00000000); - - //set OR1200 to accept exceptions - mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_IEE); - - return 0; -} - -/* Add interrupt handler */ -int int_add(unsigned long vect, void (* handler)(void *), void *arg) -{ - if(vect >= MAX_INT_HANDLERS) - return -1; - - int_handlers[vect].handler = handler; - int_handlers[vect].arg = arg; - - mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect)); - - return 0; -} - -/* Disable interrupt */ -int int_disable(unsigned long vect) -{ - if(vect >= MAX_INT_HANDLERS) - return -1; - - mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect)); - - return 0; -} - -/* Enable interrupt */ -int int_enable(unsigned long vect) -{ - if(vect >= MAX_INT_HANDLERS) - return -1; - - mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (0x00000001L << vect)); - - return 0; -} - -/* Main interrupt handler */ -void int_main() -{ - unsigned long picsr = mfspr(SPR_PICSR); - unsigned long i = 0; - - mtspr(SPR_PICSR, 0); - - while(i < 32) { - if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) { - (*int_handlers[i].handler)(int_handlers[i].arg); - } - i++; - } -} - -#endif

sw/support/int.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/Makefile =================================================================== --- sw/support/Makefile (revision 2) +++ sw/support/Makefile (nonexistent) @@ -1,37 +0,0 @@ -include Makefile.inc - -all: libsupport.a reset-nocache.o reset-ic.o reset-dc.o reset-icdc.o - -libsupport.a: support.o int.o except.o uart.o vfnprintf.o - $(OR32_TOOL_PREFIX)-ar cru libsupport.a support.o except.o int.o uart.o vfnprintf.o - $(OR32_TOOL_PREFIX)-ranlib libsupport.a - -support.o: support.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $? - -reset-nocache.o: reset.S - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -DIC=0 -DDC=0 -o $@ $? - -reset-dc.o: reset.S - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -DIC=0 -DDC=1 -o $@ $? - -reset-ic.o: reset.S - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -DIC=1 -DDC=0 -o $@ $? - -reset-icdc.o: reset.S - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -DIC=1 -DDC=1 -o $@ $? - -except.o: except.S - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $? - -uart.o: uart.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $? - -#snprintf.o: snprintf.c -# $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -O2 -c -o $@ $? - -vfnprintf.o: vfnprintf.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $? - -int.o: int.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) -c -o $@ $?

sw/support/Makefile Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/board.h =================================================================== --- sw/support/board.h (revision 2) +++ sw/support/board.h (nonexistent) @@ -1,47 +0,0 @@ -#ifndef _BOARD_H_ -#define _BOARD_H_ - -#define MC_ENABLED 0 - -#define IC_ENABLE 0 -#define IC_SIZE 8192 -#define DC_ENABLE 0 -#define DC_SIZE 8192 - - -#define IN_CLK 25000000 - -#define TICKS_PER_SEC 100 - -#define STACK_SIZE 0x01000 - -#define UART_BAUD_RATE 115200 - -#define UART_BASE 0x90000000 -#define UART_IRQ 2 -#define ETH_BASE 0x92000000 -#define ETH_IRQ 4 -#define MC_BASE_ADDR 0x60000000 -#define SPI_BASE 0xa0000000 - -#define ETH_DATA_BASE 0xa8000000 /* Address for ETH_DATA */ - -#define BOARD_DEF_IP 0x0a010185 -#define BOARD_DEF_MASK 0xff000000 -#define BOARD_DEF_GW 0x0a010101 - -#define ETH_MACADDR0 0x00 -#define ETH_MACADDR1 0x12 -#define ETH_MACADDR2 0x34 -#define ETH_MACADDR3 0x56 -#define ETH_MACADDR4 0x78 -#define ETH_MACADDR5 0x9a - - -/* Whether online help is available -- saves space */ -#define HELP_ENABLED 1 - -/* Whether self check is enabled */ -#define SELF_CHECK 1 - -#endif

sw/support/board.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/int.h =================================================================== --- sw/support/int.h (revision 2) +++ sw/support/int.h (nonexistent) @@ -1,15 +0,0 @@ - -/* Number of interrupt handlers */ -#define MAX_INT_HANDLERS 32 - -/* Handler entry */ -struct ihnd { - void (*handler)(void *); - void *arg; -}; - -/* Add interrupt handler */ -int int_add(unsigned long vect, void (* handler)(void *), void *arg); - -/* Initialize routine */ -int int_init();

sw/support/int.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/reset.S =================================================================== --- sw/support/reset.S (revision 2) +++ sw/support/reset.S (nonexistent) @@ -1,113 +0,0 @@ -/* Support file for c based tests */ -#include "spr_defs.h" -#include "board.h" -#include "mc.h" - - .section .stack - .space STACK_SIZE -_stack: - - .section .reset, "ax" - - .org 0x100 -_reset_vector: - l.nop - l.nop - l.addi r2,r0,0x0 - l.addi r3,r0,0x0 - l.addi r4,r0,0x0 - l.addi r5,r0,0x0 - l.addi r6,r0,0x0 - l.addi r7,r0,0x0 - l.addi r8,r0,0x0 - l.addi r9,r0,0x0 - l.addi r10,r0,0x0 - l.addi r11,r0,0x0 - l.addi r12,r0,0x0 - l.addi r13,r0,0x0 - l.addi r14,r0,0x0 - l.addi r15,r0,0x0 - l.addi r16,r0,0x0 - l.addi r17,r0,0x0 - l.addi r18,r0,0x0 - l.addi r19,r0,0x0 - l.addi r20,r0,0x0 - l.addi r21,r0,0x0 - l.addi r22,r0,0x0 - l.addi r23,r0,0x0 - l.addi r24,r0,0x0 - l.addi r25,r0,0x0 - l.addi r26,r0,0x0 - l.addi r27,r0,0x0 - l.addi r28,r0,0x0 - l.addi r29,r0,0x0 - l.addi r30,r0,0x0 - l.addi r31,r0,0x0 - -/* - l.movhi r3,hi(MC_BASE_ADDR) - l.ori r3,r3,MC_BA_MASK - l.addi r5,r0,0x00 - l.sw 0(r3),r5 - */ - l.movhi r3,hi(_start) - l.ori r3,r3,lo(_start) - l.jr r3 - l.nop - - .section .text - -_start: - -.if IC | DC - /* Flush IC and/or DC */ - l.addi r10,r0,0 - l.addi r11,r0,0 - l.addi r12,r0,0 -.if IC - l.addi r11,r0,IC_SIZE -.endif -.if DC - l.addi r12,r0,DC_SIZE -.endif - l.sfleu r12,r11 - l.bf loop - l.nop - l.add r11,r0,r12 -loop: -.if IC - l.mtspr r0,r10,SPR_ICBIR -.endif -.if DC - l.mtspr r0,r10,SPR_DCBIR -.endif - l.sfne r10,r11 - l.bf loop - l.addi r10,r10,16 - - /* Enable IC and/or DC */ - l.addi r10,r0,(SPR_SR_SM) -.if IC - l.ori r10,r10,(SPR_SR_ICE) -.endif -.if DC - l.ori r10,r10,(SPR_SR_DCE) -.endif - l.mtspr r0,r10,SPR_SR - l.nop - l.nop - l.nop - l.nop - l.nop -.endif - - /* Set stack pointer */ - l.movhi r1,hi(_stack) - l.ori r1,r1,lo(_stack) - - /* Jump to main */ - l.movhi r2,hi(_reset) - l.ori r2,r2,lo(_reset) - l.jr r2 - l.nop -

sw/support/reset.S Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/mc.h =================================================================== --- sw/support/mc.h (revision 2) +++ sw/support/mc.h (nonexistent) @@ -1,111 +0,0 @@ -/* mc.h -- Simulation of Memory Controller - Copyright (C) 2001 by Marko Mlinar, markom@opencores.org - - This file is part of OpenRISC 1000 Architectural Simulator. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - -/* Prototypes */ -#ifndef __MC_H -#define __MC_H - -#define N_CE (8) - -#define MC_CSR (0x00) -#define MC_POC (0x04) -#define MC_BA_MASK (0x08) -#define MC_CSC(i) (0x10 + (i) * 8) -#define MC_TMS(i) (0x14 + (i) * 8) - -#define MC_ADDR_SPACE (MC_CSC(N_CE)) - -/* POC register field definition */ -#define MC_POC_EN_BW_OFFSET 0 -#define MC_POC_EN_BW_WIDTH 2 -#define MC_POC_EN_MEMTYPE_OFFSET 2 -#define MC_POC_EN_MEMTYPE_WIDTH 2 - -/* CSC register field definition */ -#define MC_CSC_EN_OFFSET 0 -#define MC_CSC_MEMTYPE_OFFSET 1 -#define MC_CSC_MEMTYPE_WIDTH 2 -#define MC_CSC_BW_OFFSET 4 -#define MC_CSC_BW_WIDTH 2 -#define MC_CSC_MS_OFFSET 6 -#define MC_CSC_MS_WIDTH 2 -#define MC_CSC_WP_OFFSET 8 -#define MC_CSC_BAS_OFFSET 9 -#define MC_CSC_KRO_OFFSET 10 -#define MC_CSC_PEN_OFFSET 11 -#define MC_CSC_SEL_OFFSET 16 -#define MC_CSC_SEL_WIDTH 8 - -#define MC_CSC_MEMTYPE_SDRAM 0 -#define MC_CSC_MEMTYPE_SSRAM 1 -#define MC_CSC_MEMTYPE_ASYNC 2 -#define MC_CSC_MEMTYPE_SYNC 3 - -#define MC_CSR_VALID 0xFF000703LU -#define MC_POC_VALID 0x0000000FLU -#define MC_BA_MASK_VALID 0x000000FFLU -#define MC_CSC_VALID 0x00FF0FFFLU -#define MC_TMS_SDRAM_VALID 0x0FFF83FFLU -#define MC_TMS_SSRAM_VALID 0x00000000LU -#define MC_TMS_ASYNC_VALID 0x03FFFFFFLU -#define MC_TMS_SYNC_VALID 0x01FFFFFFLU -#define MC_TMS_VALID 0xFFFFFFFFLU /* reg test compat. */ - -/* TMS register field definition SDRAM */ -#define MC_TMS_SDRAM_TRFC_OFFSET 24 -#define MC_TMS_SDRAM_TRFC_WIDTH 4 -#define MC_TMS_SDRAM_TRP_OFFSET 20 -#define MC_TMS_SDRAM_TRP_WIDTH 4 -#define MC_TMS_SDRAM_TRCD_OFFSET 17 -#define MC_TMS_SDRAM_TRCD_WIDTH 4 -#define MC_TMS_SDRAM_TWR_OFFSET 15 -#define MC_TMS_SDRAM_TWR_WIDTH 2 -#define MC_TMS_SDRAM_WBL_OFFSET 9 -#define MC_TMS_SDRAM_OM_OFFSET 7 -#define MC_TMS_SDRAM_OM_WIDTH 2 -#define MC_TMS_SDRAM_CL_OFFSET 4 -#define MC_TMS_SDRAM_CL_WIDTH 3 -#define MC_TMS_SDRAM_BT_OFFSET 3 -#define MC_TMS_SDRAM_BL_OFFSET 0 -#define MC_TMS_SDRAM_BL_WIDTH 3 - -/* TMS register field definition ASYNC */ -#define MC_TMS_ASYNC_TWWD_OFFSET 20 -#define MC_TMS_ASYNC_TWWD_WIDTH 6 -#define MC_TMS_ASYNC_TWD_OFFSET 16 -#define MC_TMS_ASYNC_TWD_WIDTH 4 -#define MC_TMS_ASYNC_TWPW_OFFSET 12 -#define MC_TMS_ASYNC_TWPW_WIDTH 4 -#define MC_TMS_ASYNC_TRDZ_OFFSET 8 -#define MC_TMS_ASYNC_TRDZ_WIDTH 4 -#define MC_TMS_ASYNC_TRDV_OFFSET 0 -#define MC_TMS_ASYNC_TRDV_WIDTH 8 - -/* TMS register field definition SYNC */ -#define MC_TMS_SYNC_TTO_OFFSET 16 -#define MC_TMS_SYNC_TTO_WIDTH 9 -#define MC_TMS_SYNC_TWR_OFFSET 12 -#define MC_TMS_SYNC_TWR_WIDTH 4 -#define MC_TMS_SYNC_TRDZ_OFFSET 8 -#define MC_TMS_SYNC_TRDZ_WIDTH 4 -#define MC_TMS_SYNC_TRDV_OFFSET 0 -#define MC_TMS_SYNC_TRDV_WIDTH 8 - -#endif

sw/support/mc.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/Makefile.inc =================================================================== --- sw/support/Makefile.inc (revision 2) +++ sw/support/Makefile.inc (nonexistent) @@ -1,20 +0,0 @@ -# File to be included in all makefiles - -OR32_TOOL_PREFIX=or32-elf - -#GCC_LIB_OPTS= -lgcc -liberty - -GCC_OPT=-mhard-mul -g - -ifdef UART_PRINTF -GCC_OPT += -DUART_PRINTF -endif - -FLASH_MEM_HEX_FILE_SUFFIX=-twobyte-sizefirst -SRAM_MEM_HEX_FILE_SUFFIX=-fourbyte - - -# Global clean rule -clean: - @echo "Cleaning `pwd`" - @rm -f *.o *.or32 *.log *.bin *.srec *.hex *.log stdout.txt *.vmem *.asm *.a stdout.txt

sw/support/Makefile.inc Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/except.S =================================================================== --- sw/support/except.S (revision 2) +++ sw/support/except.S (nonexistent) @@ -1,276 +0,0 @@ -#include "spr_defs.h" - -// Linked from 0x200, so subtract 0x200 from each .org -.section .vectors, "ax" - -/* -.org 0x100 - -_reset: - l.nop - l.j _reset_except - l.nop -*/ -.org 0x000 - -_except_200: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _buserr_except - l.nop - -.org 0x100 - -_except_300: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _dpf_except - l.nop - -.org 0x200 - -_except_400: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _ipf_except - l.nop - -.org 0x300 - -_except_500: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _lpint_except - l.nop - -.org 0x400 - -_except_600: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _align_except - l.nop - -.org 0x500 - -_except_700: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _illegal_except - l.nop - -.org 0x600 - -_except_800: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _hpint_except //jmp to C interrupt handler (returns later to end_except) - l.nop - - -.org 0x700 - -_except_900: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _dtlbmiss_except - l.nop - -.org 0x800 - -_except_a00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _itlbmiss_except - l.nop - -.org 0x900 - -_except_b00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _range_except - l.nop - -.org 0xa00 - -_except_c00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _syscall_except - l.nop - -.org 0xb00 - -_except_d00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _res1_except - l.nop - -.org 0xc00 - -_except_e00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _trap_except - l.nop - -.org 0xd00 - -_except_f00: - l.nop - l.addi r1,r1,-116 //free 29 words of stack (stack is r1) - l.sw 0x18(r1),r9 //save register r9(return addr) to stack - l.jal store_regs //save registers r3-r31 (except r9) to stack (r9 is changed here) - l.nop - - l.movhi r9,hi(end_except) //set return addr to end_except instruction - l.ori r9,r9,lo(end_except) //set return addr to end_except instruction - l.j _res2_except - l.nop - -store_regs: //save registers r3-r31 (except r9) to stack - l.sw 0x00(r1),r3 - l.sw 0x04(r1),r4 - l.sw 0x08(r1),r5 - l.sw 0x0c(r1),r6 - l.sw 0x10(r1),r7 - l.sw 0x14(r1),r8 - l.sw 0x1c(r1),r10 - l.sw 0x20(r1),r11 - l.sw 0x24(r1),r12 - l.sw 0x28(r1),r13 - l.sw 0x2c(r1),r14 - l.sw 0x30(r1),r15 - l.sw 0x34(r1),r16 - l.sw 0x38(r1),r17 - l.sw 0x3c(r1),r18 - l.sw 0x40(r1),r19 - l.sw 0x44(r1),r20 - l.sw 0x48(r1),r21 - l.sw 0x4c(r1),r22 - l.sw 0x50(r1),r23 - l.sw 0x54(r1),r24 - l.sw 0x58(r1),r25 - l.sw 0x5c(r1),r26 - l.sw 0x60(r1),r27 - l.sw 0x64(r1),r28 - l.sw 0x68(r1),r29 - l.sw 0x6c(r1),r30 - l.sw 0x70(r1),r31 - l.jr r9 - l.nop - -end_except: //load back registers from stack r3-r31 - l.lwz r3,0x00(r1) - l.lwz r4,0x04(r1) - l.lwz r5,0x08(r1) - l.lwz r6,0x0c(r1) - l.lwz r7,0x10(r1) - l.lwz r8,0x14(r1) - l.lwz r9,0x18(r1) - l.lwz r10,0x1c(r1) - l.lwz r11,0x20(r1) - l.lwz r12,0x24(r1) - l.lwz r13,0x28(r1) - l.lwz r14,0x2c(r1) - l.lwz r15,0x30(r1) - l.lwz r16,0x34(r1) - l.lwz r17,0x38(r1) - l.lwz r18,0x3c(r1) - l.lwz r19,0x40(r1) - l.lwz r20,0x44(r1) - l.lwz r21,0x48(r1) - l.lwz r22,0x4c(r1) - l.lwz r23,0x50(r1) - l.lwz r24,0x54(r1) - l.lwz r25,0x58(r1) - l.lwz r26,0x5c(r1) - l.lwz r27,0x60(r1) - l.lwz r28,0x64(r1) - l.lwz r29,0x68(r1) - l.lwz r30,0x6c(r1) - l.lwz r31,0x70(r1) - l.addi r1,r1,116 //free stack places - l.rfe //recover SR register and prior PC (jumps back to program) - l.nop -

sw/support/except.S Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/spr_defs.h =================================================================== --- sw/support/spr_defs.h (revision 2) +++ sw/support/spr_defs.h (nonexistent) @@ -1,449 +0,0 @@ -/* spr_defs.h -- Defines OR1K architecture specific special-purpose registers - Copyright (C) 1999 Damjan Lampret, lampret@opencores.org - -This file is part of OpenRISC 1000 Architectural Simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - -/* This file is also used by microkernel test bench. Among -others it is also used in assembly file(s). */ - -/* Definition of special-purpose registers (SPRs) */ - -#define MAX_GRPS (32) -#define MAX_SPRS_PER_GRP_BITS (11) -#define MAX_SPRS_PER_GRP (1 << MAX_SPRS_PER_GRP_BITS) -#define MAX_SPRS (0x10000) - -/* Base addresses for the groups */ -#define SPRGROUP_SYS (0<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_DMMU (1<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_IMMU (2<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_DC (3<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_IC (4<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_MAC (5<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_D (6<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PC (7<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PM (8<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_PIC (9<< MAX_SPRS_PER_GRP_BITS) -#define SPRGROUP_TT (10<< MAX_SPRS_PER_GRP_BITS) - -/* System control and status group */ -#define SPR_VR (SPRGROUP_SYS + 0) -#define SPR_UPR (SPRGROUP_SYS + 1) -#define SPR_CPUCFGR (SPRGROUP_SYS + 2) -#define SPR_DMMUCFGR (SPRGROUP_SYS + 3) -#define SPR_IMMUCFGR (SPRGROUP_SYS + 4) -#define SPR_DCCFGR (SPRGROUP_SYS + 5) -#define SPR_ICCFGR (SPRGROUP_SYS + 6) -#define SPR_DCFGR (SPRGROUP_SYS + 7) -#define SPR_PCCFGR (SPRGROUP_SYS + 8) -#define SPR_NPC (SPRGROUP_SYS + 16) /* CZ 21/06/01 */ -#define SPR_SR (SPRGROUP_SYS + 17) /* CZ 21/06/01 */ -#define SPR_PPC (SPRGROUP_SYS + 18) /* CZ 21/06/01 */ -#define SPR_EPCR_BASE (SPRGROUP_SYS + 32) /* CZ 21/06/01 */ -#define SPR_EPCR_LAST (SPRGROUP_SYS + 47) /* CZ 21/06/01 */ -#define SPR_EEAR_BASE (SPRGROUP_SYS + 48) -#define SPR_EEAR_LAST (SPRGROUP_SYS + 63) -#define SPR_ESR_BASE (SPRGROUP_SYS + 64) -#define SPR_ESR_LAST (SPRGROUP_SYS + 79) - -#if 0 -/* Data MMU group */ -#define SPR_DMMUCR (SPRGROUP_DMMU + 0) -#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x200) -#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x200) -#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x300 + (WAY) * 0x200) -#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x3ff + (WAY) * 0x200) - -/* Instruction MMU group */ -#define SPR_IMMUCR (SPRGROUP_IMMU + 0) -#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x200) -#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x200) -#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x300 + (WAY) * 0x200) -#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x3ff + (WAY) * 0x200) -#else -/* Data MMU group */ -#define SPR_DMMUCR (SPRGROUP_DMMU + 0) -#define SPR_DTLBMR_BASE(WAY) (SPRGROUP_DMMU + 0x200 + (WAY) * 0x100) -#define SPR_DTLBMR_LAST(WAY) (SPRGROUP_DMMU + 0x27f + (WAY) * 0x100) -#define SPR_DTLBTR_BASE(WAY) (SPRGROUP_DMMU + 0x280 + (WAY) * 0x100) -#define SPR_DTLBTR_LAST(WAY) (SPRGROUP_DMMU + 0x2ff + (WAY) * 0x100) - -/* Instruction MMU group */ -#define SPR_IMMUCR (SPRGROUP_IMMU + 0) -#define SPR_ITLBMR_BASE(WAY) (SPRGROUP_IMMU + 0x200 + (WAY) * 0x100) -#define SPR_ITLBMR_LAST(WAY) (SPRGROUP_IMMU + 0x27f + (WAY) * 0x100) -#define SPR_ITLBTR_BASE(WAY) (SPRGROUP_IMMU + 0x280 + (WAY) * 0x100) -#define SPR_ITLBTR_LAST(WAY) (SPRGROUP_IMMU + 0x2ff + (WAY) * 0x100) -#endif -/* Data cache group */ -#define SPR_DCCR (SPRGROUP_DC + 0) -#define SPR_DCBPR (SPRGROUP_DC + 1) -#define SPR_DCBFR (SPRGROUP_DC + 2) -#define SPR_DCBIR (SPRGROUP_DC + 3) -#define SPR_DCBWR (SPRGROUP_DC + 4) -#define SPR_DCBLR (SPRGROUP_DC + 5) -#define SPR_DCR_BASE(WAY) (SPRGROUP_DC + 0x200 + (WAY) * 0x200) -#define SPR_DCR_LAST(WAY) (SPRGROUP_DC + 0x3ff + (WAY) * 0x200) - -/* Instruction cache group */ -#define SPR_ICCR (SPRGROUP_IC + 0) -#define SPR_ICBPR (SPRGROUP_IC + 1) -#define SPR_ICBIR (SPRGROUP_IC + 2) -#define SPR_ICBLR (SPRGROUP_IC + 3) -#define SPR_ICR_BASE(WAY) (SPRGROUP_IC + 0x200 + (WAY) * 0x200) -#define SPR_ICR_LAST(WAY) (SPRGROUP_IC + 0x3ff + (WAY) * 0x200) - -/* MAC group */ -#define SPR_MACLO (SPRGROUP_MAC + 1) -#define SPR_MACHI (SPRGROUP_MAC + 2) - -/* Debug group */ -#define SPR_DVR(N) (SPRGROUP_D + (N)) -#define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) -#define SPR_DMR1 (SPRGROUP_D + 16) -#define SPR_DMR2 (SPRGROUP_D + 17) -#define SPR_DWCR0 (SPRGROUP_D + 18) -#define SPR_DWCR1 (SPRGROUP_D + 19) -#define SPR_DSR (SPRGROUP_D + 20) -#define SPR_DRR (SPRGROUP_D + 21) - -/* Performance counters group */ -#define SPR_PCCR(N) (SPRGROUP_PC + (N)) -#define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) - -/* Power management group */ -#define SPR_PMR (SPRGROUP_PM + 0) - -/* PIC group */ -#define SPR_PICMR (SPRGROUP_PIC + 0) -#define SPR_PICPR (SPRGROUP_PIC + 1) -#define SPR_PICSR (SPRGROUP_PIC + 2) - -/* Tick Timer group */ -#define SPR_TTMR (SPRGROUP_TT + 0) -#define SPR_TTCR (SPRGROUP_TT + 1) - -/* - * Bit definitions for the Version Register - * - */ -#define SPR_VR_VER 0xffff0000 /* Processor version */ -#define SPR_VR_REV 0x0000003f /* Processor revision */ - -/* - * Bit definitions for the Unit Present Register - * - */ -#define SPR_UPR_UP 0x00000001 /* UPR present */ -#define SPR_UPR_DCP 0x00000002 /* Data cache present */ -#define SPR_UPR_ICP 0x00000004 /* Instruction cache present */ -#define SPR_UPR_DMP 0x00000008 /* Data MMU present */ -#define SPR_UPR_IMP 0x00000010 /* Instruction MMU present */ -#define SPR_UPR_OB32P 0x00000020 /* ORBIS32 present */ -#define SPR_UPR_OB64P 0x00000040 /* ORBIS64 present */ -#define SPR_UPR_OF32P 0x00000080 /* ORFPX32 present */ -#define SPR_UPR_OF64P 0x00000100 /* ORFPX64 present */ -#define SPR_UPR_OV32P 0x00000200 /* ORVDX32 present */ -#define SPR_UPR_OV64P 0x00000400 /* ORVDX64 present */ -#define SPR_UPR_DUP 0x00000800 /* Debug unit present */ -#define SPR_UPR_PCUP 0x00001000 /* Performance counters unit present */ -#define SPR_UPR_PMP 0x00002000 /* Power management present */ -#define SPR_UPR_PICP 0x00004000 /* PIC present */ -#define SPR_UPR_TTP 0x00008000 /* Tick timer present */ -#define SPR_UPR_SRP 0x00010000 /* Shadow registers present */ -#define SPR_UPR_RES 0x00fe0000 /* ORVDX32 present */ -#define SPR_UPR_CUST 0xff000000 /* Custom units */ - -/* - * Bit definitions for the Supervision Register - * - */ -#define SPR_SR_CID 0xf0000000 /* Context ID */ -#define SPR_SR_FO 0x00008000 /* Fixed one */ -#define SPR_SR_EPH 0x00004000 /* Exception Prefixi High */ -#define SPR_SR_DSX 0x00002000 /* Delay Slot Exception */ -#define SPR_SR_OVE 0x00001000 /* Overflow flag Exception */ -#define SPR_SR_OV 0x00000800 /* Overflow flag */ -#define SPR_SR_CY 0x00000400 /* Carry flag */ -#define SPR_SR_F 0x00000200 /* Condition Flag */ -#define SPR_SR_CE 0x00000100 /* CID Enable */ -#define SPR_SR_LEE 0x00000080 /* Little Endian Enable */ -#define SPR_SR_IME 0x00000040 /* Instruction MMU Enable */ -#define SPR_SR_DME 0x00000020 /* Data MMU Enable */ -#define SPR_SR_ICE 0x00000010 /* Instruction Cache Enable */ -#define SPR_SR_DCE 0x00000008 /* Data Cache Enable */ -#define SPR_SR_IEE 0x00000004 /* Interrupt Exception Enable */ -#define SPR_SR_TEE 0x00000002 /* Tick timer Exception Enable */ -#define SPR_SR_SM 0x00000001 /* Supervisor Mode */ - -/* - * Bit definitions for the Data MMU Control Register - * - */ -#define SPR_DMMUCR_P2S 0x0000003e /* Level 2 Page Size */ -#define SPR_DMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ -#define SPR_DMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ -#define SPR_DMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ - -/* - * Bit definitions for the Instruction MMU Control Register - * - */ -#define SPR_IMMUCR_P2S 0x0000003e /* Level 2 Page Size */ -#define SPR_IMMUCR_P1S 0x000007c0 /* Level 1 Page Size */ -#define SPR_IMMUCR_VADDR_WIDTH 0x0000f800 /* Virtual ADDR Width */ -#define SPR_IMMUCR_PADDR_WIDTH 0x000f0000 /* Physical ADDR Width */ - -/* - * Bit definitions for the Data TLB Match Register - * - */ -#define SPR_DTLBMR_V 0x00000001 /* Valid */ -#define SPR_DTLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ -#define SPR_DTLBMR_CID 0x0000003c /* Context ID */ -#define SPR_DTLBMR_LRU 0x000000c0 /* Least Recently Used */ -#define SPR_DTLBMR_VPN 0xfffff000 /* Virtual Page Number */ - -/* - * Bit definitions for the Data TLB Translate Register - * - */ -#define SPR_DTLBTR_CC 0x00000001 /* Cache Coherency */ -#define SPR_DTLBTR_CI 0x00000002 /* Cache Inhibit */ -#define SPR_DTLBTR_WBC 0x00000004 /* Write-Back Cache */ -#define SPR_DTLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ -#define SPR_DTLBTR_A 0x00000010 /* Accessed */ -#define SPR_DTLBTR_D 0x00000020 /* Dirty */ -#define SPR_DTLBTR_URE 0x00000040 /* User Read Enable */ -#define SPR_DTLBTR_UWE 0x00000080 /* User Write Enable */ -#define SPR_DTLBTR_SRE 0x00000100 /* Supervisor Read Enable */ -#define SPR_DTLBTR_SWE 0x00000200 /* Supervisor Write Enable */ -#define SPR_DTLBTR_PPN 0xfffff000 /* Physical Page Number */ -#define DTLB_PR_NOLIMIT (SPR_DTLBTR_URE | \ - SPR_DTLBTR_UWE | \ - SPR_DTLBTR_SRE | \ - SPR_DTLBTR_SWE ) -/* - * Bit definitions for the Instruction TLB Match Register - * - */ -#define SPR_ITLBMR_V 0x00000001 /* Valid */ -#define SPR_ITLBMR_PL1 0x00000002 /* Page Level 1 (if 0 then PL2) */ -#define SPR_ITLBMR_CID 0x0000003c /* Context ID */ -#define SPR_ITLBMR_LRU 0x000000c0 /* Least Recently Used */ -#define SPR_ITLBMR_VPN 0xfffff000 /* Virtual Page Number */ - -/* - * Bit definitions for the Instruction TLB Translate Register - * - */ -#define SPR_ITLBTR_CC 0x00000001 /* Cache Coherency */ -#define SPR_ITLBTR_CI 0x00000002 /* Cache Inhibit */ -#define SPR_ITLBTR_WBC 0x00000004 /* Write-Back Cache */ -#define SPR_ITLBTR_WOM 0x00000008 /* Weakly-Ordered Memory */ -#define SPR_ITLBTR_A 0x00000010 /* Accessed */ -#define SPR_ITLBTR_D 0x00000020 /* Dirty */ -#define SPR_ITLBTR_SXE 0x00000040 /* User Read Enable */ -#define SPR_ITLBTR_UXE 0x00000080 /* User Write Enable */ -#define SPR_ITLBTR_PPN 0xfffff000 /* Physical Page Number */ -#define ITLB_PR_NOLIMIT (SPR_ITLBTR_SXE | \ - SPR_ITLBTR_UXE ) - - -/* - * Bit definitions for Data Cache Control register - * - */ -#define SPR_DCCR_EW 0x000000ff /* Enable ways */ - -/* - * Bit definitions for Insn Cache Control register - * - */ -#define SPR_ICCR_EW 0x000000ff /* Enable ways */ - -/* - * Bit definitions for Debug Control registers - * - */ -#define SPR_DCR_DP 0x00000001 /* DVR/DCR present */ -#define SPR_DCR_CC 0x0000000e /* Compare condition */ -#define SPR_DCR_SC 0x00000010 /* Signed compare */ -#define SPR_DCR_CT 0x000000e0 /* Compare to */ - -/* Bit results with SPR_DCR_CC mask */ -#define SPR_DCR_CC_MASKED 0x00000000 -#define SPR_DCR_CC_EQUAL 0x00000001 -#define SPR_DCR_CC_LESS 0x00000002 -#define SPR_DCR_CC_LESSE 0x00000003 -#define SPR_DCR_CC_GREAT 0x00000004 -#define SPR_DCR_CC_GREATE 0x00000005 -#define SPR_DCR_CC_NEQUAL 0x00000006 - -/* Bit results with SPR_DCR_CT mask */ -#define SPR_DCR_CT_DISABLED 0x00000000 -#define SPR_DCR_CT_IFEA 0x00000020 -#define SPR_DCR_CT_LEA 0x00000040 -#define SPR_DCR_CT_SEA 0x00000060 -#define SPR_DCR_CT_LD 0x00000080 -#define SPR_DCR_CT_SD 0x000000a0 -#define SPR_DCR_CT_LSEA 0x000000c0 - -/* - * Bit definitions for Debug Mode 1 register - * - */ -#define SPR_DMR1_CW0 0x00000003 /* Chain watchpoint 0 */ -#define SPR_DMR1_CW1 0x0000000c /* Chain watchpoint 1 */ -#define SPR_DMR1_CW2 0x00000030 /* Chain watchpoint 2 */ -#define SPR_DMR1_CW3 0x000000c0 /* Chain watchpoint 3 */ -#define SPR_DMR1_CW4 0x00000300 /* Chain watchpoint 4 */ -#define SPR_DMR1_CW5 0x00000c00 /* Chain watchpoint 5 */ -#define SPR_DMR1_CW6 0x00003000 /* Chain watchpoint 6 */ -#define SPR_DMR1_CW7 0x0000c000 /* Chain watchpoint 7 */ -#define SPR_DMR1_CW8 0x00030000 /* Chain watchpoint 8 */ -#define SPR_DMR1_CW9 0x000c0000 /* Chain watchpoint 9 */ -#define SPR_DMR1_CW10 0x00300000 /* Chain watchpoint 10 */ -#define SPR_DMR1_ST 0x00400000 /* Single-step trace*/ -#define SPR_DMR1_BT 0x00800000 /* Branch trace */ -#define SPR_DMR1_DXFW 0x01000000 /* Disable external force watchpoint */ - -/* - * Bit definitions for Debug Mode 2 register - * - */ -#define SPR_DMR2_WCE0 0x00000001 /* Watchpoint counter 0 enable */ -#define SPR_DMR2_WCE1 0x00000002 /* Watchpoint counter 0 enable */ -#define SPR_DMR2_AWTC 0x00001ffc /* Assign watchpoints to counters */ -#define SPR_DMR2_WGB 0x00ffe000 /* Watchpoints generating breakpoint */ - -/* - * Bit definitions for Debug watchpoint counter registers - * - */ -#define SPR_DWCR_COUNT 0x0000ffff /* Count */ -#define SPR_DWCR_MATCH 0xffff0000 /* Match */ - -/* - * Bit definitions for Debug stop register - * - */ -#define SPR_DSR_RSTE 0x00000001 /* Reset exception */ -#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */ -#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */ -#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */ -#define SPR_DSR_TTE 0x00000010 /* iTick Timer exception */ -#define SPR_DSR_AE 0x00000020 /* Alignment exception */ -#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */ -#define SPR_DSR_IE 0x00000080 /* Interrupt exception */ -#define SPR_DSR_DME 0x00000100 /* DTLB miss exception */ -#define SPR_DSR_IME 0x00000200 /* ITLB miss exception */ -#define SPR_DSR_RE 0x00000400 /* Range exception */ -#define SPR_DSR_SCE 0x00000800 /* System call exception */ -#define SPR_DSR_SSE 0x00001000 /* Single Step Exception */ -#define SPR_DSR_TE 0x00002000 /* Trap exception */ - -/* - * Bit definitions for Debug reason register - * - */ -#define SPR_DRR_RSTE 0x00000001 /* Reset exception */ -#define SPR_DRR_BUSEE 0x00000002 /* Bus error exception */ -#define SPR_DRR_DPFE 0x00000004 /* Data Page Fault exception */ -#define SPR_DRR_IPFE 0x00000008 /* Insn Page Fault exception */ -#define SPR_DRR_TTE 0x00000010 /* Tick Timer exception */ -#define SPR_DRR_AE 0x00000020 /* Alignment exception */ -#define SPR_DRR_IIE 0x00000040 /* Illegal Instruction exception */ -#define SPR_DRR_IE 0x00000080 /* Interrupt exception */ -#define SPR_DRR_DME 0x00000100 /* DTLB miss exception */ -#define SPR_DRR_IME 0x00000200 /* ITLB miss exception */ -#define SPR_DRR_RE 0x00000400 /* Range exception */ -#define SPR_DRR_SCE 0x00000800 /* System call exception */ -#define SPR_DRR_TE 0x00001000 /* Trap exception */ - -/* - * Bit definitions for Performance counters mode registers - * - */ -#define SPR_PCMR_CP 0x00000001 /* Counter present */ -#define SPR_PCMR_UMRA 0x00000002 /* User mode read access */ -#define SPR_PCMR_CISM 0x00000004 /* Count in supervisor mode */ -#define SPR_PCMR_CIUM 0x00000008 /* Count in user mode */ -#define SPR_PCMR_LA 0x00000010 /* Load access event */ -#define SPR_PCMR_SA 0x00000020 /* Store access event */ -#define SPR_PCMR_IF 0x00000040 /* Instruction fetch event*/ -#define SPR_PCMR_DCM 0x00000080 /* Data cache miss event */ -#define SPR_PCMR_ICM 0x00000100 /* Insn cache miss event */ -#define SPR_PCMR_IFS 0x00000200 /* Insn fetch stall event */ -#define SPR_PCMR_LSUS 0x00000400 /* LSU stall event */ -#define SPR_PCMR_BS 0x00000800 /* Branch stall event */ -#define SPR_PCMR_DTLBM 0x00001000 /* DTLB miss event */ -#define SPR_PCMR_ITLBM 0x00002000 /* ITLB miss event */ -#define SPR_PCMR_DDS 0x00004000 /* Data dependency stall event */ -#define SPR_PCMR_WPE 0x03ff8000 /* Watchpoint events */ - -/* - * Bit definitions for the Power management register - * - */ -#define SPR_PMR_SDF 0x0000000f /* Slow down factor */ -#define SPR_PMR_DME 0x00000010 /* Doze mode enable */ -#define SPR_PMR_SME 0x00000020 /* Sleep mode enable */ -#define SPR_PMR_DCGE 0x00000040 /* Dynamic clock gating enable */ -#define SPR_PMR_SUME 0x00000080 /* Suspend mode enable */ - -/* - * Bit definitions for PICMR - * - */ -#define SPR_PICMR_IUM 0xfffffffc /* Interrupt unmask */ - -/* - * Bit definitions for PICPR - * - */ -#define SPR_PICPR_IPRIO 0xfffffffc /* Interrupt priority */ - -/* - * Bit definitions for PICSR - * - */ -#define SPR_PICSR_IS 0xffffffff /* Interrupt status */ - -/* - * Bit definitions for Tick Timer Control Register - * - */ -#define SPR_TTCR_PERIOD 0x0fffffff /* Time Period */ -#define SPR_TTMR_PERIOD SPR_TTCR_PERIOD -#define SPR_TTMR_IP 0x10000000 /* Interrupt Pending */ -#define SPR_TTMR_IE 0x20000000 /* Interrupt Enable */ -#define SPR_TTMR_RT 0x40000000 /* Restart tick */ -#define SPR_TTMR_SR 0x80000000 /* Single run */ -#define SPR_TTMR_CR 0xc0000000 /* Continuous run */ -#define SPR_TTMR_M 0xc0000000 /* Tick mode */ - -/* - * l.nop constants - * - */ -#define NOP_NOP 0x0000 /* Normal nop instruction */ -#define NOP_EXIT 0x0001 /* End of simulation */ -#define NOP_REPORT 0x0002 /* Simple report */ -#define NOP_PRINTF 0x0003 /* Simprintf instruction */ -#define NOP_REPORT_FIRST 0x0400 /* Report with number */ -#define NOP_REPORT_LAST 0x03ff /* Report with number */

sw/support/spr_defs.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/uart.c =================================================================== --- sw/support/uart.c (revision 2) +++ sw/support/uart.c (nonexistent) @@ -1,77 +0,0 @@ -#include "support.h" -#include "board.h" -#include "uart.h" - -#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) - -#define WAIT_FOR_XMITR \ - do { \ - lsr = REG8(UART_BASE + UART_LSR); \ - } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY) - -#define WAIT_FOR_THRE \ - do { \ - lsr = REG8(UART_BASE + UART_LSR); \ - } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE) - -#define CHECK_FOR_CHAR (REG8(UART_BASE + UART_LSR) & UART_LSR_DR) - -#define WAIT_FOR_CHAR \ - do { \ - lsr = REG8(UART_BASE + UART_LSR); \ - } while ((lsr & UART_LSR_DR) != UART_LSR_DR) - -#define UART_TX_BUFF_LEN 32 -#define UART_TX_BUFF_MASK (UART_TX_BUFF_LEN -1) - -char tx_buff[UART_TX_BUFF_LEN]; -volatile int tx_level, rx_level; - -void uart_init(void) -{ - int devisor; - - /* Reset receiver and transmiter */ - /* Set RX interrupt for each byte */ - REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1; - - /* Enable RX interrupt */ - REG8(UART_BASE + UART_IER) = 0x01; - - /* Set 8 bit char, 1 stop bit, no parity */ - REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY); - - /* Set baud rate */ - devisor = IN_CLK/(16 * UART_BAUD_RATE); - REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB; - REG8(UART_BASE + UART_DLL) = devisor & 0x000000ff; - REG8(UART_BASE + UART_DLM) = (devisor >> 8) & 0x000000ff; - REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB); - - return; -} - -void uart_putc(char c) -{ - unsigned char lsr; - - WAIT_FOR_THRE; - REG8(UART_BASE + UART_TX) = c; - if(c == '\n') { - WAIT_FOR_THRE; - REG8(UART_BASE + UART_TX) = '\r'; - } - WAIT_FOR_XMITR; -} - - - -char uart_getc() -{ - unsigned char lsr; - char c; - -// WAIT_FOR_CHAR; - c = REG8(UART_BASE + UART_RX); - return c; -}

sw/support/uart.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/support.c =================================================================== --- sw/support/support.c (revision 2) +++ sw/support/support.c (nonexistent) @@ -1,186 +0,0 @@ -/* Support */ - -#ifndef OR32 -#include -#endif - -#include "spr_defs.h" -#include "support.h" -#include "int.h" - -#ifdef UART_PRINTF -//#include "snprintf.h" -#include "vfnprintf.h" -#include "uart.h" -#endif - -#if OR32 -void excpt_dummy(); -void int_main(); - -unsigned long excpt_buserr = (unsigned long) excpt_dummy; -unsigned long excpt_dpfault = (unsigned long) excpt_dummy; -unsigned long excpt_ipfault = (unsigned long) excpt_dummy; -unsigned long excpt_tick = (unsigned long) excpt_dummy; -unsigned long excpt_align = (unsigned long) excpt_dummy; -unsigned long excpt_illinsn = (unsigned long) excpt_dummy; -unsigned long excpt_int = (unsigned long) int_main; -unsigned long excpt_dtlbmiss = (unsigned long) excpt_dummy; -unsigned long excpt_itlbmiss = (unsigned long) excpt_dummy; -unsigned long excpt_range = (unsigned long) excpt_dummy; -unsigned long excpt_syscall = (unsigned long) excpt_dummy; -unsigned long excpt_break = (unsigned long) excpt_dummy; -unsigned long excpt_trap = (unsigned long) excpt_dummy; - -void hpint_except() -{ - int_main(); -} - -/* Start function, called by reset exception handler. */ -void reset () -{ - int i = main(); - or32_exit (i); -} - -/* return value by making a syscall */ -void or32_exit (int i) -{ - asm("l.add r3,r0,%0": : "r" (i)); - asm("l.nop %0": :"K" (NOP_EXIT)); - while (1); -} - -#ifdef UART_PRINTF - -static int uart_init_done = 0; - -#define PRINTFBUFFER_SIZE 512 -char PRINTFBUFFER[PRINTFBUFFER_SIZE]; // Declare a global printf buffer - -void printf(const char *fmt, ...) -{ - // init uart if not done already - if (!uart_init_done) - { - uart_init(); - uart_init_done = 1; - } - - va_list args; - va_start(args, fmt); - - //int str_l = vsnprintf(PRINTFBUFFER, PRINTFBUFFER_SIZE, fmt, args); - int str_l = vfnprintf(PRINTFBUFFER, PRINTFBUFFER_SIZE, fmt, args); - - if (!str_l) return; // no length string - just return - - int c=0; - // now print each char via the UART - while (c < str_l) - uart_putc(PRINTFBUFFER[c++]); - - va_end(args); - -} - -#else -/* activate printf support in simulator */ -void printf(const char *fmt, ...) -{ - va_list args; - va_start(args, fmt); - __asm__ __volatile__ (" l.addi\tr3,%1,0\n \ - l.addi\tr4,%2,0\n \ - l.nop %0": :"K" (NOP_PRINTF), "r" (fmt), "r" (args)); -} - -/* -void *memcpy (void *__restrict dstvoid, - __const void *__restrict srcvoid, size_t length) -{ - char *dst = dstvoid; - const char *src = (const char *) srcvoid; - - while (length--) - *dst++ = *src++; - return dst; -} -*/ -#endif - - - - - -/* print long */ -void report(unsigned long value) -{ - asm("l.addi\tr3,%0,0": :"r" (value)); - asm("l.nop %0": :"K" (NOP_REPORT)); -} - -/* just to satisfy linker */ -void __main() -{ -} - -/* start_TIMER */ -void start_timer(int x) -{ -} - -/* read_TIMER */ -/* Returns a value since started in uS */ -unsigned int read_timer(int x) -{ - unsigned long count = 0; - - /* Read the Time Stamp Counter */ -/* asm("simrdtsc %0" :"=r" (count)); */ - /*asm("l.sys 201"); */ - return count; -} - -/* For writing into SPR. */ -void mtspr(unsigned long spr, unsigned long value) -{ - asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value)); -} - -/* For reading SPR. */ -unsigned long mfspr(unsigned long spr) -{ - unsigned long value; - asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr)); - return value; -} - -#else -void report(unsigned long value) -{ - printf("report(0x%x);\n", (unsigned) value); -} - -/* start_TIMER */ -void start_timer(int tmrnum) -{ -} - -/* read_TIMER */ -/* Returns a value since started in uS */ -unsigned int read_timer(int tmrnum) -{ - struct timeval tv; - struct timezone tz; - - gettimeofday(&tv, &tz); - - return(tv.tv_sec*1000000+tv.tv_usec); -} - -#endif - - -void excpt_dummy() {}

sw/support/support.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/vfnprintf.c =================================================================== --- sw/support/vfnprintf.c (revision 2) +++ sw/support/vfnprintf.c (nonexistent) @@ -1,665 +0,0 @@ -// Ripped out of latest ecos build from http://sources-redhat.mirrors.airband.net/ecos/releases/ecos-3.0b1/ecos-3.0beta1.i386linux.tar.bz2 -// File: ecos-3.0b1/packages/language/c/libc/stdio/v3_0b1/src/output/vfnprintf.cxx - -// Hacked to pieces so it would work with OpenRISC compiler, not using libc -//=========================================================================== -// -// vfnprintf.c -// -// I/O routines for vfnprintf() for use with ANSI C library -// -//=========================================================================== -// ####ECOSGPLCOPYRIGHTBEGIN#### -// ------------------------------------------- -// This file is part of eCos, the Embedded Configurable Operating System. -// Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. -// -// eCos is free software; you can redistribute it and/or modify it under -// the terms of the GNU General Public License as published by the Free -// Software Foundation; either version 2 or (at your option) any later -// version. -// -// eCos is distributed in the hope that it will be useful, but WITHOUT -// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -// for more details. -// -// You should have received a copy of the GNU General Public License -// along with eCos; if not, write to the Free Software Foundation, Inc., -// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -// -// As a special exception, if other files instantiate templates or use -// macros or inline functions from this file, or you compile this file -// and link it with other works to produce a work based on this file, -// this file does not by itself cause the resulting work to be covered by -// the GNU General Public License. However the source code for this file -// must still be made available in accordance with section (3) of the GNU -// General Public License v2. -// -// This exception does not invalidate any other reasons why a work based -// on this file might be covered by the GNU General Public License. -// ------------------------------------------- -// ####ECOSGPLCOPYRIGHTEND#### -//=========================================================================== -//#####DESCRIPTIONBEGIN#### -// -// Author(s): jlarmour -// Contributors: -// Date: 2000-04-20 -// Purpose: -// Description: -// Usage: -// -//####DESCRIPTIONEND#### -// -//=========================================================================== -// -// This code is based on original code with the following copyright: -// -/*- - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Chris Torek. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -// CONFIGURATION - -//#include // Configuration header -//#include // Configuration header for mb support - -// INCLUDES - -#include // For mbtowc() -#include - - -//#include // Common type definitions and support -#define CYG_MACRO_START do { -#define CYG_MACRO_END } while (0) - -#define CYG_EMPTY_STATEMENT CYG_MACRO_START CYG_MACRO_END - -#define CYG_UNUSED_PARAM( _type_, _name_ ) CYG_MACRO_START \ - _type_ __tmp1 = (_name_); \ - _type_ __tmp2 = __tmp1; \ - __tmp1 = __tmp2; \ -CYG_MACRO_END - -#include // Variable argument definitions -//#include // Standard header for all stdio files -#include // memchr() and strlen() functions -//#include // C library streams - -#include "vfnprintf.h" - - -# define BUF 40 - -/* - * Actual printf innards. - * - * This code is large and complicated... - */ - - -/* - * Macros for converting digits to letters and vice versa - */ -#define to_digit(c) ((c) - '0') -#define is_digit(c) ((unsigned)to_digit(c) <= 9) -#define to_char(n) ((n) + '0') - -/* - * Flags used during conversion. - */ -#define ALT 0x001 /* alternate form */ -#define HEXPREFIX 0x002 /* add 0x or 0X prefix */ -#define LADJUST 0x004 /* left adjustment */ -#define LONGDBL 0x008 /* long double; unimplemented */ -#define LONGINT 0x010 /* long integer */ -#define QUADINT 0x020 /* quad integer */ -#define SHORTINT 0x040 /* short integer */ -#define ZEROPAD 0x080 /* zero (as opposed to blank) pad */ -#define FPT 0x100 /* Floating point number */ -#define SIZET 0x200 /* size_t */ - - -// Function which prints back to the buffer, ptr, len bytes -// returns 1 if it should finish up, otherwise 0 to continue -int print_back_to_string(char * ptr, int len, size_t * n, int * ret, char ** stream) -{ -#define MIN(a, b) ((a) < (b) ? (a) : (b)) - do { - int length = MIN( (int) len, *n - *ret - 1); - memcpy(*stream + *ret, ptr, length); - if (length < (int)len) { - *ret += length; - return 1; // finish up - } - - } while(0); - - return 0; -} - -//externC int -int -//vfnprintf ( FILE *stream, size_t n, const char *format, va_list arg) __THROW -vfnprintf ( char *stream, size_t n, const char *format, va_list arg) -{ - char *fmt; /* format string */ - int ch; /* character from fmt */ - int x, y; /* handy integers (short term usage) */ - char *cp; /* handy char pointer (short term usage) */ - int flags; /* flags as above */ - - int ret; /* return value accumulator */ - int width; /* width from format (%8d), or 0 */ - int prec; /* precision from format (%.3d), or -1 */ - char sign; /* sign prefix (' ', '+', '-', or \0) */ - wchar_t wc; - -#define quad_t long long -#define u_quad_t unsigned long long - - u_quad_t _uquad; /* integer arguments %[diouxX] */ - enum { OCT, DEC, HEX } base;/* base for [diouxX] conversion */ - int dprec; /* a copy of prec if [diouxX], 0 otherwise */ - int fieldsz; /* field size expanded by sign, etc */ - int realsz; /* field size expanded by dprec */ - int size; /* size of converted field or string */ - char *xdigs; /* digits for [xX] conversion */ -#define NIOV 8 - char buf[BUF]; /* space for %c, %[diouxX], %[eEfgG] */ - char ox[2]; /* space for 0x hex-prefix */ - - /* - * Choose PADSIZE to trade efficiency vs. size. If larger printf - * fields occur frequently, increase PADSIZE and make the initialisers - * below longer. - */ -#define PADSIZE 16 /* pad chunk size */ - static char blanks[PADSIZE] = - {' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' '}; - static char zeroes[PADSIZE] = - {'0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0'}; - - /* - * BEWARE, these `goto error' on error, and PAD uses `n'. - */ - - // We'll copy len bytes from (char*) ptr, into the output stream - // making sure we don't go over the end, so calculate length to be - // either the whole length we've been passed, or the whole length - // that is possible to write - // We finish if it was not possible to write the entire variable - // into the buffer, ie we had to write all we could, not all we - // wanted to. - /* - #define PRINT(ptr, len) \ - CYG_MACRO_START \ - int length = MIN( (int) len, n - ret - 1); \ - char* begin_stream_write = stream; \ - stream = memcpy(stream, ptr, length); \ - length = (unsigned long) stream - (unsigned long) begin_stream_write; \ - if (length < (int)len) { \ - ret += length; \ - goto done; \ - } \ - CYG_MACRO_END - */ - - //PRINT(with, PADSIZE); \ - //PRINT(with, x); \ - -#define PAD(howmany, with) \ - CYG_MACRO_START \ - if ((x = (howmany)) > 0) { \ - while (x > PADSIZE) { \ - if (print_back_to_string(with, PADSIZE, &n, &ret, &stream)) goto done; \ - x -= PADSIZE; \ - } \ - if (print_back_to_string(with, x, &n, &ret, &stream))goto done; \ - } \ - CYG_MACRO_END - - /* - * To extend shorts properly, we need both signed and unsigned - * argument extraction methods. - */ - -#define SARG() \ - (flags&QUADINT ? va_arg(arg, long long) : \ - flags&LONGINT ? va_arg(arg, long) : \ - flags&SHORTINT ? (long)(short)va_arg(arg, int) : \ - flags&SIZET ? (long)va_arg(arg, size_t) : \ - (long)va_arg(arg, int)) -#define UARG() \ - (flags&QUADINT ? va_arg(arg, unsigned long long) : \ - flags&LONGINT ? va_arg(arg, unsigned long) : \ - flags&SHORTINT ? (unsigned long)(unsigned short)va_arg(arg, int) : \ - flags&SIZET ? va_arg(arg, size_t) : \ - (unsigned long)va_arg(arg, unsigned int)) - - - xdigs = NULL; // stop compiler whinging - fmt = (char *)format; - ret = 0; - - /* - * Scan the format for conversions (`%' character). - */ - for (;;) { - cp = (char *)fmt; // char pointer - set to where we begin looking from - while ((x = ((wc = *fmt) != 0))) { // While, wc=next char and x is one while there's still chars left - fmt += x; // increment the pointer to the char - if (wc == '%') { // check if it's the beginning of - fmt--; // Decrement the char pointer, actually - break; - } - } - if ((y = fmt - cp) != 0) { // y is length of string to copy out just now - //PRINT(cp, y); // Copy macro - if(print_back_to_string(cp, y, &n, &ret, &stream)) goto done; // Copy macro - ret += y; // increment return chars - } - if ((x <= 0) || (ret >= (int)n)) // @@@ this check with n isn't good enough - goto done; - fmt++; /* skip over '%' */ - - flags = 0; - dprec = 0; - width = 0; - prec = -1; - sign = '\0'; - - rflag: ch = *fmt++; - reswitch: switch (ch) { - case ' ': - /* - * ``If the space and + flags both appear, the space - * flag will be ignored.'' - * -- ANSI X3J11 - */ - if (!sign) - sign = ' '; - goto rflag; - case '#': - flags |= ALT; - goto rflag; - case '*': - /* - * ``A negative field width argument is taken as a - * - flag followed by a positive field width.'' - * -- ANSI X3J11 - * They don't exclude field widths read from args. - */ - if ((width = va_arg(arg, int)) >= 0) - goto rflag; - width = -width; - /* FALLTHROUGH */ - case '-': - flags |= LADJUST; - goto rflag; - case '+': - sign = '+'; - goto rflag; - case '.': - if ((ch = *fmt++) == '*') { - x = va_arg(arg, int); - prec = x < 0 ? -1 : x; - goto rflag; - } - x = 0; - while (is_digit(ch)) { - x = 10 * x + to_digit(ch); - ch = *fmt++; - } - prec = x < 0 ? -1 : x; - goto reswitch; - case '0': - /* - * ``Note that 0 is taken as a flag, not as the - * beginning of a field width.'' - * -- ANSI X3J11 - */ - flags |= ZEROPAD; - goto rflag; - case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': - x = 0; - do { - x = 10 * x + to_digit(ch); - ch = *fmt++; - } while (is_digit(ch)); - width = x; - goto reswitch; - case 'h': - flags |= SHORTINT; - goto rflag; - case 'l': - if (*fmt == 'l') { - fmt++; - flags |= QUADINT; - } else { - flags |= LONGINT; - } - goto rflag; - case 'q': - flags |= QUADINT; - goto rflag; - case 'c': - *(cp = buf) = va_arg(arg, int); - size = 1; - sign = '\0'; - break; - case 'D': - flags |= LONGINT; - /*FALLTHROUGH*/ - case 'd': - case 'i': - _uquad = SARG(); -#ifndef _NO_LONGLONG - if ((quad_t)_uquad < 0) -#else - if ((long) _uquad < 0) -#endif - { - - _uquad = -_uquad; - sign = '-'; - } - base = DEC; - goto number; - - case 'e': - case 'E': - case 'f': - case 'g': - case 'G': - // Output nothing at all - (void) va_arg(arg, double); // take off arg anyway - cp = ""; - size = 0; - sign = '\0'; - break; - - case 'n': -#ifndef _NO_LONGLONG - if (flags & QUADINT) - *va_arg(arg, quad_t *) = ret; - else -#endif - if (flags & LONGINT) - *va_arg(arg, long *) = ret; - else if (flags & SHORTINT) - *va_arg(arg, short *) = ret; - else if (flags & SIZET) - *va_arg(arg, size_t *) = ret; - else - *va_arg(arg, int *) = ret; - continue; /* no output */ - case 'O': - flags |= LONGINT; - /*FALLTHROUGH*/ - case 'o': - _uquad = UARG(); - base = OCT; - goto nosign; - case 'p': - /* - * ``The argument shall be a pointer to void. The - * value of the pointer is converted to a sequence - * of printable characters, in an implementation- - * defined manner.'' - * -- ANSI X3J11 - */ - /* NOSTRICT */ - _uquad = (unsigned long)va_arg(arg, void *); - base = HEX; - xdigs = (char *)"0123456789abcdef"; - flags |= HEXPREFIX; - ch = 'x'; - goto nosign; - case 's': - if ((cp = va_arg(arg, char *)) == NULL) - cp = (char *)"(null)"; - if (prec >= 0) { - /* - * can't use strlen; can only look for the - * NUL in the first `prec' characters, and - * strlen() will go further. - */ - char *p = (char *)memchr(cp, 0, prec); - - if (p != NULL) { - size = p - cp; - if (size > prec) - size = prec; - } else - size = prec; - } else - size = strlen(cp); - sign = '\0'; - break; - case 'U': - flags |= LONGINT; - /*FALLTHROUGH*/ - case 'u': - _uquad = UARG(); - base = DEC; - goto nosign; - case 'X': - xdigs = (char *)"0123456789ABCDEF"; - goto hex; - case 'x': - xdigs = (char *)"0123456789abcdef"; - hex: _uquad = UARG(); - base = HEX; - /* leading 0x/X only if non-zero */ - if (flags & ALT && _uquad != 0) - flags |= HEXPREFIX; - - /* unsigned conversions */ - nosign: sign = '\0'; - /* - * ``... diouXx conversions ... if a precision is - * specified, the 0 flag will be ignored.'' - * -- ANSI X3J11 - */ - number: if ((dprec = prec) >= 0) - flags &= ~ZEROPAD; - - /* - * ``The result of converting a zero value with an - * explicit precision of zero is no characters.'' - * -- ANSI X3J11 - */ - cp = buf + BUF; - if (_uquad != 0 || prec != 0) { - /* - * Unsigned mod is hard, and unsigned mod - * by a constant is easier than that by - * a variable; hence this switch. - */ - switch (base) { - case OCT: - do { - *--cp = to_char(_uquad & 7); - _uquad >>= 3; - } while (_uquad); - /* handle octal leading 0 */ - if (flags & ALT && *cp != '0') - *--cp = '0'; - break; - - case DEC: - if (!(flags & QUADINT)) { - /* many numbers are 1 digit */ - unsigned long v = (unsigned long)_uquad; - while (v >= 10) { - /* The following is usually faster than using a modulo */ - unsigned long next = v / 10; - *--cp = to_char(v - (next * 10)); - v = next; - } - *--cp = to_char(v); - } - else { - while (_uquad >= 10) { - /* The following is usually faster than using a modulo */ - u_quad_t next = _uquad / 10; - *--cp = to_char(_uquad - (next * 10)); - _uquad = next; - } - *--cp = to_char(_uquad); - } - break; - - case HEX: - do { - *--cp = xdigs[_uquad & 15]; - _uquad >>= 4; - } while (_uquad); - break; - - default: - cp = (char *)"bug in vfprintf: bad base"; - size = strlen(cp); - goto skipsize; - } - } - size = buf + BUF - cp; - skipsize: - break; - case 'z': - flags |= SIZET; - goto rflag; - default: /* "%?" prints ?, unless ? is NUL */ - if (ch == '\0') - goto done; - /* pretend it was %c with argument ch */ - cp = buf; - *cp = ch; - size = 1; - sign = '\0'; - break; - } - - /* - * All reasonable formats wind up here. At this point, `cp' - * points to a string which (if not flags&LADJUST) should be - * padded out to `width' places. If flags&ZEROPAD, it should - * first be prefixed by any sign or other prefix; otherwise, - * it should be blank padded before the prefix is emitted. - * After any left-hand padding and prefixing, emit zeroes - * required by a decimal [diouxX] precision, then print the - * string proper, then emit zeroes required by any leftover - * floating precision; finally, if LADJUST, pad with blanks. - * - * Compute actual size, so we know how much to pad. - * fieldsz excludes decimal prec; realsz includes it. - */ -#ifdef CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT - fieldsz = size + fpprec; -#else - fieldsz = size; -#endif - if (sign) - fieldsz++; - else if (flags & HEXPREFIX) - fieldsz+= 2; - realsz = dprec > fieldsz ? dprec : fieldsz; - - /* right-adjusting blank padding */ - if ((flags & (LADJUST|ZEROPAD)) == 0) { - if (width - realsz > 0) { - PAD(width - realsz, blanks); - ret += width - realsz; - } - } - - /* prefix */ - if (sign) { - //PRINT(&sign, 1); - if(print_back_to_string(&sign, 1, &n, &ret, &stream))goto done; - ret++; - } else if (flags & HEXPREFIX) { - ox[0] = '0'; - ox[1] = ch; - //PRINT(ox, 2); - if(print_back_to_string(ox, 2, &n, &ret, &stream))goto done; - ret += 2; - } - - /* right-adjusting zero padding */ - if ((flags & (LADJUST|ZEROPAD)) == ZEROPAD) { - if (width - realsz > 0) { - PAD(width - realsz, zeroes); - ret += width - realsz; - } - } - - if (dprec - fieldsz > 0) { - /* leading zeroes from decimal precision */ - PAD(dprec - fieldsz, zeroes); - ret += dprec - fieldsz; - } - - /* the string or number proper */ - //PRINT(cp, size); - if(print_back_to_string(cp,size, &n, &ret, &stream))goto done; - ret += size; - -#ifdef CYGSEM_LIBC_STDIO_PRINTF_FLOATING_POINT - /* trailing f.p. zeroes */ - PAD(fpprec, zeroes); - ret += fpprec; -#endif - - /* left-adjusting padding (always blank) */ - if (flags & LADJUST) { - if (width - realsz > 0) { - PAD(width - realsz, blanks); - ret += width - realsz; - } - } - - } - - done: - error: - return ret;// remove this error stuff (((Cyg_OutputStream *) stream)->get_error() ? EOF : ret); - /* NOTREACHED */ -} - - - -// EOF vfnprintf.c

sw/support/vfnprintf.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/orp.cfg =================================================================== --- sw/support/orp.cfg (revision 2) +++ sw/support/orp.cfg (nonexistent) @@ -1,901 +0,0 @@ -/* sim.cfg -- Simulator configuration script file - Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org - -This file is part of OpenRISC 1000 Architectural Simulator. -It contains the default configuration and help about configuring -the simulator. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ - - -/* INTRODUCTION - - The ork1sim has various parameters, that are set in configuration files - like this one. The user can switch between configurations at startup by - specifying the required configuration file with the -f option. - If no configuration file is specified or1ksim searches for the default - configuration file sim.cfg. First it searches for './sim.cfg'. If this - file is not found, it searches for '~/or1k/sim.cfg'. If this file is - not found too, it reverts to the built-in default configuration. - - NOTE: Users should not rely on the built-in configuration, since the - default configuration may differ between version. - Rather create a configuration file that sets all critical values. - - This file may contain (standard C) comments only - no // support. - - Configure files may be be included, using: - include "file_name_to_include" - - Like normal configuration files, the included file is divided into - sections. Each section is described in detail also. - - Some section have subsections. One example of such a subsection is: - - device - instance specific parameters... - enddevice - - which creates a device instance. -*/ - - -/* MEMORY SECTION - - This section specifies how the memory is generated and the blocks - it consists of. - - type = random/unknown/pattern - Specifies the initial memory values. - 'random' generates random memory using seed 'random_seed'. - 'pattern' fills memory with 'pattern'. - 'unknown' does not specify how memory should be generated, - leaving the memory in a undefined state. This is the fastest - option. - - random_seed = - random seed for randomizer, used if type = 'random'. - - pattern = - pattern to fill memory, used if type = 'pattern'. - - nmemories = - number of memory instances connected - - baseaddr = - memory start address - - size = - memory size - - name = "" - memory block name - - ce = - chip enable index of the memory instance - - mc = - memory controller this memory is connected to - - delayr = - cycles, required for read access, -1 if instance does not support reading - - delayw = - cycles, required for write access, -1 if instance does not support writing - - log = "" - filename, where to log memory accesses to, no log, if log command is not specified -*/ - - -section memory - /*random_seed = 12345 - type = random*/ - pattern = 0x00 - type = unknown /* Fastest */ - - name = "FLASH" - ce = 0 - mc = 0 - baseaddr = 0x04000000 - size = 0x00200000 - delayr = 1 - delayw = -1 -end - -section memory - /*random_seed = 12345 - type = random*/ - pattern = 0x00 - type = unknown /* Fastest */ - - name = "RAM" - ce = 1 - mc = 0 - baseaddr = 0x00000000 - size = 0x00200000 - delayr = 1 - delayw = 5 -end - -section memory - /*random_seed = 12345 - type = random*/ - pattern = 0x00 - type = unknown /* Fastest */ - - name = "ICM" - mc = 0 - ce = 2 - baseaddr = 0x00800000 - size = 0x00004000 - delayr = 1 - delayw = 1 -end - - -/* IMMU SECTION - - This section configures the Instruction Memory Manangement Unit - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = - number of ITLB sets; must be power of two - - nways = - number of ITLB ways - - pagesize = - instruction page size; must be power of two - - entrysize = - instruction entry size in bytes - - ustates = - number of ITLB usage states (2, 3, 4 etc., max is 4) - - hitdelay = - number of cycles immu hit costs - - missdelay = - number of cycles immu miss costs -*/ - -section immu - - enabled = 1 - nsets = 32 - nways = 1 - pagesize = 8192 - -end - - -/* DMMU SECTION - - This section configures the Data Memory Manangement Unit - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = - number of DTLB sets; must be power of two - - nways = - number of DTLB ways - - pagesize = - data page size; must be power of two - - entrysize = - data entry size in bytes - - ustates = - number of DTLB usage states (2, 3, 4 etc., max is 4) - - hitdelay = - number of cycles dmmu hit costs - - missdelay = - number of cycles dmmu miss costs -*/ - -section dmmu - enabled = 1 - nsets = 32 - nways = 1 - pagesize = 8192 -end - - -/* IC SECTION - - This section configures the Instruction Cache - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = - number of IC sets; must be power of two - - nways = - number of IC ways - - blocksize = - IC block size in bytes; must be power of two - - ustates = - number of IC usage states (2, 3, 4 etc., max is 4) - - hitdelay = - number of cycles ic hit costs - - missdelay = - number of cycles ic miss costs -*/ - -section ic - enabled = 1 - nsets = 512 - nways = 1 - blocksize = 16 -end - - -/* DC SECTION - - This section configures the Data Cache - - enabled = 0/1 - '0': disabled - '1': enabled - (NOTE: UPR bit is set) - - nsets = - number of DC sets; must be power of two - - nways = - number of DC ways - - blocksize = - DC block size in bytes; must be power of two - - ustates = - number of DC usage states (2, 3, 4 etc., max is 4) - - load_hitdelay = - number of cycles dc load hit costs - - load_missdelay = - number of cycles dc load miss costs - - store_hitdelay = - number of cycles dc load hit costs - - store_missdelay = - number of cycles dc load miss costs -*/ - -section dc - enabled = 1 - nsets = 512 - nways = 1 - blocksize = 16 -end - - -/* SIM SECTION - - This section specifies how or1ksim should behave. - - verbose = 0/1 - '0': don't print extra messages - '1': print extra messages - - debug = 0-9 - 0 : no debug messages - 1-9: debug message level. - higher numbers produce more messages - - profile = 0/1 - '0': don't generate profiling file 'sim.profile' - '1': don't generate profiling file 'sim.profile' - - prof_fn = "" - optional filename for the profiling file. - valid only if 'profile' is set - - mprofile = 0/1 - '0': don't generate memory profiling file 'sim.mprofile' - '1': generate memory profiling file 'sim.mprofile' - - mprof_fn = "" - optional filename for the memory profiling file. - valid only if 'mprofile' is set - - history = 0/1 - '0': don't track execution flow - '1': track execution flow - Execution flow can be tracked for the simulator's - 'hist' command. Useful for back-trace debugging. - - iprompt = 0/1 - '0': start in (so what do we start in ???) - '1': start in interactive prompt. - - exe_log = 0/1 - '0': don't generate execution log. - '1': generate execution log. - - exe_log = default/hardware/simple/software - type of execution log, default is used when not specified - - exe_log_start = - index of first instruction to start logging, default = 0 - - exe_log_end = - index of last instruction to end logging; not limited, if omitted - - exe_log_marker = - specifies number of instructions before horizontal marker is - printed; if zero, markers are disabled (default) - - exe_log_fn = "" - filename for the exection log file. - valid only if 'exe_log' is set - - clkcycle = [ps|ns|us|ms] - specifies time measurement for one cycle -*/ - -section sim - verbose = 1 - debug = 0 - profile = 0 - prof_fn = "sim.profile" - - history = 1 - /* iprompt = 0 */ - exe_log = 1 - exe_log_type = hardware -/* exe_log_start = 0 */ -/* exe_log_end = 2000000 */ -/* exe_log_marker = 50 */ - exe_log_fn = "executed.log" - -/* clkcycle = 10000ns */ - -end - - -/* SECTION VAPI - - This section configures the Verification API, used for Advanced - Core Verification. - - enabled = 0/1 - '0': disbable VAPI server - '1': enable/start VAPI server - - server_port = - TCP/IP port to start VAPI server on - - log_enabled = 0/1 - '0': disable VAPI requests logging - '1': enable VAPI requests logging - - hide_device_id = 0/1 - '0': don't log device id (for compatability with old version) - '1': log device id - - - vapi_fn = - filename for the log file. - valid only if log_enabled is set -*/ - -section VAPI - enabled = 0 - server_port = 9998 - log_enabled = 0 - vapi_log_fn = "vapi.log" -end - - -/* CPU SECTION - - This section specifies various CPU parameters. - - ver = - rev = - specifies version and revision of the CPU used - - upr = - changes the upr register - - sr = - sets the initial Supervision Register value - - superscalar = 0/1 - '0': CPU is scalar - '1': CPU is superscalar - (modify cpu/or32/execute.c to tune superscalar model) - - hazards = 0/1 - '0': don't track data hazards in superscalar CPU - '1': track data hazards in superscalar CPU - If tracked, data hazards can be displayed using the - simulator's 'r' command. - - dependstats = 0/1 - '0': don't calculate inter-instruction dependencies. - '1': calculate inter-instruction dependencies. - If calculated, inter-instruction dependencies can be - displayed using the simulator's 'stat' command. - - sbuf_len = - length of store buffer (<= 256), 0 = disabled -*/ - -section cpu - ver = 0x1200 - rev = 0x0001 - /* upr = */ - superscalar = 0 - hazards = 1 - dependstats = 1 - sbuf_len = 1 -end - - -/* PM SECTION - - This section specifies Power Management parameters - - enabled = 0/1 - '0': disable power management - '1': enable power management -*/ - -section pm - enabled = 0 -end - - -/* BPB SECTION - - This section specifies how branch prediction should behave. - - enabled = 0/1 - '0': disable branch prediction - '1': enable branch prediction - - btic = 0/1 - '0': disable branch target instruction cache model - '1': enable branch target instruction cache model - - sbp_bf_fwd = 0/1 - Static branch prediction for 'l.bf' - '0': don't use forward prediction - '1': use forward prediction - - sbp_bnf_fwd = 0/1 - Static branch prediction for 'l.bnf' - '0': don't use forward prediction - '1': use forward prediction - - hitdelay = - number of cycles bpb hit costs - - missdelay = - number of cycles bpb miss costs -*/ - -section bpb - enabled = 1 - btic = 1 - sbp_bf_fwd = 0 - sbp_bnf_fwd = 0 - hitdelay = 0 - missdelay = 0 -end - - -/* DEBUG SECTION - - This sections specifies how the debug unit should behave. - - enabled = 0/1 - '0': disable debug unit - '1': enable debug unit - - gdb_enabled = 0/1 - '0': don't start gdb server - '1': start gdb server at port 'server_port' - - server_port = - TCP/IP port to start gdb server on - valid only if gdb_enabled is set - - vapi_id = - Used to create "fake" vapi log file containing the JTAG proxy messages. -*/ -/* -section debug - enabled = 1 - gdb_enabled = 1 - server_port = 12345 -end -*/ - -/* MC SECTION - - This section configures the memory controller - - enabled = 0/1 - '0': disable memory controller - '1': enable memory controller - - baseaddr = - address of first MC register - - POC = - Power On Configuration register - - index = - Index of this memory controller amongst all the memory controllers -*/ - -section mc - enabled = 1 - baseaddr = 0x60000000 - POC = 0x00000008 /* Power on configuration register */ - index = 0 -end - - -/* UART SECTION - - This section configures the UARTs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - address of first UART register for this device - - - channel = : - - The channel parameter indicates the source of received UART characters - and the sink for transmitted UART characters. - - The can be either "file", "xterm", "tcp", "fd", or "tty" - (without quotes). - - A) To send/receive characters from a pair of files, use a file - channel: - - channel=file:, - - B) To create an interactive terminal window, use an xterm channel: - - channel=xterm:[]* - - C) To create a bidirectional tcp socket which one could, for example, - access via telnet, use a tcp channel: - - channel=tcp: - - D) To cause the UART to read/write from existing numeric file - descriptors, use an fd channel: - - channel=fd:, - - E) To connect the UART to a physical serial port, create a tty - channel: - - channel=tty:device=/dev/ttyS0,baud=9600 - - irq = - irq number for this device - - 16550 = 0/1 - '0': this device is a UART16450 - '1': this device is a UART16550 - - jitter = - in msecs... time to block, -1 to disable it - - vapi_id = - VAPI id of this instance -*/ - -section uart - enabled = 1 - baseaddr = 0x90000000 - irq = 2 - /*channel = "file:uart0.rx,uart0.tx"*/ - channel = "tcp:10084" - jitter = -1 /* async behaviour */ - 16550 = 1 -end - - -/* DMA SECTION - - This section configures the DMAs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - address of first DMA register for this device - - irq = - irq number for this device - - vapi_id = - VAPI id of this instance -*/ - -section dma - enabled = 1 - baseaddr = 0x9a000000 - irq = 11 -end - - -/* ETHERNET SECTION - - This section configures the ETHERNETs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - address of first ethernet register for this device - - dma = - which controller is this ethernet "connected" to - - irq = - ethernet mac IRQ level - - rtx_type = - use 0 - file interface, 1 - socket interface - - rx_channel = - DMA channel used for RX - - tx_channel = - DMA channel used for TX - - rxfile = "" - filename, where to read data from - - txfile = "" - filename, where to write data to - - sockif = "" - interface name of ethernet socket - - vapi_id = - VAPI id of this instance -*/ - -section ethernet - enabled = 1 - baseaddr = 0x92000000 - dma = 0 - irq = 4 - rtx_type = 0 - tx_channel = 0 - rx_channel = 1 - rxfile = "eth0.rx" - txfile = "eth0.tx" - sockif = "eth0" -end - - -/* GPIO SECTION - - This section configures the GPIOs - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - address of first GPIO register for this device - - irq = - irq number for this device - - base_vapi_id = - first VAPI id of this instance - GPIO uses 8 consecutive VAPI IDs -*/ - -section gpio - enabled = 0 - baseaddr = 0x91000000 - irq = 3 - base_vapi_id = 0x0200 -end - -/* VGA SECTION - - This section configures the VGA/LCD controller - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - address of first VGA register - - irq = - irq number for this device - - refresh_rate = - number of cycles between screen dumps - - filename = "" - template name for generated names (e.g. "primary" produces "primary0023.bmp") -*/ - -section vga - enabled = 1 - baseaddr = 0x97100000 - irq = 8 - refresh_rate = 100000 - filename = "primary" -end - - -/* TICK TIMER SECTION - - This section configures tick timer - - enabled = 0/1 - whether tick timer is enabled -*/ -/* -section tick - enabled = 1 - irq = 3 -end -*/ -/* -section pic - enabled = 1 - edge_trigger = 1 -end -*/ - -/* FB SECTION - - This section configures the frame buffer - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - baseaddr = - base address of frame buffer - - paladdr = - base address of first palette entry - - refresh_rate = - number of cycles between screen dumps - - filename = "" - template name for generated names (e.g. "primary" produces "primary0023.bmp") -*/ -/* -section fb - enabled = 1 - baseaddr = 0x97000000 - refresh_rate = 1000000 - filename = "primary" -end -*/ - -/* KBD SECTION - - This section configures the PS/2 compatible keyboard - - baseaddr = - base address of the keyboard device - - rxfile = "" - filename, where to read data from -*/ -/* -section kbd - enabled = 1 - irq = 5 - baseaddr = 0x94000000 - rxfile = "kbd.rx" -end -*/ - -/* ATA SECTION - - This section configures the ATA/ATAPI host controller - - baseaddr = - address of first ATA register - - enabled = <0|1> - Enable/disable the peripheral. By default if it is enabled. - - irq = - irq number for this device - - debug = - debug level for ata models. - 0: no debug messages - 1: verbose messages - 3: normal messages (more messages than verbose) - 5: debug messages (normal debug messages) - 7: flow control messages (debug statemachine flows) - 9: low priority message (display everything the code does) - - dev_type0/1 = - ata device 0 type - 0: NO_CONNeCT: none (not connected) - 1: FILE : simulated harddisk - 2: LOCAL : local system harddisk - - dev_file0/1 = "" - filename for simulated ATA device - valid only if dev_type0 == 1 - - dev_size0/1 = - size of simulated hard-disk (in MBytes) - valid only if dev_type0 == 1 - - dev_packet0/1 = - 0: simulated ATA device does NOT implement PACKET command feature set - 1: simulated ATA device does implement PACKET command feature set - - FIXME: irq number -*/ -/* -section ata - enabled = 0 - baseaddr = 0x9e000000 - irq = 15 - - dev_type0 = 1 - dev_file0 = "/tmp/sim_atadev0" - dev_size0 = 1 - dev_packet0 = 0 - - dev_type1 = 0 - dev_file1 = "" - dev_size1 = 0 - dev_packet1 = 0 -end -*/ -

sw/support/orp.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/orp.ld =================================================================== --- sw/support/orp.ld (revision 2) +++ sw/support/orp.ld (nonexistent) @@ -1,69 +0,0 @@ -/* -MEMORY - { - vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000 - flash : ORIGIN = 0x04000000, LENGTH = 0x00200000 - ram : ORIGIN = 0x00002000, LENGTH = 0x001fe000 - icm : ORIGIN = 0x00800000, LENGTH = 0x00004000 - } - */ -MEMORY - { - reset : ORIGIN = 0x00000000, LENGTH = 0x00000200 - vectors : ORIGIN = 0x00000200, LENGTH = 0x00001000 - ram : ORIGIN = 0x00001200, LENGTH = 0x00006E00 /*0x8000 total*/ - } - -SECTIONS -{ - .reset : - { - *(.reset) - } > reset - - - - .vectors : - { - _vec_start = .; - *(.vectors) - _vec_end = .; - } > vectors - - .text : - { - *(.text) - } > ram - - .rodata : - { - *(.rodata) - *(.rodata.*) - } > ram - - .icm : - { - _icm_start = .; - *(.icm) - _icm_end = .; - } > ram - - .data : - { - _dst_beg = .; - *(.data) - _dst_end = .; - } > ram - - .bss : - { - *(.bss) - } > ram - - .stack (NOLOAD) : - { - *(.stack) - _src_addr = .; - } > ram - -}

sw/support/orp.ld Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/uart.h =================================================================== --- sw/support/uart.h (revision 2) +++ sw/support/uart.h (nonexistent) @@ -1,122 +0,0 @@ - -void uart_init(void); -void uart_putc(char); -char uart_getc(void); - -#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ -#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IER 1 /* Out: Interrupt Enable Register */ -#define UART_IIR 2 /* In: Interrupt ID Register */ -#define UART_FCR 2 /* Out: FIFO Control Register */ -#define UART_EFR 2 /* I/O: Extended Features Register */ - /* (DLAB=1, 16C660 only) */ -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ - -/* - * These are the definitions for the FIFO Control Register - * (16650 only) - */ -#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ -/* 16650 redefinitions */ -#define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */ -#define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */ -#define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */ -#define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */ -#define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */ -#define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */ -#define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */ -#define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ - -/* - * These are the definitions for the Line Control Register - * - * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting - * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. - */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_SBC 0x40 /* Set break control */ -#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ -#define UART_LCR_EPAR 0x10 /* Even parity select */ -#define UART_LCR_PARITY 0x08 /* Parity Enable */ -#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ -#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ -#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ -#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ -#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ - -/* - * These are the definitions for the Line Status Register - */ -#define UART_LSR_TEMT 0x40 /* Transmitter empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BI 0x10 /* Break interrupt indicator */ -#define UART_LSR_FE 0x08 /* Frame error indicator */ -#define UART_LSR_PE 0x04 /* Parity error indicator */ -#define UART_LSR_OE 0x02 /* Overrun error indicator */ -#define UART_LSR_DR 0x01 /* Receiver data ready */ - -/* - * These are the definitions for the Interrupt Identification Register - */ -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_TOI 0x0c /* Receive time out interrupt */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -/* - * These are the definitions for the Interrupt Enable Register - */ -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -/* - * These are the definitions for the Modem Control Register - */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ -#define UART_MCR_OUT2 0x08 /* Out2 complement */ -#define UART_MCR_OUT1 0x04 /* Out1 complement */ -#define UART_MCR_RTS 0x02 /* RTS complement */ -#define UART_MCR_DTR 0x01 /* DTR complement */ - -/* - * These are the definitions for the Modem Status Register - */ -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ -#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ - -/* - * These are the definitions for the Extended Features Register - * (StarTech 16C660 only, when DLAB=1) - */ -#define UART_EFR_CTS 0x80 /* CTS flow control */ -#define UART_EFR_RTS 0x40 /* RTS flow control */ -#define UART_EFR_SCD 0x20 /* Special character detect */ -#define UART_EFR_ENI 0x10 /* Enhanced Interrupt */ -

sw/support/uart.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/support.h =================================================================== --- sw/support/support.h (revision 2) +++ sw/support/support.h (nonexistent) @@ -1,66 +0,0 @@ -/* Support file for or32 tests. This file should is included - in each test. It calls main() function and add support for - basic functions */ - -#ifndef SUPPORT_H -#define SUPPORT_H - -#include -#include -#include -#define OR1K 1 //ME added -#if OR1K - -/* Register access macros */ -#define REG8(add) *((volatile unsigned char *)(add)) -#define REG16(add) *((volatile unsigned short *)(add)) -#define REG32(add) *((volatile unsigned long *)(add)) - -void printf(const char *fmt, ...); - -/* For writing into SPR. */ -void mtspr(unsigned long spr, unsigned long value); - -/* For reading SPR. */ -unsigned long mfspr(unsigned long spr); - -#else /* OR1K */ - -#include - -#endif /* OR1K */ - -/* Function to be called at entry point - not defined here. */ -int main (); - -/* Prints out a value */ -void report(unsigned long value); - -/* return value by making a syscall */ -extern void or32_exit (int i) __attribute__ ((__noreturn__)); - -/* memcpy clone */ -/* -extern void *memcpy (void *__restrict __dest, - __const void *__restrict __src, size_t __n); -*/ - -/* Timer functions */ -extern void start_timer(int); -extern unsigned int read_timer(int); - -extern unsigned long excpt_buserr; -extern unsigned long excpt_dpfault; -extern unsigned long excpt_ipfault; -extern unsigned long excpt_tick; -extern unsigned long excpt_align; -extern unsigned long excpt_illinsn; -extern unsigned long excpt_int; -extern unsigned long excpt_dtlbmiss; -extern unsigned long excpt_itlbmiss; -extern unsigned long excpt_range; -extern unsigned long excpt_syscall; -extern unsigned long excpt_break; -extern unsigned long excpt_trap; - -#endif

sw/support/support.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/support/vfnprintf.h =================================================================== --- sw/support/vfnprintf.h (revision 2) +++ sw/support/vfnprintf.h (nonexistent) @@ -1,2 +0,0 @@ - -int vfnprintf ( char *stream, size_t n, const char *format, va_list arg);

sw/support/vfnprintf.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/eth/eth.h =================================================================== --- sw/eth/eth.h (revision 2) +++ sw/eth/eth.h (nonexistent) @@ -1,94 +0,0 @@ - -#define ETH_MODER 0x00 -#define ETH_INT_SOURCE 0x04 -#define ETH_INT_MASK 0x08 -#define ETH_IPGT 0x0C -#define ETH_IPGR1 0x10 -#define ETH_IPGR2 0x14 -#define ETH_PACKETLEN 0x18 -#define ETH_COLLCONF 0x1C -#define ETH_TX_BD_NUM 0x20 -#define ETH_CTRLMODER 0x24 -#define ETH_MIIMODER 0x28 -#define ETH_MIICOMMAND 0x2C -#define ETH_MIIADDRESS 0x30 -#define ETH_MIITX_DATA 0x34 -#define ETH_MIIRX_DATA 0x38 -#define ETH_MIISTATUS 0x3C -#define ETH_MAC_ADDR0 0x40 -#define ETH_MAC_ADDR1 0x44 -#define ETH_HASH0_ADR 0x48 -#define ETH_HASH1_ADR 0x4C -#define ETH_TXCTRL 0x50 - -#define ETH_TXBD0H 0x404 -#define ETH_TXBD0L 0x400 - -#define ETH_RXBD0H 0x604 //this depends on TX_BD_NUM but this is the standard value -#define ETH_RXBD0L 0x600 //this depends on TX_BD_NUM but this is the standard value - -//MODER BITS -#define ETH_RECSMALL 0x00010000 -#define ETH_PAD 0x00008000 -#define ETH_HUGEN 0x00004000 -#define ETH_CRCEN 0x00002000 -#define ETH_DLYCRCEN 0x00001000 -#define ETH_FULLD 0x00000400 -#define ETH_EXDFREN 0x00000200 -#define ETH_NOBCKOF 0x00000100 -#define ETH_LOOPBCK 0x00000080 -#define ETH_IFG 0x00000040 -#define ETH_PRO 0x00000020 -#define ETH_IAM 0x00000010 -#define ETH_BRO 0x00000008 -#define ETH_NOPRE 0x00000004 -#define ETH_TXEN 0x00000002 -#define ETH_RXEN 0x00000001 - -//INTERRUPTS BITS -#define ETH_RXC 0x00000040 -#define ETH_TXC 0x00000020 -#define ETH_BUSY 0x00000010 -#define ETH_RXE 0x00000008 -#define ETH_RXB 0x00000004 -#define ETH_TXE 0x00000002 -#define ETH_TXB 0x00000001 - -//BUFFER DESCRIPTOR BITS -#define ETH_RXBD_EMPTY 0x00008000 -#define ETH_RXBD_IRQ 0x00004000 -#define ETH_RXBD_WRAP 0x00002000 -#define ETH_RXBD_CF 0x00000100 -#define ETH_RXBD_MISS 0x00000080 -#define ETH_RXBD_OR 0x00000040 -#define ETH_RXBD_IS 0x00000020 -#define ETH_RXBD_DN 0x00000010 -#define ETH_RXBD_TL 0x00000008 -#define ETH_RXBD_SF 0x00000004 -#define ETH_RXBD_CRC 0x00000002 -#define ETH_RXBD_LC 0x00000001 - -#define ETH_TXBD_READY 0x00008000 -#define ETH_TXBD_IRQ 0x00004000 -#define ETH_TXBD_WRAP 0x00002000 -#define ETH_TXBD_PAD 0x00001000 -#define ETH_TXBD_CRC 0x00000800 -#define ETH_TXBD_UR 0x00000100 -#define ETH_TXBD_RL 0x00000008 -#define ETH_TXBD_LC 0x00000004 -#define ETH_TXBD_DF 0x00000002 -#define ETH_TXBD_CS 0x00000001 - -//user defines -#define OWN_MAC_ADDRESS 0x554734228892 -#define BROADCAST_ADDRESS 0xFFFFFFFFFFFF - -#define HDR_LEN 14 -#define CRC_LEN 4 -#define BD_SND ( ETH_TXBD_READY | ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC ) -#define RX_READY ( ETH_RXBD_EMPTY | ETH_RXBD_IRQ | ETH_RXBD_WRAP ) -#define TX_READY ( ETH_TXBD_IRQ | ETH_TXBD_WRAP | ETH_TXBD_PAD | ETH_TXBD_CRC ) - -//~user defines - -

sw/eth/eth.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/eth/Makefile =================================================================== --- sw/eth/Makefile (revision 2) +++ sw/eth/Makefile (nonexistent) @@ -1,23 +0,0 @@ -include ../support/Makefile.inc -cases = eth-nocache eth-icdc -common = ../support/libsupport.a ../support/except.o - -all: $(cases) - -eth-nocache: eth.o ../support/reset-nocache.o $(common) - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 - $(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin - ../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex - ../utils/bin2vmem $@.bin > $@.vmem - - -eth-icdc: eth.o ../support/reset-icdc.o - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $(GCC_LIB_OPTS) -T ../support/orp.ld $? -o $@.or32 $(common) - $(OR32_TOOL_PREFIX)-objcopy -O binary $@.or32 $@.bin - ../utils/bin2hex $@.bin 1 -size_word > $@$(FLASH_MEM_HEX_FILE_SUFFIX).hex - ../utils/bin2vmem $@.bin > $@.vmem - - -eth.o: eth.c - $(OR32_TOOL_PREFIX)-gcc $(GCC_OPT) $? -c -o $@ -

sw/eth/Makefile Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/eth/eth.c =================================================================== --- sw/eth/eth.c (revision 2) +++ sw/eth/eth.c (nonexistent) @@ -1,233 +0,0 @@ -#include "../support/support.h" -#include "../support/board.h" -#include "../support/uart.h" - -#include "../support/spr_defs.h" - -#include "eth.h" - -void uart_print_str(char *); -void uart_print_long(unsigned long); - -// Dummy or32 except vectors -void buserr_except(){} -void dpf_except(){} -void ipf_except(){} -void lpint_except(){} -void align_except(){} -void illegal_except(){} -/*void hpint_except(){ - -}*/ -void dtlbmiss_except(){} -void itlbmiss_except(){} -void range_except(){} -void syscall_except(){} -void res1_except(){} -void trap_except(){} -void res2_except(){} - - -void uart_interrupt() -{ - char lala; - unsigned char interrupt_id; - interrupt_id = REG8(UART_BASE + UART_IIR); - if ( interrupt_id & UART_IIR_RDI ) - { - lala = uart_getc(); - uart_putc(lala+1); - } - -} - - -void uart_print_str(char *p) -{ - while(*p != 0) { - uart_putc(*p); - p++; - } -} - -void uart_print_long(unsigned long ul) -{ - int i; - char c; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - uart_putc(c); - } - -} - -void uart_print_short(unsigned long ul) -{ - int i; - char c; - char flag=0; - - - uart_print_str("0x"); - for(i=0; i<8; i++) { - - c = (char) (ul>>((7-i)*4)) & 0xf; - if(c >= 0x0 && c<=0x9) - c += '0'; - else - c += 'a' - 10; - if ((c != '0') || (i==7)) - flag=1; - if(flag) - uart_putc(c); - } - -} - -int tx_done; -int rx_done; -int rx_len; -char tx_data[1536]; //max length -char rx_data[1536]; - -void eth_init() -{ - //TXEN & RXEN = 1; PAD & CRC = 1; FULLD = 1 - REG32(ETH_BASE + ETH_MODER) = ETH_TXEN | ETH_RXEN | ETH_PAD | ETH_CRCEN | ETH_FULLD; - //PHY Address = 0x001 - REG32(ETH_BASE + ETH_MIIADDRESS) = 0x00000001; - - //enable all interrupts - REG32(ETH_BASE + ETH_INT_MASK) = ETH_RXC | ETH_TXC | ETH_BUSY | ETH_RXE | ETH_RXB | ETH_TXE | ETH_TXB; - - //set MAC ADDRESS - REG32(ETH_BASE + ETH_MAC_ADDR1) = OWN_MAC_ADDRESS >> 32; //low word = mac address high word - REG32(ETH_BASE + ETH_MAC_ADDR0) = OWN_MAC_ADDRESS; //mac address rest - - //configure TXBD0 - REG32(ETH_BASE + ETH_TXBD0H) = tx_data; //address used for tx_data - REG32(ETH_BASE + ETH_TXBD0L) = TX_READY; //length = 0 | PAD & CRC = 1 | IRQ & WR = 1 - - //configure RXBD0 - REG32(ETH_BASE + ETH_RXBD0H) = rx_data; //address used for tx_data - REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1 - - //set txdata - tx_data[0] = BROADCAST_ADDRESS >> 40; - tx_data[1] = BROADCAST_ADDRESS >> 32; - tx_data[2] = BROADCAST_ADDRESS >> 24; - tx_data[3] = BROADCAST_ADDRESS >> 16; - tx_data[4] = BROADCAST_ADDRESS >> 8; - tx_data[5] = BROADCAST_ADDRESS; - - tx_data[6] = OWN_MAC_ADDRESS >> 40; - tx_data[7] = OWN_MAC_ADDRESS >> 32; - tx_data[8] = OWN_MAC_ADDRESS >> 24; - tx_data[9] = OWN_MAC_ADDRESS >> 16; - tx_data[10] = OWN_MAC_ADDRESS >> 8; - tx_data[11] = OWN_MAC_ADDRESS; - - //erase interrupts - REG32(ETH_BASE + ETH_INT_SOURCE) = ETH_RXC | ETH_TXC | ETH_BUSY | ETH_RXE | ETH_RXB | ETH_TXE | ETH_TXB; - - tx_done = 1; - rx_done = 0; - rx_len = 0; -} - -void eth_send(int length) -{ - if (!tx_done) - return; - - tx_done = 0; - tx_data[12] = length >> 8; - tx_data[13] = length; - - REG32(ETH_BASE + ETH_TXBD0L) = (( 0x0000FFFF & ( length + HDR_LEN ) ) << 16) | BD_SND; -} - -void eth_receive() -{ - int i; - uart_print_str("Length: \n"); - uart_print_long(rx_len - HDR_LEN - CRC_LEN); - uart_print_str("\n"); - uart_print_str("Data: \n"); - for ( i = 0; i < rx_len - HDR_LEN - CRC_LEN; i++ ) - { - uart_print_short(rx_data[i+HDR_LEN]); -// uart_print_str("\n"); - } - - rx_done = 0; - rx_len = 0; -} - -void eth_interrupt() -{ - unsigned long source = REG32(ETH_BASE + ETH_INT_SOURCE); - switch (source) - { - case ETH_TXB: - tx_done = 1; - //erase interrupt - REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_TXB; - break; - - case ETH_RXB: - rx_done = 1; - //erase interrupt - REG32(ETH_BASE + ETH_INT_SOURCE) |= ETH_RXB; - //accept further data (reset RXBD to empty) - rx_len = (REG32(ETH_BASE + ETH_RXBD0L) >> 16); - REG32(ETH_BASE + ETH_RXBD0L) = RX_READY; //len = 0 | IRQ & WR = 1 | EMPTY = 1 - break; - - default: - break; - } -} - -int main() -{ - unsigned long lalala; - uart_init(); - - int_init(); - int_add(UART_IRQ, &uart_interrupt); - int_add(ETH_IRQ, ð_interrupt); - - /* We can't use printf because in this simple example - we don't link C library. */ - uart_print_str("Hello World.\n\r"); - - eth_init(); - - tx_data[14] = 0xFF; - tx_data[15] = 0x2B; - tx_data[16] = 0x40; - tx_data[17] = 0x50; - - eth_send(4); - - while(1) - { - if (rx_done) - { - eth_receive(); - } - } - - report(0xdeaddead); - or32_exit(0); -} -

sw/eth/eth.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/bin2flimg.c =================================================================== --- sw/utils/bin2flimg.c (revision 2) +++ sw/utils/bin2flimg.c (nonexistent) @@ -1,92 +0,0 @@ -/*$$HEADER*/ -/******************************************************************************/ -/* */ -/* H E A D E R I N F O R M A T I O N */ -/* */ -/******************************************************************************/ - -// Project Name : ORPSoC v2 -// File Name : bin2flimg.c -// Prepared By : -// Project Start : - -/*$$COPYRIGHT NOTICE*/ -/******************************************************************************/ -/* */ -/* C O P Y R I G H T N O T I C E */ -/* */ -/******************************************************************************/ -/* - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; - version 2.1 of the License, a copy of which is available from - http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/*$$DESCRIPTION*/ -/******************************************************************************/ -/* */ -/* D E S C R I P T I O N */ -/* */ -/******************************************************************************/ -// -// Generate flimg output to stdout from binary file input -// - -#include -#include - -int main(int argc, char **argv) -{ - - FILE *fd; - int c, j, width; - unsigned long word; - - if(argc < 3) { - fprintf(stderr,"no input file specified\n"); - exit(1); - } - if(argc > 3) { - fprintf(stderr,"too many input files (more than one) specified\n"); - exit(1); - } - - width = atoi(argv[1]); - - fd = fopen( argv[2], "r" ); - if (fd == NULL) { - fprintf(stderr,"failed to open input file: %s\n",argv[1]); - exit(1); - } - - while (!feof(fd)) { - j = 0; - word = 0; - while (j < width) { - c = fgetc(fd); - if (c == EOF) { - c = 0; - } - word = (word << 8) + c; - j++; - } - if(width == 1) - printf("%.2lx\n", word); - else if(width == 2) - printf("%.4lx\n", word); - else - printf("%.8lx\n", word); - } - return 0; -}

sw/utils/bin2flimg.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/Makefile =================================================================== --- sw/utils/Makefile (revision 2) +++ sw/utils/Makefile (nonexistent) @@ -1,67 +0,0 @@ -#*$$HEADER*# -#******************************************************************************# -#* *# -#* H E A D E R I N F O R M A T I O N *# -#* *# -#******************************************************************************# - -## Project Name : ORPSoC v2 -## File Name : Makefile -## Prepared By : -## Project Start : - -#*$$COPYRIGHT NOTICE*# -#******************************************************************************# -#* *# -#* C O P Y R I G H T N O T I C E *# -#* *# -#******************************************************************************# -#* -# This library is free software; you can redistribute it and/or -# modify it under the terms of the GNU Lesser General Public -# License as published by the Free Software Foundation; -# version 2.1 of the License, a copy of which is available from -# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. -# -# This library is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# Lesser General Public License for more details. -# -# You should have received a copy of the GNU Lesser General Public -# License along with this library; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -# -#*$$DESCRIPTION*# -#******************************************************************************# -#* *# -#* D E S C R I P T I O N *# -#* *# -#******************************************************************************# -## -## Makefile for the ORPSoC software utilities -## - -PROGRAMS = bin2c bin2srec bin2flimg bin2hex bin2vmem -# NB: 'loader' not in that list - -CC = gcc -CFLAGS = -O2 -Wall - -% : %.c - @/bin/rm -f $@ - $(CC) -o $@ $(CFLAGS) $< - -all: $(PROGRAMS) or32-idecode - -# redundant stanza: -loader: loader.c - $(CC) -o $@ $(CFLAGS) $< - -.PHONY or32-idecode: -or32-idecode: - $(MAKE) -C or32-idecode - -clean: - /bin/rm -f $(PROGRAMS) *~ *.bak - $(MAKE) -C ./or32-idecode clean

sw/utils/Makefile Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/merge2srec =================================================================== --- sw/utils/merge2srec (revision 2) +++ sw/utils/merge2srec (nonexistent) @@ -1,10 +0,0 @@ -#!/bin/sh - -LINE_NB=`wc -l < $1` -MIN=`expr $LINE_NB - 1` - -head -$MIN $1 > out.exo - -cat $2 >> out.exo -tail -1 $1 >> out.exo -

sw/utils/merge2srec Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/bin2c.c =================================================================== --- sw/utils/bin2c.c (revision 2) +++ sw/utils/bin2c.c (nonexistent) @@ -1,70 +0,0 @@ -/*$$HEADER*/ -/******************************************************************************/ -/* */ -/* H E A D E R I N F O R M A T I O N */ -/* */ -/******************************************************************************/ - -// Project Name : ORPSoC v2 -// File Name : bin2c.c -// Prepared By : -// Project Start : - -/*$$COPYRIGHT NOTICE*/ -/******************************************************************************/ -/* */ -/* C O P Y R I G H T N O T I C E */ -/* */ -/******************************************************************************/ -/* - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; - version 2.1 of the License, a copy of which is available from - http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/*$$DESCRIPTION*/ -/******************************************************************************/ -/* */ -/* D E S C R I P T I O N */ -/* */ -/******************************************************************************/ -// -// Generate C file containing binary data in hex format in an array -// - -#include - -int main(void) -{ - - int c, i = 0; - - printf("#ifdef HAVE_CONFIG_H\n"); - printf("# include \"config.h\"\n"); - printf("#endif\n\n"); - printf("#ifdef EMBED\n"); - - printf("unsigned char flash_data[] = {\n"); - - while((c = getchar()) != EOF) { - printf("0x%.2x, ", c); - if(!(i % 32)) - printf("\n"); - i++; - } - - printf(" };\n"); - printf("#endif\n"); - return(0); -}

sw/utils/bin2c.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/or32.h =================================================================== --- sw/utils/or32-idecode/or32.h (revision 2) +++ sw/utils/or32-idecode/or32.h (nonexistent) @@ -1,193 +0,0 @@ -/* Table of opcodes for the OpenRISC 1000 ISA. - Copyright 2002, 2003 Free Software Foundation, Inc. - Contributed by Damjan Lampret (lampret@opencores.org). - - This file is part of or1k_gen_isa, or1ksim, GDB and GAS. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -/* We treat all letters the same in encode/decode routines so - we need to assign some characteristics to them like signess etc. */ - -#ifndef OR32_H_ISA -#define OR32_H_ISA - -#define NUM_UNSIGNED (0) -#define NUM_SIGNED (1) - -#define MAX_GPRS 32 -#define PAGE_SIZE 8192 -#undef __HALF_WORD_INSN__ - -#define OPERAND_DELIM (',') - -#define OR32_IF_DELAY (1) -#define OR32_W_FLAG (2) -#define OR32_R_FLAG (4) - -#if defined(HAS_EXECUTION) -# if SIMPLE_EXECUTION -# include "simpl32_defs.h" -# elif DYNAMIC_EXECUTION -# include "dyn32_defs.h" -# else -extern void l_none (void); -# endif -#else -extern void l_none (void); -#endif - -struct or32_letter -{ - char letter; - int sign; - /* int reloc; relocation per letter ?? */ -}; - -enum insn_type { - it_unknown, - it_exception, - it_arith, - it_shift, - it_compare, - it_branch, - it_jump, - it_load, - it_store, - it_movimm, - it_move, - it_extend, - it_nop, - it_mac, - it_float }; - -/* Main instruction specification array. */ -struct or32_opcode -{ - /* Name of the instruction. */ - char *name; - - /* A string of characters which describe the operands. - Valid characters are: - ,() Itself. Characters appears in the assembly code. - rA Register operand. - rB Register operand. - rD Register operand. - I An immediate operand, range -32768 to 32767. - J An immediate operand, range . (unused) - K An immediate operand, range 0 to 65535. - L An immediate operand, range 0 to 63. - M An immediate operand, range . (unused) - N An immediate operand, range -33554432 to 33554431. - O An immediate operand, range . (unused). */ - char *args; - - /* Opcode and operand encoding. */ - char *encoding; - -#ifdef HAS_EXECUTION -# if COMPLEX_EXECUTION - char *function_name; -# elif SIMPLE_EXECUTION - void (*exec)(struct iqueue_entry *); -# else /* DYNAMIC_EXECUTION */ - void (*exec)(struct op_queue *opq, int param_t[3], orreg_t param[3], int); -# endif -#else /* HAS_EXECUTION */ - void (*exec)(void); -#endif - - unsigned int flags; - enum insn_type func_unit; -}; - -#define OPTYPE_LAST (0x80000000) -#define OPTYPE_OP (0x40000000) -#define OPTYPE_REG (0x20000000) -#define OPTYPE_SIG (0x10000000) -#define OPTYPE_DIS (0x08000000) -#define OPTYPE_DST (0x04000000) -#define OPTYPE_SBIT (0x00001F00) -#define OPTYPE_SHR (0x0000001F) -#define OPTYPE_SBIT_SHR (8) - -/* MM: Data how to decode operands. */ -extern struct insn_op_struct -{ - unsigned long type; - unsigned long data; -} **op_start; - -/* Leaf flag used in automata building */ -#define LEAF_FLAG (0x80000000) - -struct temp_insn_struct -{ - unsigned long insn; - unsigned long insn_mask; - int in_pass; -}; - -extern unsigned long *automata; -extern struct temp_insn_struct *ti; - -extern const struct or32_letter or32_letters[]; - -extern const struct or32_opcode or32_opcodes[]; - -extern const unsigned int or32_num_opcodes; - -/* Calculates instruction length in bytes. Always 4 for OR32. */ -extern int insn_len (int); - -/* Is individual insn's operand signed or unsigned? */ -extern int letter_signed (char); - -/* Number of letters in the individual lettered operand. */ -extern int letter_range (char); - -/* MM: Returns index of given instruction name. */ -extern int insn_index (char *); - -/* MM: Returns instruction name from index. */ -extern const char *insn_name (int); - -/* MM: Constructs new FSM, based on or32_opcodes. */ -extern void build_automata (void); - -/* MM: Destructs FSM. */ -extern void destruct_automata (void); - -/* MM: Decodes instruction using FSM. Call build_automata first. */ -extern int insn_decode (unsigned int); - -/* Disassemble one instruction from insn to disassemble. - Return the size of the instruction. */ -int disassemble_insn (unsigned long); - -/* Extract instruction */ -extern unsigned long insn_extract(char,char*); - -/* Disassemble one instruction from insn index. - Return the size of the instruction. */ -int disassemble_index (unsigned long,int); - -/* FOR INTERNAL USE ONLY */ -/* Automatically does zero- or sign- extension and also finds correct - sign bit position if sign extension is correct extension. Which extension - is proper is figured out from letter description. */ -unsigned long extend_imm(unsigned long,char); - -#endif

sw/utils/or32-idecode/or32.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/Makefile =================================================================== --- sw/utils/or32-idecode/Makefile (revision 2) +++ sw/utils/or32-idecode/Makefile (nonexistent) @@ -1,60 +0,0 @@ -#*$$HEADER*# -#******************************************************************************# -#* *# -#* H E A D E R I N F O R M A T I O N *# -#* *# -#******************************************************************************# - -## Project Name : ORPSoC v2 -## File Name : Makefile -## Prepared By : -## Project Start : - -#*$$COPYRIGHT NOTICE*# -#******************************************************************************# -#* *# -#* C O P Y R I G H T N O T I C E *# -#* *# -#******************************************************************************# -#* -# This library is free software; you can redistribute it and/or -# modify it under the terms of the GNU Lesser General Public -# License as published by the Free Software Foundation; -# version 2.1 of the License, a copy of which is available from -# http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. -# -# This library is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# Lesser General Public License for more details. -# -# You should have received a copy of the GNU Lesser General Public -# License along with this library; if not, write to the Free Software -# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -# -#*$$DESCRIPTION*# -#******************************************************************************# -#* *# -#* D E S C R I P T I O N *# -#* *# -#******************************************************************************# -## -## Makefile for the ORPSoC software utilities -## - -CC=gcc -APP=or32-idecode - -all: or32-opc.o or32-dis.o - $(CC) $^ -o $(APP) - @echo - @echo "Build complete" - @echo "Run the program with an example: ./$(APP) < example_input" - @echo - @echo "For usage: ./$(APP) -h" - @echo -%.o: %.c - $(CC) -O2 -c $*.c -o $*.o - -clean: - rm -f *.o $(APP) *~

sw/utils/or32-idecode/Makefile Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/bfd.h =================================================================== --- sw/utils/or32-idecode/bfd.h (revision 2) +++ sw/utils/or32-idecode/bfd.h (nonexistent) @@ -1,5457 +0,0 @@ -/* DO NOT EDIT! -*- buffer-read-only: t -*- This file is automatically - generated from "bfd-in.h", "init.c", "opncls.c", "libbfd.c", - "bfdio.c", "bfdwin.c", "section.c", "archures.c", "reloc.c", - "syms.c", "bfd.c", "archive.c", "corefile.c", "targets.c", "format.c", - "linker.c" and "simple.c". - Run "make headers" in your build bfd/ to regenerate. */ - -/* Main header file for the bfd library -- portable access to object files. - - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 - Free Software Foundation, Inc. - - Contributed by Cygnus Support. - - This file is part of BFD, the Binary File Descriptor library. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifndef __BFD_H_SEEN__ -#define __BFD_H_SEEN__ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "ansidecl.h" -#include "symcat.h" -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#ifndef SABER -/* This hack is to avoid a problem with some strict ANSI C preprocessors. - The problem is, "32_" is not a valid preprocessing token, and we don't - want extra underscores (e.g., "nlm_32_"). The XCONCAT2 macro will - cause the inner CONCAT2 macros to be evaluated first, producing - still-valid pp-tokens. Then the final concatenation can be done. */ -#undef CONCAT4 -#define CONCAT4(a,b,c,d) XCONCAT2(CONCAT2(a,b),CONCAT2(c,d)) -#endif -#endif - -/* This is a utility macro to handle the situation where the code - wants to place a constant string into the code, followed by a - comma and then the length of the string. Doing this by hand - is error prone, so using this macro is safer. */ -#define STRING_COMMA_LEN(STR) (STR), (sizeof (STR) - 1) -/* Unfortunately it is not possible to use the STRING_COMMA_LEN macro - to create the arguments to another macro, since the preprocessor - will mis-count the number of arguments to the outer macro (by not - evaluating STRING_COMMA_LEN and so missing the comma). This is a - problem for example when trying to use STRING_COMMA_LEN to build - the arguments to the strncmp() macro. Hence this alternative - definition of strncmp is provided here. - - Note - these macros do NOT work if STR2 is not a constant string. */ -#define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0) - /* strcpy() can have a similar problem, but since we know we are - copying a constant string, we can use memcpy which will be faster - since there is no need to check for a NUL byte inside STR. We - can also save time if we do not need to copy the terminating NUL. */ -#define LITMEMCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2) - 1) -#define LITSTRCPY(DEST,STR2) memcpy ((DEST), (STR2), sizeof (STR2)) - - -/* The word size used by BFD on the host. This may be 64 with a 32 - bit target if the host is 64 bit, or if other 64 bit targets have - been selected with --enable-targets, or if --enable-64-bit-bfd. */ -#define BFD_ARCH_SIZE 32 - -/* The word size of the default bfd target. */ -#define BFD_DEFAULT_TARGET_SIZE 32 - -#define BFD_HOST_64BIT_LONG 0 -#define BFD_HOST_64BIT_LONG_LONG 1 -#if 1 -#define BFD_HOST_64_BIT long long -#define BFD_HOST_U_64_BIT unsigned long long -typedef BFD_HOST_64_BIT bfd_int64_t; -typedef BFD_HOST_U_64_BIT bfd_uint64_t; -#endif - -#if BFD_ARCH_SIZE >= 64 -#define BFD64 -#endif - -#ifndef INLINE -#if __GNUC__ >= 2 -#define INLINE __inline__ -#else -#define INLINE -#endif -#endif - -/* Declaring a type wide enough to hold a host long and a host pointer. */ -#define BFD_HOSTPTR_T unsigned long -typedef BFD_HOSTPTR_T bfd_hostptr_t; - -/* Forward declaration. */ -typedef struct bfd bfd; - -/* Boolean type used in bfd. Too many systems define their own - versions of "boolean" for us to safely typedef a "boolean" of - our own. Using an enum for "bfd_boolean" has its own set of - problems, with strange looking casts required to avoid warnings - on some older compilers. Thus we just use an int. - - General rule: Functions which are bfd_boolean return TRUE on - success and FALSE on failure (unless they're a predicate). */ - -typedef int bfd_boolean; -#undef FALSE -#undef TRUE -#define FALSE 0 -#define TRUE 1 - -#ifdef BFD64 - -#ifndef BFD_HOST_64_BIT - #error No 64 bit integer type available -#endif /* ! defined (BFD_HOST_64_BIT) */ - -typedef BFD_HOST_U_64_BIT bfd_vma; -typedef BFD_HOST_64_BIT bfd_signed_vma; -typedef BFD_HOST_U_64_BIT bfd_size_type; -typedef BFD_HOST_U_64_BIT symvalue; - -#ifndef fprintf_vma -#if BFD_HOST_64BIT_LONG -#define sprintf_vma(s,x) sprintf (s, "%016lx", x) -#define fprintf_vma(f,x) fprintf (f, "%016lx", x) -#elif BFD_HOST_64BIT_LONG_LONG -#ifndef __MSVCRT__ -#define sprintf_vma(s,x) sprintf (s, "%016llx", x) -#define fprintf_vma(f,x) fprintf (f, "%016llx", x) -#else -#define sprintf_vma(s,x) sprintf (s, "%016I64x", x) -#define fprintf_vma(f,x) fprintf (f, "%016I64x", x) -#endif -#else -#define _bfd_int64_low(x) ((unsigned long) (((x) & 0xffffffff))) -#define _bfd_int64_high(x) ((unsigned long) (((x) >> 32) & 0xffffffff)) -#define fprintf_vma(s,x) \ - fprintf ((s), "%08lx%08lx", _bfd_int64_high (x), _bfd_int64_low (x)) -#define sprintf_vma(s,x) \ - sprintf ((s), "%08lx%08lx", _bfd_int64_high (x), _bfd_int64_low (x)) -#endif -#endif - -#else /* not BFD64 */ - -/* Represent a target address. Also used as a generic unsigned type - which is guaranteed to be big enough to hold any arithmetic types - we need to deal with. */ -typedef unsigned long bfd_vma; - -/* A generic signed type which is guaranteed to be big enough to hold any - arithmetic types we need to deal with. Can be assumed to be compatible - with bfd_vma in the same way that signed and unsigned ints are compatible - (as parameters, in assignment, etc). */ -typedef long bfd_signed_vma; - -typedef unsigned long symvalue; -typedef unsigned long bfd_size_type; - -/* Print a bfd_vma x on stream s. */ -#define fprintf_vma(s,x) fprintf (s, "%08lx", x) -#define sprintf_vma(s,x) sprintf (s, "%08lx", x) - -#endif /* not BFD64 */ - -#define HALF_BFD_SIZE_TYPE \ - (((bfd_size_type) 1) << (8 * sizeof (bfd_size_type) / 2)) - -#ifndef BFD_HOST_64_BIT -/* Fall back on a 32 bit type. The idea is to make these types always - available for function return types, but in the case that - BFD_HOST_64_BIT is undefined such a function should abort or - otherwise signal an error. */ -typedef bfd_signed_vma bfd_int64_t; -typedef bfd_vma bfd_uint64_t; -#endif - -/* An offset into a file. BFD always uses the largest possible offset - based on the build time availability of fseek, fseeko, or fseeko64. */ -typedef BFD_HOST_64_BIT file_ptr; -typedef unsigned BFD_HOST_64_BIT ufile_ptr; - -extern void bfd_sprintf_vma (bfd *, char *, bfd_vma); -extern void bfd_fprintf_vma (bfd *, void *, bfd_vma); - -#define printf_vma(x) fprintf_vma(stdout,x) -#define bfd_printf_vma(abfd,x) bfd_fprintf_vma (abfd,stdout,x) - -typedef unsigned int flagword; /* 32 bits of flags */ -typedef unsigned char bfd_byte; - -/* File formats. */ - -typedef enum bfd_format -{ - bfd_unknown = 0, /* File format is unknown. */ - bfd_object, /* Linker/assembler/compiler output. */ - bfd_archive, /* Object archive file. */ - bfd_core, /* Core dump. */ - bfd_type_end /* Marks the end; don't use it! */ -} -bfd_format; - -/* Symbols and relocation. */ - -/* A count of carsyms (canonical archive symbols). */ -typedef unsigned long symindex; - -/* How to perform a relocation. */ -typedef const struct reloc_howto_struct reloc_howto_type; - -#define BFD_NO_MORE_SYMBOLS ((symindex) ~0) - -/* General purpose part of a symbol X; - target specific parts are in libcoff.h, libaout.h, etc. */ - -#define bfd_get_section(x) ((x)->section) -#define bfd_get_output_section(x) ((x)->section->output_section) -#define bfd_set_section(x,y) ((x)->section) = (y) -#define bfd_asymbol_base(x) ((x)->section->vma) -#define bfd_asymbol_value(x) (bfd_asymbol_base(x) + (x)->value) -#define bfd_asymbol_name(x) ((x)->name) -/*Perhaps future: #define bfd_asymbol_bfd(x) ((x)->section->owner)*/ -#define bfd_asymbol_bfd(x) ((x)->the_bfd) -#define bfd_asymbol_flavour(x) (bfd_asymbol_bfd(x)->xvec->flavour) - -/* A canonical archive symbol. */ -/* This is a type pun with struct ranlib on purpose! */ -typedef struct carsym -{ - char *name; - file_ptr file_offset; /* Look here to find the file. */ -} -carsym; /* To make these you call a carsymogen. */ - -/* Used in generating armaps (archive tables of contents). - Perhaps just a forward definition would do? */ -struct orl /* Output ranlib. */ -{ - char **name; /* Symbol name. */ - union - { - file_ptr pos; - bfd *abfd; - } u; /* bfd* or file position. */ - int namidx; /* Index into string table. */ -}; - -/* Linenumber stuff. */ -typedef struct lineno_cache_entry -{ - unsigned int line_number; /* Linenumber from start of function. */ - union - { - struct bfd_symbol *sym; /* Function name. */ - bfd_vma offset; /* Offset into section. */ - } u; -} -alent; - -/* Object and core file sections. */ - -#define align_power(addr, align) \ - (((addr) + ((bfd_vma) 1 << (align)) - 1) & ((bfd_vma) -1 << (align))) - -typedef struct bfd_section *sec_ptr; - -#define bfd_get_section_name(bfd, ptr) ((ptr)->name + 0) -#define bfd_get_section_vma(bfd, ptr) ((ptr)->vma + 0) -#define bfd_get_section_lma(bfd, ptr) ((ptr)->lma + 0) -#define bfd_get_section_alignment(bfd, ptr) ((ptr)->alignment_power + 0) -#define bfd_section_name(bfd, ptr) ((ptr)->name) -#define bfd_section_size(bfd, ptr) ((ptr)->size) -#define bfd_get_section_size(ptr) ((ptr)->size) -#define bfd_section_vma(bfd, ptr) ((ptr)->vma) -#define bfd_section_lma(bfd, ptr) ((ptr)->lma) -#define bfd_section_alignment(bfd, ptr) ((ptr)->alignment_power) -#define bfd_get_section_flags(bfd, ptr) ((ptr)->flags + 0) -#define bfd_get_section_userdata(bfd, ptr) ((ptr)->userdata) - -#define bfd_is_com_section(ptr) (((ptr)->flags & SEC_IS_COMMON) != 0) - -#define bfd_set_section_vma(bfd, ptr, val) (((ptr)->vma = (ptr)->lma = (val)), ((ptr)->user_set_vma = TRUE), TRUE) -#define bfd_set_section_alignment(bfd, ptr, val) (((ptr)->alignment_power = (val)),TRUE) -#define bfd_set_section_userdata(bfd, ptr, val) (((ptr)->userdata = (val)),TRUE) -/* Find the address one past the end of SEC. */ -#define bfd_get_section_limit(bfd, sec) \ - (((sec)->rawsize ? (sec)->rawsize : (sec)->size) \ - / bfd_octets_per_byte (bfd)) - -/* Return TRUE if section has been discarded. */ -#define elf_discarded_section(sec) \ - (!bfd_is_abs_section (sec) \ - && bfd_is_abs_section ((sec)->output_section) \ - && (sec)->sec_info_type != ELF_INFO_TYPE_MERGE \ - && (sec)->sec_info_type != ELF_INFO_TYPE_JUST_SYMS) - -/* Forward define. */ -struct stat; - -typedef enum bfd_print_symbol -{ - bfd_print_symbol_name, - bfd_print_symbol_more, - bfd_print_symbol_all -} bfd_print_symbol_type; - -/* Information about a symbol that nm needs. */ - -typedef struct _symbol_info -{ - symvalue value; - char type; - const char *name; /* Symbol name. */ - unsigned char stab_type; /* Stab type. */ - char stab_other; /* Stab other. */ - short stab_desc; /* Stab desc. */ - const char *stab_name; /* String for stab type. */ -} symbol_info; - -/* Get the name of a stabs type code. */ - -extern const char *bfd_get_stab_name (int); - -/* Hash table routines. There is no way to free up a hash table. */ - -/* An element in the hash table. Most uses will actually use a larger - structure, and an instance of this will be the first field. */ - -struct bfd_hash_entry -{ - /* Next entry for this hash code. */ - struct bfd_hash_entry *next; - /* String being hashed. */ - const char *string; - /* Hash code. This is the full hash code, not the index into the - table. */ - unsigned long hash; -}; - -/* A hash table. */ - -struct bfd_hash_table -{ - /* The hash array. */ - struct bfd_hash_entry **table; - /* A function used to create new elements in the hash table. The - first entry is itself a pointer to an element. When this - function is first invoked, this pointer will be NULL. However, - having the pointer permits a hierarchy of method functions to be - built each of which calls the function in the superclass. Thus - each function should be written to allocate a new block of memory - only if the argument is NULL. */ - struct bfd_hash_entry *(*newfunc) - (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); - /* An objalloc for this hash table. This is a struct objalloc *, - but we use void * to avoid requiring the inclusion of objalloc.h. */ - void *memory; - /* The number of slots in the hash table. */ - unsigned int size; - /* The number of entries in the hash table. */ - unsigned int count; - /* The size of elements. */ - unsigned int entsize; - /* If non-zero, don't grow the hash table. */ - unsigned int frozen:1; -}; - -/* Initialize a hash table. */ -extern bfd_boolean bfd_hash_table_init - (struct bfd_hash_table *, - struct bfd_hash_entry *(*) (struct bfd_hash_entry *, - struct bfd_hash_table *, - const char *), - unsigned int); - -/* Initialize a hash table specifying a size. */ -extern bfd_boolean bfd_hash_table_init_n - (struct bfd_hash_table *, - struct bfd_hash_entry *(*) (struct bfd_hash_entry *, - struct bfd_hash_table *, - const char *), - unsigned int, unsigned int); - -/* Free up a hash table. */ -extern void bfd_hash_table_free - (struct bfd_hash_table *); - -/* Look up a string in a hash table. If CREATE is TRUE, a new entry - will be created for this string if one does not already exist. The - COPY argument must be TRUE if this routine should copy the string - into newly allocated memory when adding an entry. */ -extern struct bfd_hash_entry *bfd_hash_lookup - (struct bfd_hash_table *, const char *, bfd_boolean create, - bfd_boolean copy); - -/* Insert an entry in a hash table. */ -extern struct bfd_hash_entry *bfd_hash_insert - (struct bfd_hash_table *, const char *, unsigned long); - -/* Replace an entry in a hash table. */ -extern void bfd_hash_replace - (struct bfd_hash_table *, struct bfd_hash_entry *old, - struct bfd_hash_entry *nw); - -/* Base method for creating a hash table entry. */ -extern struct bfd_hash_entry *bfd_hash_newfunc - (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); - -/* Grab some space for a hash table entry. */ -extern void *bfd_hash_allocate - (struct bfd_hash_table *, unsigned int); - -/* Traverse a hash table in a random order, calling a function on each - element. If the function returns FALSE, the traversal stops. The - INFO argument is passed to the function. */ -extern void bfd_hash_traverse - (struct bfd_hash_table *, - bfd_boolean (*) (struct bfd_hash_entry *, void *), - void *info); - -/* Allows the default size of a hash table to be configured. New hash - tables allocated using bfd_hash_table_init will be created with - this size. */ -extern void bfd_hash_set_default_size (bfd_size_type); - -/* This structure is used to keep track of stabs in sections - information while linking. */ - -struct stab_info -{ - /* A hash table used to hold stabs strings. */ - struct bfd_strtab_hash *strings; - /* The header file hash table. */ - struct bfd_hash_table includes; - /* The first .stabstr section. */ - struct bfd_section *stabstr; -}; - -#define COFF_SWAP_TABLE (void *) &bfd_coff_std_swap_table - -/* User program access to BFD facilities. */ - -/* Direct I/O routines, for programs which know more about the object - file than BFD does. Use higher level routines if possible. */ - -extern bfd_size_type bfd_bread (void *, bfd_size_type, bfd *); -extern bfd_size_type bfd_bwrite (const void *, bfd_size_type, bfd *); -extern int bfd_seek (bfd *, file_ptr, int); -extern file_ptr bfd_tell (bfd *); -extern int bfd_flush (bfd *); -extern int bfd_stat (bfd *, struct stat *); - -/* Deprecated old routines. */ -#if __GNUC__ -#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \ - (warn_deprecated ("bfd_read", __FILE__, __LINE__, __FUNCTION__), \ - bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD))) -#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \ - (warn_deprecated ("bfd_write", __FILE__, __LINE__, __FUNCTION__), \ - bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD))) -#else -#define bfd_read(BUF, ELTSIZE, NITEMS, ABFD) \ - (warn_deprecated ("bfd_read", (const char *) 0, 0, (const char *) 0), \ - bfd_bread ((BUF), (ELTSIZE) * (NITEMS), (ABFD))) -#define bfd_write(BUF, ELTSIZE, NITEMS, ABFD) \ - (warn_deprecated ("bfd_write", (const char *) 0, 0, (const char *) 0),\ - bfd_bwrite ((BUF), (ELTSIZE) * (NITEMS), (ABFD))) -#endif -extern void warn_deprecated (const char *, const char *, int, const char *); - -/* Cast from const char * to char * so that caller can assign to - a char * without a warning. */ -#define bfd_get_filename(abfd) ((char *) (abfd)->filename) -#define bfd_get_cacheable(abfd) ((abfd)->cacheable) -#define bfd_get_format(abfd) ((abfd)->format) -#define bfd_get_target(abfd) ((abfd)->xvec->name) -#define bfd_get_flavour(abfd) ((abfd)->xvec->flavour) -#define bfd_family_coff(abfd) \ - (bfd_get_flavour (abfd) == bfd_target_coff_flavour || \ - bfd_get_flavour (abfd) == bfd_target_xcoff_flavour) -#define bfd_big_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG) -#define bfd_little_endian(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_LITTLE) -#define bfd_header_big_endian(abfd) \ - ((abfd)->xvec->header_byteorder == BFD_ENDIAN_BIG) -#define bfd_header_little_endian(abfd) \ - ((abfd)->xvec->header_byteorder == BFD_ENDIAN_LITTLE) -#define bfd_get_file_flags(abfd) ((abfd)->flags) -#define bfd_applicable_file_flags(abfd) ((abfd)->xvec->object_flags) -#define bfd_applicable_section_flags(abfd) ((abfd)->xvec->section_flags) -#define bfd_my_archive(abfd) ((abfd)->my_archive) -#define bfd_has_map(abfd) ((abfd)->has_armap) -#define bfd_is_thin_archive(abfd) ((abfd)->is_thin_archive) - -#define bfd_valid_reloc_types(abfd) ((abfd)->xvec->valid_reloc_types) -#define bfd_usrdata(abfd) ((abfd)->usrdata) - -#define bfd_get_start_address(abfd) ((abfd)->start_address) -#define bfd_get_symcount(abfd) ((abfd)->symcount) -#define bfd_get_outsymbols(abfd) ((abfd)->outsymbols) -#define bfd_count_sections(abfd) ((abfd)->section_count) - -#define bfd_get_dynamic_symcount(abfd) ((abfd)->dynsymcount) - -#define bfd_get_symbol_leading_char(abfd) ((abfd)->xvec->symbol_leading_char) - -#define bfd_set_cacheable(abfd,bool) (((abfd)->cacheable = bool), TRUE) - -extern bfd_boolean bfd_cache_close - (bfd *abfd); -/* NB: This declaration should match the autogenerated one in libbfd.h. */ - -extern bfd_boolean bfd_cache_close_all (void); - -extern bfd_boolean bfd_record_phdr - (bfd *, unsigned long, bfd_boolean, flagword, bfd_boolean, bfd_vma, - bfd_boolean, bfd_boolean, unsigned int, struct bfd_section **); - -/* Byte swapping routines. */ - -bfd_uint64_t bfd_getb64 (const void *); -bfd_uint64_t bfd_getl64 (const void *); -bfd_int64_t bfd_getb_signed_64 (const void *); -bfd_int64_t bfd_getl_signed_64 (const void *); -bfd_vma bfd_getb32 (const void *); -bfd_vma bfd_getl32 (const void *); -bfd_signed_vma bfd_getb_signed_32 (const void *); -bfd_signed_vma bfd_getl_signed_32 (const void *); -bfd_vma bfd_getb16 (const void *); -bfd_vma bfd_getl16 (const void *); -bfd_signed_vma bfd_getb_signed_16 (const void *); -bfd_signed_vma bfd_getl_signed_16 (const void *); -void bfd_putb64 (bfd_uint64_t, void *); -void bfd_putl64 (bfd_uint64_t, void *); -void bfd_putb32 (bfd_vma, void *); -void bfd_putl32 (bfd_vma, void *); -void bfd_putb16 (bfd_vma, void *); -void bfd_putl16 (bfd_vma, void *); - -/* Byte swapping routines which take size and endiannes as arguments. */ - -bfd_uint64_t bfd_get_bits (const void *, int, bfd_boolean); -void bfd_put_bits (bfd_uint64_t, void *, int, bfd_boolean); - -extern bfd_boolean bfd_section_already_linked_table_init (void); -extern void bfd_section_already_linked_table_free (void); - -/* Externally visible ECOFF routines. */ - -#if defined(__STDC__) || defined(ALMOST_STDC) -struct ecoff_debug_info; -struct ecoff_debug_swap; -struct ecoff_extr; -struct bfd_symbol; -struct bfd_link_info; -struct bfd_link_hash_entry; -struct bfd_elf_version_tree; -#endif -extern bfd_vma bfd_ecoff_get_gp_value - (bfd * abfd); -extern bfd_boolean bfd_ecoff_set_gp_value - (bfd *abfd, bfd_vma gp_value); -extern bfd_boolean bfd_ecoff_set_regmasks - (bfd *abfd, unsigned long gprmask, unsigned long fprmask, - unsigned long *cprmask); -extern void *bfd_ecoff_debug_init - (bfd *output_bfd, struct ecoff_debug_info *output_debug, - const struct ecoff_debug_swap *output_swap, struct bfd_link_info *); -extern void bfd_ecoff_debug_free - (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug, - const struct ecoff_debug_swap *output_swap, struct bfd_link_info *); -extern bfd_boolean bfd_ecoff_debug_accumulate - (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug, - const struct ecoff_debug_swap *output_swap, bfd *input_bfd, - struct ecoff_debug_info *input_debug, - const struct ecoff_debug_swap *input_swap, struct bfd_link_info *); -extern bfd_boolean bfd_ecoff_debug_accumulate_other - (void *handle, bfd *output_bfd, struct ecoff_debug_info *output_debug, - const struct ecoff_debug_swap *output_swap, bfd *input_bfd, - struct bfd_link_info *); -extern bfd_boolean bfd_ecoff_debug_externals - (bfd *abfd, struct ecoff_debug_info *debug, - const struct ecoff_debug_swap *swap, bfd_boolean relocatable, - bfd_boolean (*get_extr) (struct bfd_symbol *, struct ecoff_extr *), - void (*set_index) (struct bfd_symbol *, bfd_size_type)); -extern bfd_boolean bfd_ecoff_debug_one_external - (bfd *abfd, struct ecoff_debug_info *debug, - const struct ecoff_debug_swap *swap, const char *name, - struct ecoff_extr *esym); -extern bfd_size_type bfd_ecoff_debug_size - (bfd *abfd, struct ecoff_debug_info *debug, - const struct ecoff_debug_swap *swap); -extern bfd_boolean bfd_ecoff_write_debug - (bfd *abfd, struct ecoff_debug_info *debug, - const struct ecoff_debug_swap *swap, file_ptr where); -extern bfd_boolean bfd_ecoff_write_accumulated_debug - (void *handle, bfd *abfd, struct ecoff_debug_info *debug, - const struct ecoff_debug_swap *swap, - struct bfd_link_info *info, file_ptr where); - -/* Externally visible ELF routines. */ - -struct bfd_link_needed_list -{ - struct bfd_link_needed_list *next; - bfd *by; - const char *name; -}; - -enum dynamic_lib_link_class { - DYN_NORMAL = 0, - DYN_AS_NEEDED = 1, - DYN_DT_NEEDED = 2, - DYN_NO_ADD_NEEDED = 4, - DYN_NO_NEEDED = 8 -}; - -enum notice_asneeded_action { - notice_as_needed, - notice_not_needed, - notice_needed -}; - -extern bfd_boolean bfd_elf_record_link_assignment - (bfd *, struct bfd_link_info *, const char *, bfd_boolean, - bfd_boolean); -extern struct bfd_link_needed_list *bfd_elf_get_needed_list - (bfd *, struct bfd_link_info *); -extern bfd_boolean bfd_elf_get_bfd_needed_list - (bfd *, struct bfd_link_needed_list **); -extern bfd_boolean bfd_elf_size_dynamic_sections - (bfd *, const char *, const char *, const char *, const char * const *, - struct bfd_link_info *, struct bfd_section **, - struct bfd_elf_version_tree *); -extern bfd_boolean bfd_elf_size_dynsym_hash_dynstr - (bfd *, struct bfd_link_info *); -extern void bfd_elf_set_dt_needed_name - (bfd *, const char *); -extern const char *bfd_elf_get_dt_soname - (bfd *); -extern void bfd_elf_set_dyn_lib_class - (bfd *, enum dynamic_lib_link_class); -extern int bfd_elf_get_dyn_lib_class - (bfd *); -extern struct bfd_link_needed_list *bfd_elf_get_runpath_list - (bfd *, struct bfd_link_info *); -extern bfd_boolean bfd_elf_discard_info - (bfd *, struct bfd_link_info *); -extern unsigned int _bfd_elf_default_action_discarded - (struct bfd_section *); - -/* Return an upper bound on the number of bytes required to store a - copy of ABFD's program header table entries. Return -1 if an error - occurs; bfd_get_error will return an appropriate code. */ -extern long bfd_get_elf_phdr_upper_bound - (bfd *abfd); - -/* Copy ABFD's program header table entries to *PHDRS. The entries - will be stored as an array of Elf_Internal_Phdr structures, as - defined in include/elf/internal.h. To find out how large the - buffer needs to be, call bfd_get_elf_phdr_upper_bound. - - Return the number of program header table entries read, or -1 if an - error occurs; bfd_get_error will return an appropriate code. */ -extern int bfd_get_elf_phdrs - (bfd *abfd, void *phdrs); - -/* Create a new BFD as if by bfd_openr. Rather than opening a file, - reconstruct an ELF file by reading the segments out of remote memory - based on the ELF file header at EHDR_VMA and the ELF program headers it - points to. If not null, *LOADBASEP is filled in with the difference - between the VMAs from which the segments were read, and the VMAs the - file headers (and hence BFD's idea of each section's VMA) put them at. - - The function TARGET_READ_MEMORY is called to copy LEN bytes from the - remote memory at target address VMA into the local buffer at MYADDR; it - should return zero on success or an `errno' code on failure. TEMPL must - be a BFD for an ELF target with the word size and byte order found in - the remote memory. */ -extern bfd *bfd_elf_bfd_from_remote_memory - (bfd *templ, bfd_vma ehdr_vma, bfd_vma *loadbasep, - int (*target_read_memory) (bfd_vma vma, bfd_byte *myaddr, int len)); - -/* Return the arch_size field of an elf bfd, or -1 if not elf. */ -extern int bfd_get_arch_size - (bfd *); - -/* Return TRUE if address "naturally" sign extends, or -1 if not elf. */ -extern int bfd_get_sign_extend_vma - (bfd *); - -extern struct bfd_section *_bfd_elf_tls_setup - (bfd *, struct bfd_link_info *); - -extern void _bfd_fix_excluded_sec_syms - (bfd *, struct bfd_link_info *); - -extern unsigned bfd_m68k_mach_to_features (int); - -extern int bfd_m68k_features_to_mach (unsigned); - -extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs - (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, - char **); - -extern bfd_boolean bfd_bfin_elf32_create_embedded_relocs - (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, - char **); - -/* SunOS shared library support routines for the linker. */ - -extern struct bfd_link_needed_list *bfd_sunos_get_needed_list - (bfd *, struct bfd_link_info *); -extern bfd_boolean bfd_sunos_record_link_assignment - (bfd *, struct bfd_link_info *, const char *); -extern bfd_boolean bfd_sunos_size_dynamic_sections - (bfd *, struct bfd_link_info *, struct bfd_section **, - struct bfd_section **, struct bfd_section **); - -/* Linux shared library support routines for the linker. */ - -extern bfd_boolean bfd_i386linux_size_dynamic_sections - (bfd *, struct bfd_link_info *); -extern bfd_boolean bfd_m68klinux_size_dynamic_sections - (bfd *, struct bfd_link_info *); -extern bfd_boolean bfd_sparclinux_size_dynamic_sections - (bfd *, struct bfd_link_info *); - -/* mmap hacks */ - -struct _bfd_window_internal; -typedef struct _bfd_window_internal bfd_window_internal; - -typedef struct _bfd_window -{ - /* What the user asked for. */ - void *data; - bfd_size_type size; - /* The actual window used by BFD. Small user-requested read-only - regions sharing a page may share a single window into the object - file. Read-write versions shouldn't until I've fixed things to - keep track of which portions have been claimed by the - application; don't want to give the same region back when the - application wants two writable copies! */ - struct _bfd_window_internal *i; -} -bfd_window; - -extern void bfd_init_window - (bfd_window *); -extern void bfd_free_window - (bfd_window *); -extern bfd_boolean bfd_get_file_window - (bfd *, file_ptr, bfd_size_type, bfd_window *, bfd_boolean); - -/* XCOFF support routines for the linker. */ - -extern bfd_boolean bfd_xcoff_link_record_set - (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_size_type); -extern bfd_boolean bfd_xcoff_import_symbol - (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *, bfd_vma, - const char *, const char *, const char *, unsigned int); -extern bfd_boolean bfd_xcoff_export_symbol - (bfd *, struct bfd_link_info *, struct bfd_link_hash_entry *); -extern bfd_boolean bfd_xcoff_link_count_reloc - (bfd *, struct bfd_link_info *, const char *); -extern bfd_boolean bfd_xcoff_record_link_assignment - (bfd *, struct bfd_link_info *, const char *); -extern bfd_boolean bfd_xcoff_size_dynamic_sections - (bfd *, struct bfd_link_info *, const char *, const char *, - unsigned long, unsigned long, unsigned long, bfd_boolean, - int, bfd_boolean, bfd_boolean, struct bfd_section **, bfd_boolean); -extern bfd_boolean bfd_xcoff_link_generate_rtinit - (bfd *, const char *, const char *, bfd_boolean); - -/* XCOFF support routines for ar. */ -extern bfd_boolean bfd_xcoff_ar_archive_set_magic - (bfd *, char *); - -/* Externally visible COFF routines. */ - -#if defined(__STDC__) || defined(ALMOST_STDC) -struct internal_syment; -union internal_auxent; -#endif - -extern bfd_boolean bfd_coff_get_syment - (bfd *, struct bfd_symbol *, struct internal_syment *); - -extern bfd_boolean bfd_coff_get_auxent - (bfd *, struct bfd_symbol *, int, union internal_auxent *); - -extern bfd_boolean bfd_coff_set_symbol_class - (bfd *, struct bfd_symbol *, unsigned int); - -extern bfd_boolean bfd_m68k_coff_create_embedded_relocs - (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, char **); - -/* ARM VFP11 erratum workaround support. */ -typedef enum -{ - BFD_ARM_VFP11_FIX_DEFAULT, - BFD_ARM_VFP11_FIX_NONE, - BFD_ARM_VFP11_FIX_SCALAR, - BFD_ARM_VFP11_FIX_VECTOR -} bfd_arm_vfp11_fix; - -extern void bfd_elf32_arm_init_maps - (bfd *); - -extern void bfd_elf32_arm_set_vfp11_fix - (bfd *, struct bfd_link_info *); - -extern bfd_boolean bfd_elf32_arm_vfp11_erratum_scan - (bfd *, struct bfd_link_info *); - -extern void bfd_elf32_arm_vfp11_fix_veneer_locations - (bfd *, struct bfd_link_info *); - -/* ARM Interworking support. Called from linker. */ -extern bfd_boolean bfd_arm_allocate_interworking_sections - (struct bfd_link_info *); - -extern bfd_boolean bfd_arm_process_before_allocation - (bfd *, struct bfd_link_info *, int); - -extern bfd_boolean bfd_arm_get_bfd_for_interworking - (bfd *, struct bfd_link_info *); - -/* PE ARM Interworking support. Called from linker. */ -extern bfd_boolean bfd_arm_pe_allocate_interworking_sections - (struct bfd_link_info *); - -extern bfd_boolean bfd_arm_pe_process_before_allocation - (bfd *, struct bfd_link_info *, int); - -extern bfd_boolean bfd_arm_pe_get_bfd_for_interworking - (bfd *, struct bfd_link_info *); - -/* ELF ARM Interworking support. Called from linker. */ -extern bfd_boolean bfd_elf32_arm_allocate_interworking_sections - (struct bfd_link_info *); - -extern bfd_boolean bfd_elf32_arm_process_before_allocation - (bfd *, struct bfd_link_info *); - -void bfd_elf32_arm_set_target_relocs - (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix, - int, int); - -extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking - (bfd *, struct bfd_link_info *); - -extern bfd_boolean bfd_elf32_arm_add_glue_sections_to_bfd - (bfd *, struct bfd_link_info *); - -/* ELF ARM mapping symbol support */ -#define BFD_ARM_SPECIAL_SYM_TYPE_MAP (1 << 0) -#define BFD_ARM_SPECIAL_SYM_TYPE_TAG (1 << 1) -#define BFD_ARM_SPECIAL_SYM_TYPE_OTHER (1 << 2) -#define BFD_ARM_SPECIAL_SYM_TYPE_ANY (~0) -extern bfd_boolean bfd_is_arm_special_symbol_name - (const char * name, int type); - -extern void bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *, int); - -/* ARM Note section processing. */ -extern bfd_boolean bfd_arm_merge_machines - (bfd *, bfd *); - -extern bfd_boolean bfd_arm_update_notes - (bfd *, const char *); - -extern unsigned int bfd_arm_get_mach_from_notes - (bfd *, const char *); - -/* TI COFF load page support. */ -extern void bfd_ticoff_set_section_load_page - (struct bfd_section *, int); - -extern int bfd_ticoff_get_section_load_page - (struct bfd_section *); - -/* H8/300 functions. */ -extern bfd_vma bfd_h8300_pad_address - (bfd *, bfd_vma); - -/* IA64 Itanium code generation. Called from linker. */ -extern void bfd_elf32_ia64_after_parse - (int); - -extern void bfd_elf64_ia64_after_parse - (int); - -/* This structure is used for a comdat section, as in PE. A comdat - section is associated with a particular symbol. When the linker - sees a comdat section, it keeps only one of the sections with a - given name and associated with a given symbol. */ - -struct coff_comdat_info -{ - /* The name of the symbol associated with a comdat section. */ - const char *name; - - /* The local symbol table index of the symbol associated with a - comdat section. This is only meaningful to the object file format - specific code; it is not an index into the list returned by - bfd_canonicalize_symtab. */ - long symbol; -}; - -extern struct coff_comdat_info *bfd_coff_get_comdat_section - (bfd *, struct bfd_section *); - -/* Extracted from init.c. */ -void bfd_init (void); - -/* Extracted from opncls.c. */ -bfd *bfd_fopen (const char *filename, const char *target, - const char *mode, int fd); - -bfd *bfd_openr (const char *filename, const char *target); - -bfd *bfd_fdopenr (const char *filename, const char *target, int fd); - -bfd *bfd_openstreamr (const char *, const char *, void *); - -bfd *bfd_openr_iovec (const char *filename, const char *target, - void *(*open) (struct bfd *nbfd, - void *open_closure), - void *open_closure, - file_ptr (*pread) (struct bfd *nbfd, - void *stream, - void *buf, - file_ptr nbytes, - file_ptr offset), - int (*close) (struct bfd *nbfd, - void *stream), - int (*stat) (struct bfd *abfd, - void *stream, - struct stat *sb)); - -bfd *bfd_openw (const char *filename, const char *target); - -bfd_boolean bfd_close (bfd *abfd); - -bfd_boolean bfd_close_all_done (bfd *); - -bfd *bfd_create (const char *filename, bfd *templ); - -bfd_boolean bfd_make_writable (bfd *abfd); - -bfd_boolean bfd_make_readable (bfd *abfd); - -unsigned long bfd_calc_gnu_debuglink_crc32 - (unsigned long crc, const unsigned char *buf, bfd_size_type len); - -char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir); - -struct bfd_section *bfd_create_gnu_debuglink_section - (bfd *abfd, const char *filename); - -bfd_boolean bfd_fill_in_gnu_debuglink_section - (bfd *abfd, struct bfd_section *sect, const char *filename); - -/* Extracted from libbfd.c. */ - -/* Byte swapping macros for user section data. */ - -#define bfd_put_8(abfd, val, ptr) \ - ((void) (*((unsigned char *) (ptr)) = (val) & 0xff)) -#define bfd_put_signed_8 \ - bfd_put_8 -#define bfd_get_8(abfd, ptr) \ - (*(unsigned char *) (ptr) & 0xff) -#define bfd_get_signed_8(abfd, ptr) \ - (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80) - -#define bfd_put_16(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_putx16, ((val),(ptr))) -#define bfd_put_signed_16 \ - bfd_put_16 -#define bfd_get_16(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx16, (ptr)) -#define bfd_get_signed_16(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx_signed_16, (ptr)) - -#define bfd_put_32(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_putx32, ((val),(ptr))) -#define bfd_put_signed_32 \ - bfd_put_32 -#define bfd_get_32(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx32, (ptr)) -#define bfd_get_signed_32(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx_signed_32, (ptr)) - -#define bfd_put_64(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_putx64, ((val), (ptr))) -#define bfd_put_signed_64 \ - bfd_put_64 -#define bfd_get_64(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx64, (ptr)) -#define bfd_get_signed_64(abfd, ptr) \ - BFD_SEND (abfd, bfd_getx_signed_64, (ptr)) - -#define bfd_get(bits, abfd, ptr) \ - ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr) \ - : (bits) == 16 ? bfd_get_16 (abfd, ptr) \ - : (bits) == 32 ? bfd_get_32 (abfd, ptr) \ - : (bits) == 64 ? bfd_get_64 (abfd, ptr) \ - : (abort (), (bfd_vma) - 1)) - -#define bfd_put(bits, abfd, val, ptr) \ - ((bits) == 8 ? bfd_put_8 (abfd, val, ptr) \ - : (bits) == 16 ? bfd_put_16 (abfd, val, ptr) \ - : (bits) == 32 ? bfd_put_32 (abfd, val, ptr) \ - : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \ - : (abort (), (void) 0)) - - -/* Byte swapping macros for file header data. */ - -#define bfd_h_put_8(abfd, val, ptr) \ - bfd_put_8 (abfd, val, ptr) -#define bfd_h_put_signed_8(abfd, val, ptr) \ - bfd_put_8 (abfd, val, ptr) -#define bfd_h_get_8(abfd, ptr) \ - bfd_get_8 (abfd, ptr) -#define bfd_h_get_signed_8(abfd, ptr) \ - bfd_get_signed_8 (abfd, ptr) - -#define bfd_h_put_16(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_h_putx16, (val, ptr)) -#define bfd_h_put_signed_16 \ - bfd_h_put_16 -#define bfd_h_get_16(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx16, (ptr)) -#define bfd_h_get_signed_16(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr)) - -#define bfd_h_put_32(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_h_putx32, (val, ptr)) -#define bfd_h_put_signed_32 \ - bfd_h_put_32 -#define bfd_h_get_32(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx32, (ptr)) -#define bfd_h_get_signed_32(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr)) - -#define bfd_h_put_64(abfd, val, ptr) \ - BFD_SEND (abfd, bfd_h_putx64, (val, ptr)) -#define bfd_h_put_signed_64 \ - bfd_h_put_64 -#define bfd_h_get_64(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx64, (ptr)) -#define bfd_h_get_signed_64(abfd, ptr) \ - BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr)) - -/* Aliases for the above, which should eventually go away. */ - -#define H_PUT_64 bfd_h_put_64 -#define H_PUT_32 bfd_h_put_32 -#define H_PUT_16 bfd_h_put_16 -#define H_PUT_8 bfd_h_put_8 -#define H_PUT_S64 bfd_h_put_signed_64 -#define H_PUT_S32 bfd_h_put_signed_32 -#define H_PUT_S16 bfd_h_put_signed_16 -#define H_PUT_S8 bfd_h_put_signed_8 -#define H_GET_64 bfd_h_get_64 -#define H_GET_32 bfd_h_get_32 -#define H_GET_16 bfd_h_get_16 -#define H_GET_8 bfd_h_get_8 -#define H_GET_S64 bfd_h_get_signed_64 -#define H_GET_S32 bfd_h_get_signed_32 -#define H_GET_S16 bfd_h_get_signed_16 -#define H_GET_S8 bfd_h_get_signed_8 - - -/* Extracted from bfdio.c. */ -long bfd_get_mtime (bfd *abfd); - -file_ptr bfd_get_size (bfd *abfd); - -/* Extracted from bfdwin.c. */ -/* Extracted from section.c. */ -typedef struct bfd_section -{ - /* The name of the section; the name isn't a copy, the pointer is - the same as that passed to bfd_make_section. */ - const char *name; - - /* A unique sequence number. */ - int id; - - /* Which section in the bfd; 0..n-1 as sections are created in a bfd. */ - int index; - - /* The next section in the list belonging to the BFD, or NULL. */ - struct bfd_section *next; - - /* The previous section in the list belonging to the BFD, or NULL. */ - struct bfd_section *prev; - - /* The field flags contains attributes of the section. Some - flags are read in from the object file, and some are - synthesized from other information. */ - flagword flags; - -#define SEC_NO_FLAGS 0x000 - - /* Tells the OS to allocate space for this section when loading. - This is clear for a section containing debug information only. */ -#define SEC_ALLOC 0x001 - - /* Tells the OS to load the section from the file when loading. - This is clear for a .bss section. */ -#define SEC_LOAD 0x002 - - /* The section contains data still to be relocated, so there is - some relocation information too. */ -#define SEC_RELOC 0x004 - - /* A signal to the OS that the section contains read only data. */ -#define SEC_READONLY 0x008 - - /* The section contains code only. */ -#define SEC_CODE 0x010 - - /* The section contains data only. */ -#define SEC_DATA 0x020 - - /* The section will reside in ROM. */ -#define SEC_ROM 0x040 - - /* The section contains constructor information. This section - type is used by the linker to create lists of constructors and - destructors used by <>. When a back end sees a symbol - which should be used in a constructor list, it creates a new - section for the type of name (e.g., <<__CTOR_LIST__>>), attaches - the symbol to it, and builds a relocation. To build the lists - of constructors, all the linker has to do is catenate all the - sections called <<__CTOR_LIST__>> and relocate the data - contained within - exactly the operations it would peform on - standard data. */ -#define SEC_CONSTRUCTOR 0x080 - - /* The section has contents - a data section could be - <> | <>; a debug section could be - <> */ -#define SEC_HAS_CONTENTS 0x100 - - /* An instruction to the linker to not output the section - even if it has information which would normally be written. */ -#define SEC_NEVER_LOAD 0x200 - - /* The section contains thread local data. */ -#define SEC_THREAD_LOCAL 0x400 - - /* The section has GOT references. This flag is only for the - linker, and is currently only used by the elf32-hppa back end. - It will be set if global offset table references were detected - in this section, which indicate to the linker that the section - contains PIC code, and must be handled specially when doing a - static link. */ -#define SEC_HAS_GOT_REF 0x800 - - /* The section contains common symbols (symbols may be defined - multiple times, the value of a symbol is the amount of - space it requires, and the largest symbol value is the one - used). Most targets have exactly one of these (which we - translate to bfd_com_section_ptr), but ECOFF has two. */ -#define SEC_IS_COMMON 0x1000 - - /* The section contains only debugging information. For - example, this is set for ELF .debug and .stab sections. - strip tests this flag to see if a section can be - discarded. */ -#define SEC_DEBUGGING 0x2000 - - /* The contents of this section are held in memory pointed to - by the contents field. This is checked by bfd_get_section_contents, - and the data is retrieved from memory if appropriate. */ -#define SEC_IN_MEMORY 0x4000 - - /* The contents of this section are to be excluded by the - linker for executable and shared objects unless those - objects are to be further relocated. */ -#define SEC_EXCLUDE 0x8000 - - /* The contents of this section are to be sorted based on the sum of - the symbol and addend values specified by the associated relocation - entries. Entries without associated relocation entries will be - appended to the end of the section in an unspecified order. */ -#define SEC_SORT_ENTRIES 0x10000 - - /* When linking, duplicate sections of the same name should be - discarded, rather than being combined into a single section as - is usually done. This is similar to how common symbols are - handled. See SEC_LINK_DUPLICATES below. */ -#define SEC_LINK_ONCE 0x20000 - - /* If SEC_LINK_ONCE is set, this bitfield describes how the linker - should handle duplicate sections. */ -#define SEC_LINK_DUPLICATES 0xc0000 - - /* This value for SEC_LINK_DUPLICATES means that duplicate - sections with the same name should simply be discarded. */ -#define SEC_LINK_DUPLICATES_DISCARD 0x0 - - /* This value for SEC_LINK_DUPLICATES means that the linker - should warn if there are any duplicate sections, although - it should still only link one copy. */ -#define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000 - - /* This value for SEC_LINK_DUPLICATES means that the linker - should warn if any duplicate sections are a different size. */ -#define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000 - - /* This value for SEC_LINK_DUPLICATES means that the linker - should warn if any duplicate sections contain different - contents. */ -#define SEC_LINK_DUPLICATES_SAME_CONTENTS \ - (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE) - - /* This section was created by the linker as part of dynamic - relocation or other arcane processing. It is skipped when - going through the first-pass output, trusting that someone - else up the line will take care of it later. */ -#define SEC_LINKER_CREATED 0x100000 - - /* This section should not be subject to garbage collection. - Also set to inform the linker that this section should not be - listed in the link map as discarded. */ -#define SEC_KEEP 0x200000 - - /* This section contains "short" data, and should be placed - "near" the GP. */ -#define SEC_SMALL_DATA 0x400000 - - /* Attempt to merge identical entities in the section. - Entity size is given in the entsize field. */ -#define SEC_MERGE 0x800000 - - /* If given with SEC_MERGE, entities to merge are zero terminated - strings where entsize specifies character size instead of fixed - size entries. */ -#define SEC_STRINGS 0x1000000 - - /* This section contains data about section groups. */ -#define SEC_GROUP 0x2000000 - - /* The section is a COFF shared library section. This flag is - only for the linker. If this type of section appears in - the input file, the linker must copy it to the output file - without changing the vma or size. FIXME: Although this - was originally intended to be general, it really is COFF - specific (and the flag was renamed to indicate this). It - might be cleaner to have some more general mechanism to - allow the back end to control what the linker does with - sections. */ -#define SEC_COFF_SHARED_LIBRARY 0x4000000 - - /* This section contains data which may be shared with other - executables or shared objects. This is for COFF only. */ -#define SEC_COFF_SHARED 0x8000000 - - /* When a section with this flag is being linked, then if the size of - the input section is less than a page, it should not cross a page - boundary. If the size of the input section is one page or more, - it should be aligned on a page boundary. This is for TI - TMS320C54X only. */ -#define SEC_TIC54X_BLOCK 0x10000000 - - /* Conditionally link this section; do not link if there are no - references found to any symbol in the section. This is for TI - TMS320C54X only. */ -#define SEC_TIC54X_CLINK 0x20000000 - - /* End of section flags. */ - - /* Some internal packed boolean fields. */ - - /* See the vma field. */ - unsigned int user_set_vma : 1; - - /* A mark flag used by some of the linker backends. */ - unsigned int linker_mark : 1; - - /* Another mark flag used by some of the linker backends. Set for - output sections that have an input section. */ - unsigned int linker_has_input : 1; - - /* Mark flag used by some linker backends for garbage collection. */ - unsigned int gc_mark : 1; - - /* The following flags are used by the ELF linker. */ - - /* Mark sections which have been allocated to segments. */ - unsigned int segment_mark : 1; - - /* Type of sec_info information. */ - unsigned int sec_info_type:3; -#define ELF_INFO_TYPE_NONE 0 -#define ELF_INFO_TYPE_STABS 1 -#define ELF_INFO_TYPE_MERGE 2 -#define ELF_INFO_TYPE_EH_FRAME 3 -#define ELF_INFO_TYPE_JUST_SYMS 4 - - /* Nonzero if this section uses RELA relocations, rather than REL. */ - unsigned int use_rela_p:1; - - /* Bits used by various backends. The generic code doesn't touch - these fields. */ - - /* Nonzero if this section has TLS related relocations. */ - unsigned int has_tls_reloc:1; - - /* Nonzero if this section has a gp reloc. */ - unsigned int has_gp_reloc:1; - - /* Nonzero if this section needs the relax finalize pass. */ - unsigned int need_finalize_relax:1; - - /* Whether relocations have been processed. */ - unsigned int reloc_done : 1; - - /* End of internal packed boolean fields. */ - - /* The virtual memory address of the section - where it will be - at run time. The symbols are relocated against this. The - user_set_vma flag is maintained by bfd; if it's not set, the - backend can assign addresses (for example, in <>, where - the default address for <<.data>> is dependent on the specific - target and various flags). */ - bfd_vma vma; - - /* The load address of the section - where it would be in a - rom image; really only used for writing section header - information. */ - bfd_vma lma; - - /* The size of the section in octets, as it will be output. - Contains a value even if the section has no contents (e.g., the - size of <<.bss>>). */ - bfd_size_type size; - - /* For input sections, the original size on disk of the section, in - octets. This field should be set for any section whose size is - changed by linker relaxation. It is required for sections where - the linker relaxation scheme doesn't cache altered section and - reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing - targets), and thus the original size needs to be kept to read the - section multiple times. For output sections, rawsize holds the - section size calculated on a previous linker relaxation pass. */ - bfd_size_type rawsize; - - /* If this section is going to be output, then this value is the - offset in *bytes* into the output section of the first byte in the - input section (byte ==> smallest addressable unit on the - target). In most cases, if this was going to start at the - 100th octet (8-bit quantity) in the output section, this value - would be 100. However, if the target byte size is 16 bits - (bfd_octets_per_byte is "2"), this value would be 50. */ - bfd_vma output_offset; - - /* The output section through which to map on output. */ - struct bfd_section *output_section; - - /* The alignment requirement of the section, as an exponent of 2 - - e.g., 3 aligns to 2^3 (or 8). */ - unsigned int alignment_power; - - /* If an input section, a pointer to a vector of relocation - records for the data in this section. */ - struct reloc_cache_entry *relocation; - - /* If an output section, a pointer to a vector of pointers to - relocation records for the data in this section. */ - struct reloc_cache_entry **orelocation; - - /* The number of relocation records in one of the above. */ - unsigned reloc_count; - - /* Information below is back end specific - and not always used - or updated. */ - - /* File position of section data. */ - file_ptr filepos; - - /* File position of relocation info. */ - file_ptr rel_filepos; - - /* File position of line data. */ - file_ptr line_filepos; - - /* Pointer to data for applications. */ - void *userdata; - - /* If the SEC_IN_MEMORY flag is set, this points to the actual - contents. */ - unsigned char *contents; - - /* Attached line number information. */ - alent *lineno; - - /* Number of line number records. */ - unsigned int lineno_count; - - /* Entity size for merging purposes. */ - unsigned int entsize; - - /* Points to the kept section if this section is a link-once section, - and is discarded. */ - struct bfd_section *kept_section; - - /* When a section is being output, this value changes as more - linenumbers are written out. */ - file_ptr moving_line_filepos; - - /* What the section number is in the target world. */ - int target_index; - - void *used_by_bfd; - - /* If this is a constructor section then here is a list of the - relocations created to relocate items within it. */ - struct relent_chain *constructor_chain; - - /* The BFD which owns the section. */ - bfd *owner; - - /* A symbol which points at this section only. */ - struct bfd_symbol *symbol; - struct bfd_symbol **symbol_ptr_ptr; - - /* Early in the link process, map_head and map_tail are used to build - a list of input sections attached to an output section. Later, - output sections use these fields for a list of bfd_link_order - structs. */ - union { - struct bfd_link_order *link_order; - struct bfd_section *s; - } map_head, map_tail; -} asection; - -/* These sections are global, and are managed by BFD. The application - and target back end are not permitted to change the values in - these sections. New code should use the section_ptr macros rather - than referring directly to the const sections. The const sections - may eventually vanish. */ -#define BFD_ABS_SECTION_NAME "*ABS*" -#define BFD_UND_SECTION_NAME "*UND*" -#define BFD_COM_SECTION_NAME "*COM*" -#define BFD_IND_SECTION_NAME "*IND*" - -/* The absolute section. */ -extern asection bfd_abs_section; -#define bfd_abs_section_ptr ((asection *) &bfd_abs_section) -#define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr) -/* Pointer to the undefined section. */ -extern asection bfd_und_section; -#define bfd_und_section_ptr ((asection *) &bfd_und_section) -#define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr) -/* Pointer to the common section. */ -extern asection bfd_com_section; -#define bfd_com_section_ptr ((asection *) &bfd_com_section) -/* Pointer to the indirect section. */ -extern asection bfd_ind_section; -#define bfd_ind_section_ptr ((asection *) &bfd_ind_section) -#define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr) - -#define bfd_is_const_section(SEC) \ - ( ((SEC) == bfd_abs_section_ptr) \ - || ((SEC) == bfd_und_section_ptr) \ - || ((SEC) == bfd_com_section_ptr) \ - || ((SEC) == bfd_ind_section_ptr)) - -/* Macros to handle insertion and deletion of a bfd's sections. These - only handle the list pointers, ie. do not adjust section_count, - target_index etc. */ -#define bfd_section_list_remove(ABFD, S) \ - do \ - { \ - asection *_s = S; \ - asection *_next = _s->next; \ - asection *_prev = _s->prev; \ - if (_prev) \ - _prev->next = _next; \ - else \ - (ABFD)->sections = _next; \ - if (_next) \ - _next->prev = _prev; \ - else \ - (ABFD)->section_last = _prev; \ - } \ - while (0) -#define bfd_section_list_append(ABFD, S) \ - do \ - { \ - asection *_s = S; \ - bfd *_abfd = ABFD; \ - _s->next = NULL; \ - if (_abfd->section_last) \ - { \ - _s->prev = _abfd->section_last; \ - _abfd->section_last->next = _s; \ - } \ - else \ - { \ - _s->prev = NULL; \ - _abfd->sections = _s; \ - } \ - _abfd->section_last = _s; \ - } \ - while (0) -#define bfd_section_list_prepend(ABFD, S) \ - do \ - { \ - asection *_s = S; \ - bfd *_abfd = ABFD; \ - _s->prev = NULL; \ - if (_abfd->sections) \ - { \ - _s->next = _abfd->sections; \ - _abfd->sections->prev = _s; \ - } \ - else \ - { \ - _s->next = NULL; \ - _abfd->section_last = _s; \ - } \ - _abfd->sections = _s; \ - } \ - while (0) -#define bfd_section_list_insert_after(ABFD, A, S) \ - do \ - { \ - asection *_a = A; \ - asection *_s = S; \ - asection *_next = _a->next; \ - _s->next = _next; \ - _s->prev = _a; \ - _a->next = _s; \ - if (_next) \ - _next->prev = _s; \ - else \ - (ABFD)->section_last = _s; \ - } \ - while (0) -#define bfd_section_list_insert_before(ABFD, B, S) \ - do \ - { \ - asection *_b = B; \ - asection *_s = S; \ - asection *_prev = _b->prev; \ - _s->prev = _prev; \ - _s->next = _b; \ - _b->prev = _s; \ - if (_prev) \ - _prev->next = _s; \ - else \ - (ABFD)->sections = _s; \ - } \ - while (0) -#define bfd_section_removed_from_list(ABFD, S) \ - ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S)) - -#define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX) \ - /* name, id, index, next, prev, flags, user_set_vma, */ \ - { NAME, IDX, 0, NULL, NULL, FLAGS, 0, \ - \ - /* linker_mark, linker_has_input, gc_mark, */ \ - 0, 0, 1, \ - \ - /* segment_mark, sec_info_type, use_rela_p, has_tls_reloc, */ \ - 0, 0, 0, 0, \ - \ - /* has_gp_reloc, need_finalize_relax, reloc_done, */ \ - 0, 0, 0, \ - \ - /* vma, lma, size, rawsize */ \ - 0, 0, 0, 0, \ - \ - /* output_offset, output_section, alignment_power, */ \ - 0, (struct bfd_section *) &SEC, 0, \ - \ - /* relocation, orelocation, reloc_count, filepos, rel_filepos, */ \ - NULL, NULL, 0, 0, 0, \ - \ - /* line_filepos, userdata, contents, lineno, lineno_count, */ \ - 0, NULL, NULL, NULL, 0, \ - \ - /* entsize, kept_section, moving_line_filepos, */ \ - 0, NULL, 0, \ - \ - /* target_index, used_by_bfd, constructor_chain, owner, */ \ - 0, NULL, NULL, NULL, \ - \ - /* symbol, symbol_ptr_ptr, */ \ - (struct bfd_symbol *) SYM, &SEC.symbol, \ - \ - /* map_head, map_tail */ \ - { NULL }, { NULL } \ - } - -void bfd_section_list_clear (bfd *); - -asection *bfd_get_section_by_name (bfd *abfd, const char *name); - -asection *bfd_get_section_by_name_if - (bfd *abfd, - const char *name, - bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj), - void *obj); - -char *bfd_get_unique_section_name - (bfd *abfd, const char *templat, int *count); - -asection *bfd_make_section_old_way (bfd *abfd, const char *name); - -asection *bfd_make_section_anyway_with_flags - (bfd *abfd, const char *name, flagword flags); - -asection *bfd_make_section_anyway (bfd *abfd, const char *name); - -asection *bfd_make_section_with_flags - (bfd *, const char *name, flagword flags); - -asection *bfd_make_section (bfd *, const char *name); - -bfd_boolean bfd_set_section_flags - (bfd *abfd, asection *sec, flagword flags); - -void bfd_map_over_sections - (bfd *abfd, - void (*func) (bfd *abfd, asection *sect, void *obj), - void *obj); - -asection *bfd_sections_find_if - (bfd *abfd, - bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj), - void *obj); - -bfd_boolean bfd_set_section_size - (bfd *abfd, asection *sec, bfd_size_type val); - -bfd_boolean bfd_set_section_contents - (bfd *abfd, asection *section, const void *data, - file_ptr offset, bfd_size_type count); - -bfd_boolean bfd_get_section_contents - (bfd *abfd, asection *section, void *location, file_ptr offset, - bfd_size_type count); - -bfd_boolean bfd_malloc_and_get_section - (bfd *abfd, asection *section, bfd_byte **buf); - -bfd_boolean bfd_copy_private_section_data - (bfd *ibfd, asection *isec, bfd *obfd, asection *osec); - -#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \ - BFD_SEND (obfd, _bfd_copy_private_section_data, \ - (ibfd, isection, obfd, osection)) -bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec); - -bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group); - -/* Extracted from archures.c. */ -enum bfd_architecture -{ - bfd_arch_unknown, /* File arch not known. */ - bfd_arch_obscure, /* Arch known, not one of these. */ - bfd_arch_m68k, /* Motorola 68xxx */ -#define bfd_mach_m68000 1 -#define bfd_mach_m68008 2 -#define bfd_mach_m68010 3 -#define bfd_mach_m68020 4 -#define bfd_mach_m68030 5 -#define bfd_mach_m68040 6 -#define bfd_mach_m68060 7 -#define bfd_mach_cpu32 8 -#define bfd_mach_fido 9 -#define bfd_mach_mcf_isa_a_nodiv 10 -#define bfd_mach_mcf_isa_a 11 -#define bfd_mach_mcf_isa_a_mac 12 -#define bfd_mach_mcf_isa_a_emac 13 -#define bfd_mach_mcf_isa_aplus 14 -#define bfd_mach_mcf_isa_aplus_mac 15 -#define bfd_mach_mcf_isa_aplus_emac 16 -#define bfd_mach_mcf_isa_b_nousp 17 -#define bfd_mach_mcf_isa_b_nousp_mac 18 -#define bfd_mach_mcf_isa_b_nousp_emac 19 -#define bfd_mach_mcf_isa_b 20 -#define bfd_mach_mcf_isa_b_mac 21 -#define bfd_mach_mcf_isa_b_emac 22 -#define bfd_mach_mcf_isa_b_float 23 -#define bfd_mach_mcf_isa_b_float_mac 24 -#define bfd_mach_mcf_isa_b_float_emac 25 -#define bfd_mach_mcf_isa_c 26 -#define bfd_mach_mcf_isa_c_mac 27 -#define bfd_mach_mcf_isa_c_emac 28 -#define bfd_mach_mcf_isa_c_nodiv 29 -#define bfd_mach_mcf_isa_c_nodiv_mac 30 -#define bfd_mach_mcf_isa_c_nodiv_emac 31 - bfd_arch_vax, /* DEC Vax */ - bfd_arch_i960, /* Intel 960 */ - /* The order of the following is important. - lower number indicates a machine type that - only accepts a subset of the instructions - available to machines with higher numbers. - The exception is the "ca", which is - incompatible with all other machines except - "core". */ - -#define bfd_mach_i960_core 1 -#define bfd_mach_i960_ka_sa 2 -#define bfd_mach_i960_kb_sb 3 -#define bfd_mach_i960_mc 4 -#define bfd_mach_i960_xa 5 -#define bfd_mach_i960_ca 6 -#define bfd_mach_i960_jx 7 -#define bfd_mach_i960_hx 8 - - bfd_arch_or32, /* OpenRISC 32 */ - - bfd_arch_sparc, /* SPARC */ -#define bfd_mach_sparc 1 -/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ -#define bfd_mach_sparc_sparclet 2 -#define bfd_mach_sparc_sparclite 3 -#define bfd_mach_sparc_v8plus 4 -#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ -#define bfd_mach_sparc_sparclite_le 6 -#define bfd_mach_sparc_v9 7 -#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ -#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ -#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ -/* Nonzero if MACH has the v9 instruction set. */ -#define bfd_mach_sparc_v9_p(mach) \ - ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \ - && (mach) != bfd_mach_sparc_sparclite_le) -/* Nonzero if MACH is a 64 bit sparc architecture. */ -#define bfd_mach_sparc_64bit_p(mach) \ - ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb) - bfd_arch_spu, /* PowerPC SPU */ -#define bfd_mach_spu 256 - bfd_arch_mips, /* MIPS Rxxxx */ -#define bfd_mach_mips3000 3000 -#define bfd_mach_mips3900 3900 -#define bfd_mach_mips4000 4000 -#define bfd_mach_mips4010 4010 -#define bfd_mach_mips4100 4100 -#define bfd_mach_mips4111 4111 -#define bfd_mach_mips4120 4120 -#define bfd_mach_mips4300 4300 -#define bfd_mach_mips4400 4400 -#define bfd_mach_mips4600 4600 -#define bfd_mach_mips4650 4650 -#define bfd_mach_mips5000 5000 -#define bfd_mach_mips5400 5400 -#define bfd_mach_mips5500 5500 -#define bfd_mach_mips6000 6000 -#define bfd_mach_mips7000 7000 -#define bfd_mach_mips8000 8000 -#define bfd_mach_mips9000 9000 -#define bfd_mach_mips10000 10000 -#define bfd_mach_mips12000 12000 -#define bfd_mach_mips16 16 -#define bfd_mach_mips5 5 -#define bfd_mach_mips_loongson_2e 3001 -#define bfd_mach_mips_loongson_2f 3002 -#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ -#define bfd_mach_mips_octeon 6501 -#define bfd_mach_mipsisa32 32 -#define bfd_mach_mipsisa32r2 33 -#define bfd_mach_mipsisa64 64 -#define bfd_mach_mipsisa64r2 65 - bfd_arch_i386, /* Intel 386 */ -#define bfd_mach_i386_i386 1 -#define bfd_mach_i386_i8086 2 -#define bfd_mach_i386_i386_intel_syntax 3 -#define bfd_mach_x86_64 64 -#define bfd_mach_x86_64_intel_syntax 65 - bfd_arch_we32k, /* AT&T WE32xxx */ - bfd_arch_tahoe, /* CCI/Harris Tahoe */ - bfd_arch_i860, /* Intel 860 */ - bfd_arch_i370, /* IBM 360/370 Mainframes */ - bfd_arch_romp, /* IBM ROMP PC/RT */ - bfd_arch_convex, /* Convex */ - bfd_arch_m88k, /* Motorola 88xxx */ - bfd_arch_m98k, /* Motorola 98xxx */ - bfd_arch_pyramid, /* Pyramid Technology */ - bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300) */ -#define bfd_mach_h8300 1 -#define bfd_mach_h8300h 2 -#define bfd_mach_h8300s 3 -#define bfd_mach_h8300hn 4 -#define bfd_mach_h8300sn 5 -#define bfd_mach_h8300sx 6 -#define bfd_mach_h8300sxn 7 - bfd_arch_pdp11, /* DEC PDP-11 */ - bfd_arch_powerpc, /* PowerPC */ -#define bfd_mach_ppc 32 -#define bfd_mach_ppc64 64 -#define bfd_mach_ppc_403 403 -#define bfd_mach_ppc_403gc 4030 -#define bfd_mach_ppc_505 505 -#define bfd_mach_ppc_601 601 -#define bfd_mach_ppc_602 602 -#define bfd_mach_ppc_603 603 -#define bfd_mach_ppc_ec603e 6031 -#define bfd_mach_ppc_604 604 -#define bfd_mach_ppc_620 620 -#define bfd_mach_ppc_630 630 -#define bfd_mach_ppc_750 750 -#define bfd_mach_ppc_860 860 -#define bfd_mach_ppc_a35 35 -#define bfd_mach_ppc_rs64ii 642 -#define bfd_mach_ppc_rs64iii 643 -#define bfd_mach_ppc_7400 7400 -#define bfd_mach_ppc_e500 500 -#define bfd_mach_ppc_e500mc 5001 - bfd_arch_rs6000, /* IBM RS/6000 */ -#define bfd_mach_rs6k 6000 -#define bfd_mach_rs6k_rs1 6001 -#define bfd_mach_rs6k_rsc 6003 -#define bfd_mach_rs6k_rs2 6002 - bfd_arch_hppa, /* HP PA RISC */ -#define bfd_mach_hppa10 10 -#define bfd_mach_hppa11 11 -#define bfd_mach_hppa20 20 -#define bfd_mach_hppa20w 25 - bfd_arch_d10v, /* Mitsubishi D10V */ -#define bfd_mach_d10v 1 -#define bfd_mach_d10v_ts2 2 -#define bfd_mach_d10v_ts3 3 - bfd_arch_d30v, /* Mitsubishi D30V */ - bfd_arch_dlx, /* DLX */ - bfd_arch_m68hc11, /* Motorola 68HC11 */ - bfd_arch_m68hc12, /* Motorola 68HC12 */ -#define bfd_mach_m6812_default 0 -#define bfd_mach_m6812 1 -#define bfd_mach_m6812s 2 - bfd_arch_z8k, /* Zilog Z8000 */ -#define bfd_mach_z8001 1 -#define bfd_mach_z8002 2 - bfd_arch_h8500, /* Renesas H8/500 (formerly Hitachi H8/500) */ - bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH) */ -#define bfd_mach_sh 1 -#define bfd_mach_sh2 0x20 -#define bfd_mach_sh_dsp 0x2d -#define bfd_mach_sh2a 0x2a -#define bfd_mach_sh2a_nofpu 0x2b -#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 -#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 -#define bfd_mach_sh2a_or_sh4 0x2a3 -#define bfd_mach_sh2a_or_sh3e 0x2a4 -#define bfd_mach_sh2e 0x2e -#define bfd_mach_sh3 0x30 -#define bfd_mach_sh3_nommu 0x31 -#define bfd_mach_sh3_dsp 0x3d -#define bfd_mach_sh3e 0x3e -#define bfd_mach_sh4 0x40 -#define bfd_mach_sh4_nofpu 0x41 -#define bfd_mach_sh4_nommu_nofpu 0x42 -#define bfd_mach_sh4a 0x4a -#define bfd_mach_sh4a_nofpu 0x4b -#define bfd_mach_sh4al_dsp 0x4d -#define bfd_mach_sh5 0x50 - bfd_arch_alpha, /* Dec Alpha */ -#define bfd_mach_alpha_ev4 0x10 -#define bfd_mach_alpha_ev5 0x20 -#define bfd_mach_alpha_ev6 0x30 - bfd_arch_arm, /* Advanced Risc Machines ARM. */ -#define bfd_mach_arm_unknown 0 -#define bfd_mach_arm_2 1 -#define bfd_mach_arm_2a 2 -#define bfd_mach_arm_3 3 -#define bfd_mach_arm_3M 4 -#define bfd_mach_arm_4 5 -#define bfd_mach_arm_4T 6 -#define bfd_mach_arm_5 7 -#define bfd_mach_arm_5T 8 -#define bfd_mach_arm_5TE 9 -#define bfd_mach_arm_XScale 10 -#define bfd_mach_arm_ep9312 11 -#define bfd_mach_arm_iWMMXt 12 -#define bfd_mach_arm_iWMMXt2 13 - bfd_arch_ns32k, /* National Semiconductors ns32000 */ - bfd_arch_w65, /* WDC 65816 */ - bfd_arch_tic30, /* Texas Instruments TMS320C30 */ - bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X */ -#define bfd_mach_tic3x 30 -#define bfd_mach_tic4x 40 - bfd_arch_tic54x, /* Texas Instruments TMS320C54X */ - bfd_arch_tic80, /* TI TMS320c80 (MVP) */ - bfd_arch_v850, /* NEC V850 */ -#define bfd_mach_v850 1 -#define bfd_mach_v850e 'E' -#define bfd_mach_v850e1 '1' - bfd_arch_arc, /* ARC Cores */ -#define bfd_mach_arc_5 5 -#define bfd_mach_arc_6 6 -#define bfd_mach_arc_7 7 -#define bfd_mach_arc_8 8 - bfd_arch_m32c, /* Renesas M16C/M32C. */ -#define bfd_mach_m16c 0x75 -#define bfd_mach_m32c 0x78 - bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D) */ -#define bfd_mach_m32r 1 /* For backwards compatibility. */ -#define bfd_mach_m32rx 'x' -#define bfd_mach_m32r2 '2' - bfd_arch_mn10200, /* Matsushita MN10200 */ - bfd_arch_mn10300, /* Matsushita MN10300 */ -#define bfd_mach_mn10300 300 -#define bfd_mach_am33 330 -#define bfd_mach_am33_2 332 - bfd_arch_fr30, -#define bfd_mach_fr30 0x46523330 - bfd_arch_frv, -#define bfd_mach_frv 1 -#define bfd_mach_frvsimple 2 -#define bfd_mach_fr300 300 -#define bfd_mach_fr400 400 -#define bfd_mach_fr450 450 -#define bfd_mach_frvtomcat 499 /* fr500 prototype */ -#define bfd_mach_fr500 500 -#define bfd_mach_fr550 550 - bfd_arch_mcore, - bfd_arch_mep, -#define bfd_mach_mep 1 -#define bfd_mach_mep_h1 0x6831 - bfd_arch_ia64, /* HP/Intel ia64 */ -#define bfd_mach_ia64_elf64 64 -#define bfd_mach_ia64_elf32 32 - bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ -#define bfd_mach_ip2022 1 -#define bfd_mach_ip2022ext 2 - bfd_arch_iq2000, /* Vitesse IQ2000. */ -#define bfd_mach_iq2000 1 -#define bfd_mach_iq10 2 - bfd_arch_mt, -#define bfd_mach_ms1 1 -#define bfd_mach_mrisc2 2 -#define bfd_mach_ms2 3 - bfd_arch_pj, - bfd_arch_avr, /* Atmel AVR microcontrollers. */ -#define bfd_mach_avr1 1 -#define bfd_mach_avr2 2 -#define bfd_mach_avr3 3 -#define bfd_mach_avr4 4 -#define bfd_mach_avr5 5 -#define bfd_mach_avr6 6 - bfd_arch_bfin, /* ADI Blackfin */ -#define bfd_mach_bfin 1 - bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ -#define bfd_mach_cr16 1 - bfd_arch_cr16c, /* National Semiconductor CompactRISC. */ -#define bfd_mach_cr16c 1 - bfd_arch_crx, /* National Semiconductor CRX. */ -#define bfd_mach_crx 1 - bfd_arch_cris, /* Axis CRIS */ -#define bfd_mach_cris_v0_v10 255 -#define bfd_mach_cris_v32 32 -#define bfd_mach_cris_v10_v32 1032 - bfd_arch_s390, /* IBM s390 */ -#define bfd_mach_s390_31 31 -#define bfd_mach_s390_64 64 - bfd_arch_score, /* Sunplus score */ - bfd_arch_openrisc, /* OpenRISC */ - bfd_arch_mmix, /* Donald Knuth's educational processor. */ - bfd_arch_xstormy16, -#define bfd_mach_xstormy16 1 - bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ -#define bfd_mach_msp11 11 -#define bfd_mach_msp110 110 -#define bfd_mach_msp12 12 -#define bfd_mach_msp13 13 -#define bfd_mach_msp14 14 -#define bfd_mach_msp15 15 -#define bfd_mach_msp16 16 -#define bfd_mach_msp21 21 -#define bfd_mach_msp31 31 -#define bfd_mach_msp32 32 -#define bfd_mach_msp33 33 -#define bfd_mach_msp41 41 -#define bfd_mach_msp42 42 -#define bfd_mach_msp43 43 -#define bfd_mach_msp44 44 - bfd_arch_xc16x, /* Infineon's XC16X Series. */ -#define bfd_mach_xc16x 1 -#define bfd_mach_xc16xl 2 -#define bfd_mach_xc16xs 3 - bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ -#define bfd_mach_xtensa 1 - bfd_arch_maxq, /* Dallas MAXQ 10/20 */ -#define bfd_mach_maxq10 10 -#define bfd_mach_maxq20 20 - bfd_arch_z80, -#define bfd_mach_z80strict 1 /* No undocumented opcodes. */ -#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */ -#define bfd_mach_z80full 7 /* All undocumented instructions. */ -#define bfd_mach_r800 11 /* R800: successor with multiplication. */ - bfd_arch_last - }; - -typedef struct bfd_arch_info -{ - int bits_per_word; - int bits_per_address; - int bits_per_byte; - enum bfd_architecture arch; - unsigned long mach; - const char *arch_name; - const char *printable_name; - unsigned int section_align_power; - /* TRUE if this is the default machine for the architecture. - The default arch should be the first entry for an arch so that - all the entries for that arch can be accessed via <>. */ - bfd_boolean the_default; - const struct bfd_arch_info * (*compatible) - (const struct bfd_arch_info *a, const struct bfd_arch_info *b); - - bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); - - const struct bfd_arch_info *next; -} -bfd_arch_info_type; - -const char *bfd_printable_name (bfd *abfd); - -const bfd_arch_info_type *bfd_scan_arch (const char *string); - -const char **bfd_arch_list (void); - -const bfd_arch_info_type *bfd_arch_get_compatible - (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); - -void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); - -enum bfd_architecture bfd_get_arch (bfd *abfd); - -unsigned long bfd_get_mach (bfd *abfd); - -unsigned int bfd_arch_bits_per_byte (bfd *abfd); - -unsigned int bfd_arch_bits_per_address (bfd *abfd); - -const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); - -const bfd_arch_info_type *bfd_lookup_arch - (enum bfd_architecture arch, unsigned long machine); - -const char *bfd_printable_arch_mach - (enum bfd_architecture arch, unsigned long machine); - -unsigned int bfd_octets_per_byte (bfd *abfd); - -unsigned int bfd_arch_mach_octets_per_byte - (enum bfd_architecture arch, unsigned long machine); - -/* Extracted from reloc.c. */ -typedef enum bfd_reloc_status -{ - /* No errors detected. */ - bfd_reloc_ok, - - /* The relocation was performed, but there was an overflow. */ - bfd_reloc_overflow, - - /* The address to relocate was not within the section supplied. */ - bfd_reloc_outofrange, - - /* Used by special functions. */ - bfd_reloc_continue, - - /* Unsupported relocation size requested. */ - bfd_reloc_notsupported, - - /* Unused. */ - bfd_reloc_other, - - /* The symbol to relocate against was undefined. */ - bfd_reloc_undefined, - - /* The relocation was performed, but may not be ok - presently - generated only when linking i960 coff files with i960 b.out - symbols. If this type is returned, the error_message argument - to bfd_perform_relocation will be set. */ - bfd_reloc_dangerous - } - bfd_reloc_status_type; - - -typedef struct reloc_cache_entry -{ - /* A pointer into the canonical table of pointers. */ - struct bfd_symbol **sym_ptr_ptr; - - /* offset in section. */ - bfd_size_type address; - - /* addend for relocation value. */ - bfd_vma addend; - - /* Pointer to how to perform the required relocation. */ - reloc_howto_type *howto; - -} -arelent; - -enum complain_overflow -{ - /* Do not complain on overflow. */ - complain_overflow_dont, - - /* Complain if the value overflows when considered as a signed - number one bit larger than the field. ie. A bitfield of N bits - is allowed to represent -2**n to 2**n-1. */ - complain_overflow_bitfield, - - /* Complain if the value overflows when considered as a signed - number. */ - complain_overflow_signed, - - /* Complain if the value overflows when considered as an - unsigned number. */ - complain_overflow_unsigned -}; - -struct reloc_howto_struct -{ - /* The type field has mainly a documentary use - the back end can - do what it wants with it, though normally the back end's - external idea of what a reloc number is stored - in this field. For example, a PC relative word relocation - in a coff environment has the type 023 - because that's - what the outside world calls a R_PCRWORD reloc. */ - unsigned int type; - - /* The value the final relocation is shifted right by. This drops - unwanted data from the relocation. */ - unsigned int rightshift; - - /* The size of the item to be relocated. This is *not* a - power-of-two measure. To get the number of bytes operated - on by a type of relocation, use bfd_get_reloc_size. */ - int size; - - /* The number of bits in the item to be relocated. This is used - when doing overflow checking. */ - unsigned int bitsize; - - /* Notes that the relocation is relative to the location in the - data section of the addend. The relocation function will - subtract from the relocation value the address of the location - being relocated. */ - bfd_boolean pc_relative; - - /* The bit position of the reloc value in the destination. - The relocated value is left shifted by this amount. */ - unsigned int bitpos; - - /* What type of overflow error should be checked for when - relocating. */ - enum complain_overflow complain_on_overflow; - - /* If this field is non null, then the supplied function is - called rather than the normal function. This allows really - strange relocation methods to be accommodated (e.g., i960 callj - instructions). */ - bfd_reloc_status_type (*special_function) - (bfd *, arelent *, struct bfd_symbol *, void *, asection *, - bfd *, char **); - - /* The textual name of the relocation type. */ - char *name; - - /* Some formats record a relocation addend in the section contents - rather than with the relocation. For ELF formats this is the - distinction between USE_REL and USE_RELA (though the code checks - for USE_REL == 1/0). The value of this field is TRUE if the - addend is recorded with the section contents; when performing a - partial link (ld -r) the section contents (the data) will be - modified. The value of this field is FALSE if addends are - recorded with the relocation (in arelent.addend); when performing - a partial link the relocation will be modified. - All relocations for all ELF USE_RELA targets should set this field - to FALSE (values of TRUE should be looked on with suspicion). - However, the converse is not true: not all relocations of all ELF - USE_REL targets set this field to TRUE. Why this is so is peculiar - to each particular target. For relocs that aren't used in partial - links (e.g. GOT stuff) it doesn't matter what this is set to. */ - bfd_boolean partial_inplace; - - /* src_mask selects the part of the instruction (or data) to be used - in the relocation sum. If the target relocations don't have an - addend in the reloc, eg. ELF USE_REL, src_mask will normally equal - dst_mask to extract the addend from the section contents. If - relocations do have an addend in the reloc, eg. ELF USE_RELA, this - field should be zero. Non-zero values for ELF USE_RELA targets are - bogus as in those cases the value in the dst_mask part of the - section contents should be treated as garbage. */ - bfd_vma src_mask; - - /* dst_mask selects which parts of the instruction (or data) are - replaced with a relocated value. */ - bfd_vma dst_mask; - - /* When some formats create PC relative instructions, they leave - the value of the pc of the place being relocated in the offset - slot of the instruction, so that a PC relative relocation can - be made just by adding in an ordinary offset (e.g., sun3 a.out). - Some formats leave the displacement part of an instruction - empty (e.g., m88k bcs); this flag signals the fact. */ - bfd_boolean pcrel_offset; -}; - -#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \ - { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC } -#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \ - HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \ - NAME, FALSE, 0, 0, IN) - -#define EMPTY_HOWTO(C) \ - HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \ - NULL, FALSE, 0, 0, FALSE) - -#define HOWTO_PREPARE(relocation, symbol) \ - { \ - if (symbol != NULL) \ - { \ - if (bfd_is_com_section (symbol->section)) \ - { \ - relocation = 0; \ - } \ - else \ - { \ - relocation = symbol->value; \ - } \ - } \ - } - -unsigned int bfd_get_reloc_size (reloc_howto_type *); - -typedef struct relent_chain -{ - arelent relent; - struct relent_chain *next; -} -arelent_chain; - -bfd_reloc_status_type bfd_check_overflow - (enum complain_overflow how, - unsigned int bitsize, - unsigned int rightshift, - unsigned int addrsize, - bfd_vma relocation); - -bfd_reloc_status_type bfd_perform_relocation - (bfd *abfd, - arelent *reloc_entry, - void *data, - asection *input_section, - bfd *output_bfd, - char **error_message); - -bfd_reloc_status_type bfd_install_relocation - (bfd *abfd, - arelent *reloc_entry, - void *data, bfd_vma data_start, - asection *input_section, - char **error_message); - -enum bfd_reloc_code_real { - _dummy_first_bfd_reloc_code_real, - - -/* Basic absolute relocations of N bits. */ - BFD_RELOC_64, - BFD_RELOC_32, - BFD_RELOC_26, - BFD_RELOC_24, - BFD_RELOC_16, - BFD_RELOC_14, - BFD_RELOC_8, - -/* PC-relative relocations. Sometimes these are relative to the address -of the relocation itself; sometimes they are relative to the start of -the section containing the relocation. It depends on the specific target. - -The 24-bit relocation is used in some Intel 960 configurations. */ - BFD_RELOC_64_PCREL, - BFD_RELOC_32_PCREL, - BFD_RELOC_24_PCREL, - BFD_RELOC_16_PCREL, - BFD_RELOC_12_PCREL, - BFD_RELOC_8_PCREL, - -/* Section relative relocations. Some targets need this for DWARF2. */ - BFD_RELOC_32_SECREL, - -/* For ELF. */ - BFD_RELOC_32_GOT_PCREL, - BFD_RELOC_16_GOT_PCREL, - BFD_RELOC_8_GOT_PCREL, - BFD_RELOC_32_GOTOFF, - BFD_RELOC_16_GOTOFF, - BFD_RELOC_LO16_GOTOFF, - BFD_RELOC_HI16_GOTOFF, - BFD_RELOC_HI16_S_GOTOFF, - BFD_RELOC_8_GOTOFF, - BFD_RELOC_64_PLT_PCREL, - BFD_RELOC_32_PLT_PCREL, - BFD_RELOC_24_PLT_PCREL, - BFD_RELOC_16_PLT_PCREL, - BFD_RELOC_8_PLT_PCREL, - BFD_RELOC_64_PLTOFF, - BFD_RELOC_32_PLTOFF, - BFD_RELOC_16_PLTOFF, - BFD_RELOC_LO16_PLTOFF, - BFD_RELOC_HI16_PLTOFF, - BFD_RELOC_HI16_S_PLTOFF, - BFD_RELOC_8_PLTOFF, - -/* Relocations used by 68K ELF. */ - BFD_RELOC_68K_GLOB_DAT, - BFD_RELOC_68K_JMP_SLOT, - BFD_RELOC_68K_RELATIVE, - -/* Linkage-table relative. */ - BFD_RELOC_32_BASEREL, - BFD_RELOC_16_BASEREL, - BFD_RELOC_LO16_BASEREL, - BFD_RELOC_HI16_BASEREL, - BFD_RELOC_HI16_S_BASEREL, - BFD_RELOC_8_BASEREL, - BFD_RELOC_RVA, - -/* Absolute 8-bit relocation, but used to form an address like 0xFFnn. */ - BFD_RELOC_8_FFnn, - -/* These PC-relative relocations are stored as word displacements -- -i.e., byte displacements shifted right two bits. The 30-bit word -displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the -SPARC. (SPARC tools generally refer to this as <>.) The -signed 16-bit displacement is used on the MIPS, the 23-bit -displacement is used on the Alpha and the 28-bit displacement is used -on OpenRISC. */ - BFD_RELOC_32_PCREL_S2, - BFD_RELOC_16_PCREL_S2, - BFD_RELOC_23_PCREL_S2, - BFD_RELOC_28_PCREL_S2, - -/* High 22 bits and low 10 bits of 32-bit value, placed into lower bits of -the target word. These are used on the SPARC. */ - BFD_RELOC_HI22, - BFD_RELOC_LO10, - -/* For systems that allocate a Global Pointer register, these are -displacements off that register. These relocation types are -handled specially, because the value the register will have is -decided relatively late. */ - BFD_RELOC_GPREL16, - BFD_RELOC_GPREL32, - -/* Reloc types used for i960/b.out. */ - BFD_RELOC_I960_CALLJ, - -/* SPARC ELF relocations. There is probably some overlap with other -relocation types already defined. */ - BFD_RELOC_NONE, - BFD_RELOC_SPARC_WDISP22, - BFD_RELOC_SPARC22, - BFD_RELOC_SPARC13, - BFD_RELOC_SPARC_GOT10, - BFD_RELOC_SPARC_GOT13, - BFD_RELOC_SPARC_GOT22, - BFD_RELOC_SPARC_PC10, - BFD_RELOC_SPARC_PC22, - BFD_RELOC_SPARC_WPLT30, - BFD_RELOC_SPARC_COPY, - BFD_RELOC_SPARC_GLOB_DAT, - BFD_RELOC_SPARC_JMP_SLOT, - BFD_RELOC_SPARC_RELATIVE, - BFD_RELOC_SPARC_UA16, - BFD_RELOC_SPARC_UA32, - BFD_RELOC_SPARC_UA64, - BFD_RELOC_SPARC_GOTDATA_HIX22, - BFD_RELOC_SPARC_GOTDATA_LOX10, - BFD_RELOC_SPARC_GOTDATA_OP_HIX22, - BFD_RELOC_SPARC_GOTDATA_OP_LOX10, - BFD_RELOC_SPARC_GOTDATA_OP, - -/* I think these are specific to SPARC a.out (e.g., Sun 4). */ - BFD_RELOC_SPARC_BASE13, - BFD_RELOC_SPARC_BASE22, - -/* SPARC64 relocations */ -#define BFD_RELOC_SPARC_64 BFD_RELOC_64 - BFD_RELOC_SPARC_10, - BFD_RELOC_SPARC_11, - BFD_RELOC_SPARC_OLO10, - BFD_RELOC_SPARC_HH22, - BFD_RELOC_SPARC_HM10, - BFD_RELOC_SPARC_LM22, - BFD_RELOC_SPARC_PC_HH22, - BFD_RELOC_SPARC_PC_HM10, - BFD_RELOC_SPARC_PC_LM22, - BFD_RELOC_SPARC_WDISP16, - BFD_RELOC_SPARC_WDISP19, - BFD_RELOC_SPARC_7, - BFD_RELOC_SPARC_6, - BFD_RELOC_SPARC_5, -#define BFD_RELOC_SPARC_DISP64 BFD_RELOC_64_PCREL - BFD_RELOC_SPARC_PLT32, - BFD_RELOC_SPARC_PLT64, - BFD_RELOC_SPARC_HIX22, - BFD_RELOC_SPARC_LOX10, - BFD_RELOC_SPARC_H44, - BFD_RELOC_SPARC_M44, - BFD_RELOC_SPARC_L44, - BFD_RELOC_SPARC_REGISTER, - -/* SPARC little endian relocation */ - BFD_RELOC_SPARC_REV32, - -/* SPARC TLS relocations */ - BFD_RELOC_SPARC_TLS_GD_HI22, - BFD_RELOC_SPARC_TLS_GD_LO10, - BFD_RELOC_SPARC_TLS_GD_ADD, - BFD_RELOC_SPARC_TLS_GD_CALL, - BFD_RELOC_SPARC_TLS_LDM_HI22, - BFD_RELOC_SPARC_TLS_LDM_LO10, - BFD_RELOC_SPARC_TLS_LDM_ADD, - BFD_RELOC_SPARC_TLS_LDM_CALL, - BFD_RELOC_SPARC_TLS_LDO_HIX22, - BFD_RELOC_SPARC_TLS_LDO_LOX10, - BFD_RELOC_SPARC_TLS_LDO_ADD, - BFD_RELOC_SPARC_TLS_IE_HI22, - BFD_RELOC_SPARC_TLS_IE_LO10, - BFD_RELOC_SPARC_TLS_IE_LD, - BFD_RELOC_SPARC_TLS_IE_LDX, - BFD_RELOC_SPARC_TLS_IE_ADD, - BFD_RELOC_SPARC_TLS_LE_HIX22, - BFD_RELOC_SPARC_TLS_LE_LOX10, - BFD_RELOC_SPARC_TLS_DTPMOD32, - BFD_RELOC_SPARC_TLS_DTPMOD64, - BFD_RELOC_SPARC_TLS_DTPOFF32, - BFD_RELOC_SPARC_TLS_DTPOFF64, - BFD_RELOC_SPARC_TLS_TPOFF32, - BFD_RELOC_SPARC_TLS_TPOFF64, - -/* SPU Relocations. */ - BFD_RELOC_SPU_IMM7, - BFD_RELOC_SPU_IMM8, - BFD_RELOC_SPU_IMM10, - BFD_RELOC_SPU_IMM10W, - BFD_RELOC_SPU_IMM16, - BFD_RELOC_SPU_IMM16W, - BFD_RELOC_SPU_IMM18, - BFD_RELOC_SPU_PCREL9a, - BFD_RELOC_SPU_PCREL9b, - BFD_RELOC_SPU_PCREL16, - BFD_RELOC_SPU_LO16, - BFD_RELOC_SPU_HI16, - BFD_RELOC_SPU_PPU32, - BFD_RELOC_SPU_PPU64, - -/* Alpha ECOFF and ELF relocations. Some of these treat the symbol or -"addend" in some special way. -For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when -writing; when reading, it will be the absolute section symbol. The -addend is the displacement in bytes of the "lda" instruction from -the "ldah" instruction (which is at the address of this reloc). */ - BFD_RELOC_ALPHA_GPDISP_HI16, - -/* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as -with GPDISP_HI16 relocs. The addend is ignored when writing the -relocations out, and is filled in with the file's GP value on -reading, for convenience. */ - BFD_RELOC_ALPHA_GPDISP_LO16, - -/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 -relocation except that there is no accompanying GPDISP_LO16 -relocation. */ - BFD_RELOC_ALPHA_GPDISP, - -/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; -the assembler turns it into a LDQ instruction to load the address of -the symbol, and then fills in a register in the real instruction. - -The LITERAL reloc, at the LDQ instruction, refers to the .lita -section symbol. The addend is ignored when writing, but is filled -in with the file's GP value on reading, for convenience, as with the -GPDISP_LO16 reloc. - -The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16. -It should refer to the symbol to be referenced, as with 16_GOTOFF, -but it generates output not based on the position within the .got -section, but relative to the GP value chosen for the file during the -final link stage. - -The LITUSE reloc, on the instruction using the loaded address, gives -information to the linker that it might be able to use to optimize -away some literal section references. The symbol is ignored (read -as the absolute section symbol), and the "addend" indicates the type -of instruction using the register: -1 - "memory" fmt insn -2 - byte-manipulation (byte offset reg) -3 - jsr (target of branch) */ - BFD_RELOC_ALPHA_LITERAL, - BFD_RELOC_ALPHA_ELF_LITERAL, - BFD_RELOC_ALPHA_LITUSE, - -/* The HINT relocation indicates a value that should be filled into the -"hint" field of a jmp/jsr/ret instruction, for possible branch- -prediction logic which may be provided on some processors. */ - BFD_RELOC_ALPHA_HINT, - -/* The LINKAGE relocation outputs a linkage pair in the object file, -which is filled by the linker. */ - BFD_RELOC_ALPHA_LINKAGE, - -/* The CODEADDR relocation outputs a STO_CA in the object file, -which is filled by the linker. */ - BFD_RELOC_ALPHA_CODEADDR, - -/* The GPREL_HI/LO relocations together form a 32-bit offset from the -GP register. */ - BFD_RELOC_ALPHA_GPREL_HI16, - BFD_RELOC_ALPHA_GPREL_LO16, - -/* Like BFD_RELOC_23_PCREL_S2, except that the source and target must -share a common GP, and the target address is adjusted for -STO_ALPHA_STD_GPLOAD. */ - BFD_RELOC_ALPHA_BRSGP, - -/* Alpha thread-local storage relocations. */ - BFD_RELOC_ALPHA_TLSGD, - BFD_RELOC_ALPHA_TLSLDM, - BFD_RELOC_ALPHA_DTPMOD64, - BFD_RELOC_ALPHA_GOTDTPREL16, - BFD_RELOC_ALPHA_DTPREL64, - BFD_RELOC_ALPHA_DTPREL_HI16, - BFD_RELOC_ALPHA_DTPREL_LO16, - BFD_RELOC_ALPHA_DTPREL16, - BFD_RELOC_ALPHA_GOTTPREL16, - BFD_RELOC_ALPHA_TPREL64, - BFD_RELOC_ALPHA_TPREL_HI16, - BFD_RELOC_ALPHA_TPREL_LO16, - BFD_RELOC_ALPHA_TPREL16, - -/* Bits 27..2 of the relocation address shifted right 2 bits; -simple reloc otherwise. */ - BFD_RELOC_MIPS_JMP, - -/* The MIPS16 jump instruction. */ - BFD_RELOC_MIPS16_JMP, - -/* MIPS16 GP relative reloc. */ - BFD_RELOC_MIPS16_GPREL, - -/* High 16 bits of 32-bit value; simple reloc. */ - BFD_RELOC_HI16, - -/* High 16 bits of 32-bit value but the low 16 bits will be sign -extended and added to form the final result. If the low 16 -bits form a negative number, we need to add one to the high value -to compensate for the borrow when the low bits are added. */ - BFD_RELOC_HI16_S, - -/* Low 16 bits. */ - BFD_RELOC_LO16, - -/* High 16 bits of 32-bit pc-relative value */ - BFD_RELOC_HI16_PCREL, - -/* High 16 bits of 32-bit pc-relative value, adjusted */ - BFD_RELOC_HI16_S_PCREL, - -/* Low 16 bits of pc-relative value */ - BFD_RELOC_LO16_PCREL, - -/* MIPS16 high 16 bits of 32-bit value. */ - BFD_RELOC_MIPS16_HI16, - -/* MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign -extended and added to form the final result. If the low 16 -bits form a negative number, we need to add one to the high value -to compensate for the borrow when the low bits are added. */ - BFD_RELOC_MIPS16_HI16_S, - -/* MIPS16 low 16 bits. */ - BFD_RELOC_MIPS16_LO16, - -/* Relocation against a MIPS literal section. */ - BFD_RELOC_MIPS_LITERAL, - -/* MIPS ELF relocations. */ - BFD_RELOC_MIPS_GOT16, - BFD_RELOC_MIPS_CALL16, - BFD_RELOC_MIPS_GOT_HI16, - BFD_RELOC_MIPS_GOT_LO16, - BFD_RELOC_MIPS_CALL_HI16, - BFD_RELOC_MIPS_CALL_LO16, - BFD_RELOC_MIPS_SUB, - BFD_RELOC_MIPS_GOT_PAGE, - BFD_RELOC_MIPS_GOT_OFST, - BFD_RELOC_MIPS_GOT_DISP, - BFD_RELOC_MIPS_SHIFT5, - BFD_RELOC_MIPS_SHIFT6, - BFD_RELOC_MIPS_INSERT_A, - BFD_RELOC_MIPS_INSERT_B, - BFD_RELOC_MIPS_DELETE, - BFD_RELOC_MIPS_HIGHEST, - BFD_RELOC_MIPS_HIGHER, - BFD_RELOC_MIPS_SCN_DISP, - BFD_RELOC_MIPS_REL16, - BFD_RELOC_MIPS_RELGOT, - BFD_RELOC_MIPS_JALR, - BFD_RELOC_MIPS_TLS_DTPMOD32, - BFD_RELOC_MIPS_TLS_DTPREL32, - BFD_RELOC_MIPS_TLS_DTPMOD64, - BFD_RELOC_MIPS_TLS_DTPREL64, - BFD_RELOC_MIPS_TLS_GD, - BFD_RELOC_MIPS_TLS_LDM, - BFD_RELOC_MIPS_TLS_DTPREL_HI16, - BFD_RELOC_MIPS_TLS_DTPREL_LO16, - BFD_RELOC_MIPS_TLS_GOTTPREL, - BFD_RELOC_MIPS_TLS_TPREL32, - BFD_RELOC_MIPS_TLS_TPREL64, - BFD_RELOC_MIPS_TLS_TPREL_HI16, - BFD_RELOC_MIPS_TLS_TPREL_LO16, - - -/* MIPS ELF relocations (VxWorks extensions). */ - BFD_RELOC_MIPS_COPY, - BFD_RELOC_MIPS_JUMP_SLOT, - - -/* Fujitsu Frv Relocations. */ - BFD_RELOC_FRV_LABEL16, - BFD_RELOC_FRV_LABEL24, - BFD_RELOC_FRV_LO16, - BFD_RELOC_FRV_HI16, - BFD_RELOC_FRV_GPREL12, - BFD_RELOC_FRV_GPRELU12, - BFD_RELOC_FRV_GPREL32, - BFD_RELOC_FRV_GPRELHI, - BFD_RELOC_FRV_GPRELLO, - BFD_RELOC_FRV_GOT12, - BFD_RELOC_FRV_GOTHI, - BFD_RELOC_FRV_GOTLO, - BFD_RELOC_FRV_FUNCDESC, - BFD_RELOC_FRV_FUNCDESC_GOT12, - BFD_RELOC_FRV_FUNCDESC_GOTHI, - BFD_RELOC_FRV_FUNCDESC_GOTLO, - BFD_RELOC_FRV_FUNCDESC_VALUE, - BFD_RELOC_FRV_FUNCDESC_GOTOFF12, - BFD_RELOC_FRV_FUNCDESC_GOTOFFHI, - BFD_RELOC_FRV_FUNCDESC_GOTOFFLO, - BFD_RELOC_FRV_GOTOFF12, - BFD_RELOC_FRV_GOTOFFHI, - BFD_RELOC_FRV_GOTOFFLO, - BFD_RELOC_FRV_GETTLSOFF, - BFD_RELOC_FRV_TLSDESC_VALUE, - BFD_RELOC_FRV_GOTTLSDESC12, - BFD_RELOC_FRV_GOTTLSDESCHI, - BFD_RELOC_FRV_GOTTLSDESCLO, - BFD_RELOC_FRV_TLSMOFF12, - BFD_RELOC_FRV_TLSMOFFHI, - BFD_RELOC_FRV_TLSMOFFLO, - BFD_RELOC_FRV_GOTTLSOFF12, - BFD_RELOC_FRV_GOTTLSOFFHI, - BFD_RELOC_FRV_GOTTLSOFFLO, - BFD_RELOC_FRV_TLSOFF, - BFD_RELOC_FRV_TLSDESC_RELAX, - BFD_RELOC_FRV_GETTLSOFF_RELAX, - BFD_RELOC_FRV_TLSOFF_RELAX, - BFD_RELOC_FRV_TLSMOFF, - - -/* This is a 24bit GOT-relative reloc for the mn10300. */ - BFD_RELOC_MN10300_GOTOFF24, - -/* This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes -in the instruction. */ - BFD_RELOC_MN10300_GOT32, - -/* This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes -in the instruction. */ - BFD_RELOC_MN10300_GOT24, - -/* This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes -in the instruction. */ - BFD_RELOC_MN10300_GOT16, - -/* Copy symbol at runtime. */ - BFD_RELOC_MN10300_COPY, - -/* Create GOT entry. */ - BFD_RELOC_MN10300_GLOB_DAT, - -/* Create PLT entry. */ - BFD_RELOC_MN10300_JMP_SLOT, - -/* Adjust by program base. */ - BFD_RELOC_MN10300_RELATIVE, - -/* Together with another reloc targeted at the same location, -allows for a value that is the difference of two symbols -in the same section. */ - BFD_RELOC_MN10300_SYM_DIFF, - -/* The addend of this reloc is an alignment power that must -be honoured at the offset's location, regardless of linker -relaxation. */ - BFD_RELOC_MN10300_ALIGN, - - -/* i386/elf relocations */ - BFD_RELOC_386_GOT32, - BFD_RELOC_386_PLT32, - BFD_RELOC_386_COPY, - BFD_RELOC_386_GLOB_DAT, - BFD_RELOC_386_JUMP_SLOT, - BFD_RELOC_386_RELATIVE, - BFD_RELOC_386_GOTOFF, - BFD_RELOC_386_GOTPC, - BFD_RELOC_386_TLS_TPOFF, - BFD_RELOC_386_TLS_IE, - BFD_RELOC_386_TLS_GOTIE, - BFD_RELOC_386_TLS_LE, - BFD_RELOC_386_TLS_GD, - BFD_RELOC_386_TLS_LDM, - BFD_RELOC_386_TLS_LDO_32, - BFD_RELOC_386_TLS_IE_32, - BFD_RELOC_386_TLS_LE_32, - BFD_RELOC_386_TLS_DTPMOD32, - BFD_RELOC_386_TLS_DTPOFF32, - BFD_RELOC_386_TLS_TPOFF32, - BFD_RELOC_386_TLS_GOTDESC, - BFD_RELOC_386_TLS_DESC_CALL, - BFD_RELOC_386_TLS_DESC, - -/* x86-64/elf relocations */ - BFD_RELOC_X86_64_GOT32, - BFD_RELOC_X86_64_PLT32, - BFD_RELOC_X86_64_COPY, - BFD_RELOC_X86_64_GLOB_DAT, - BFD_RELOC_X86_64_JUMP_SLOT, - BFD_RELOC_X86_64_RELATIVE, - BFD_RELOC_X86_64_GOTPCREL, - BFD_RELOC_X86_64_32S, - BFD_RELOC_X86_64_DTPMOD64, - BFD_RELOC_X86_64_DTPOFF64, - BFD_RELOC_X86_64_TPOFF64, - BFD_RELOC_X86_64_TLSGD, - BFD_RELOC_X86_64_TLSLD, - BFD_RELOC_X86_64_DTPOFF32, - BFD_RELOC_X86_64_GOTTPOFF, - BFD_RELOC_X86_64_TPOFF32, - BFD_RELOC_X86_64_GOTOFF64, - BFD_RELOC_X86_64_GOTPC32, - BFD_RELOC_X86_64_GOT64, - BFD_RELOC_X86_64_GOTPCREL64, - BFD_RELOC_X86_64_GOTPC64, - BFD_RELOC_X86_64_GOTPLT64, - BFD_RELOC_X86_64_PLTOFF64, - BFD_RELOC_X86_64_GOTPC32_TLSDESC, - BFD_RELOC_X86_64_TLSDESC_CALL, - BFD_RELOC_X86_64_TLSDESC, - -/* ns32k relocations */ - BFD_RELOC_NS32K_IMM_8, - BFD_RELOC_NS32K_IMM_16, - BFD_RELOC_NS32K_IMM_32, - BFD_RELOC_NS32K_IMM_8_PCREL, - BFD_RELOC_NS32K_IMM_16_PCREL, - BFD_RELOC_NS32K_IMM_32_PCREL, - BFD_RELOC_NS32K_DISP_8, - BFD_RELOC_NS32K_DISP_16, - BFD_RELOC_NS32K_DISP_32, - BFD_RELOC_NS32K_DISP_8_PCREL, - BFD_RELOC_NS32K_DISP_16_PCREL, - BFD_RELOC_NS32K_DISP_32_PCREL, - -/* PDP11 relocations */ - BFD_RELOC_PDP11_DISP_8_PCREL, - BFD_RELOC_PDP11_DISP_6_PCREL, - -/* Picojava relocs. Not all of these appear in object files. */ - BFD_RELOC_PJ_CODE_HI16, - BFD_RELOC_PJ_CODE_LO16, - BFD_RELOC_PJ_CODE_DIR16, - BFD_RELOC_PJ_CODE_DIR32, - BFD_RELOC_PJ_CODE_REL16, - BFD_RELOC_PJ_CODE_REL32, - -/* Power(rs6000) and PowerPC relocations. */ - BFD_RELOC_PPC_B26, - BFD_RELOC_PPC_BA26, - BFD_RELOC_PPC_TOC16, - BFD_RELOC_PPC_B16, - BFD_RELOC_PPC_B16_BRTAKEN, - BFD_RELOC_PPC_B16_BRNTAKEN, - BFD_RELOC_PPC_BA16, - BFD_RELOC_PPC_BA16_BRTAKEN, - BFD_RELOC_PPC_BA16_BRNTAKEN, - BFD_RELOC_PPC_COPY, - BFD_RELOC_PPC_GLOB_DAT, - BFD_RELOC_PPC_JMP_SLOT, - BFD_RELOC_PPC_RELATIVE, - BFD_RELOC_PPC_LOCAL24PC, - BFD_RELOC_PPC_EMB_NADDR32, - BFD_RELOC_PPC_EMB_NADDR16, - BFD_RELOC_PPC_EMB_NADDR16_LO, - BFD_RELOC_PPC_EMB_NADDR16_HI, - BFD_RELOC_PPC_EMB_NADDR16_HA, - BFD_RELOC_PPC_EMB_SDAI16, - BFD_RELOC_PPC_EMB_SDA2I16, - BFD_RELOC_PPC_EMB_SDA2REL, - BFD_RELOC_PPC_EMB_SDA21, - BFD_RELOC_PPC_EMB_MRKREF, - BFD_RELOC_PPC_EMB_RELSEC16, - BFD_RELOC_PPC_EMB_RELST_LO, - BFD_RELOC_PPC_EMB_RELST_HI, - BFD_RELOC_PPC_EMB_RELST_HA, - BFD_RELOC_PPC_EMB_BIT_FLD, - BFD_RELOC_PPC_EMB_RELSDA, - BFD_RELOC_PPC64_HIGHER, - BFD_RELOC_PPC64_HIGHER_S, - BFD_RELOC_PPC64_HIGHEST, - BFD_RELOC_PPC64_HIGHEST_S, - BFD_RELOC_PPC64_TOC16_LO, - BFD_RELOC_PPC64_TOC16_HI, - BFD_RELOC_PPC64_TOC16_HA, - BFD_RELOC_PPC64_TOC, - BFD_RELOC_PPC64_PLTGOT16, - BFD_RELOC_PPC64_PLTGOT16_LO, - BFD_RELOC_PPC64_PLTGOT16_HI, - BFD_RELOC_PPC64_PLTGOT16_HA, - BFD_RELOC_PPC64_ADDR16_DS, - BFD_RELOC_PPC64_ADDR16_LO_DS, - BFD_RELOC_PPC64_GOT16_DS, - BFD_RELOC_PPC64_GOT16_LO_DS, - BFD_RELOC_PPC64_PLT16_LO_DS, - BFD_RELOC_PPC64_SECTOFF_DS, - BFD_RELOC_PPC64_SECTOFF_LO_DS, - BFD_RELOC_PPC64_TOC16_DS, - BFD_RELOC_PPC64_TOC16_LO_DS, - BFD_RELOC_PPC64_PLTGOT16_DS, - BFD_RELOC_PPC64_PLTGOT16_LO_DS, - -/* PowerPC and PowerPC64 thread-local storage relocations. */ - BFD_RELOC_PPC_TLS, - BFD_RELOC_PPC_DTPMOD, - BFD_RELOC_PPC_TPREL16, - BFD_RELOC_PPC_TPREL16_LO, - BFD_RELOC_PPC_TPREL16_HI, - BFD_RELOC_PPC_TPREL16_HA, - BFD_RELOC_PPC_TPREL, - BFD_RELOC_PPC_DTPREL16, - BFD_RELOC_PPC_DTPREL16_LO, - BFD_RELOC_PPC_DTPREL16_HI, - BFD_RELOC_PPC_DTPREL16_HA, - BFD_RELOC_PPC_DTPREL, - BFD_RELOC_PPC_GOT_TLSGD16, - BFD_RELOC_PPC_GOT_TLSGD16_LO, - BFD_RELOC_PPC_GOT_TLSGD16_HI, - BFD_RELOC_PPC_GOT_TLSGD16_HA, - BFD_RELOC_PPC_GOT_TLSLD16, - BFD_RELOC_PPC_GOT_TLSLD16_LO, - BFD_RELOC_PPC_GOT_TLSLD16_HI, - BFD_RELOC_PPC_GOT_TLSLD16_HA, - BFD_RELOC_PPC_GOT_TPREL16, - BFD_RELOC_PPC_GOT_TPREL16_LO, - BFD_RELOC_PPC_GOT_TPREL16_HI, - BFD_RELOC_PPC_GOT_TPREL16_HA, - BFD_RELOC_PPC_GOT_DTPREL16, - BFD_RELOC_PPC_GOT_DTPREL16_LO, - BFD_RELOC_PPC_GOT_DTPREL16_HI, - BFD_RELOC_PPC_GOT_DTPREL16_HA, - BFD_RELOC_PPC64_TPREL16_DS, - BFD_RELOC_PPC64_TPREL16_LO_DS, - BFD_RELOC_PPC64_TPREL16_HIGHER, - BFD_RELOC_PPC64_TPREL16_HIGHERA, - BFD_RELOC_PPC64_TPREL16_HIGHEST, - BFD_RELOC_PPC64_TPREL16_HIGHESTA, - BFD_RELOC_PPC64_DTPREL16_DS, - BFD_RELOC_PPC64_DTPREL16_LO_DS, - BFD_RELOC_PPC64_DTPREL16_HIGHER, - BFD_RELOC_PPC64_DTPREL16_HIGHERA, - BFD_RELOC_PPC64_DTPREL16_HIGHEST, - BFD_RELOC_PPC64_DTPREL16_HIGHESTA, - -/* IBM 370/390 relocations */ - BFD_RELOC_I370_D12, - -/* The type of reloc used to build a constructor table - at the moment -probably a 32 bit wide absolute relocation, but the target can choose. -It generally does map to one of the other relocation types. */ - BFD_RELOC_CTOR, - -/* ARM 26 bit pc-relative branch. The lowest two bits must be zero and are -not stored in the instruction. */ - BFD_RELOC_ARM_PCREL_BRANCH, - -/* ARM 26 bit pc-relative branch. The lowest bit must be zero and is -not stored in the instruction. The 2nd lowest bit comes from a 1 bit -field in the instruction. */ - BFD_RELOC_ARM_PCREL_BLX, - -/* Thumb 22 bit pc-relative branch. The lowest bit must be zero and is -not stored in the instruction. The 2nd lowest bit comes from a 1 bit -field in the instruction. */ - BFD_RELOC_THUMB_PCREL_BLX, - -/* ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction. */ - BFD_RELOC_ARM_PCREL_CALL, - -/* ARM 26-bit pc-relative branch for B or conditional BL instruction. */ - BFD_RELOC_ARM_PCREL_JUMP, - -/* Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches. -The lowest bit must be zero and is not stored in the instruction. -Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an -"nn" one smaller in all cases. Note further that BRANCH23 -corresponds to R_ARM_THM_CALL. */ - BFD_RELOC_THUMB_PCREL_BRANCH7, - BFD_RELOC_THUMB_PCREL_BRANCH9, - BFD_RELOC_THUMB_PCREL_BRANCH12, - BFD_RELOC_THUMB_PCREL_BRANCH20, - BFD_RELOC_THUMB_PCREL_BRANCH23, - BFD_RELOC_THUMB_PCREL_BRANCH25, - -/* 12-bit immediate offset, used in ARM-format ldr and str instructions. */ - BFD_RELOC_ARM_OFFSET_IMM, - -/* 5-bit immediate offset, used in Thumb-format ldr and str instructions. */ - BFD_RELOC_ARM_THUMB_OFFSET, - -/* Pc-relative or absolute relocation depending on target. Used for -entries in .init_array sections. */ - BFD_RELOC_ARM_TARGET1, - -/* Read-only segment base relative address. */ - BFD_RELOC_ARM_ROSEGREL32, - -/* Data segment base relative address. */ - BFD_RELOC_ARM_SBREL32, - -/* This reloc is used for references to RTTI data from exception handling -tables. The actual definition depends on the target. It may be a -pc-relative or some form of GOT-indirect relocation. */ - BFD_RELOC_ARM_TARGET2, - -/* 31-bit PC relative address. */ - BFD_RELOC_ARM_PREL31, - -/* Low and High halfword relocations for MOVW and MOVT instructions. */ - BFD_RELOC_ARM_MOVW, - BFD_RELOC_ARM_MOVT, - BFD_RELOC_ARM_MOVW_PCREL, - BFD_RELOC_ARM_MOVT_PCREL, - BFD_RELOC_ARM_THUMB_MOVW, - BFD_RELOC_ARM_THUMB_MOVT, - BFD_RELOC_ARM_THUMB_MOVW_PCREL, - BFD_RELOC_ARM_THUMB_MOVT_PCREL, - -/* Relocations for setting up GOTs and PLTs for shared libraries. */ - BFD_RELOC_ARM_JUMP_SLOT, - BFD_RELOC_ARM_GLOB_DAT, - BFD_RELOC_ARM_GOT32, - BFD_RELOC_ARM_PLT32, - BFD_RELOC_ARM_RELATIVE, - BFD_RELOC_ARM_GOTOFF, - BFD_RELOC_ARM_GOTPC, - -/* ARM thread-local storage relocations. */ - BFD_RELOC_ARM_TLS_GD32, - BFD_RELOC_ARM_TLS_LDO32, - BFD_RELOC_ARM_TLS_LDM32, - BFD_RELOC_ARM_TLS_DTPOFF32, - BFD_RELOC_ARM_TLS_DTPMOD32, - BFD_RELOC_ARM_TLS_TPOFF32, - BFD_RELOC_ARM_TLS_IE32, - BFD_RELOC_ARM_TLS_LE32, - -/* ARM group relocations. */ - BFD_RELOC_ARM_ALU_PC_G0_NC, - BFD_RELOC_ARM_ALU_PC_G0, - BFD_RELOC_ARM_ALU_PC_G1_NC, - BFD_RELOC_ARM_ALU_PC_G1, - BFD_RELOC_ARM_ALU_PC_G2, - BFD_RELOC_ARM_LDR_PC_G0, - BFD_RELOC_ARM_LDR_PC_G1, - BFD_RELOC_ARM_LDR_PC_G2, - BFD_RELOC_ARM_LDRS_PC_G0, - BFD_RELOC_ARM_LDRS_PC_G1, - BFD_RELOC_ARM_LDRS_PC_G2, - BFD_RELOC_ARM_LDC_PC_G0, - BFD_RELOC_ARM_LDC_PC_G1, - BFD_RELOC_ARM_LDC_PC_G2, - BFD_RELOC_ARM_ALU_SB_G0_NC, - BFD_RELOC_ARM_ALU_SB_G0, - BFD_RELOC_ARM_ALU_SB_G1_NC, - BFD_RELOC_ARM_ALU_SB_G1, - BFD_RELOC_ARM_ALU_SB_G2, - BFD_RELOC_ARM_LDR_SB_G0, - BFD_RELOC_ARM_LDR_SB_G1, - BFD_RELOC_ARM_LDR_SB_G2, - BFD_RELOC_ARM_LDRS_SB_G0, - BFD_RELOC_ARM_LDRS_SB_G1, - BFD_RELOC_ARM_LDRS_SB_G2, - BFD_RELOC_ARM_LDC_SB_G0, - BFD_RELOC_ARM_LDC_SB_G1, - BFD_RELOC_ARM_LDC_SB_G2, - -/* Annotation of BX instructions. */ - BFD_RELOC_ARM_V4BX, - -/* These relocs are only used within the ARM assembler. They are not -(at present) written to any object files. */ - BFD_RELOC_ARM_IMMEDIATE, - BFD_RELOC_ARM_ADRL_IMMEDIATE, - BFD_RELOC_ARM_T32_IMMEDIATE, - BFD_RELOC_ARM_T32_ADD_IMM, - BFD_RELOC_ARM_T32_IMM12, - BFD_RELOC_ARM_T32_ADD_PC12, - BFD_RELOC_ARM_SHIFT_IMM, - BFD_RELOC_ARM_SMC, - BFD_RELOC_ARM_SWI, - BFD_RELOC_ARM_MULTI, - BFD_RELOC_ARM_CP_OFF_IMM, - BFD_RELOC_ARM_CP_OFF_IMM_S2, - BFD_RELOC_ARM_T32_CP_OFF_IMM, - BFD_RELOC_ARM_T32_CP_OFF_IMM_S2, - BFD_RELOC_ARM_ADR_IMM, - BFD_RELOC_ARM_LDR_IMM, - BFD_RELOC_ARM_LITERAL, - BFD_RELOC_ARM_IN_POOL, - BFD_RELOC_ARM_OFFSET_IMM8, - BFD_RELOC_ARM_T32_OFFSET_U8, - BFD_RELOC_ARM_T32_OFFSET_IMM, - BFD_RELOC_ARM_HWLITERAL, - BFD_RELOC_ARM_THUMB_ADD, - BFD_RELOC_ARM_THUMB_IMM, - BFD_RELOC_ARM_THUMB_SHIFT, - -/* Renesas / SuperH SH relocs. Not all of these appear in object files. */ - BFD_RELOC_SH_PCDISP8BY2, - BFD_RELOC_SH_PCDISP12BY2, - BFD_RELOC_SH_IMM3, - BFD_RELOC_SH_IMM3U, - BFD_RELOC_SH_DISP12, - BFD_RELOC_SH_DISP12BY2, - BFD_RELOC_SH_DISP12BY4, - BFD_RELOC_SH_DISP12BY8, - BFD_RELOC_SH_DISP20, - BFD_RELOC_SH_DISP20BY8, - BFD_RELOC_SH_IMM4, - BFD_RELOC_SH_IMM4BY2, - BFD_RELOC_SH_IMM4BY4, - BFD_RELOC_SH_IMM8, - BFD_RELOC_SH_IMM8BY2, - BFD_RELOC_SH_IMM8BY4, - BFD_RELOC_SH_PCRELIMM8BY2, - BFD_RELOC_SH_PCRELIMM8BY4, - BFD_RELOC_SH_SWITCH16, - BFD_RELOC_SH_SWITCH32, - BFD_RELOC_SH_USES, - BFD_RELOC_SH_COUNT, - BFD_RELOC_SH_ALIGN, - BFD_RELOC_SH_CODE, - BFD_RELOC_SH_DATA, - BFD_RELOC_SH_LABEL, - BFD_RELOC_SH_LOOP_START, - BFD_RELOC_SH_LOOP_END, - BFD_RELOC_SH_COPY, - BFD_RELOC_SH_GLOB_DAT, - BFD_RELOC_SH_JMP_SLOT, - BFD_RELOC_SH_RELATIVE, - BFD_RELOC_SH_GOTPC, - BFD_RELOC_SH_GOT_LOW16, - BFD_RELOC_SH_GOT_MEDLOW16, - BFD_RELOC_SH_GOT_MEDHI16, - BFD_RELOC_SH_GOT_HI16, - BFD_RELOC_SH_GOTPLT_LOW16, - BFD_RELOC_SH_GOTPLT_MEDLOW16, - BFD_RELOC_SH_GOTPLT_MEDHI16, - BFD_RELOC_SH_GOTPLT_HI16, - BFD_RELOC_SH_PLT_LOW16, - BFD_RELOC_SH_PLT_MEDLOW16, - BFD_RELOC_SH_PLT_MEDHI16, - BFD_RELOC_SH_PLT_HI16, - BFD_RELOC_SH_GOTOFF_LOW16, - BFD_RELOC_SH_GOTOFF_MEDLOW16, - BFD_RELOC_SH_GOTOFF_MEDHI16, - BFD_RELOC_SH_GOTOFF_HI16, - BFD_RELOC_SH_GOTPC_LOW16, - BFD_RELOC_SH_GOTPC_MEDLOW16, - BFD_RELOC_SH_GOTPC_MEDHI16, - BFD_RELOC_SH_GOTPC_HI16, - BFD_RELOC_SH_COPY64, - BFD_RELOC_SH_GLOB_DAT64, - BFD_RELOC_SH_JMP_SLOT64, - BFD_RELOC_SH_RELATIVE64, - BFD_RELOC_SH_GOT10BY4, - BFD_RELOC_SH_GOT10BY8, - BFD_RELOC_SH_GOTPLT10BY4, - BFD_RELOC_SH_GOTPLT10BY8, - BFD_RELOC_SH_GOTPLT32, - BFD_RELOC_SH_SHMEDIA_CODE, - BFD_RELOC_SH_IMMU5, - BFD_RELOC_SH_IMMS6, - BFD_RELOC_SH_IMMS6BY32, - BFD_RELOC_SH_IMMU6, - BFD_RELOC_SH_IMMS10, - BFD_RELOC_SH_IMMS10BY2, - BFD_RELOC_SH_IMMS10BY4, - BFD_RELOC_SH_IMMS10BY8, - BFD_RELOC_SH_IMMS16, - BFD_RELOC_SH_IMMU16, - BFD_RELOC_SH_IMM_LOW16, - BFD_RELOC_SH_IMM_LOW16_PCREL, - BFD_RELOC_SH_IMM_MEDLOW16, - BFD_RELOC_SH_IMM_MEDLOW16_PCREL, - BFD_RELOC_SH_IMM_MEDHI16, - BFD_RELOC_SH_IMM_MEDHI16_PCREL, - BFD_RELOC_SH_IMM_HI16, - BFD_RELOC_SH_IMM_HI16_PCREL, - BFD_RELOC_SH_PT_16, - BFD_RELOC_SH_TLS_GD_32, - BFD_RELOC_SH_TLS_LD_32, - BFD_RELOC_SH_TLS_LDO_32, - BFD_RELOC_SH_TLS_IE_32, - BFD_RELOC_SH_TLS_LE_32, - BFD_RELOC_SH_TLS_DTPMOD32, - BFD_RELOC_SH_TLS_DTPOFF32, - BFD_RELOC_SH_TLS_TPOFF32, - -/* ARC Cores relocs. -ARC 22 bit pc-relative branch. The lowest two bits must be zero and are -not stored in the instruction. The high 20 bits are installed in bits 26 -through 7 of the instruction. */ - BFD_RELOC_ARC_B22_PCREL, - -/* ARC 26 bit absolute branch. The lowest two bits must be zero and are not -stored in the instruction. The high 24 bits are installed in bits 23 -through 0. */ - BFD_RELOC_ARC_B26, - -/* ADI Blackfin 16 bit immediate absolute reloc. */ - BFD_RELOC_BFIN_16_IMM, - -/* ADI Blackfin 16 bit immediate absolute reloc higher 16 bits. */ - BFD_RELOC_BFIN_16_HIGH, - -/* ADI Blackfin 'a' part of LSETUP. */ - BFD_RELOC_BFIN_4_PCREL, - -/* ADI Blackfin. */ - BFD_RELOC_BFIN_5_PCREL, - -/* ADI Blackfin 16 bit immediate absolute reloc lower 16 bits. */ - BFD_RELOC_BFIN_16_LOW, - -/* ADI Blackfin. */ - BFD_RELOC_BFIN_10_PCREL, - -/* ADI Blackfin 'b' part of LSETUP. */ - BFD_RELOC_BFIN_11_PCREL, - -/* ADI Blackfin. */ - BFD_RELOC_BFIN_12_PCREL_JUMP, - -/* ADI Blackfin Short jump, pcrel. */ - BFD_RELOC_BFIN_12_PCREL_JUMP_S, - -/* ADI Blackfin Call.x not implemented. */ - BFD_RELOC_BFIN_24_PCREL_CALL_X, - -/* ADI Blackfin Long Jump pcrel. */ - BFD_RELOC_BFIN_24_PCREL_JUMP_L, - -/* ADI Blackfin FD-PIC relocations. */ - BFD_RELOC_BFIN_GOT17M4, - BFD_RELOC_BFIN_GOTHI, - BFD_RELOC_BFIN_GOTLO, - BFD_RELOC_BFIN_FUNCDESC, - BFD_RELOC_BFIN_FUNCDESC_GOT17M4, - BFD_RELOC_BFIN_FUNCDESC_GOTHI, - BFD_RELOC_BFIN_FUNCDESC_GOTLO, - BFD_RELOC_BFIN_FUNCDESC_VALUE, - BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4, - BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI, - BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO, - BFD_RELOC_BFIN_GOTOFF17M4, - BFD_RELOC_BFIN_GOTOFFHI, - BFD_RELOC_BFIN_GOTOFFLO, - -/* ADI Blackfin GOT relocation. */ - BFD_RELOC_BFIN_GOT, - -/* ADI Blackfin PLTPC relocation. */ - BFD_RELOC_BFIN_PLTPC, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_PUSH, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_CONST, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_ADD, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_SUB, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_MULT, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_DIV, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_MOD, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_LSHIFT, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_RSHIFT, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_AND, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_OR, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_XOR, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_LAND, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_LOR, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_LEN, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_NEG, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_COMP, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_PAGE, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_HWPAGE, - -/* ADI Blackfin arithmetic relocation. */ - BFD_ARELOC_BFIN_ADDR, - -/* Mitsubishi D10V relocs. -This is a 10-bit reloc with the right 2 bits -assumed to be 0. */ - BFD_RELOC_D10V_10_PCREL_R, - -/* Mitsubishi D10V relocs. -This is a 10-bit reloc with the right 2 bits -assumed to be 0. This is the same as the previous reloc -except it is in the left container, i.e., -shifted left 15 bits. */ - BFD_RELOC_D10V_10_PCREL_L, - -/* This is an 18-bit reloc with the right 2 bits -assumed to be 0. */ - BFD_RELOC_D10V_18, - -/* This is an 18-bit reloc with the right 2 bits -assumed to be 0. */ - BFD_RELOC_D10V_18_PCREL, - -/* Mitsubishi D30V relocs. -This is a 6-bit absolute reloc. */ - BFD_RELOC_D30V_6, - -/* This is a 6-bit pc-relative reloc with -the right 3 bits assumed to be 0. */ - BFD_RELOC_D30V_9_PCREL, - -/* This is a 6-bit pc-relative reloc with -the right 3 bits assumed to be 0. Same -as the previous reloc but on the right side -of the container. */ - BFD_RELOC_D30V_9_PCREL_R, - -/* This is a 12-bit absolute reloc with the -right 3 bitsassumed to be 0. */ - BFD_RELOC_D30V_15, - -/* This is a 12-bit pc-relative reloc with -the right 3 bits assumed to be 0. */ - BFD_RELOC_D30V_15_PCREL, - -/* This is a 12-bit pc-relative reloc with -the right 3 bits assumed to be 0. Same -as the previous reloc but on the right side -of the container. */ - BFD_RELOC_D30V_15_PCREL_R, - -/* This is an 18-bit absolute reloc with -the right 3 bits assumed to be 0. */ - BFD_RELOC_D30V_21, - -/* This is an 18-bit pc-relative reloc with -the right 3 bits assumed to be 0. */ - BFD_RELOC_D30V_21_PCREL, - -/* This is an 18-bit pc-relative reloc with -the right 3 bits assumed to be 0. Same -as the previous reloc but on the right side -of the container. */ - BFD_RELOC_D30V_21_PCREL_R, - -/* This is a 32-bit absolute reloc. */ - BFD_RELOC_D30V_32, - -/* This is a 32-bit pc-relative reloc. */ - BFD_RELOC_D30V_32_PCREL, - -/* DLX relocs */ - BFD_RELOC_DLX_HI16_S, - -/* DLX relocs */ - BFD_RELOC_DLX_LO16, - -/* DLX relocs */ - BFD_RELOC_DLX_JMP26, - -/* Renesas M16C/M32C Relocations. */ - BFD_RELOC_M32C_HI8, - BFD_RELOC_M32C_RL_JUMP, - BFD_RELOC_M32C_RL_1ADDR, - BFD_RELOC_M32C_RL_2ADDR, - -/* Renesas M32R (formerly Mitsubishi M32R) relocs. -This is a 24 bit absolute address. */ - BFD_RELOC_M32R_24, - -/* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */ - BFD_RELOC_M32R_10_PCREL, - -/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */ - BFD_RELOC_M32R_18_PCREL, - -/* This is a 26-bit reloc with the right 2 bits assumed to be 0. */ - BFD_RELOC_M32R_26_PCREL, - -/* This is a 16-bit reloc containing the high 16 bits of an address -used when the lower 16 bits are treated as unsigned. */ - BFD_RELOC_M32R_HI16_ULO, - -/* This is a 16-bit reloc containing the high 16 bits of an address -used when the lower 16 bits are treated as signed. */ - BFD_RELOC_M32R_HI16_SLO, - -/* This is a 16-bit reloc containing the lower 16 bits of an address. */ - BFD_RELOC_M32R_LO16, - -/* This is a 16-bit reloc containing the small data area offset for use in -add3, load, and store instructions. */ - BFD_RELOC_M32R_SDA16, - -/* For PIC. */ - BFD_RELOC_M32R_GOT24, - BFD_RELOC_M32R_26_PLTREL, - BFD_RELOC_M32R_COPY, - BFD_RELOC_M32R_GLOB_DAT, - BFD_RELOC_M32R_JMP_SLOT, - BFD_RELOC_M32R_RELATIVE, - BFD_RELOC_M32R_GOTOFF, - BFD_RELOC_M32R_GOTOFF_HI_ULO, - BFD_RELOC_M32R_GOTOFF_HI_SLO, - BFD_RELOC_M32R_GOTOFF_LO, - BFD_RELOC_M32R_GOTPC24, - BFD_RELOC_M32R_GOT16_HI_ULO, - BFD_RELOC_M32R_GOT16_HI_SLO, - BFD_RELOC_M32R_GOT16_LO, - BFD_RELOC_M32R_GOTPC_HI_ULO, - BFD_RELOC_M32R_GOTPC_HI_SLO, - BFD_RELOC_M32R_GOTPC_LO, - -/* This is a 9-bit reloc */ - BFD_RELOC_V850_9_PCREL, - -/* This is a 22-bit reloc */ - BFD_RELOC_V850_22_PCREL, - -/* This is a 16 bit offset from the short data area pointer. */ - BFD_RELOC_V850_SDA_16_16_OFFSET, - -/* This is a 16 bit offset (of which only 15 bits are used) from the -short data area pointer. */ - BFD_RELOC_V850_SDA_15_16_OFFSET, - -/* This is a 16 bit offset from the zero data area pointer. */ - BFD_RELOC_V850_ZDA_16_16_OFFSET, - -/* This is a 16 bit offset (of which only 15 bits are used) from the -zero data area pointer. */ - BFD_RELOC_V850_ZDA_15_16_OFFSET, - -/* This is an 8 bit offset (of which only 6 bits are used) from the -tiny data area pointer. */ - BFD_RELOC_V850_TDA_6_8_OFFSET, - -/* This is an 8bit offset (of which only 7 bits are used) from the tiny -data area pointer. */ - BFD_RELOC_V850_TDA_7_8_OFFSET, - -/* This is a 7 bit offset from the tiny data area pointer. */ - BFD_RELOC_V850_TDA_7_7_OFFSET, - -/* This is a 16 bit offset from the tiny data area pointer. */ - BFD_RELOC_V850_TDA_16_16_OFFSET, - -/* This is a 5 bit offset (of which only 4 bits are used) from the tiny -data area pointer. */ - BFD_RELOC_V850_TDA_4_5_OFFSET, - -/* This is a 4 bit offset from the tiny data area pointer. */ - BFD_RELOC_V850_TDA_4_4_OFFSET, - -/* This is a 16 bit offset from the short data area pointer, with the -bits placed non-contiguously in the instruction. */ - BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, - -/* This is a 16 bit offset from the zero data area pointer, with the -bits placed non-contiguously in the instruction. */ - BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, - -/* This is a 6 bit offset from the call table base pointer. */ - BFD_RELOC_V850_CALLT_6_7_OFFSET, - -/* This is a 16 bit offset from the call table base pointer. */ - BFD_RELOC_V850_CALLT_16_16_OFFSET, - -/* Used for relaxing indirect function calls. */ - BFD_RELOC_V850_LONGCALL, - -/* Used for relaxing indirect jumps. */ - BFD_RELOC_V850_LONGJUMP, - -/* Used to maintain alignment whilst relaxing. */ - BFD_RELOC_V850_ALIGN, - -/* This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu -instructions. */ - BFD_RELOC_V850_LO16_SPLIT_OFFSET, - -/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the -instruction. */ - BFD_RELOC_MN10300_32_PCREL, - -/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the -instruction. */ - BFD_RELOC_MN10300_16_PCREL, - -/* This is a 8bit DP reloc for the tms320c30, where the most -significant 8 bits of a 24 bit word are placed into the least -significant 8 bits of the opcode. */ - BFD_RELOC_TIC30_LDP, - -/* This is a 7bit reloc for the tms320c54x, where the least -significant 7 bits of a 16 bit word are placed into the least -significant 7 bits of the opcode. */ - BFD_RELOC_TIC54X_PARTLS7, - -/* This is a 9bit DP reloc for the tms320c54x, where the most -significant 9 bits of a 16 bit word are placed into the least -significant 9 bits of the opcode. */ - BFD_RELOC_TIC54X_PARTMS9, - -/* This is an extended address 23-bit reloc for the tms320c54x. */ - BFD_RELOC_TIC54X_23, - -/* This is a 16-bit reloc for the tms320c54x, where the least -significant 16 bits of a 23-bit extended address are placed into -the opcode. */ - BFD_RELOC_TIC54X_16_OF_23, - -/* This is a reloc for the tms320c54x, where the most -significant 7 bits of a 23-bit extended address are placed into -the opcode. */ - BFD_RELOC_TIC54X_MS7_OF_23, - -/* This is a 48 bit reloc for the FR30 that stores 32 bits. */ - BFD_RELOC_FR30_48, - -/* This is a 32 bit reloc for the FR30 that stores 20 bits split up into -two sections. */ - BFD_RELOC_FR30_20, - -/* This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in -4 bits. */ - BFD_RELOC_FR30_6_IN_4, - -/* This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset -into 8 bits. */ - BFD_RELOC_FR30_8_IN_8, - -/* This is a 16 bit reloc for the FR30 that stores a 9 bit short offset -into 8 bits. */ - BFD_RELOC_FR30_9_IN_8, - -/* This is a 16 bit reloc for the FR30 that stores a 10 bit word offset -into 8 bits. */ - BFD_RELOC_FR30_10_IN_8, - -/* This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative -short offset into 8 bits. */ - BFD_RELOC_FR30_9_PCREL, - -/* This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative -short offset into 11 bits. */ - BFD_RELOC_FR30_12_PCREL, - -/* Motorola Mcore relocations. */ - BFD_RELOC_MCORE_PCREL_IMM8BY4, - BFD_RELOC_MCORE_PCREL_IMM11BY2, - BFD_RELOC_MCORE_PCREL_IMM4BY2, - BFD_RELOC_MCORE_PCREL_32, - BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2, - BFD_RELOC_MCORE_RVA, - -/* Toshiba Media Processor Relocations. */ - BFD_RELOC_MEP_8, - BFD_RELOC_MEP_16, - BFD_RELOC_MEP_32, - BFD_RELOC_MEP_PCREL8A2, - BFD_RELOC_MEP_PCREL12A2, - BFD_RELOC_MEP_PCREL17A2, - BFD_RELOC_MEP_PCREL24A2, - BFD_RELOC_MEP_PCABS24A2, - BFD_RELOC_MEP_LOW16, - BFD_RELOC_MEP_HI16U, - BFD_RELOC_MEP_HI16S, - BFD_RELOC_MEP_GPREL, - BFD_RELOC_MEP_TPREL, - BFD_RELOC_MEP_TPREL7, - BFD_RELOC_MEP_TPREL7A2, - BFD_RELOC_MEP_TPREL7A4, - BFD_RELOC_MEP_UIMM24, - BFD_RELOC_MEP_ADDR24A4, - BFD_RELOC_MEP_GNU_VTINHERIT, - BFD_RELOC_MEP_GNU_VTENTRY, - - -/* These are relocations for the GETA instruction. */ - BFD_RELOC_MMIX_GETA, - BFD_RELOC_MMIX_GETA_1, - BFD_RELOC_MMIX_GETA_2, - BFD_RELOC_MMIX_GETA_3, - -/* These are relocations for a conditional branch instruction. */ - BFD_RELOC_MMIX_CBRANCH, - BFD_RELOC_MMIX_CBRANCH_J, - BFD_RELOC_MMIX_CBRANCH_1, - BFD_RELOC_MMIX_CBRANCH_2, - BFD_RELOC_MMIX_CBRANCH_3, - -/* These are relocations for the PUSHJ instruction. */ - BFD_RELOC_MMIX_PUSHJ, - BFD_RELOC_MMIX_PUSHJ_1, - BFD_RELOC_MMIX_PUSHJ_2, - BFD_RELOC_MMIX_PUSHJ_3, - BFD_RELOC_MMIX_PUSHJ_STUBBABLE, - -/* These are relocations for the JMP instruction. */ - BFD_RELOC_MMIX_JMP, - BFD_RELOC_MMIX_JMP_1, - BFD_RELOC_MMIX_JMP_2, - BFD_RELOC_MMIX_JMP_3, - -/* This is a relocation for a relative address as in a GETA instruction or -a branch. */ - BFD_RELOC_MMIX_ADDR19, - -/* This is a relocation for a relative address as in a JMP instruction. */ - BFD_RELOC_MMIX_ADDR27, - -/* This is a relocation for an instruction field that may be a general -register or a value 0..255. */ - BFD_RELOC_MMIX_REG_OR_BYTE, - -/* This is a relocation for an instruction field that may be a general -register. */ - BFD_RELOC_MMIX_REG, - -/* This is a relocation for two instruction fields holding a register and -an offset, the equivalent of the relocation. */ - BFD_RELOC_MMIX_BASE_PLUS_OFFSET, - -/* This relocation is an assertion that the expression is not allocated as -a global register. It does not modify contents. */ - BFD_RELOC_MMIX_LOCAL, - -/* This is a 16 bit reloc for the AVR that stores 8 bit pc relative -short offset into 7 bits. */ - BFD_RELOC_AVR_7_PCREL, - -/* This is a 16 bit reloc for the AVR that stores 13 bit pc relative -short offset into 12 bits. */ - BFD_RELOC_AVR_13_PCREL, - -/* This is a 16 bit reloc for the AVR that stores 17 bit value (usually -program memory address) into 16 bits. */ - BFD_RELOC_AVR_16_PM, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually -data memory address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_LO8_LDI, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit -of data memory address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_HI8_LDI, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit -of program memory address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_HH8_LDI, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit -of 32 bit value) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_MS8_LDI, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(usually data memory address) into 8 bit immediate value of SUBI insn. */ - BFD_RELOC_AVR_LO8_LDI_NEG, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(high 8 bit of data memory address) into 8 bit immediate value of -SUBI insn. */ - BFD_RELOC_AVR_HI8_LDI_NEG, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(most high 8 bit of program memory address) into 8 bit immediate value -of LDI or SUBI insn. */ - BFD_RELOC_AVR_HH8_LDI_NEG, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb -of 32 bit value) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_MS8_LDI_NEG, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually -command address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_LO8_LDI_PM, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value -(command address) into 8 bit immediate value of LDI insn. If the address -is beyond the 128k boundary, the linker inserts a jump stub for this reloc -in the lower 128k. */ - BFD_RELOC_AVR_LO8_LDI_GS, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit -of command address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_HI8_LDI_PM, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit -of command address) into 8 bit immediate value of LDI insn. If the address -is beyond the 128k boundary, the linker inserts a jump stub for this reloc -below 128k. */ - BFD_RELOC_AVR_HI8_LDI_GS, - -/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit -of command address) into 8 bit immediate value of LDI insn. */ - BFD_RELOC_AVR_HH8_LDI_PM, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(usually command address) into 8 bit immediate value of SUBI insn. */ - BFD_RELOC_AVR_LO8_LDI_PM_NEG, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(high 8 bit of 16 bit command address) into 8 bit immediate value -of SUBI insn. */ - BFD_RELOC_AVR_HI8_LDI_PM_NEG, - -/* This is a 16 bit reloc for the AVR that stores negated 8 bit value -(high 6 bit of 22 bit command address) into 8 bit immediate -value of SUBI insn. */ - BFD_RELOC_AVR_HH8_LDI_PM_NEG, - -/* This is a 32 bit reloc for the AVR that stores 23 bit value -into 22 bits. */ - BFD_RELOC_AVR_CALL, - -/* This is a 16 bit reloc for the AVR that stores all needed bits -for absolute addressing with ldi with overflow check to linktime */ - BFD_RELOC_AVR_LDI, - -/* This is a 6 bit reloc for the AVR that stores offset for ldd/std -instructions */ - BFD_RELOC_AVR_6, - -/* This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw -instructions */ - BFD_RELOC_AVR_6_ADIW, - -/* Direct 12 bit. */ - BFD_RELOC_390_12, - -/* 12 bit GOT offset. */ - BFD_RELOC_390_GOT12, - -/* 32 bit PC relative PLT address. */ - BFD_RELOC_390_PLT32, - -/* Copy symbol at runtime. */ - BFD_RELOC_390_COPY, - -/* Create GOT entry. */ - BFD_RELOC_390_GLOB_DAT, - -/* Create PLT entry. */ - BFD_RELOC_390_JMP_SLOT, - -/* Adjust by program base. */ - BFD_RELOC_390_RELATIVE, - -/* 32 bit PC relative offset to GOT. */ - BFD_RELOC_390_GOTPC, - -/* 16 bit GOT offset. */ - BFD_RELOC_390_GOT16, - -/* PC relative 16 bit shifted by 1. */ - BFD_RELOC_390_PC16DBL, - -/* 16 bit PC rel. PLT shifted by 1. */ - BFD_RELOC_390_PLT16DBL, - -/* PC relative 32 bit shifted by 1. */ - BFD_RELOC_390_PC32DBL, - -/* 32 bit PC rel. PLT shifted by 1. */ - BFD_RELOC_390_PLT32DBL, - -/* 32 bit PC rel. GOT shifted by 1. */ - BFD_RELOC_390_GOTPCDBL, - -/* 64 bit GOT offset. */ - BFD_RELOC_390_GOT64, - -/* 64 bit PC relative PLT address. */ - BFD_RELOC_390_PLT64, - -/* 32 bit rel. offset to GOT entry. */ - BFD_RELOC_390_GOTENT, - -/* 64 bit offset to GOT. */ - BFD_RELOC_390_GOTOFF64, - -/* 12-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_390_GOTPLT12, - -/* 16-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_390_GOTPLT16, - -/* 32-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_390_GOTPLT32, - -/* 64-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_390_GOTPLT64, - -/* 32-bit rel. offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_390_GOTPLTENT, - -/* 16-bit rel. offset from the GOT to a PLT entry. */ - BFD_RELOC_390_PLTOFF16, - -/* 32-bit rel. offset from the GOT to a PLT entry. */ - BFD_RELOC_390_PLTOFF32, - -/* 64-bit rel. offset from the GOT to a PLT entry. */ - BFD_RELOC_390_PLTOFF64, - -/* s390 tls relocations. */ - BFD_RELOC_390_TLS_LOAD, - BFD_RELOC_390_TLS_GDCALL, - BFD_RELOC_390_TLS_LDCALL, - BFD_RELOC_390_TLS_GD32, - BFD_RELOC_390_TLS_GD64, - BFD_RELOC_390_TLS_GOTIE12, - BFD_RELOC_390_TLS_GOTIE32, - BFD_RELOC_390_TLS_GOTIE64, - BFD_RELOC_390_TLS_LDM32, - BFD_RELOC_390_TLS_LDM64, - BFD_RELOC_390_TLS_IE32, - BFD_RELOC_390_TLS_IE64, - BFD_RELOC_390_TLS_IEENT, - BFD_RELOC_390_TLS_LE32, - BFD_RELOC_390_TLS_LE64, - BFD_RELOC_390_TLS_LDO32, - BFD_RELOC_390_TLS_LDO64, - BFD_RELOC_390_TLS_DTPMOD, - BFD_RELOC_390_TLS_DTPOFF, - BFD_RELOC_390_TLS_TPOFF, - -/* Long displacement extension. */ - BFD_RELOC_390_20, - BFD_RELOC_390_GOT20, - BFD_RELOC_390_GOTPLT20, - BFD_RELOC_390_TLS_GOTIE20, - -/* Score relocations */ - BFD_RELOC_SCORE_DUMMY1, - -/* Low 16 bit for load/store */ - BFD_RELOC_SCORE_GPREL15, - -/* This is a 24-bit reloc with the right 1 bit assumed to be 0 */ - BFD_RELOC_SCORE_DUMMY2, - BFD_RELOC_SCORE_JMP, - -/* This is a 19-bit reloc with the right 1 bit assumed to be 0 */ - BFD_RELOC_SCORE_BRANCH, - -/* This is a 11-bit reloc with the right 1 bit assumed to be 0 */ - BFD_RELOC_SCORE16_JMP, - -/* This is a 8-bit reloc with the right 1 bit assumed to be 0 */ - BFD_RELOC_SCORE16_BRANCH, - -/* Undocumented Score relocs */ - BFD_RELOC_SCORE_GOT15, - BFD_RELOC_SCORE_GOT_LO16, - BFD_RELOC_SCORE_CALL15, - BFD_RELOC_SCORE_DUMMY_HI16, - -/* Scenix IP2K - 9-bit register number / data address */ - BFD_RELOC_IP2K_FR9, - -/* Scenix IP2K - 4-bit register/data bank number */ - BFD_RELOC_IP2K_BANK, - -/* Scenix IP2K - low 13 bits of instruction word address */ - BFD_RELOC_IP2K_ADDR16CJP, - -/* Scenix IP2K - high 3 bits of instruction word address */ - BFD_RELOC_IP2K_PAGE3, - -/* Scenix IP2K - ext/low/high 8 bits of data address */ - BFD_RELOC_IP2K_LO8DATA, - BFD_RELOC_IP2K_HI8DATA, - BFD_RELOC_IP2K_EX8DATA, - -/* Scenix IP2K - low/high 8 bits of instruction word address */ - BFD_RELOC_IP2K_LO8INSN, - BFD_RELOC_IP2K_HI8INSN, - -/* Scenix IP2K - even/odd PC modifier to modify snb pcl.0 */ - BFD_RELOC_IP2K_PC_SKIP, - -/* Scenix IP2K - 16 bit word address in text section. */ - BFD_RELOC_IP2K_TEXT, - -/* Scenix IP2K - 7-bit sp or dp offset */ - BFD_RELOC_IP2K_FR_OFFSET, - -/* Scenix VPE4K coprocessor - data/insn-space addressing */ - BFD_RELOC_VPE4KMATH_DATA, - BFD_RELOC_VPE4KMATH_INSN, - -/* These two relocations are used by the linker to determine which of -the entries in a C++ virtual function table are actually used. When -the --gc-sections option is given, the linker will zero out the entries -that are not used, so that the code for those functions need not be -included in the output. - -VTABLE_INHERIT is a zero-space relocation used to describe to the -linker the inheritance tree of a C++ virtual function table. The -relocation's symbol should be the parent class' vtable, and the -relocation should be located at the child vtable. - -VTABLE_ENTRY is a zero-space relocation that describes the use of a -virtual function table entry. The reloc's symbol should refer to the -table of the class mentioned in the code. Off of that base, an offset -describes the entry that is being used. For Rela hosts, this offset -is stored in the reloc's addend. For Rel hosts, we are forced to put -this offset in the reloc's section offset. */ - BFD_RELOC_VTABLE_INHERIT, - BFD_RELOC_VTABLE_ENTRY, - -/* Intel IA64 Relocations. */ - BFD_RELOC_IA64_IMM14, - BFD_RELOC_IA64_IMM22, - BFD_RELOC_IA64_IMM64, - BFD_RELOC_IA64_DIR32MSB, - BFD_RELOC_IA64_DIR32LSB, - BFD_RELOC_IA64_DIR64MSB, - BFD_RELOC_IA64_DIR64LSB, - BFD_RELOC_IA64_GPREL22, - BFD_RELOC_IA64_GPREL64I, - BFD_RELOC_IA64_GPREL32MSB, - BFD_RELOC_IA64_GPREL32LSB, - BFD_RELOC_IA64_GPREL64MSB, - BFD_RELOC_IA64_GPREL64LSB, - BFD_RELOC_IA64_LTOFF22, - BFD_RELOC_IA64_LTOFF64I, - BFD_RELOC_IA64_PLTOFF22, - BFD_RELOC_IA64_PLTOFF64I, - BFD_RELOC_IA64_PLTOFF64MSB, - BFD_RELOC_IA64_PLTOFF64LSB, - BFD_RELOC_IA64_FPTR64I, - BFD_RELOC_IA64_FPTR32MSB, - BFD_RELOC_IA64_FPTR32LSB, - BFD_RELOC_IA64_FPTR64MSB, - BFD_RELOC_IA64_FPTR64LSB, - BFD_RELOC_IA64_PCREL21B, - BFD_RELOC_IA64_PCREL21BI, - BFD_RELOC_IA64_PCREL21M, - BFD_RELOC_IA64_PCREL21F, - BFD_RELOC_IA64_PCREL22, - BFD_RELOC_IA64_PCREL60B, - BFD_RELOC_IA64_PCREL64I, - BFD_RELOC_IA64_PCREL32MSB, - BFD_RELOC_IA64_PCREL32LSB, - BFD_RELOC_IA64_PCREL64MSB, - BFD_RELOC_IA64_PCREL64LSB, - BFD_RELOC_IA64_LTOFF_FPTR22, - BFD_RELOC_IA64_LTOFF_FPTR64I, - BFD_RELOC_IA64_LTOFF_FPTR32MSB, - BFD_RELOC_IA64_LTOFF_FPTR32LSB, - BFD_RELOC_IA64_LTOFF_FPTR64MSB, - BFD_RELOC_IA64_LTOFF_FPTR64LSB, - BFD_RELOC_IA64_SEGREL32MSB, - BFD_RELOC_IA64_SEGREL32LSB, - BFD_RELOC_IA64_SEGREL64MSB, - BFD_RELOC_IA64_SEGREL64LSB, - BFD_RELOC_IA64_SECREL32MSB, - BFD_RELOC_IA64_SECREL32LSB, - BFD_RELOC_IA64_SECREL64MSB, - BFD_RELOC_IA64_SECREL64LSB, - BFD_RELOC_IA64_REL32MSB, - BFD_RELOC_IA64_REL32LSB, - BFD_RELOC_IA64_REL64MSB, - BFD_RELOC_IA64_REL64LSB, - BFD_RELOC_IA64_LTV32MSB, - BFD_RELOC_IA64_LTV32LSB, - BFD_RELOC_IA64_LTV64MSB, - BFD_RELOC_IA64_LTV64LSB, - BFD_RELOC_IA64_IPLTMSB, - BFD_RELOC_IA64_IPLTLSB, - BFD_RELOC_IA64_COPY, - BFD_RELOC_IA64_LTOFF22X, - BFD_RELOC_IA64_LDXMOV, - BFD_RELOC_IA64_TPREL14, - BFD_RELOC_IA64_TPREL22, - BFD_RELOC_IA64_TPREL64I, - BFD_RELOC_IA64_TPREL64MSB, - BFD_RELOC_IA64_TPREL64LSB, - BFD_RELOC_IA64_LTOFF_TPREL22, - BFD_RELOC_IA64_DTPMOD64MSB, - BFD_RELOC_IA64_DTPMOD64LSB, - BFD_RELOC_IA64_LTOFF_DTPMOD22, - BFD_RELOC_IA64_DTPREL14, - BFD_RELOC_IA64_DTPREL22, - BFD_RELOC_IA64_DTPREL64I, - BFD_RELOC_IA64_DTPREL32MSB, - BFD_RELOC_IA64_DTPREL32LSB, - BFD_RELOC_IA64_DTPREL64MSB, - BFD_RELOC_IA64_DTPREL64LSB, - BFD_RELOC_IA64_LTOFF_DTPREL22, - -/* Motorola 68HC11 reloc. -This is the 8 bit high part of an absolute address. */ - BFD_RELOC_M68HC11_HI8, - -/* Motorola 68HC11 reloc. -This is the 8 bit low part of an absolute address. */ - BFD_RELOC_M68HC11_LO8, - -/* Motorola 68HC11 reloc. -This is the 3 bit of a value. */ - BFD_RELOC_M68HC11_3B, - -/* Motorola 68HC11 reloc. -This reloc marks the beginning of a jump/call instruction. -It is used for linker relaxation to correctly identify beginning -of instruction and change some branches to use PC-relative -addressing mode. */ - BFD_RELOC_M68HC11_RL_JUMP, - -/* Motorola 68HC11 reloc. -This reloc marks a group of several instructions that gcc generates -and for which the linker relaxation pass can modify and/or remove -some of them. */ - BFD_RELOC_M68HC11_RL_GROUP, - -/* Motorola 68HC11 reloc. -This is the 16-bit lower part of an address. It is used for 'call' -instruction to specify the symbol address without any special -transformation (due to memory bank window). */ - BFD_RELOC_M68HC11_LO16, - -/* Motorola 68HC11 reloc. -This is a 8-bit reloc that specifies the page number of an address. -It is used by 'call' instruction to specify the page number of -the symbol. */ - BFD_RELOC_M68HC11_PAGE, - -/* Motorola 68HC11 reloc. -This is a 24-bit reloc that represents the address with a 16-bit -value and a 8-bit page number. The symbol address is transformed -to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */ - BFD_RELOC_M68HC11_24, - -/* Motorola 68HC12 reloc. -This is the 5 bits of a value. */ - BFD_RELOC_M68HC12_5B, - -/* NS CR16C Relocations. */ - BFD_RELOC_16C_NUM08, - BFD_RELOC_16C_NUM08_C, - BFD_RELOC_16C_NUM16, - BFD_RELOC_16C_NUM16_C, - BFD_RELOC_16C_NUM32, - BFD_RELOC_16C_NUM32_C, - BFD_RELOC_16C_DISP04, - BFD_RELOC_16C_DISP04_C, - BFD_RELOC_16C_DISP08, - BFD_RELOC_16C_DISP08_C, - BFD_RELOC_16C_DISP16, - BFD_RELOC_16C_DISP16_C, - BFD_RELOC_16C_DISP24, - BFD_RELOC_16C_DISP24_C, - BFD_RELOC_16C_DISP24a, - BFD_RELOC_16C_DISP24a_C, - BFD_RELOC_16C_REG04, - BFD_RELOC_16C_REG04_C, - BFD_RELOC_16C_REG04a, - BFD_RELOC_16C_REG04a_C, - BFD_RELOC_16C_REG14, - BFD_RELOC_16C_REG14_C, - BFD_RELOC_16C_REG16, - BFD_RELOC_16C_REG16_C, - BFD_RELOC_16C_REG20, - BFD_RELOC_16C_REG20_C, - BFD_RELOC_16C_ABS20, - BFD_RELOC_16C_ABS20_C, - BFD_RELOC_16C_ABS24, - BFD_RELOC_16C_ABS24_C, - BFD_RELOC_16C_IMM04, - BFD_RELOC_16C_IMM04_C, - BFD_RELOC_16C_IMM16, - BFD_RELOC_16C_IMM16_C, - BFD_RELOC_16C_IMM20, - BFD_RELOC_16C_IMM20_C, - BFD_RELOC_16C_IMM24, - BFD_RELOC_16C_IMM24_C, - BFD_RELOC_16C_IMM32, - BFD_RELOC_16C_IMM32_C, - -/* NS CR16 Relocations. */ - BFD_RELOC_CR16_NUM8, - BFD_RELOC_CR16_NUM16, - BFD_RELOC_CR16_NUM32, - BFD_RELOC_CR16_NUM32a, - BFD_RELOC_CR16_REGREL0, - BFD_RELOC_CR16_REGREL4, - BFD_RELOC_CR16_REGREL4a, - BFD_RELOC_CR16_REGREL14, - BFD_RELOC_CR16_REGREL14a, - BFD_RELOC_CR16_REGREL16, - BFD_RELOC_CR16_REGREL20, - BFD_RELOC_CR16_REGREL20a, - BFD_RELOC_CR16_ABS20, - BFD_RELOC_CR16_ABS24, - BFD_RELOC_CR16_IMM4, - BFD_RELOC_CR16_IMM8, - BFD_RELOC_CR16_IMM16, - BFD_RELOC_CR16_IMM20, - BFD_RELOC_CR16_IMM24, - BFD_RELOC_CR16_IMM32, - BFD_RELOC_CR16_IMM32a, - BFD_RELOC_CR16_DISP4, - BFD_RELOC_CR16_DISP8, - BFD_RELOC_CR16_DISP16, - BFD_RELOC_CR16_DISP20, - BFD_RELOC_CR16_DISP24, - BFD_RELOC_CR16_DISP24a, - BFD_RELOC_CR16_SWITCH8, - BFD_RELOC_CR16_SWITCH16, - BFD_RELOC_CR16_SWITCH32, - -/* NS CRX Relocations. */ - BFD_RELOC_CRX_REL4, - BFD_RELOC_CRX_REL8, - BFD_RELOC_CRX_REL8_CMP, - BFD_RELOC_CRX_REL16, - BFD_RELOC_CRX_REL24, - BFD_RELOC_CRX_REL32, - BFD_RELOC_CRX_REGREL12, - BFD_RELOC_CRX_REGREL22, - BFD_RELOC_CRX_REGREL28, - BFD_RELOC_CRX_REGREL32, - BFD_RELOC_CRX_ABS16, - BFD_RELOC_CRX_ABS32, - BFD_RELOC_CRX_NUM8, - BFD_RELOC_CRX_NUM16, - BFD_RELOC_CRX_NUM32, - BFD_RELOC_CRX_IMM16, - BFD_RELOC_CRX_IMM32, - BFD_RELOC_CRX_SWITCH8, - BFD_RELOC_CRX_SWITCH16, - BFD_RELOC_CRX_SWITCH32, - -/* These relocs are only used within the CRIS assembler. They are not -(at present) written to any object files. */ - BFD_RELOC_CRIS_BDISP8, - BFD_RELOC_CRIS_UNSIGNED_5, - BFD_RELOC_CRIS_SIGNED_6, - BFD_RELOC_CRIS_UNSIGNED_6, - BFD_RELOC_CRIS_SIGNED_8, - BFD_RELOC_CRIS_UNSIGNED_8, - BFD_RELOC_CRIS_SIGNED_16, - BFD_RELOC_CRIS_UNSIGNED_16, - BFD_RELOC_CRIS_LAPCQ_OFFSET, - BFD_RELOC_CRIS_UNSIGNED_4, - -/* Relocs used in ELF shared libraries for CRIS. */ - BFD_RELOC_CRIS_COPY, - BFD_RELOC_CRIS_GLOB_DAT, - BFD_RELOC_CRIS_JUMP_SLOT, - BFD_RELOC_CRIS_RELATIVE, - -/* 32-bit offset to symbol-entry within GOT. */ - BFD_RELOC_CRIS_32_GOT, - -/* 16-bit offset to symbol-entry within GOT. */ - BFD_RELOC_CRIS_16_GOT, - -/* 32-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_CRIS_32_GOTPLT, - -/* 16-bit offset to symbol-entry within GOT, with PLT handling. */ - BFD_RELOC_CRIS_16_GOTPLT, - -/* 32-bit offset to symbol, relative to GOT. */ - BFD_RELOC_CRIS_32_GOTREL, - -/* 32-bit offset to symbol with PLT entry, relative to GOT. */ - BFD_RELOC_CRIS_32_PLT_GOTREL, - -/* 32-bit offset to symbol with PLT entry, relative to this relocation. */ - BFD_RELOC_CRIS_32_PLT_PCREL, - -/* Intel i860 Relocations. */ - BFD_RELOC_860_COPY, - BFD_RELOC_860_GLOB_DAT, - BFD_RELOC_860_JUMP_SLOT, - BFD_RELOC_860_RELATIVE, - BFD_RELOC_860_PC26, - BFD_RELOC_860_PLT26, - BFD_RELOC_860_PC16, - BFD_RELOC_860_LOW0, - BFD_RELOC_860_SPLIT0, - BFD_RELOC_860_LOW1, - BFD_RELOC_860_SPLIT1, - BFD_RELOC_860_LOW2, - BFD_RELOC_860_SPLIT2, - BFD_RELOC_860_LOW3, - BFD_RELOC_860_LOGOT0, - BFD_RELOC_860_SPGOT0, - BFD_RELOC_860_LOGOT1, - BFD_RELOC_860_SPGOT1, - BFD_RELOC_860_LOGOTOFF0, - BFD_RELOC_860_SPGOTOFF0, - BFD_RELOC_860_LOGOTOFF1, - BFD_RELOC_860_SPGOTOFF1, - BFD_RELOC_860_LOGOTOFF2, - BFD_RELOC_860_LOGOTOFF3, - BFD_RELOC_860_LOPC, - BFD_RELOC_860_HIGHADJ, - BFD_RELOC_860_HAGOT, - BFD_RELOC_860_HAGOTOFF, - BFD_RELOC_860_HAPC, - BFD_RELOC_860_HIGH, - BFD_RELOC_860_HIGOT, - BFD_RELOC_860_HIGOTOFF, - -/* OpenRISC Relocations. */ - BFD_RELOC_OPENRISC_ABS_26, - BFD_RELOC_OPENRISC_REL_26, - -/* H8 elf Relocations. */ - BFD_RELOC_H8_DIR16A8, - BFD_RELOC_H8_DIR16R8, - BFD_RELOC_H8_DIR24A8, - BFD_RELOC_H8_DIR24R8, - BFD_RELOC_H8_DIR32A16, - -/* Sony Xstormy16 Relocations. */ - BFD_RELOC_XSTORMY16_REL_12, - BFD_RELOC_XSTORMY16_12, - BFD_RELOC_XSTORMY16_24, - BFD_RELOC_XSTORMY16_FPTR16, - -/* Self-describing complex relocations. */ - BFD_RELOC_RELC, - - -/* Infineon Relocations. */ - BFD_RELOC_XC16X_PAG, - BFD_RELOC_XC16X_POF, - BFD_RELOC_XC16X_SEG, - BFD_RELOC_XC16X_SOF, - -/* Relocations used by VAX ELF. */ - BFD_RELOC_VAX_GLOB_DAT, - BFD_RELOC_VAX_JMP_SLOT, - BFD_RELOC_VAX_RELATIVE, - -/* Morpho MT - 16 bit immediate relocation. */ - BFD_RELOC_MT_PC16, - -/* Morpho MT - Hi 16 bits of an address. */ - BFD_RELOC_MT_HI16, - -/* Morpho MT - Low 16 bits of an address. */ - BFD_RELOC_MT_LO16, - -/* Morpho MT - Used to tell the linker which vtable entries are used. */ - BFD_RELOC_MT_GNU_VTINHERIT, - -/* Morpho MT - Used to tell the linker which vtable entries are used. */ - BFD_RELOC_MT_GNU_VTENTRY, - -/* Morpho MT - 8 bit immediate relocation. */ - BFD_RELOC_MT_PCINSN8, - -/* msp430 specific relocation codes */ - BFD_RELOC_MSP430_10_PCREL, - BFD_RELOC_MSP430_16_PCREL, - BFD_RELOC_MSP430_16, - BFD_RELOC_MSP430_16_PCREL_BYTE, - BFD_RELOC_MSP430_16_BYTE, - BFD_RELOC_MSP430_2X_PCREL, - BFD_RELOC_MSP430_RL_PCREL, - -/* IQ2000 Relocations. */ - BFD_RELOC_IQ2000_OFFSET_16, - BFD_RELOC_IQ2000_OFFSET_21, - BFD_RELOC_IQ2000_UHI16, - -/* Special Xtensa relocation used only by PLT entries in ELF shared -objects to indicate that the runtime linker should set the value -to one of its own internal functions or data structures. */ - BFD_RELOC_XTENSA_RTLD, - -/* Xtensa relocations for ELF shared objects. */ - BFD_RELOC_XTENSA_GLOB_DAT, - BFD_RELOC_XTENSA_JMP_SLOT, - BFD_RELOC_XTENSA_RELATIVE, - -/* Xtensa relocation used in ELF object files for symbols that may require -PLT entries. Otherwise, this is just a generic 32-bit relocation. */ - BFD_RELOC_XTENSA_PLT, - -/* Xtensa relocations to mark the difference of two local symbols. -These are only needed to support linker relaxation and can be ignored -when not relaxing. The field is set to the value of the difference -assuming no relaxation. The relocation encodes the position of the -first symbol so the linker can determine whether to adjust the field -value. */ - BFD_RELOC_XTENSA_DIFF8, - BFD_RELOC_XTENSA_DIFF16, - BFD_RELOC_XTENSA_DIFF32, - -/* Generic Xtensa relocations for instruction operands. Only the slot -number is encoded in the relocation. The relocation applies to the -last PC-relative immediate operand, or if there are no PC-relative -immediates, to the last immediate operand. */ - BFD_RELOC_XTENSA_SLOT0_OP, - BFD_RELOC_XTENSA_SLOT1_OP, - BFD_RELOC_XTENSA_SLOT2_OP, - BFD_RELOC_XTENSA_SLOT3_OP, - BFD_RELOC_XTENSA_SLOT4_OP, - BFD_RELOC_XTENSA_SLOT5_OP, - BFD_RELOC_XTENSA_SLOT6_OP, - BFD_RELOC_XTENSA_SLOT7_OP, - BFD_RELOC_XTENSA_SLOT8_OP, - BFD_RELOC_XTENSA_SLOT9_OP, - BFD_RELOC_XTENSA_SLOT10_OP, - BFD_RELOC_XTENSA_SLOT11_OP, - BFD_RELOC_XTENSA_SLOT12_OP, - BFD_RELOC_XTENSA_SLOT13_OP, - BFD_RELOC_XTENSA_SLOT14_OP, - -/* Alternate Xtensa relocations. Only the slot is encoded in the -relocation. The meaning of these relocations is opcode-specific. */ - BFD_RELOC_XTENSA_SLOT0_ALT, - BFD_RELOC_XTENSA_SLOT1_ALT, - BFD_RELOC_XTENSA_SLOT2_ALT, - BFD_RELOC_XTENSA_SLOT3_ALT, - BFD_RELOC_XTENSA_SLOT4_ALT, - BFD_RELOC_XTENSA_SLOT5_ALT, - BFD_RELOC_XTENSA_SLOT6_ALT, - BFD_RELOC_XTENSA_SLOT7_ALT, - BFD_RELOC_XTENSA_SLOT8_ALT, - BFD_RELOC_XTENSA_SLOT9_ALT, - BFD_RELOC_XTENSA_SLOT10_ALT, - BFD_RELOC_XTENSA_SLOT11_ALT, - BFD_RELOC_XTENSA_SLOT12_ALT, - BFD_RELOC_XTENSA_SLOT13_ALT, - BFD_RELOC_XTENSA_SLOT14_ALT, - -/* Xtensa relocations for backward compatibility. These have all been -replaced by BFD_RELOC_XTENSA_SLOT0_OP. */ - BFD_RELOC_XTENSA_OP0, - BFD_RELOC_XTENSA_OP1, - BFD_RELOC_XTENSA_OP2, - -/* Xtensa relocation to mark that the assembler expanded the -instructions from an original target. The expansion size is -encoded in the reloc size. */ - BFD_RELOC_XTENSA_ASM_EXPAND, - -/* Xtensa relocation to mark that the linker should simplify -assembler-expanded instructions. This is commonly used -internally by the linker after analysis of a -BFD_RELOC_XTENSA_ASM_EXPAND. */ - BFD_RELOC_XTENSA_ASM_SIMPLIFY, - -/* 8 bit signed offset in (ix+d) or (iy+d). */ - BFD_RELOC_Z80_DISP8, - -/* DJNZ offset. */ - BFD_RELOC_Z8K_DISP7, - -/* CALR offset. */ - BFD_RELOC_Z8K_CALLR, - -/* 4 bit value. */ - BFD_RELOC_Z8K_IMM4L, - BFD_RELOC_UNUSED }; -typedef enum bfd_reloc_code_real bfd_reloc_code_real_type; -reloc_howto_type *bfd_reloc_type_lookup - (bfd *abfd, bfd_reloc_code_real_type code); -reloc_howto_type *bfd_reloc_name_lookup - (bfd *abfd, const char *reloc_name); - -const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code); - -/* Extracted from syms.c. */ - -typedef struct bfd_symbol -{ - /* A pointer to the BFD which owns the symbol. This information - is necessary so that a back end can work out what additional - information (invisible to the application writer) is carried - with the symbol. - - This field is *almost* redundant, since you can use section->owner - instead, except that some symbols point to the global sections - bfd_{abs,com,und}_section. This could be fixed by making - these globals be per-bfd (or per-target-flavor). FIXME. */ - struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */ - - /* The text of the symbol. The name is left alone, and not copied; the - application may not alter it. */ - const char *name; - - /* The value of the symbol. This really should be a union of a - numeric value with a pointer, since some flags indicate that - a pointer to another symbol is stored here. */ - symvalue value; - - /* Attributes of a symbol. */ -#define BSF_NO_FLAGS 0x00 - - /* The symbol has local scope; <> in <>. The value - is the offset into the section of the data. */ -#define BSF_LOCAL 0x01 - - /* The symbol has global scope; initialized data in <>. The - value is the offset into the section of the data. */ -#define BSF_GLOBAL 0x02 - - /* The symbol has global scope and is exported. The value is - the offset into the section of the data. */ -#define BSF_EXPORT BSF_GLOBAL /* No real difference. */ - - /* A normal C symbol would be one of: - <>, <>, <> or - <>. */ - - /* The symbol is a debugging record. The value has an arbitrary - meaning, unless BSF_DEBUGGING_RELOC is also set. */ -#define BSF_DEBUGGING 0x08 - - /* The symbol denotes a function entry point. Used in ELF, - perhaps others someday. */ -#define BSF_FUNCTION 0x10 - - /* Used by the linker. */ -#define BSF_KEEP 0x20 -#define BSF_KEEP_G 0x40 - - /* A weak global symbol, overridable without warnings by - a regular global symbol of the same name. */ -#define BSF_WEAK 0x80 - - /* This symbol was created to point to a section, e.g. ELF's - STT_SECTION symbols. */ -#define BSF_SECTION_SYM 0x100 - - /* The symbol used to be a common symbol, but now it is - allocated. */ -#define BSF_OLD_COMMON 0x200 - - /* The default value for common data. */ -#define BFD_FORT_COMM_DEFAULT_VALUE 0 - - /* In some files the type of a symbol sometimes alters its - location in an output file - ie in coff a <> symbol - which is also <> symbol appears where it was - declared and not at the end of a section. This bit is set - by the target BFD part to convey this information. */ -#define BSF_NOT_AT_END 0x400 - - /* Signal that the symbol is the label of constructor section. */ -#define BSF_CONSTRUCTOR 0x800 - - /* Signal that the symbol is a warning symbol. The name is a - warning. The name of the next symbol is the one to warn about; - if a reference is made to a symbol with the same name as the next - symbol, a warning is issued by the linker. */ -#define BSF_WARNING 0x1000 - - /* Signal that the symbol is indirect. This symbol is an indirect - pointer to the symbol with the same name as the next symbol. */ -#define BSF_INDIRECT 0x2000 - - /* BSF_FILE marks symbols that contain a file name. This is used - for ELF STT_FILE symbols. */ -#define BSF_FILE 0x4000 - - /* Symbol is from dynamic linking information. */ -#define BSF_DYNAMIC 0x8000 - - /* The symbol denotes a data object. Used in ELF, and perhaps - others someday. */ -#define BSF_OBJECT 0x10000 - - /* This symbol is a debugging symbol. The value is the offset - into the section of the data. BSF_DEBUGGING should be set - as well. */ -#define BSF_DEBUGGING_RELOC 0x20000 - - /* This symbol is thread local. Used in ELF. */ -#define BSF_THREAD_LOCAL 0x40000 - - /* This symbol represents a complex relocation expression, - with the expression tree serialized in the symbol name. */ -#define BSF_RELC 0x80000 - - /* This symbol represents a signed complex relocation expression, - with the expression tree serialized in the symbol name. */ -#define BSF_SRELC 0x100000 - - flagword flags; - - /* A pointer to the section to which this symbol is - relative. This will always be non NULL, there are special - sections for undefined and absolute symbols. */ - struct bfd_section *section; - - /* Back end special data. */ - union - { - void *p; - bfd_vma i; - } - udata; -} -asymbol; - -#define bfd_get_symtab_upper_bound(abfd) \ - BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd)) - -bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym); - -bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name); - -#define bfd_is_local_label_name(abfd, name) \ - BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name)) - -bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym); - -#define bfd_is_target_special_symbol(abfd, sym) \ - BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym)) - -#define bfd_canonicalize_symtab(abfd, location) \ - BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location)) - -bfd_boolean bfd_set_symtab - (bfd *abfd, asymbol **location, unsigned int count); - -void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol); - -#define bfd_make_empty_symbol(abfd) \ - BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd)) - -asymbol *_bfd_generic_make_empty_symbol (bfd *); - -#define bfd_make_debug_symbol(abfd,ptr,size) \ - BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size)) - -int bfd_decode_symclass (asymbol *symbol); - -bfd_boolean bfd_is_undefined_symclass (int symclass); - -void bfd_symbol_info (asymbol *symbol, symbol_info *ret); - -bfd_boolean bfd_copy_private_symbol_data - (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym); - -#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \ - BFD_SEND (obfd, _bfd_copy_private_symbol_data, \ - (ibfd, isymbol, obfd, osymbol)) - -/* Extracted from bfd.c. */ -struct bfd -{ - /* A unique identifier of the BFD */ - unsigned int id; - - /* The filename the application opened the BFD with. */ - const char *filename; - - /* A pointer to the target jump table. */ - const struct bfd_target *xvec; - - /* The IOSTREAM, and corresponding IO vector that provide access - to the file backing the BFD. */ - void *iostream; - const struct bfd_iovec *iovec; - - /* The caching routines use these to maintain a - least-recently-used list of BFDs. */ - struct bfd *lru_prev, *lru_next; - - /* When a file is closed by the caching routines, BFD retains - state information on the file here... */ - ufile_ptr where; - - /* File modified time, if mtime_set is TRUE. */ - long mtime; - - /* Reserved for an unimplemented file locking extension. */ - int ifd; - - /* The format which belongs to the BFD. (object, core, etc.) */ - bfd_format format; - - /* The direction with which the BFD was opened. */ - enum bfd_direction - { - no_direction = 0, - read_direction = 1, - write_direction = 2, - both_direction = 3 - } - direction; - - /* Format_specific flags. */ - flagword flags; - - /* Values that may appear in the flags field of a BFD. These also - appear in the object_flags field of the bfd_target structure, where - they indicate the set of flags used by that backend (not all flags - are meaningful for all object file formats) (FIXME: at the moment, - the object_flags values have mostly just been copied from backend - to another, and are not necessarily correct). */ - -#define BFD_NO_FLAGS 0x00 - - /* BFD contains relocation entries. */ -#define HAS_RELOC 0x01 - - /* BFD is directly executable. */ -#define EXEC_P 0x02 - - /* BFD has line number information (basically used for F_LNNO in a - COFF header). */ -#define HAS_LINENO 0x04 - - /* BFD has debugging information. */ -#define HAS_DEBUG 0x08 - - /* BFD has symbols. */ -#define HAS_SYMS 0x10 - - /* BFD has local symbols (basically used for F_LSYMS in a COFF - header). */ -#define HAS_LOCALS 0x20 - - /* BFD is a dynamic object. */ -#define DYNAMIC 0x40 - - /* Text section is write protected (if D_PAGED is not set, this is - like an a.out NMAGIC file) (the linker sets this by default, but - clears it for -r or -N). */ -#define WP_TEXT 0x80 - - /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the - linker sets this by default, but clears it for -r or -n or -N). */ -#define D_PAGED 0x100 - - /* BFD is relaxable (this means that bfd_relax_section may be able to - do something) (sometimes bfd_relax_section can do something even if - this is not set). */ -#define BFD_IS_RELAXABLE 0x200 - - /* This may be set before writing out a BFD to request using a - traditional format. For example, this is used to request that when - writing out an a.out object the symbols not be hashed to eliminate - duplicates. */ -#define BFD_TRADITIONAL_FORMAT 0x400 - - /* This flag indicates that the BFD contents are actually cached - in memory. If this is set, iostream points to a bfd_in_memory - struct. */ -#define BFD_IN_MEMORY 0x800 - - /* The sections in this BFD specify a memory page. */ -#define HAS_LOAD_PAGE 0x1000 - - /* This BFD has been created by the linker and doesn't correspond - to any input file. */ -#define BFD_LINKER_CREATED 0x2000 - - /* Currently my_archive is tested before adding origin to - anything. I believe that this can become always an add of - origin, with origin set to 0 for non archive files. */ - ufile_ptr origin; - - /* The origin in the archive of the proxy entry. This will - normally be the same as origin, except for thin archives, - when it will contain the current offset of the proxy in the - thin archive rather than the offset of the bfd in its actual - container. */ - ufile_ptr proxy_origin; - - /* A hash table for section names. */ - struct bfd_hash_table section_htab; - - /* Pointer to linked list of sections. */ - struct bfd_section *sections; - - /* The last section on the section list. */ - struct bfd_section *section_last; - - /* The number of sections. */ - unsigned int section_count; - - /* Stuff only useful for object files: - The start address. */ - bfd_vma start_address; - - /* Used for input and output. */ - unsigned int symcount; - - /* Symbol table for output BFD (with symcount entries). */ - struct bfd_symbol **outsymbols; - - /* Used for slurped dynamic symbol tables. */ - unsigned int dynsymcount; - - /* Pointer to structure which contains architecture information. */ - const struct bfd_arch_info *arch_info; - - /* Stuff only useful for archives. */ - void *arelt_data; - struct bfd *my_archive; /* The containing archive BFD. */ - struct bfd *archive_next; /* The next BFD in the archive. */ - struct bfd *archive_head; /* The first BFD in the archive. */ - struct bfd *nested_archives; /* List of nested archive in a flattened - thin archive. */ - - /* A chain of BFD structures involved in a link. */ - struct bfd *link_next; - - /* A field used by _bfd_generic_link_add_archive_symbols. This will - be used only for archive elements. */ - int archive_pass; - - /* Used by the back end to hold private data. */ - union - { - struct aout_data_struct *aout_data; - struct artdata *aout_ar_data; - struct _oasys_data *oasys_obj_data; - struct _oasys_ar_data *oasys_ar_data; - struct coff_tdata *coff_obj_data; - struct pe_tdata *pe_obj_data; - struct xcoff_tdata *xcoff_obj_data; - struct ecoff_tdata *ecoff_obj_data; - struct ieee_data_struct *ieee_data; - struct ieee_ar_data_struct *ieee_ar_data; - struct srec_data_struct *srec_data; - struct ihex_data_struct *ihex_data; - struct tekhex_data_struct *tekhex_data; - struct elf_obj_tdata *elf_obj_data; - struct nlm_obj_tdata *nlm_obj_data; - struct bout_data_struct *bout_data; - struct mmo_data_struct *mmo_data; - struct sun_core_struct *sun_core_data; - struct sco5_core_struct *sco5_core_data; - struct trad_core_struct *trad_core_data; - struct som_data_struct *som_data; - struct hpux_core_struct *hpux_core_data; - struct hppabsd_core_struct *hppabsd_core_data; - struct sgi_core_struct *sgi_core_data; - struct lynx_core_struct *lynx_core_data; - struct osf_core_struct *osf_core_data; - struct cisco_core_struct *cisco_core_data; - struct versados_data_struct *versados_data; - struct netbsd_core_struct *netbsd_core_data; - struct mach_o_data_struct *mach_o_data; - struct mach_o_fat_data_struct *mach_o_fat_data; - struct bfd_pef_data_struct *pef_data; - struct bfd_pef_xlib_data_struct *pef_xlib_data; - struct bfd_sym_data_struct *sym_data; - void *any; - } - tdata; - - /* Used by the application to hold private data. */ - void *usrdata; - - /* Where all the allocated stuff under this BFD goes. This is a - struct objalloc *, but we use void * to avoid requiring the inclusion - of objalloc.h. */ - void *memory; - - /* Is the file descriptor being cached? That is, can it be closed as - needed, and re-opened when accessed later? */ - unsigned int cacheable : 1; - - /* Marks whether there was a default target specified when the - BFD was opened. This is used to select which matching algorithm - to use to choose the back end. */ - unsigned int target_defaulted : 1; - - /* ... and here: (``once'' means at least once). */ - unsigned int opened_once : 1; - - /* Set if we have a locally maintained mtime value, rather than - getting it from the file each time. */ - unsigned int mtime_set : 1; - - /* Flag set if symbols from this BFD should not be exported. */ - unsigned int no_export : 1; - - /* Remember when output has begun, to stop strange things - from happening. */ - unsigned int output_has_begun : 1; - - /* Have archive map. */ - unsigned int has_armap : 1; - - /* Set if this is a thin archive. */ - unsigned int is_thin_archive : 1; -}; - -typedef enum bfd_error -{ - bfd_error_no_error = 0, - bfd_error_system_call, - bfd_error_invalid_target, - bfd_error_wrong_format, - bfd_error_wrong_object_format, - bfd_error_invalid_operation, - bfd_error_no_memory, - bfd_error_no_symbols, - bfd_error_no_armap, - bfd_error_no_more_archived_files, - bfd_error_malformed_archive, - bfd_error_file_not_recognized, - bfd_error_file_ambiguously_recognized, - bfd_error_no_contents, - bfd_error_nonrepresentable_section, - bfd_error_no_debug_section, - bfd_error_bad_value, - bfd_error_file_truncated, - bfd_error_file_too_big, - bfd_error_on_input, - bfd_error_invalid_error_code -} -bfd_error_type; - -bfd_error_type bfd_get_error (void); - -void bfd_set_error (bfd_error_type error_tag, ...); - -const char *bfd_errmsg (bfd_error_type error_tag); - -void bfd_perror (const char *message); - -typedef void (*bfd_error_handler_type) (const char *, ...); - -bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type); - -void bfd_set_error_program_name (const char *); - -bfd_error_handler_type bfd_get_error_handler (void); - -long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect); - -long bfd_canonicalize_reloc - (bfd *abfd, asection *sec, arelent **loc, asymbol **syms); - -void bfd_set_reloc - (bfd *abfd, asection *sec, arelent **rel, unsigned int count); - -bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags); - -int bfd_get_arch_size (bfd *abfd); - -int bfd_get_sign_extend_vma (bfd *abfd); - -bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma); - -unsigned int bfd_get_gp_size (bfd *abfd); - -void bfd_set_gp_size (bfd *abfd, unsigned int i); - -bfd_vma bfd_scan_vma (const char *string, const char **end, int base); - -bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd); - -#define bfd_copy_private_header_data(ibfd, obfd) \ - BFD_SEND (obfd, _bfd_copy_private_header_data, \ - (ibfd, obfd)) -bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd); - -#define bfd_copy_private_bfd_data(ibfd, obfd) \ - BFD_SEND (obfd, _bfd_copy_private_bfd_data, \ - (ibfd, obfd)) -bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd); - -#define bfd_merge_private_bfd_data(ibfd, obfd) \ - BFD_SEND (obfd, _bfd_merge_private_bfd_data, \ - (ibfd, obfd)) -bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags); - -#define bfd_set_private_flags(abfd, flags) \ - BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags)) -#define bfd_sizeof_headers(abfd, info) \ - BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info)) - -#define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \ - BFD_SEND (abfd, _bfd_find_nearest_line, \ - (abfd, sec, syms, off, file, func, line)) - -#define bfd_find_line(abfd, syms, sym, file, line) \ - BFD_SEND (abfd, _bfd_find_line, \ - (abfd, syms, sym, file, line)) - -#define bfd_find_inliner_info(abfd, file, func, line) \ - BFD_SEND (abfd, _bfd_find_inliner_info, \ - (abfd, file, func, line)) - -#define bfd_debug_info_start(abfd) \ - BFD_SEND (abfd, _bfd_debug_info_start, (abfd)) - -#define bfd_debug_info_end(abfd) \ - BFD_SEND (abfd, _bfd_debug_info_end, (abfd)) - -#define bfd_debug_info_accumulate(abfd, section) \ - BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section)) - -#define bfd_stat_arch_elt(abfd, stat) \ - BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat)) - -#define bfd_update_armap_timestamp(abfd) \ - BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd)) - -#define bfd_set_arch_mach(abfd, arch, mach)\ - BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach)) - -#define bfd_relax_section(abfd, section, link_info, again) \ - BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again)) - -#define bfd_gc_sections(abfd, link_info) \ - BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info)) - -#define bfd_merge_sections(abfd, link_info) \ - BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info)) - -#define bfd_is_group_section(abfd, sec) \ - BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec)) - -#define bfd_discard_group(abfd, sec) \ - BFD_SEND (abfd, _bfd_discard_group, (abfd, sec)) - -#define bfd_link_hash_table_create(abfd) \ - BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd)) - -#define bfd_link_hash_table_free(abfd, hash) \ - BFD_SEND (abfd, _bfd_link_hash_table_free, (hash)) - -#define bfd_link_add_symbols(abfd, info) \ - BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info)) - -#define bfd_link_just_syms(abfd, sec, info) \ - BFD_SEND (abfd, _bfd_link_just_syms, (sec, info)) - -#define bfd_final_link(abfd, info) \ - BFD_SEND (abfd, _bfd_final_link, (abfd, info)) - -#define bfd_free_cached_info(abfd) \ - BFD_SEND (abfd, _bfd_free_cached_info, (abfd)) - -#define bfd_get_dynamic_symtab_upper_bound(abfd) \ - BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd)) - -#define bfd_print_private_bfd_data(abfd, file)\ - BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file)) - -#define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \ - BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols)) - -#define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \ - BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \ - dyncount, dynsyms, ret)) - -#define bfd_get_dynamic_reloc_upper_bound(abfd) \ - BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd)) - -#define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \ - BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms)) - -extern bfd_byte *bfd_get_relocated_section_contents - (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *, - bfd_boolean, asymbol **); - -bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative); - -struct bfd_preserve -{ - void *marker; - void *tdata; - flagword flags; - const struct bfd_arch_info *arch_info; - struct bfd_section *sections; - struct bfd_section *section_last; - unsigned int section_count; - struct bfd_hash_table section_htab; -}; - -bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *); - -void bfd_preserve_restore (bfd *, struct bfd_preserve *); - -void bfd_preserve_finish (bfd *, struct bfd_preserve *); - -bfd_vma bfd_emul_get_maxpagesize (const char *); - -void bfd_emul_set_maxpagesize (const char *, bfd_vma); - -bfd_vma bfd_emul_get_commonpagesize (const char *); - -void bfd_emul_set_commonpagesize (const char *, bfd_vma); - -char *bfd_demangle (bfd *, const char *, int); - -/* Extracted from archive.c. */ -symindex bfd_get_next_mapent - (bfd *abfd, symindex previous, carsym **sym); - -bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head); - -bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous); - -/* Extracted from corefile.c. */ -const char *bfd_core_file_failing_command (bfd *abfd); - -int bfd_core_file_failing_signal (bfd *abfd); - -bfd_boolean core_file_matches_executable_p - (bfd *core_bfd, bfd *exec_bfd); - -bfd_boolean generic_core_file_matches_executable_p - (bfd *core_bfd, bfd *exec_bfd); - -/* Extracted from targets.c. */ -#define BFD_SEND(bfd, message, arglist) \ - ((*((bfd)->xvec->message)) arglist) - -#ifdef DEBUG_BFD_SEND -#undef BFD_SEND -#define BFD_SEND(bfd, message, arglist) \ - (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ - ((*((bfd)->xvec->message)) arglist) : \ - (bfd_assert (__FILE__,__LINE__), NULL)) -#endif -#define BFD_SEND_FMT(bfd, message, arglist) \ - (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) - -#ifdef DEBUG_BFD_SEND -#undef BFD_SEND_FMT -#define BFD_SEND_FMT(bfd, message, arglist) \ - (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \ - (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \ - (bfd_assert (__FILE__,__LINE__), NULL)) -#endif - -enum bfd_flavour -{ - bfd_target_unknown_flavour, - bfd_target_aout_flavour, - bfd_target_coff_flavour, - bfd_target_ecoff_flavour, - bfd_target_xcoff_flavour, - bfd_target_elf_flavour, - bfd_target_ieee_flavour, - bfd_target_nlm_flavour, - bfd_target_oasys_flavour, - bfd_target_tekhex_flavour, - bfd_target_srec_flavour, - bfd_target_ihex_flavour, - bfd_target_som_flavour, - bfd_target_os9k_flavour, - bfd_target_versados_flavour, - bfd_target_msdos_flavour, - bfd_target_ovax_flavour, - bfd_target_evax_flavour, - bfd_target_mmo_flavour, - bfd_target_mach_o_flavour, - bfd_target_pef_flavour, - bfd_target_pef_xlib_flavour, - bfd_target_sym_flavour -}; - -enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN }; - -/* Forward declaration. */ -typedef struct bfd_link_info _bfd_link_info; - -typedef struct bfd_target -{ - /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc. */ - char *name; - - /* The "flavour" of a back end is a general indication about - the contents of a file. */ - enum bfd_flavour flavour; - - /* The order of bytes within the data area of a file. */ - enum bfd_endian byteorder; - - /* The order of bytes within the header parts of a file. */ - enum bfd_endian header_byteorder; - - /* A mask of all the flags which an executable may have set - - from the set <>, <>, ...<>. */ - flagword object_flags; - - /* A mask of all the flags which a section may have set - from - the set <>, <>, ...<>. */ - flagword section_flags; - - /* The character normally found at the front of a symbol. - (if any), perhaps `_'. */ - char symbol_leading_char; - - /* The pad character for file names within an archive header. */ - char ar_pad_char; - - /* The maximum number of characters in an archive header. */ - unsigned short ar_max_namelen; - - /* Entries for byte swapping for data. These are different from the - other entry points, since they don't take a BFD as the first argument. - Certain other handlers could do the same. */ - bfd_uint64_t (*bfd_getx64) (const void *); - bfd_int64_t (*bfd_getx_signed_64) (const void *); - void (*bfd_putx64) (bfd_uint64_t, void *); - bfd_vma (*bfd_getx32) (const void *); - bfd_signed_vma (*bfd_getx_signed_32) (const void *); - void (*bfd_putx32) (bfd_vma, void *); - bfd_vma (*bfd_getx16) (const void *); - bfd_signed_vma (*bfd_getx_signed_16) (const void *); - void (*bfd_putx16) (bfd_vma, void *); - - /* Byte swapping for the headers. */ - bfd_uint64_t (*bfd_h_getx64) (const void *); - bfd_int64_t (*bfd_h_getx_signed_64) (const void *); - void (*bfd_h_putx64) (bfd_uint64_t, void *); - bfd_vma (*bfd_h_getx32) (const void *); - bfd_signed_vma (*bfd_h_getx_signed_32) (const void *); - void (*bfd_h_putx32) (bfd_vma, void *); - bfd_vma (*bfd_h_getx16) (const void *); - bfd_signed_vma (*bfd_h_getx_signed_16) (const void *); - void (*bfd_h_putx16) (bfd_vma, void *); - - /* Format dependent routines: these are vectors of entry points - within the target vector structure, one for each format to check. */ - - /* Check the format of a file being read. Return a <> or zero. */ - const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *); - - /* Set the format of a file being written. */ - bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *); - - /* Write cached information into a file being written, at <>. */ - bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *); - - - /* Generic entry points. */ -#define BFD_JUMP_TABLE_GENERIC(NAME) \ - NAME##_close_and_cleanup, \ - NAME##_bfd_free_cached_info, \ - NAME##_new_section_hook, \ - NAME##_get_section_contents, \ - NAME##_get_section_contents_in_window - - /* Called when the BFD is being closed to do any necessary cleanup. */ - bfd_boolean (*_close_and_cleanup) (bfd *); - /* Ask the BFD to free all cached information. */ - bfd_boolean (*_bfd_free_cached_info) (bfd *); - /* Called when a new section is created. */ - bfd_boolean (*_new_section_hook) (bfd *, sec_ptr); - /* Read the contents of a section. */ - bfd_boolean (*_bfd_get_section_contents) - (bfd *, sec_ptr, void *, file_ptr, bfd_size_type); - bfd_boolean (*_bfd_get_section_contents_in_window) - (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type); - - /* Entry points to copy private data. */ -#define BFD_JUMP_TABLE_COPY(NAME) \ - NAME##_bfd_copy_private_bfd_data, \ - NAME##_bfd_merge_private_bfd_data, \ - _bfd_generic_init_private_section_data, \ - NAME##_bfd_copy_private_section_data, \ - NAME##_bfd_copy_private_symbol_data, \ - NAME##_bfd_copy_private_header_data, \ - NAME##_bfd_set_private_flags, \ - NAME##_bfd_print_private_bfd_data - - /* Called to copy BFD general private data from one object file - to another. */ - bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *); - /* Called to merge BFD general private data from one object file - to a common output file when linking. */ - bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *); - /* Called to initialize BFD private section data from one object file - to another. */ -#define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \ - BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info)) - bfd_boolean (*_bfd_init_private_section_data) - (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *); - /* Called to copy BFD private section data from one object file - to another. */ - bfd_boolean (*_bfd_copy_private_section_data) - (bfd *, sec_ptr, bfd *, sec_ptr); - /* Called to copy BFD private symbol data from one symbol - to another. */ - bfd_boolean (*_bfd_copy_private_symbol_data) - (bfd *, asymbol *, bfd *, asymbol *); - /* Called to copy BFD private header data from one object file - to another. */ - bfd_boolean (*_bfd_copy_private_header_data) - (bfd *, bfd *); - /* Called to set private backend flags. */ - bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword); - - /* Called to print private BFD data. */ - bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *); - - /* Core file entry points. */ -#define BFD_JUMP_TABLE_CORE(NAME) \ - NAME##_core_file_failing_command, \ - NAME##_core_file_failing_signal, \ - NAME##_core_file_matches_executable_p - - char * (*_core_file_failing_command) (bfd *); - int (*_core_file_failing_signal) (bfd *); - bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *); - - /* Archive entry points. */ -#define BFD_JUMP_TABLE_ARCHIVE(NAME) \ - NAME##_slurp_armap, \ - NAME##_slurp_extended_name_table, \ - NAME##_construct_extended_name_table, \ - NAME##_truncate_arname, \ - NAME##_write_armap, \ - NAME##_read_ar_hdr, \ - NAME##_openr_next_archived_file, \ - NAME##_get_elt_at_index, \ - NAME##_generic_stat_arch_elt, \ - NAME##_update_armap_timestamp - - bfd_boolean (*_bfd_slurp_armap) (bfd *); - bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *); - bfd_boolean (*_bfd_construct_extended_name_table) - (bfd *, char **, bfd_size_type *, const char **); - void (*_bfd_truncate_arname) (bfd *, const char *, char *); - bfd_boolean (*write_armap) - (bfd *, unsigned int, struct orl *, unsigned int, int); - void * (*_bfd_read_ar_hdr_fn) (bfd *); - bfd * (*openr_next_archived_file) (bfd *, bfd *); -#define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i)) - bfd * (*_bfd_get_elt_at_index) (bfd *, symindex); - int (*_bfd_stat_arch_elt) (bfd *, struct stat *); - bfd_boolean (*_bfd_update_armap_timestamp) (bfd *); - - /* Entry points used for symbols. */ -#define BFD_JUMP_TABLE_SYMBOLS(NAME) \ - NAME##_get_symtab_upper_bound, \ - NAME##_canonicalize_symtab, \ - NAME##_make_empty_symbol, \ - NAME##_print_symbol, \ - NAME##_get_symbol_info, \ - NAME##_bfd_is_local_label_name, \ - NAME##_bfd_is_target_special_symbol, \ - NAME##_get_lineno, \ - NAME##_find_nearest_line, \ - _bfd_generic_find_line, \ - NAME##_find_inliner_info, \ - NAME##_bfd_make_debug_symbol, \ - NAME##_read_minisymbols, \ - NAME##_minisymbol_to_symbol - - long (*_bfd_get_symtab_upper_bound) (bfd *); - long (*_bfd_canonicalize_symtab) - (bfd *, struct bfd_symbol **); - struct bfd_symbol * - (*_bfd_make_empty_symbol) (bfd *); - void (*_bfd_print_symbol) - (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type); -#define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e)) - void (*_bfd_get_symbol_info) - (bfd *, struct bfd_symbol *, symbol_info *); -#define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e)) - bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *); - bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *); - alent * (*_get_lineno) (bfd *, struct bfd_symbol *); - bfd_boolean (*_bfd_find_nearest_line) - (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma, - const char **, const char **, unsigned int *); - bfd_boolean (*_bfd_find_line) - (bfd *, struct bfd_symbol **, struct bfd_symbol *, - const char **, unsigned int *); - bfd_boolean (*_bfd_find_inliner_info) - (bfd *, const char **, const char **, unsigned int *); - /* Back-door to allow format-aware applications to create debug symbols - while using BFD for everything else. Currently used by the assembler - when creating COFF files. */ - asymbol * (*_bfd_make_debug_symbol) - (bfd *, void *, unsigned long size); -#define bfd_read_minisymbols(b, d, m, s) \ - BFD_SEND (b, _read_minisymbols, (b, d, m, s)) - long (*_read_minisymbols) - (bfd *, bfd_boolean, void **, unsigned int *); -#define bfd_minisymbol_to_symbol(b, d, m, f) \ - BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f)) - asymbol * (*_minisymbol_to_symbol) - (bfd *, bfd_boolean, const void *, asymbol *); - - /* Routines for relocs. */ -#define BFD_JUMP_TABLE_RELOCS(NAME) \ - NAME##_get_reloc_upper_bound, \ - NAME##_canonicalize_reloc, \ - NAME##_bfd_reloc_type_lookup, \ - NAME##_bfd_reloc_name_lookup - - long (*_get_reloc_upper_bound) (bfd *, sec_ptr); - long (*_bfd_canonicalize_reloc) - (bfd *, sec_ptr, arelent **, struct bfd_symbol **); - /* See documentation on reloc types. */ - reloc_howto_type * - (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type); - reloc_howto_type * - (*reloc_name_lookup) (bfd *, const char *); - - - /* Routines used when writing an object file. */ -#define BFD_JUMP_TABLE_WRITE(NAME) \ - NAME##_set_arch_mach, \ - NAME##_set_section_contents - - bfd_boolean (*_bfd_set_arch_mach) - (bfd *, enum bfd_architecture, unsigned long); - bfd_boolean (*_bfd_set_section_contents) - (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type); - - /* Routines used by the linker. */ -#define BFD_JUMP_TABLE_LINK(NAME) \ - NAME##_sizeof_headers, \ - NAME##_bfd_get_relocated_section_contents, \ - NAME##_bfd_relax_section, \ - NAME##_bfd_link_hash_table_create, \ - NAME##_bfd_link_hash_table_free, \ - NAME##_bfd_link_add_symbols, \ - NAME##_bfd_link_just_syms, \ - NAME##_bfd_final_link, \ - NAME##_bfd_link_split_section, \ - NAME##_bfd_gc_sections, \ - NAME##_bfd_merge_sections, \ - NAME##_bfd_is_group_section, \ - NAME##_bfd_discard_group, \ - NAME##_section_already_linked \ - - int (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *); - bfd_byte * (*_bfd_get_relocated_section_contents) - (bfd *, struct bfd_link_info *, struct bfd_link_order *, - bfd_byte *, bfd_boolean, struct bfd_symbol **); - - bfd_boolean (*_bfd_relax_section) - (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *); - - /* Create a hash table for the linker. Different backends store - different information in this table. */ - struct bfd_link_hash_table * - (*_bfd_link_hash_table_create) (bfd *); - - /* Release the memory associated with the linker hash table. */ - void (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *); - - /* Add symbols from this object file into the hash table. */ - bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *); - - /* Indicate that we are only retrieving symbol values from this section. */ - void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *); - - /* Do a link based on the link_order structures attached to each - section of the BFD. */ - bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *); - - /* Should this section be split up into smaller pieces during linking. */ - bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *); - - /* Remove sections that are not referenced from the output. */ - bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *); - - /* Attempt to merge SEC_MERGE sections. */ - bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *); - - /* Is this section a member of a group? */ - bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *); - - /* Discard members of a group. */ - bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *); - - /* Check if SEC has been already linked during a reloceatable or - final link. */ - void (*_section_already_linked) (bfd *, struct bfd_section *, - struct bfd_link_info *); - - /* Routines to handle dynamic symbols and relocs. */ -#define BFD_JUMP_TABLE_DYNAMIC(NAME) \ - NAME##_get_dynamic_symtab_upper_bound, \ - NAME##_canonicalize_dynamic_symtab, \ - NAME##_get_synthetic_symtab, \ - NAME##_get_dynamic_reloc_upper_bound, \ - NAME##_canonicalize_dynamic_reloc - - /* Get the amount of memory required to hold the dynamic symbols. */ - long (*_bfd_get_dynamic_symtab_upper_bound) (bfd *); - /* Read in the dynamic symbols. */ - long (*_bfd_canonicalize_dynamic_symtab) - (bfd *, struct bfd_symbol **); - /* Create synthetized symbols. */ - long (*_bfd_get_synthetic_symtab) - (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **, - struct bfd_symbol **); - /* Get the amount of memory required to hold the dynamic relocs. */ - long (*_bfd_get_dynamic_reloc_upper_bound) (bfd *); - /* Read in the dynamic relocs. */ - long (*_bfd_canonicalize_dynamic_reloc) - (bfd *, arelent **, struct bfd_symbol **); - - /* Opposite endian version of this target. */ - const struct bfd_target * alternative_target; - - /* Data for use by back-end routines, which isn't - generic enough to belong in this structure. */ - const void *backend_data; - -} bfd_target; - -bfd_boolean bfd_set_default_target (const char *name); - -const bfd_target *bfd_find_target (const char *target_name, bfd *abfd); - -const char ** bfd_target_list (void); - -const bfd_target *bfd_search_for_target - (int (*search_func) (const bfd_target *, void *), - void *); - -/* Extracted from format.c. */ -bfd_boolean bfd_check_format (bfd *abfd, bfd_format format); - -bfd_boolean bfd_check_format_matches - (bfd *abfd, bfd_format format, char ***matching); - -bfd_boolean bfd_set_format (bfd *abfd, bfd_format format); - -const char *bfd_format_string (bfd_format format); - -/* Extracted from linker.c. */ -bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec); - -#define bfd_link_split_section(abfd, sec) \ - BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec)) - -void bfd_section_already_linked (bfd *abfd, asection *sec, - struct bfd_link_info *info); - -#define bfd_section_already_linked(abfd, sec, info) \ - BFD_SEND (abfd, _section_already_linked, (abfd, sec, info)) - -/* Extracted from simple.c. */ -bfd_byte *bfd_simple_get_relocated_section_contents - (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table); - -#ifdef __cplusplus -} -#endif -#endif

sw/utils/or32-idecode/bfd.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/or32-dis.c =================================================================== --- sw/utils/or32-idecode/or32-dis.c (revision 2) +++ sw/utils/or32-idecode/or32-dis.c (nonexistent) @@ -1,468 +0,0 @@ -/* Instruction printing code for the OpenRISC 1000 - Copyright (C) 2002, 2005, 2007 Free Software Foundation, Inc. - Contributed by Damjan Lampret . - Modified from a29k port. - - This file is part of the GNU opcodes library. - - This library is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3, or (at your option) - any later version. - - It is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -#define DEBUG 0 - -#include "dis-asm.h" -#include "or32.h" -//#include "safe-ctype.h" -#include -#include -#include -#include -#define EXTEND28(x) ((x) & (unsigned long) 0x08000000 ? ((x) | (unsigned long) 0xf0000000) : ((x))) - -/* Now find the four bytes of INSN_CH and put them in *INSN. */ - -static void -find_bytes_big (unsigned char *insn_ch, unsigned long *insn) -{ - *insn = - ((unsigned long) insn_ch[0] << 24) + - ((unsigned long) insn_ch[1] << 16) + - ((unsigned long) insn_ch[2] << 8) + - ((unsigned long) insn_ch[3]); -#if DEBUG - printf ("find_bytes_big3: %x\n", *insn); -#endif -} - -static void -find_bytes_little (unsigned char *insn_ch, unsigned long *insn) -{ - *insn = - ((unsigned long) insn_ch[3] << 24) + - ((unsigned long) insn_ch[2] << 16) + - ((unsigned long) insn_ch[1] << 8) + - ((unsigned long) insn_ch[0]); -} - -typedef void (*find_byte_func_type) (unsigned char *, unsigned long *); - -static unsigned long -or32_extract (char param_ch, char *enc_initial, unsigned long insn) -{ - char *enc; - unsigned long ret = 0; - int opc_pos = 0; - int param_pos = 0; - - for (enc = enc_initial; *enc != '\0'; enc++) - if (*enc == param_ch) - { - if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x')) - continue; - else - param_pos++; - } - -#if DEBUG - printf ("or32_extract: %c %x ", param_ch, param_pos); -#endif - opc_pos = 32; - - for (enc = enc_initial; *enc != '\0'; ) - if ((*enc == '0') && (*(enc + 1) == 'x')) - { - opc_pos -= 4; - - if ((param_ch == '0') || (param_ch == '1')) - { - unsigned long tmp = strtoul (enc, NULL, 16); -#if DEBUG - printf (" enc=%s, tmp=%x ", enc, tmp); -#endif - if (param_ch == '0') - tmp = 15 - tmp; - ret |= tmp << opc_pos; - } - enc += 3; - } - else if ((*enc == '0') || (*enc == '1')) - { - opc_pos--; - if (param_ch == *enc) - ret |= 1 << opc_pos; - enc++; - } - else if (*enc == param_ch) - { - opc_pos--; - param_pos--; -#if DEBUG - printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos); -#endif - ret += ((insn >> opc_pos) & 0x1) << param_pos; - - if (!param_pos - && letter_signed (param_ch) - && ret >> (letter_range (param_ch) - 1)) - { -#if DEBUG - printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", - ret, opc_pos, param_pos); -#endif - ret |= 0xffffffff << letter_range(param_ch); -#if DEBUG - printf ("\n after conversion to signed: ret=%x\n", ret); -#endif - } - enc++; - } - //else if (ISALPHA (*enc)) - else if (isalpha(*enc)) - { - opc_pos--; - enc++; - } - else if (*enc == '-') - { - opc_pos--; - enc++; - } - else - enc++; - -#if DEBUG - printf ("ret=%x\n", ret); -#endif - return ret; -} - -static int -or32_opcode_match (unsigned long insn, char *encoding) -{ - unsigned long ones, zeros; - -#if DEBUG - printf ("or32_opcode_match: %.8lx\n", insn); -#endif - ones = or32_extract ('1', encoding, insn); - zeros = or32_extract ('0', encoding, insn); - - // Added 090430 - jb - fixed problem where upper 4 bytes of a 64-bit long weren't getting setup properly for comparison - // As a result, instructions weren't getting decoded properly - insn &= 0xffffffff; - ones &= 0xffffffff; - zeros &= 0xffffffff; - -#if DEBUG - printf ("ones: %x \n", ones); - printf ("zeros: %x \n", zeros); -#endif - if ((insn & ones) != ones) - { -#if DEBUG - printf ("ret1\n"); -#endif - return 0; - } - - if ((~insn & zeros) != zeros) - { -#if DEBUG - printf ("ret2\n"); -#endif - return 0; - } - -#if DEBUG - printf ("ret3\n"); -#endif - return 1; -} - -/* Print register to INFO->STREAM. Used only by print_insn. */ - -static void -or32_print_register (char param_ch, - char *encoding, - unsigned long insn) - // struct disassemble_info *info) -{ - int regnum = or32_extract (param_ch, encoding, insn); - -#if DEBUG - printf ("or32_print_register: %c, %s, %x\n", param_ch, encoding, insn); -#endif - if (param_ch == 'A') - //(*info->fprintf_func) (info->stream, "r%d", regnum); - printf("r%d", regnum); - else if (param_ch == 'B') - //(*info->fprintf_func) (info->stream, "r%d", regnum); - printf("r%d", regnum); - else if (param_ch == 'D') - //(*info->fprintf_func) (info->stream, "r%d", regnum); - printf("r%d", regnum); - else if (regnum < 16) - //(*info->fprintf_func) (info->stream, "r%d", regnum); - printf("r%d", regnum); - else if (regnum < 32) - //(*info->fprintf_func) (info->stream, "r%d", regnum-16); - printf("r%d", regnum-16); - else - //(*info->fprintf_func) (info->stream, "X%d", regnum); - printf("X%d", regnum); -} - -/* Print immediate to INFO->STREAM. Used only by print_insn. */ - -static void -or32_print_immediate (char param_ch, - char *encoding, - unsigned long insn) - //struct disassemble_info *info) -{ - int imm = or32_extract(param_ch, encoding, insn); - - if (letter_signed(param_ch)) - //(*info->fprintf_func) (info->stream, "0x%x", imm); - printf("0x%x", imm); -/* (*info->fprintf_func) (info->stream, "%d", imm); */ - else - //(*info->fprintf_func) (info->stream, "0x%x", imm); - printf("0x%x", imm); -} - -/* Print one instruction from MEMADDR on INFO->STREAM. - Return the size of the instruction (always 4 on or32). */ - -static int -//print_insn (bfd_vma memaddr, struct disassemble_info *info) -print_insn(unsigned long insn) -{ - /* The raw instruction. */ - unsigned char insn_ch[4]; - /* Address. Will be sign extened 27-bit. */ - unsigned long addr; - /* The four bytes of the instruction. */ - //unsigned long insn; - //find_byte_func_type find_byte_func = (find_byte_func_type) info->private_data; - struct or32_opcode const * opcode; - /* - { - int status = - (*info->read_memory_func) (memaddr, (bfd_byte *) &insn_ch[0], 4, info); - - if (status != 0) - { - (*info->memory_error_func) (status, memaddr, info); - return -1; - } - } - */ - - //(*find_byte_func) (&insn_ch[0], &insn); - - for (opcode = &or32_opcodes[0]; - opcode < &or32_opcodes[or32_num_opcodes]; - ++opcode) - { - if (or32_opcode_match (insn, opcode->encoding)) - { - char *s; - - //(*info->fprintf_func) (info->stream, "%s ", opcode->name); - printf("%s ", opcode->name); - - for (s = opcode->args; *s != '\0'; ++s) - { - switch (*s) - { - case '\0': - return 4; - - case 'r': - //or32_print_register (*++s, opcode->encoding, insn, info); - or32_print_register (*++s, opcode->encoding, insn); - break; - - case 'N': - addr = or32_extract ('N', opcode->encoding, insn) << 2; - int32_t int32_addr = (int32_t) addr; // Must use explicitly sized bariable here - //printf("int32_addr: %d ", int32_addr); - if (int32_addr >= 0) - printf("(+0x%x)", int32_addr); - else - { - int32_addr = (~int32_addr) + 1; - printf("(-0x%x)", int32_addr); - } - /* Calulate the correct address. */ - //addr = memaddr + EXTEND28 (addr); - - //(*info->print_address_func) - // (addr, info); - break; - - default: - if (strchr (opcode->encoding, *s)) - //or32_print_immediate (*s, opcode->encoding, insn, info); - or32_print_immediate (*s, opcode->encoding, insn); - else - //(*info->fprintf_func) (info->stream, "%c", *s); - printf("%c", *s); - } - } - - return 4; - } - } - - /* This used to be %8x for binutils. */ - // (*info->fprintf_func) - // (info->stream, ".word 0x%08lx", insn); - printf(".word 0x%08lx", insn); - return 4; -} - -/* Disassemble a big-endian or32 instruction. */ -/* -int -print_insn_big_or32 (bfd_vma memaddr, struct disassemble_info *info) -{ - info->private_data = find_bytes_big; - - return print_insn (memaddr, info); -} -*/ -/* Disassemble a little-endian or32 instruction. */ - /* -int -print_insn_little_or32 (bfd_vma memaddr, struct disassemble_info *info) -{ - info->private_data = find_bytes_little; - return print_insn (memaddr, info); -} - */ -#define PRINT_ORIG_INSN_OPTION "-print-orig-insn" - -static void print_or32_dis_usage(char *argv[]) -{ - printf(" OpenRISC instruction decoder\n"); - printf("\n"); - printf(" Decodes an instruction passed on the command line, otherwise reads from stdin.\n"); - printf(" The option %s prints out the original instruction along with the decoded version\n similar to the objdump disassembler output, except without address information\n", PRINT_ORIG_INSN_OPTION); - printf("\n"); - printf(" Usage:\n"); - printf("\n"); - printf(" Decode a single instruction from the command line:\n"); - printf(" \t%s 0x1500000\n", argv[0]); - printf("\n"); - printf(" Decode a list of instructions from stdin:\n"); - printf(" \t%s < list_of_insns\n", argv[0]); - printf("\n"); - printf(" Decode a list of instructions from stdin, and print out the original instruction as well:\n"); - printf(" \t%s -print-orig-insn < list_of_insns\n", argv[0]); - printf("\n"); - printf(" Note: The values don't require the leading \"0x\"\n"); - printf("\n"); - return; -} - -// Simple program to do disassembly like or32-objdump but on individual instructions passed to it - // Pass the instruction in hex -int main (int argc, char *argv[]) -{ - unsigned long insn; - - - int print_orig_inst_option = 0; // Don't print the instruction we're passed, by default, just the decoded version - // extract possible options we were passed - int i; - for(i=1;i 2 ) - { - if (i == 1) index++; // If the option was the first thing passed, the instruction is in argv[2] - } - - insn = strtoul(argv[index], NULL, 16); - if (print_orig_inst_option) - printf(" %.8lx\t", insn); - print_insn (insn); - printf("\n"); - - } - else - { - char inp[10]; // Buffer is long enough to have an 8 char hex value plus its leading "0x", but that is not essential - while(1) // Loop, reading from stdin - { - char c; - c = getchar(); - //printf("%c",c); - if (c == '\n') // End of a line - now determine the instruction we've been given - { - insn = strtoul(inp, NULL, 16); - - if (print_orig_inst_option) - printf(" %.8lx\t", insn); - - print_insn (insn); - printf("\n"); - - // clear our little buffer - for(i=0;i<10;i++)inp[i]=0; - } - else if (c == EOF) - { - break; - } - else - { - for(i=0;i<9-1;i++)inp[i]=inp[i+1]; - inp[7]=c; - } - - } - } - return 0; -}

sw/utils/or32-idecode/or32-dis.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/dis-asm.h =================================================================== --- sw/utils/or32-idecode/dis-asm.h (revision 2) +++ sw/utils/or32-idecode/dis-asm.h (nonexistent) @@ -1,354 +0,0 @@ -/* Interface between the opcode library and its callers. - - Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, - Boston, MA 02110-1301, USA. - - Written by Cygnus Support, 1993. - - The opcode library (libopcodes.a) provides instruction decoders for - a large variety of instruction sets, callable with an identical - interface, for making instruction-processing programs more independent - of the instruction set being processed. */ - -#ifndef DIS_ASM_H -#define DIS_ASM_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include "bfd.h" - - typedef int (*fprintf_ftype) (void *, const char*, ...) /*ATTRIBUTE_FPTR_PRINTF_2*/; - -enum dis_insn_type -{ - dis_noninsn, /* Not a valid instruction */ - dis_nonbranch, /* Not a branch instruction */ - dis_branch, /* Unconditional branch */ - dis_condbranch, /* Conditional branch */ - dis_jsr, /* Jump to subroutine */ - dis_condjsr, /* Conditional jump to subroutine */ - dis_dref, /* Data reference instruction */ - dis_dref2 /* Two data references in instruction */ -}; - -/* This struct is passed into the instruction decoding routine, - and is passed back out into each callback. The various fields are used - for conveying information from your main routine into your callbacks, - for passing information into the instruction decoders (such as the - addresses of the callback functions), or for passing information - back from the instruction decoders to their callers. - - It must be initialized before it is first passed; this can be done - by hand, or using one of the initialization macros below. */ - -typedef struct disassemble_info -{ - fprintf_ftype fprintf_func; - void *stream; - void *application_data; - - /* Target description. We could replace this with a pointer to the bfd, - but that would require one. There currently isn't any such requirement - so to avoid introducing one we record these explicitly. */ - /* The bfd_flavour. This can be bfd_target_unknown_flavour. */ - enum bfd_flavour flavour; - /* The bfd_arch value. */ - enum bfd_architecture arch; - /* The bfd_mach value. */ - unsigned long mach; - /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */ - enum bfd_endian endian; - /* An arch/mach-specific bitmask of selected instruction subsets, mainly - for processors with run-time-switchable instruction sets. The default, - zero, means that there is no constraint. CGEN-based opcodes ports - may use ISA_foo masks. */ - void *insn_sets; - - /* Some targets need information about the current section to accurately - display insns. If this is NULL, the target disassembler function - will have to make its best guess. */ - asection *section; - - /* An array of pointers to symbols either at the location being disassembled - or at the start of the function being disassembled. The array is sorted - so that the first symbol is intended to be the one used. The others are - present for any misc. purposes. This is not set reliably, but if it is - not NULL, it is correct. */ - asymbol **symbols; - /* Number of symbols in array. */ - int num_symbols; - - /* Symbol table provided for targets that want to look at it. This is - used on Arm to find mapping symbols and determine Arm/Thumb code. */ - asymbol **symtab; - int symtab_pos; - int symtab_size; - - /* For use by the disassembler. - The top 16 bits are reserved for public use (and are documented here). - The bottom 16 bits are for the internal use of the disassembler. */ - unsigned long flags; -#define INSN_HAS_RELOC 0x80000000 - void *private_data; - - /* Function used to get bytes to disassemble. MEMADDR is the - address of the stuff to be disassembled, MYADDR is the address to - put the bytes in, and LENGTH is the number of bytes to read. - INFO is a pointer to this struct. - Returns an errno value or 0 for success. */ - int (*read_memory_func) - (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length, - struct disassemble_info *info); - - /* Function which should be called if we get an error that we can't - recover from. STATUS is the errno value from read_memory_func and - MEMADDR is the address that we were trying to read. INFO is a - pointer to this struct. */ - void (*memory_error_func) - (int status, bfd_vma memaddr, struct disassemble_info *info); - - /* Function called to print ADDR. */ - void (*print_address_func) - (bfd_vma addr, struct disassemble_info *info); - - /* Function called to determine if there is a symbol at the given ADDR. - If there is, the function returns 1, otherwise it returns 0. - This is used by ports which support an overlay manager where - the overlay number is held in the top part of an address. In - some circumstances we want to include the overlay number in the - address, (normally because there is a symbol associated with - that address), but sometimes we want to mask out the overlay bits. */ - int (* symbol_at_address_func) - (bfd_vma addr, struct disassemble_info * info); - - /* Function called to check if a SYMBOL is can be displayed to the user. - This is used by some ports that want to hide special symbols when - displaying debugging outout. */ - bfd_boolean (* symbol_is_valid) - (asymbol *, struct disassemble_info * info); - - /* These are for buffer_read_memory. */ - bfd_byte *buffer; - bfd_vma buffer_vma; - unsigned int buffer_length; - - /* This variable may be set by the instruction decoder. It suggests - the number of bytes objdump should display on a single line. If - the instruction decoder sets this, it should always set it to - the same value in order to get reasonable looking output. */ - int bytes_per_line; - - /* The next two variables control the way objdump displays the raw data. */ - /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */ - /* output will look like this: - 00: 00000000 00000000 - with the chunks displayed according to "display_endian". */ - int bytes_per_chunk; - enum bfd_endian display_endian; - - /* Number of octets per incremented target address - Normally one, but some DSPs have byte sizes of 16 or 32 bits. */ - unsigned int octets_per_byte; - - /* The number of zeroes we want to see at the end of a section before we - start skipping them. */ - unsigned int skip_zeroes; - - /* The number of zeroes to skip at the end of a section. If the number - of zeroes at the end is between SKIP_ZEROES_AT_END and SKIP_ZEROES, - they will be disassembled. If there are fewer than - SKIP_ZEROES_AT_END, they will be skipped. This is a heuristic - attempt to avoid disassembling zeroes inserted by section - alignment. */ - unsigned int skip_zeroes_at_end; - - /* Whether the disassembler always needs the relocations. */ - bfd_boolean disassembler_needs_relocs; - - /* Results from instruction decoders. Not all decoders yet support - this information. This info is set each time an instruction is - decoded, and is only valid for the last such instruction. - - To determine whether this decoder supports this information, set - insn_info_valid to 0, decode an instruction, then check it. */ - - char insn_info_valid; /* Branch info has been set. */ - char branch_delay_insns; /* How many sequential insn's will run before - a branch takes effect. (0 = normal) */ - char data_size; /* Size of data reference in insn, in bytes */ - enum dis_insn_type insn_type; /* Type of instruction */ - bfd_vma target; /* Target address of branch or dref, if known; - zero if unknown. */ - bfd_vma target2; /* Second target address for dref2 */ - - /* Command line options specific to the target disassembler. */ - char * disassembler_options; - -} disassemble_info; - - -/* Standard disassemblers. Disassemble one instruction at the given - target address. Return number of octets processed. */ -typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *); - -extern int print_insn_alpha (bfd_vma, disassemble_info *); -extern int print_insn_avr (bfd_vma, disassemble_info *); -extern int print_insn_bfin (bfd_vma, disassemble_info *); -extern int print_insn_big_arm (bfd_vma, disassemble_info *); -extern int print_insn_big_mips (bfd_vma, disassemble_info *); -extern int print_insn_big_or32 (bfd_vma, disassemble_info *); -extern int print_insn_big_powerpc (bfd_vma, disassemble_info *); -extern int print_insn_big_score (bfd_vma, disassemble_info *); -extern int print_insn_cr16 (bfd_vma, disassemble_info *); -extern int print_insn_crx (bfd_vma, disassemble_info *); -extern int print_insn_d10v (bfd_vma, disassemble_info *); -extern int print_insn_d30v (bfd_vma, disassemble_info *); -extern int print_insn_dlx (bfd_vma, disassemble_info *); -extern int print_insn_fr30 (bfd_vma, disassemble_info *); -extern int print_insn_frv (bfd_vma, disassemble_info *); -extern int print_insn_h8300 (bfd_vma, disassemble_info *); -extern int print_insn_h8300h (bfd_vma, disassemble_info *); -extern int print_insn_h8300s (bfd_vma, disassemble_info *); -extern int print_insn_h8500 (bfd_vma, disassemble_info *); -extern int print_insn_hppa (bfd_vma, disassemble_info *); -extern int print_insn_i370 (bfd_vma, disassemble_info *); -extern int print_insn_i386 (bfd_vma, disassemble_info *); -extern int print_insn_i386_att (bfd_vma, disassemble_info *); -extern int print_insn_i386_intel (bfd_vma, disassemble_info *); -extern int print_insn_i860 (bfd_vma, disassemble_info *); -extern int print_insn_i960 (bfd_vma, disassemble_info *); -extern int print_insn_ia64 (bfd_vma, disassemble_info *); -extern int print_insn_ip2k (bfd_vma, disassemble_info *); -extern int print_insn_iq2000 (bfd_vma, disassemble_info *); -extern int print_insn_little_arm (bfd_vma, disassemble_info *); -extern int print_insn_little_mips (bfd_vma, disassemble_info *); -extern int print_insn_little_or32 (bfd_vma, disassemble_info *); -extern int print_insn_little_powerpc (bfd_vma, disassemble_info *); -extern int print_insn_little_score (bfd_vma, disassemble_info *); -extern int print_insn_m32c (bfd_vma, disassemble_info *); -extern int print_insn_m32r (bfd_vma, disassemble_info *); -extern int print_insn_m68hc11 (bfd_vma, disassemble_info *); -extern int print_insn_m68hc12 (bfd_vma, disassemble_info *); -extern int print_insn_m68k (bfd_vma, disassemble_info *); -extern int print_insn_m88k (bfd_vma, disassemble_info *); -extern int print_insn_maxq_big (bfd_vma, disassemble_info *); -extern int print_insn_maxq_little (bfd_vma, disassemble_info *); -extern int print_insn_mcore (bfd_vma, disassemble_info *); -extern int print_insn_mep (bfd_vma, disassemble_info *); -extern int print_insn_mmix (bfd_vma, disassemble_info *); -extern int print_insn_mn10200 (bfd_vma, disassemble_info *); -extern int print_insn_mn10300 (bfd_vma, disassemble_info *); -extern int print_insn_msp430 (bfd_vma, disassemble_info *); -extern int print_insn_mt (bfd_vma, disassemble_info *); -extern int print_insn_ns32k (bfd_vma, disassemble_info *); -extern int print_insn_openrisc (bfd_vma, disassemble_info *); -extern int print_insn_pdp11 (bfd_vma, disassemble_info *); -extern int print_insn_pj (bfd_vma, disassemble_info *); -extern int print_insn_rs6000 (bfd_vma, disassemble_info *); -extern int print_insn_s390 (bfd_vma, disassemble_info *); -extern int print_insn_sh (bfd_vma, disassemble_info *); -extern int print_insn_sh64 (bfd_vma, disassemble_info *); -extern int print_insn_sh64x_media (bfd_vma, disassemble_info *); -extern int print_insn_sparc (bfd_vma, disassemble_info *); -extern int print_insn_spu (bfd_vma, disassemble_info *); -extern int print_insn_tic30 (bfd_vma, disassemble_info *); -extern int print_insn_tic4x (bfd_vma, disassemble_info *); -extern int print_insn_tic54x (bfd_vma, disassemble_info *); -extern int print_insn_tic80 (bfd_vma, disassemble_info *); -extern int print_insn_v850 (bfd_vma, disassemble_info *); -extern int print_insn_vax (bfd_vma, disassemble_info *); -extern int print_insn_w65 (bfd_vma, disassemble_info *); -extern int print_insn_xc16x (bfd_vma, disassemble_info *); -extern int print_insn_xstormy16 (bfd_vma, disassemble_info *); -extern int print_insn_xtensa (bfd_vma, disassemble_info *); -extern int print_insn_z80 (bfd_vma, disassemble_info *); -extern int print_insn_z8001 (bfd_vma, disassemble_info *); -extern int print_insn_z8002 (bfd_vma, disassemble_info *); - -extern disassembler_ftype arc_get_disassembler (void *); -extern disassembler_ftype cris_get_disassembler (bfd *); - -extern void print_i386_disassembler_options (FILE *); -extern void print_mips_disassembler_options (FILE *); -extern void print_ppc_disassembler_options (FILE *); -extern void print_arm_disassembler_options (FILE *); -extern void parse_arm_disassembler_option (char *); -extern void print_s390_disassembler_options (FILE *); -extern int get_arm_regname_num_options (void); -extern int set_arm_regname_option (int); -extern int get_arm_regnames (int, const char **, const char **, const char *const **); -extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *); - -/* Fetch the disassembler for a given BFD, if that support is available. */ -extern disassembler_ftype disassembler (bfd *); - -/* Amend the disassemble_info structure as necessary for the target architecture. - Should only be called after initialising the info->arch field. */ -extern void disassemble_init_for_target (struct disassemble_info * info); - -/* Document any target specific options available from the disassembler. */ -extern void disassembler_usage (FILE *); - - -/* This block of definitions is for particular callers who read instructions - into a buffer before calling the instruction decoder. */ - -/* Here is a function which callers may wish to use for read_memory_func. - It gets bytes from a buffer. */ -extern int buffer_read_memory - (bfd_vma, bfd_byte *, unsigned int, struct disassemble_info *); - -/* This function goes with buffer_read_memory. - It prints a message using info->fprintf_func and info->stream. */ -extern void perror_memory (int, bfd_vma, struct disassemble_info *); - - -/* Just print the address in hex. This is included for completeness even - though both GDB and objdump provide their own (to print symbolic - addresses). */ -extern void generic_print_address - (bfd_vma, struct disassemble_info *); - -/* Always true. */ -extern int generic_symbol_at_address - (bfd_vma, struct disassemble_info *); - -/* Also always true. */ -extern bfd_boolean generic_symbol_is_valid - (asymbol *, struct disassemble_info *); - -/* Method to initialize a disassemble_info struct. This should be - called by all applications creating such a struct. */ -extern void init_disassemble_info (struct disassemble_info *info, void *stream, - fprintf_ftype fprintf_func); - -/* For compatibility with existing code. */ -#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \ - init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC)) -#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \ - init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC)) - - -#ifdef __cplusplus -} -#endif - -#endif /* ! defined (DIS_ASM_H) */

sw/utils/or32-idecode/dis-asm.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/or32-opc.c =================================================================== --- sw/utils/or32-idecode/or32-opc.c (revision 2) +++ sw/utils/or32-idecode/or32-opc.c (nonexistent) @@ -1,1080 +0,0 @@ -/* Table of opcodes for the OpenRISC 1000 ISA. - Copyright 2002, 2004, 2005, 2007 Free Software Foundation, Inc. - Contributed by Damjan Lampret (lampret@opencores.org). - - This file is part of the GNU opcodes library. - - This library is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3, or (at your option) - any later version. - - It is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, - MA 02110-1301, USA. */ - -/* We treat all letters the same in encode/decode routines so - we need to assign some characteristics to them like signess etc. */ -#include -#include -#include -//#include "safe-ctype.h" -#include -#include "ansidecl.h" -/* -#ifdef HAVE_CONFIG_H -# include "config.h" -#endif -#ifdef HAS_EXECUTION -# ifdef HAVE_INTTYPES_H -# include // ...but to get arch.h we need uint{8,16,32}_t.. -# endif -# include "port.h" -# include "arch.h" // ...but to get abstract.h, we need oraddr_t... -# include "abstract.h" // To get struct iqueue_entry... -# include "debug.h" // To get debug() -#endif -*/ -#include "or32.h" - -const struct or32_letter or32_letters[] = -{ - { 'A', NUM_UNSIGNED }, - { 'B', NUM_UNSIGNED }, - { 'D', NUM_UNSIGNED }, - { 'I', NUM_SIGNED }, - { 'K', NUM_UNSIGNED }, - { 'L', NUM_UNSIGNED }, - { 'N', NUM_SIGNED }, - { '0', NUM_UNSIGNED }, - { '\0', 0 } /* Dummy entry. */ -}; - -/* Opcode encoding: - machine[31:30]: first two bits of opcode - 00 - neither of source operands is GPR - 01 - second source operand is GPR (rB) - 10 - first source operand is GPR (rA) - 11 - both source operands are GPRs (rA and rB) - machine[29:26]: next four bits of opcode - machine[25:00]: instruction operands (specific to individual instruction) - - Recommendation: irrelevant instruction bits should be set with a value of - bits in same positions of instruction preceding current instruction in the - code (when assembling). */ - -#ifdef HAS_EXECUTION -# if SIMPLE_EXECUTION -# define EFN &l_none -# define EF(func) &(func) -# define EFI &l_invalid -# elif COMPLEX_EXECUTION -# define EFN "l_none" -# define EFI "l_invalid" -# ifdef __GNUC__ -# define EF(func) #func -# else -# define EF(func) "func" -# endif -# else /* DYNAMIC_EXECUTION */ -# define EFN &l_none -# define EF(func) &(gen_ ##func) -# define EFI &gen_l_invalid -# endif -#else /* HAS_EXECUTION */ -# define EFN &l_none -# define EF(func) EFN -# define EFI EFN -#endif /* HAS_EXECUTION */ - -const struct or32_opcode or32_opcodes[] = { - { "l.j", "N", "00 0x0 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_j), OR32_IF_DELAY, it_jump }, - { "l.jal", "N", "00 0x1 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_jal), OR32_IF_DELAY, it_jump }, - { "l.bnf", "N", "00 0x3 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG, it_branch }, - { "l.bf", "N", "00 0x4 NNNNN NNNNN NNNN NNNN NNNN NNNN", EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG, it_branch }, - { "l.nop", "K", "00 0x5 01--- ----- KKKK KKKK KKKK KKKK", EF(l_nop), 0, it_nop }, - { "l.movhi", "rD,K", "00 0x6 DDDDD ----0 KKKK KKKK KKKK KKKK", EF(l_movhi), 0, it_movimm }, - { "l.macrc", "rD", "00 0x6 DDDDD ----1 0000 0000 0000 0000", EF(l_macrc), 0, it_mac }, - { "l.sys", "K", "00 0x8 00000 00000 KKKK KKKK KKKK KKKK", EF(l_sys), 0, it_exception }, - { "l.trap", "K", "00 0x8 01000 00000 KKKK KKKK KKKK KKKK", EF(l_trap), 0, it_exception }, - { "l.msync", "", "00 0x8 10000 00000 0000 0000 0000 0000", EFN, 0, it_unknown }, - { "l.psync", "", "00 0x8 10100 00000 0000 0000 0000 0000", EFN, 0, it_unknown }, - { "l.csync", "", "00 0x8 11000 00000 0000 0000 0000 0000", EFN, 0, it_unknown }, - { "l.rfe", "", "00 0x9 ----- ----- ---- ---- ---- ----", EF(l_rfe), 0, it_exception }, - { "lv.all_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0, it_unknown }, - { "lv.all_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0, it_unknown }, - { "lv.all_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0, it_unknown }, - { "lv.all_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0, it_unknown }, - { "lv.all_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0, it_unknown }, - { "lv.all_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0, it_unknown }, - { "lv.all_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0, it_unknown }, - { "lv.all_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0, it_unknown }, - { "lv.all_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0, it_unknown }, - { "lv.all_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0, it_unknown }, - { "lv.all_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0, it_unknown }, - { "lv.all_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0, it_unknown }, - { "lv.any_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0, it_unknown }, - { "lv.any_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0, it_unknown }, - { "lv.any_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0, it_unknown }, - { "lv.any_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0, it_unknown }, - { "lv.any_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0, it_unknown }, - { "lv.any_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0, it_unknown }, - { "lv.any_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0, it_unknown }, - { "lv.any_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0, it_unknown }, - { "lv.any_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0, it_unknown }, - { "lv.any_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0, it_unknown }, - { "lv.any_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0, it_unknown }, - { "lv.any_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0, it_unknown }, - { "lv.add.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0, it_unknown }, - { "lv.add.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0, it_unknown }, - { "lv.adds.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0, it_unknown }, - { "lv.adds.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0, it_unknown }, - { "lv.addu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0, it_unknown }, - { "lv.addu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0, it_unknown }, - { "lv.addus.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0, it_unknown }, - { "lv.addus.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0, it_unknown }, - { "lv.and", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0, it_unknown }, - { "lv.avg.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0, it_unknown }, - { "lv.avg.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0, it_unknown }, - { "lv.cmp_eq.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0, it_unknown }, - { "lv.cmp_eq.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0, it_unknown }, - { "lv.cmp_ge.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0, it_unknown }, - { "lv.cmp_ge.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0, it_unknown }, - { "lv.cmp_gt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0, it_unknown }, - { "lv.cmp_gt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0, it_unknown }, - { "lv.cmp_le.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0, it_unknown }, - { "lv.cmp_le.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0, it_unknown }, - { "lv.cmp_lt.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0, it_unknown }, - { "lv.cmp_lt.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0, it_unknown }, - { "lv.cmp_ne.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0, it_unknown }, - { "lv.cmp_ne.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0, it_unknown }, - { "lv.madds.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0, it_unknown }, - { "lv.max.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0, it_unknown }, - { "lv.max.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0, it_unknown }, - { "lv.merge.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0, it_unknown }, - { "lv.merge.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0, it_unknown }, - { "lv.min.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0, it_unknown }, - { "lv.min.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0, it_unknown }, - { "lv.msubs.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0, it_unknown }, - { "lv.muls.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0, it_unknown }, - { "lv.nand", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0, it_unknown }, - { "lv.nor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0, it_unknown }, - { "lv.or", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0, it_unknown }, - { "lv.pack.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0, it_unknown }, - { "lv.pack.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0, it_unknown }, - { "lv.packs.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0, it_unknown }, - { "lv.packs.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0, it_unknown }, - { "lv.packus.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0, it_unknown }, - { "lv.packus.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0, it_unknown }, - { "lv.perm.n", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0, it_unknown }, - { "lv.rl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0, it_unknown }, - { "lv.rl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0, it_unknown }, - { "lv.sll.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0, it_unknown }, - { "lv.sll.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0, it_unknown }, - { "lv.sll", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0, it_unknown }, - { "lv.srl.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0, it_unknown }, - { "lv.srl.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0, it_unknown }, - { "lv.sra.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0, it_unknown }, - { "lv.sra.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0, it_unknown }, - { "lv.srl", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0, it_unknown }, - { "lv.sub.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0, it_unknown }, - { "lv.sub.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0, it_unknown }, - { "lv.subs.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0, it_unknown }, - { "lv.subs.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0, it_unknown }, - { "lv.subu.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0, it_unknown }, - { "lv.subu.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0, it_unknown }, - { "lv.subus.b", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0, it_unknown }, - { "lv.subus.h", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0, it_unknown }, - { "lv.unpack.b","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0, it_unknown }, - { "lv.unpack.h","rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0, it_unknown }, - { "lv.xor", "rD,rA,rB", "00 0xA DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0, it_unknown }, - { "lv.cust1", "", "00 0xA ----- ----- ---- ---- 0xC ----", EFI, 0, it_unknown }, - { "lv.cust2", "", "00 0xA ----- ----- ---- ---- 0xD ----", EFI, 0, it_unknown }, - { "lv.cust3", "", "00 0xA ----- ----- ---- ---- 0xE ----", EFI, 0, it_unknown }, - { "lv.cust4", "", "00 0xA ----- ----- ---- ---- 0xF ----", EFI, 0, it_unknown }, - - { "l.jr", "rB", "01 0x1 ----- ----- BBBB B--- ---- ----", EF(l_jr), OR32_IF_DELAY, it_jump }, - { "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", EF(l_jalr), OR32_IF_DELAY, it_jump }, - { "l.maci", "rA,I", "01 0x3 IIIII AAAAA ---- -III IIII IIII", EF(l_mac), 0, it_mac }, - { "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", EF(l_cust1), 0, it_unknown }, - { "l.cust2", "", "01 0xD ----- ----- ---- ---- ---- ----", EF(l_cust2), 0, it_unknown }, - { "l.cust3", "", "01 0xE ----- ----- ---- ---- ---- ----", EF(l_cust3), 0, it_unknown }, - { "l.cust4", "", "01 0xF ----- ----- ---- ---- ---- ----", EF(l_cust4), 0, it_unknown }, - - { "l.ld", "rD,I(rA)", "10 0x0 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0, it_load }, - { "l.lwz", "rD,I(rA)", "10 0x1 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lwz), 0, it_load }, - { "l.lws", "rD,I(rA)", "10 0x2 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0, it_load }, - { "l.lbz", "rD,I(rA)", "10 0x3 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbz), 0, it_load }, - { "l.lbs", "rD,I(rA)", "10 0x4 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lbs), 0, it_load }, - { "l.lhz", "rD,I(rA)", "10 0x5 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhz), 0, it_load }, - { "l.lhs", "rD,I(rA)", "10 0x6 DDDDD AAAAA IIII IIII IIII IIII", EF(l_lhs), 0, it_load }, - - { "l.addi", "rD,rA,I", "10 0x7 DDDDD AAAAA IIII IIII IIII IIII", EF(l_add), OR32_W_FLAG, it_arith }, - { "l.addic", "rD,rA,I", "10 0x8 DDDDD AAAAA IIII IIII IIII IIII", EFI, 0, it_arith }, - { "l.andi", "rD,rA,K", "10 0x9 DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_and), OR32_W_FLAG, it_arith }, - { "l.ori", "rD,rA,K", "10 0xA DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_or), 0, it_arith }, - { "l.xori", "rD,rA,I", "10 0xB DDDDD AAAAA IIII IIII IIII IIII", EF(l_xor), 0, it_arith }, - { "l.muli", "rD,rA,I", "10 0xC DDDDD AAAAA IIII IIII IIII IIII", EF(l_mul), 0, it_arith }, - { "l.mfspr", "rD,rA,K", "10 0xD DDDDD AAAAA KKKK KKKK KKKK KKKK", EF(l_mfspr), 0, it_move }, - { "l.slli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 00LL LLLL", EF(l_sll), 0, it_shift }, - { "l.srli", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 01LL LLLL", EF(l_srl), 0, it_shift }, - { "l.srai", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 10LL LLLL", EF(l_sra), 0, it_shift }, - { "l.rori", "rD,rA,L", "10 0xE DDDDD AAAAA ---- ---- 11LL LLLL", EFI, 0, it_shift }, - - { "l.sfeqi", "rA,I", "10 0xF 00000 AAAAA IIII IIII IIII IIII", EF(l_sfeq), OR32_W_FLAG, it_compare }, - { "l.sfnei", "rA,I", "10 0xF 00001 AAAAA IIII IIII IIII IIII", EF(l_sfne), OR32_W_FLAG, it_compare }, - { "l.sfgtui", "rA,I", "10 0xF 00010 AAAAA IIII IIII IIII IIII", EF(l_sfgtu), OR32_W_FLAG, it_compare }, - { "l.sfgeui", "rA,I", "10 0xF 00011 AAAAA IIII IIII IIII IIII", EF(l_sfgeu), OR32_W_FLAG, it_compare }, - { "l.sfltui", "rA,I", "10 0xF 00100 AAAAA IIII IIII IIII IIII", EF(l_sfltu), OR32_W_FLAG, it_compare }, - { "l.sfleui", "rA,I", "10 0xF 00101 AAAAA IIII IIII IIII IIII", EF(l_sfleu), OR32_W_FLAG, it_compare }, - { "l.sfgtsi", "rA,I", "10 0xF 01010 AAAAA IIII IIII IIII IIII", EF(l_sfgts), OR32_W_FLAG, it_compare }, - { "l.sfgesi", "rA,I", "10 0xF 01011 AAAAA IIII IIII IIII IIII", EF(l_sfges), OR32_W_FLAG, it_compare }, - { "l.sfltsi", "rA,I", "10 0xF 01100 AAAAA IIII IIII IIII IIII", EF(l_sflts), OR32_W_FLAG, it_compare }, - { "l.sflesi", "rA,I", "10 0xF 01101 AAAAA IIII IIII IIII IIII", EF(l_sfles), OR32_W_FLAG, it_compare }, - - { "l.mtspr", "rA,rB,K", "11 0x0 KKKKK AAAAA BBBB BKKK KKKK KKKK", EF(l_mtspr), 0, it_move }, - { "l.mac", "rA,rB", "11 0x1 ----- AAAAA BBBB B--- ---- 0x1", EF(l_mac), 0, it_mac }, - { "l.msb", "rA,rB", "11 0x1 ----- AAAAA BBBB B--- ---- 0x2", EF(l_msb), 0, it_mac }, - - { "lf.add.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x0", EF(lf_add_s), 0, it_float }, - { "lf.sub.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x1", EF(lf_sub_s), 0, it_float }, - { "lf.mul.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x2", EF(lf_mul_s), 0, it_float }, - { "lf.div.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x3", EF(lf_div_s), 0, it_float }, - { "lf.itof.s", "rD,rA", "11 0x2 DDDDD AAAAA 0000 0--- 0x0 0x4", EF(lf_itof_s), 0, it_float }, - { "lf.ftoi.s", "rD,rA", "11 0x2 DDDDD AAAAA 0000 0--- 0x0 0x5", EF(lf_ftoi_s), 0, it_float }, - { "lf.rem.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x6", EF(lf_rem_s), 0, it_float }, - { "lf.madd.s", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x0 0x7", EF(lf_madd_s), 0, it_float }, - { "lf.sfeq.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0x8", EF(lf_sfeq_s), 0, it_float }, - { "lf.sfne.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0x9", EF(lf_sfne_s), 0, it_float }, - { "lf.sfgt.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0xA", EF(lf_sfgt_s), 0, it_float }, - { "lf.sfge.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0xB", EF(lf_sfge_s), 0, it_float }, - { "lf.sflt.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0xC", EF(lf_sflt_s), 0, it_float }, - { "lf.sfle.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x0 0xD", EF(lf_sfle_s), 0, it_float }, - { "lf.cust1.s", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0xD ----", EFI, 0, it_float }, - - { "lf.add.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0, it_float }, - { "lf.sub.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0, it_float }, - { "lf.mul.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0, it_float }, - { "lf.div.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0, it_float }, - { "lf.itof.d", "rD,rA", "11 0x2 DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0, it_float }, - { "lf.ftoi.d", "rD,rA", "11 0x2 DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0, it_float }, - { "lf.rem.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0, it_float }, - { "lf.madd.d", "rD,rA,rB", "11 0x2 DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0, it_float }, - { "lf.sfeq.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0, it_float }, - { "lf.sfne.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0, it_float }, - { "lf.sfgt.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0, it_float }, - { "lf.sfge.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0, it_float }, - { "lf.sflt.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0, it_float }, - { "lf.sfle.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0, it_float }, - { "lf.cust1.d", "rA,rB", "11 0x2 ----- AAAAA BBBB B--- 0xE ----", EFI, 0, it_float }, - - { "l.sd", "I(rD),rB", "11 0x4 IIIII DDDDD BBBB BIII IIII IIII", EFI, 0, it_store }, - { "l.sw", "I(rD),rB", "11 0x5 IIIII DDDDD BBBB BIII IIII IIII", EF(l_sw), 0, it_store }, - { "l.sb", "I(rD),rB", "11 0x6 IIIII DDDDD BBBB BIII IIII IIII", EF(l_sb), 0, it_store }, - { "l.sh", "I(rD),rB", "11 0x7 IIIII DDDDD BBBB BIII IIII IIII", EF(l_sh), 0, it_store }, - - { "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG, it_arith }, - { "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG, it_arith }, - { "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0, it_arith }, - { "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG, it_arith }, - { "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0, it_arith }, - { "l.xor", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x5", EF(l_xor), 0, it_arith }, - { "l.mul", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x6", EF(l_mul), 0, it_arith }, - - { "l.sll", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 00-- 0x8", EF(l_sll), 0, it_shift }, - { "l.srl", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 01-- 0x8", EF(l_srl), 0, it_shift }, - { "l.sra", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 10-- 0x8", EF(l_sra), 0, it_shift }, - { "l.ror", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 11-- 0x8", EFI, 0, it_shift }, - { "l.div", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0x9", EF(l_div), 0, it_arith }, - { "l.divu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xA", EF(l_divu), 0, it_arith }, - { "l.mulu", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-11 ---- 0xB", EFI, 0, it_arith }, - { "l.extbs", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 01-- 0xC", EF(l_extbs), 0, it_move }, - { "l.exths", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 00-- 0xC", EF(l_exths), 0, it_move }, - { "l.extws", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 00-- 0xD", EF(l_extws), 0, it_move }, - { "l.extbz", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 11-- 0xC", EF(l_extbz), 0, it_move }, - { "l.exthz", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 10-- 0xC", EF(l_exthz), 0, it_move }, - { "l.extwz", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 01-- 0xD", EF(l_extwz), 0, it_move }, - { "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", EF(l_cmov), OR32_R_FLAG, it_move }, - { "l.ff1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 ---- 0xF", EF(l_ff1), 0, it_arith }, - { "l.fl1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --01 ---- 0xF", EFI, 0, it_arith }, - - { "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", EF(l_sfeq), OR32_W_FLAG, it_compare }, - { "l.sfne", "rA,rB", "11 0x9 00001 AAAAA BBBB B--- ---- ----", EF(l_sfne), OR32_W_FLAG, it_compare }, - { "l.sfgtu", "rA,rB", "11 0x9 00010 AAAAA BBBB B--- ---- ----", EF(l_sfgtu), OR32_W_FLAG, it_compare }, - { "l.sfgeu", "rA,rB", "11 0x9 00011 AAAAA BBBB B--- ---- ----", EF(l_sfgeu), OR32_W_FLAG, it_compare }, - { "l.sfltu", "rA,rB", "11 0x9 00100 AAAAA BBBB B--- ---- ----", EF(l_sfltu), OR32_W_FLAG, it_compare }, - { "l.sfleu", "rA,rB", "11 0x9 00101 AAAAA BBBB B--- ---- ----", EF(l_sfleu), OR32_W_FLAG, it_compare }, - { "l.sfgts", "rA,rB", "11 0x9 01010 AAAAA BBBB B--- ---- ----", EF(l_sfgts), OR32_W_FLAG, it_compare }, - { "l.sfges", "rA,rB", "11 0x9 01011 AAAAA BBBB B--- ---- ----", EF(l_sfges), OR32_W_FLAG, it_compare }, - { "l.sflts", "rA,rB", "11 0x9 01100 AAAAA BBBB B--- ---- ----", EF(l_sflts), OR32_W_FLAG, it_compare }, - { "l.sfles", "rA,rB", "11 0x9 01101 AAAAA BBBB B--- ---- ----", EF(l_sfles), OR32_W_FLAG, it_compare }, - - { "l.cust5", "rD,rA,rB,L,K","11 0xC DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI, 0, it_unknown }, - { "l.cust6", "", "11 0xD ----- ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust7", "", "11 0xE ----- ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust8", "", "11 0xF ----- ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - - /* This section should not be defined in or1ksim, since it contains duplicates, - which would cause machine builder to complain. */ -#ifdef HAS_CUST - { "l.cust5_1", "rD", "11 0xC DDDDD ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust5_2", "rD,rA" , "11 0xC DDDDD AAAAA ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust5_3", "rD,rA,rB", "11 0xC DDDDD AAAAA BBBB B--- ---- ----", EFI, 0, it_unknown }, - - { "l.cust6_1", "rD", "11 0xD DDDDD ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust6_2", "rD,rA" , "11 0xD DDDDD AAAAA ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust6_3", "rD,rA,rB", "11 0xD DDDDD AAAAA BBBB B--- ---- ----", EFI, 0, it_unknown }, - - { "l.cust7_1", "rD", "11 0xE DDDDD ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust7_2", "rD,rA" , "11 0xE DDDDD AAAAA ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust7_3", "rD,rA,rB", "11 0xE DDDDD AAAAA BBBB B--- ---- ----", EFI, 0, it_unknown }, - - { "l.cust8_1", "rD", "11 0xF DDDDD ----- ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust8_2", "rD,rA" , "11 0xF DDDDD AAAAA ---- ---- ---- ----", EFI, 0, it_unknown }, - { "l.cust8_3", "rD,rA,rB", "11 0xF DDDDD AAAAA BBBB B--- ---- ----", EFI, 0, it_unknown }, -#endif - - /* Dummy entry, not included in num_opcodes. This - lets code examine entry i+1 without checking - if we've run off the end of the table. */ - { "", "", "", EFI, 0, 0 } -}; - -#undef EFI -#undef EFN -#undef EF - -/* Define dummy, if debug is not defined. */ -#ifndef HAS_DEBUG -#define debug(l, fmt...) ; -#endif - -const unsigned int or32_num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1; - -/* Calculates instruction length in bytes. Always 4 for OR32. */ - -int -insn_len (int insn_index ATTRIBUTE_UNUSED) -{ - insn_index = 0; /* Just to get rid that warning. */ - return 4; -} - -/* Is individual insn's operand signed or unsigned? */ - -int -letter_signed (char l) -{ - const struct or32_letter *pletter; - - for (pletter = or32_letters; pletter->letter != '\0'; pletter++) - if (pletter->letter == l) - return pletter->sign; - - printf ("letter_signed(%c): Unknown letter.\n", l); - return 0; -} - -/* Simple cache for letter ranges */ -static int range_cache[256] = {0}; - -/* Number of letters in the individual lettered operand. */ -int -letter_range (char l) -{ - const struct or32_opcode *pinsn; - char *enc; - int range = 0; - - /* Is value cached? */ - if ((range = range_cache[(unsigned char)l])) return range; - - for (pinsn = or32_opcodes; strlen (pinsn->name); pinsn ++) - { - if (strchr (pinsn->encoding,l)) - { - for (enc = pinsn->encoding; *enc != '\0'; enc ++) - if ((*enc == '0') && (*(enc + 1) == 'x')) - enc += 2; - else if (*enc == l) - range++; - return range_cache[(unsigned char)l] = range; - } - } - - printf ("\nABORT: letter_range(%c): Never used letter.\n", l); - exit (1); -} - -/* MM: Returns index of given instruction name. */ - -int -insn_index (char *insn) -{ - unsigned int i; - int found = -1; - - for (i = 0; i < or32_num_opcodes; i++) - if (!strcmp (or32_opcodes[i].name, insn)) - { - found = i; - break; - } - return found; -} - -const char * -insn_name (int index) -{ - if (index >= 0 && index < (int) or32_num_opcodes) - return or32_opcodes[index].name; - else - return "???"; -} - -#if defined(HAS_EXECUTION) && SIMPLE_EXECUTION -void -l_none(struct iqueue_entry *current) -{ -} -#elif defined(HAS_EXECUTION) && DYNAMIC_EXECUTION -void -l_none(struct op_queue *opq, int *param_t, orreg_t *param, int delay_slot) -{ -} -#else -void -l_none (void) -{ -} -#endif - -/* Finite automata for instruction decoding building code. */ - -/* Find simbols in encoding. */ - -unsigned long -insn_extract (char param_ch, char *enc_initial) -{ - char *enc; - unsigned long ret = 0; - unsigned opc_pos = 32; - - for (enc = enc_initial; *enc != '\0'; ) - if ((*enc == '0') && (*(enc + 1) == 'x')) - { - unsigned long tmp = strtol (enc+2, NULL, 16); - - opc_pos -= 4; - if (param_ch == '0' || param_ch == '1') - { - if (param_ch == '0') - tmp = 15 - tmp; - ret |= tmp << opc_pos; - } - enc += 3; - } - else - { - //if (*enc == '0' || *enc == '1' || *enc == '-' || ISALPHA (*enc)) - if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha (*enc)) - { - opc_pos--; - if (param_ch == *enc) - ret |= 1 << opc_pos; - } - enc++; - } - return ret; -} - -#define MAX_AUTOMATA_SIZE 1200 -#define MAX_OP_TABLE_SIZE 1200 -#define MAX_LEN 8 - -#ifndef MIN -#define MIN(x, y) ((x) < (y) ? (x) : (y)) -#endif - -unsigned long *automata; -int nuncovered; -int curpass = 0; - -/* MM: Struct that hold runtime build information about instructions. */ -struct temp_insn_struct *ti; - -struct insn_op_struct *op_data, **op_start; - -/* Recursive utility function used to find best match and to build automata. */ - -static unsigned long * -cover_insn (unsigned long * cur, int pass, unsigned int mask) -{ - int best_first = 0, last_match = -1, ninstr = 0; - unsigned int best_len = 0; - unsigned int i; - unsigned long cur_mask = mask; - unsigned long *next; - - for (i = 0; i < or32_num_opcodes; i++) - if (ti[i].in_pass == pass) - { - cur_mask &= ti[i].insn_mask; - ninstr++; - last_match = i; - } - - debug (8, "%08X %08lX\n", mask, cur_mask); - - if (ninstr == 0) - return 0; - - if (ninstr == 1) - { - /* Leaf holds instruction index. */ - debug (8, "%li>I%i %s\n", - (long)(cur - automata), last_match, or32_opcodes[last_match].name); - - *cur = LEAF_FLAG | last_match; - cur++; - nuncovered--; - } - else - { - /* Find longest match. */ - for (i = 0; i < 32; i++) - { - unsigned int len; - - for (len = best_len + 1; len < MIN (MAX_LEN, 33 - i); len++) - { - unsigned long m = (1UL << ((unsigned long) len)) - 1; - - debug (9, " (%i(%08lX & %08lX>>%i = %08lX, %08lX)", - len,m, cur_mask, i, (cur_mask >> (unsigned)i), - (cur_mask >> (unsigned) i) & m); - - if ((m & (cur_mask >> (unsigned) i)) == m) - { - best_len = len; - best_first = i; - debug (9, "!"); - } - else - break; - } - } - - debug (9, "\n"); - - if (!best_len) - { - fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask); - - for (i = 0; i < or32_num_opcodes; i++) - if (ti[i].in_pass == pass) - fprintf (stderr, "%s ", or32_opcodes[i].name); - - fprintf (stderr, "\n"); - exit (1); - } - - debug (8, "%li> #### %i << %i (%i) ####\n", - (long)(cur - automata), best_len, best_first, ninstr); - - *cur = best_first; - cur++; - *cur = (1 << best_len) - 1; - cur++; - next = cur; - - /* Allocate space for pointers. */ - cur += 1 << best_len; - cur_mask = (1 << (unsigned long) best_len) - 1; - - for (i = 0; i < ((unsigned) 1 << best_len); i++) - { - unsigned int j; - unsigned long *c; - - curpass++; - for (j = 0; j < or32_num_opcodes; j++) - if (ti[j].in_pass == pass - && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i - && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask) - ti[j].in_pass = curpass; - - debug (9, "%08X %08lX %i\n", mask, cur_mask, best_first); - c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first))); - if (c) - { - debug (8, "%li> #%X -> %lu\n", (long)(next - automata), i, (long)(cur - automata)); - *next = cur - automata; - cur = c; - } - else - { - debug (8, "%li> N/A\n", (long)(next - automata)); - *next = 0; - } - next++; - } - } - return cur; -} - -/* Returns number of nonzero bits. */ - -static int -num_ones (unsigned long value) -{ - int c = 0; - - while (value) - { - if (value & 1) - c++; - value >>= 1; - } - return c; -} - -/* Utility function, which converts parameters from or32_opcode - format to more binary form. Parameters are stored in ti struct. */ - -static struct insn_op_struct * -parse_params (const struct or32_opcode * opcode, - struct insn_op_struct * cur) -{ - char *args = opcode->args; - int i, type; - int num_cur_op = 0; - - i = 0; - type = 0; - /* In case we don't have any parameters, we add dummy read from r0. */ - - if (!(*args)) - { - cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST; - cur->data = 0; - debug (9, "#%08lX %08lX\n", cur->type, cur->data); - cur++; - return cur; - } - - while (*args != '\0') - { - if (*args == 'r') - { - args++; - type |= OPTYPE_REG; - if (*args == 'D') - type |= OPTYPE_DST; - } - //else if (ISALPHA (*args)) - else if (isalpha (*args)) - { - unsigned long arg; - - arg = insn_extract (*args, opcode->encoding); - debug (9, "%s : %08lX ------\n", opcode->name, arg); - if (letter_signed (*args)) - { - type |= OPTYPE_SIG; - type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT; - } - - num_cur_op = 0; - /* Split argument to sequences of consecutive ones. */ - while (arg) - { - int shr = 0; - unsigned long tmp = arg, mask = 0; - - while ((tmp & 1) == 0) - { - shr++; - tmp >>= 1; - } - while (tmp & 1) - { - mask++; - tmp >>= 1; - } - cur->type = type | shr; - cur->data = mask; - arg &= ~(((1 << mask) - 1) << shr); - debug (6, "|%08lX %08lX\n", cur->type, cur->data); - cur++; - num_cur_op++; - } - args++; - } - else if (*args == '(') - { - /* Next param is displacement. - Later we will treat them as one operand. */ - /* Set the OPTYPE_DIS flag on all insn_op_structs that belong to this - * operand */ - while(num_cur_op > 0) { - cur[-num_cur_op].type |= type | OPTYPE_DIS; - num_cur_op--; - } - cur[-1].type |= OPTYPE_OP; - debug(9, ">%08X %08X\n", cur->type, cur->data); - type = 0; - i++; - args++; - } - else if (*args == OPERAND_DELIM) - { - cur--; - cur->type = type | cur->type | OPTYPE_OP; - debug (9, ">%08lX %08lX\n", cur->type, cur->data); - cur++; - type = 0; - i++; - args++; - } - else if (*args == '0') - { - cur->type = type; - cur->data = 0; - debug (9, ">%08lX %08lX\n", cur->type, cur->data); - cur++; - type = 0; - i++; - args++; - } - else if (*args == ')') - args++; - else - { - fprintf (stderr, "%s : parse error in args.\n", opcode->name); - exit (1); - } - } - - cur--; - cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST; - debug (9, "#%08lX %08lX\n", cur->type, cur->data); - cur++; - - return cur; -} - -/* Constructs new automata based on or32_opcodes array. */ - -void -build_automata (void) -{ - unsigned int i; - unsigned long *end; - struct insn_op_struct *cur; - - automata = malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long)); - ti = malloc (sizeof (struct temp_insn_struct) * or32_num_opcodes); - - nuncovered = or32_num_opcodes; - printf ("Building automata... "); - /* Build temporary information about instructions. */ - for (i = 0; i < or32_num_opcodes; i++) - { - unsigned long ones, zeros; - char *encoding = or32_opcodes[i].encoding; - - ones = insn_extract('1', encoding); - zeros = insn_extract('0', encoding); - - ti[i].insn_mask = ones | zeros; - ti[i].insn = ones; - ti[i].in_pass = curpass = 0; - - /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name, - or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/ - } - - /* Until all are covered search for best criteria to separate them. */ - end = cover_insn (automata, curpass, 0xFFFFFFFF); - - if (end - automata > MAX_AUTOMATA_SIZE) - { - fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE."); - exit (1); - } - - printf ("done, num uncovered: %i/%i.\n", nuncovered, or32_num_opcodes); - printf ("Parsing operands data... "); - - op_data = malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct)); - op_start = malloc (or32_num_opcodes * sizeof (struct insn_op_struct *)); - cur = op_data; - - for (i = 0; i < or32_num_opcodes; i++) - { - op_start[i] = cur; - cur = parse_params (&or32_opcodes[i], cur); - - if (cur - op_data > MAX_OP_TABLE_SIZE) - { - fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n"); - exit (1); - } - } - printf ("done.\n"); -} - -void -destruct_automata (void) -{ - free (ti); - free (automata); - free (op_data); - free (op_start); -} - -/* Decodes instruction and returns instruction index. */ - -int -insn_decode (unsigned int insn) -{ - unsigned long *a = automata; - int i; - - while (!(*a & LEAF_FLAG)) - { - unsigned int first = *a; - - debug (9, "%li ", (long)(a - automata)); - - a++; - i = (insn >> first) & *a; - a++; - if (!*(a + i)) - { - /* Invalid instruction found? */ - debug (9, "XXX\n"); - return -1; - } - a = automata + *(a + i); - } - - i = *a & ~LEAF_FLAG; - - debug (9, "%i\n", i); - - /* Final check - do we have direct match? - (based on or32_opcodes this should be the only possibility, - but in case of invalid/missing instruction we must perform a check) */ - if ((ti[i].insn_mask & insn) == ti[i].insn) - return i; - else - return -1; -} - -static char disassembled_str[50]; -char *disassembled = &disassembled_str[0]; - -/* Automagically does zero- or sign- extension and also finds correct - sign bit position if sign extension is correct extension. Which extension - is proper is figured out from letter description. */ - -unsigned long -extend_imm (unsigned long imm, char l) -{ - unsigned long mask; - int letter_bits; - - /* First truncate all bits above valid range for this letter - in case it is zero extend. */ - letter_bits = letter_range (l); - mask = (1 << letter_bits) - 1; - imm &= mask; - - /* Do sign extend if this is the right one. */ - if (letter_signed(l) && (imm >> (letter_bits - 1))) - imm |= (~mask); - - return imm; -} - -static unsigned long -or32_extract (char param_ch, char *enc_initial, unsigned long insn) -{ - char *enc; - unsigned long ret = 0; - int opc_pos = 0; - int param_pos = 0; - - for (enc = enc_initial; *enc != '\0'; enc++) - if (*enc == param_ch) - { - if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x')) - continue; - else - param_pos++; - } - -#if DEBUG - printf ("or32_extract: %x ", param_pos); -#endif - opc_pos = 32; - - for (enc = enc_initial; *enc != '\0'; ) - if ((*enc == '0') && (*(enc + 1) == 'x')) - { - opc_pos -= 4; - if ((param_ch == '0') || (param_ch == '1')) - { - unsigned long tmp = strtol (enc, NULL, 16); -#if DEBUG - printf (" enc=%s, tmp=%x ", enc, tmp); -#endif - if (param_ch == '0') - tmp = 15 - tmp; - ret |= tmp << opc_pos; - } - enc += 3; - } - else if ((*enc == '0') || (*enc == '1')) - { - opc_pos--; - if (param_ch == *enc) - ret |= 1 << opc_pos; - enc++; - } - else if (*enc == param_ch) - { - opc_pos--; - param_pos--; -#if DEBUG - printf ("\n ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos); -#endif - //if (ISLOWER (param_ch)) - if (islower (param_ch)) - ret -= ((insn >> opc_pos) & 0x1) << param_pos; - else - ret += ((insn >> opc_pos) & 0x1) << param_pos; - enc++; - } - //else if (ISALPHA (*enc)) - else if (isalpha (*enc)) - { - opc_pos--; - enc++; - } - else if (*enc == '-') - { - opc_pos--; - enc++; - } - else - enc++; - -#if DEBUG - printf ("ret=%x\n", ret); -#endif - return ret; -} - -/* Print register. Used only by print_insn. */ - -static char * -or32_print_register (char *dest, char param_ch, char *encoding, unsigned long insn) -{ - int regnum = or32_extract(param_ch, encoding, insn); - - sprintf (dest, "r%d", regnum); - while (*dest) dest++; - return dest; -} - -/* Print immediate. Used only by print_insn. */ - -static char * -or32_print_immediate (char *dest, char param_ch, char *encoding, unsigned long insn) -{ - int imm = or32_extract (param_ch, encoding, insn); - - imm = extend_imm (imm, param_ch); - - if (letter_signed (param_ch)) - { - if (imm < 0) - sprintf (dest, "%d", imm); - else - sprintf (dest, "0x%x", imm); - } - else - sprintf (dest, "%#x", imm); - while (*dest) dest++; - return dest; -} - -/* Disassemble one instruction from insn index. - Return the size of the instruction. */ - -int -disassemble_index (insn, index) - unsigned long insn; - int index; -{ - char *dest = disassembled; - - if (index >= 0) - { - struct or32_opcode const *opcode = &or32_opcodes[index]; - char *s; - - strcpy (dest, opcode->name); - while (*dest) dest++; - *dest++ = ' '; - *dest = 0; - - for (s = opcode->args; *s != '\0'; ++s) - { - switch (*s) - { - case '\0': - return insn_len (insn); - - case 'r': - dest = or32_print_register(dest, *++s, opcode->encoding, insn); - break; - - default: - if (strchr (opcode->encoding, *s)) - dest = or32_print_immediate (dest, *s, opcode->encoding, insn); - else { - *dest++ = *s; - *dest = 0; - } - } - } - } - else - { - /* This used to be %8x for binutils. */ - sprintf(dest, ".word 0x%08lx", insn); - while (*dest) dest++; - } - - return insn_len (insn); -} - -/* Disassemble one instruction from insn to disassemble. - Return the size of the instruction. */ - -int -disassemble_insn (unsigned long insn) -{ - return disassemble_index (insn, insn_decode (insn)); -} -

sw/utils/or32-idecode/or32-opc.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/symcat.h =================================================================== --- sw/utils/or32-idecode/symcat.h (revision 2) +++ sw/utils/or32-idecode/symcat.h (nonexistent) @@ -1,49 +0,0 @@ -/* Symbol concatenation utilities. - - Copyright (C) 1998, 2000 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -#ifndef SYM_CAT_H -#define SYM_CAT_H - -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define CONCAT2(a,b) a##b -#define CONCAT3(a,b,c) a##b##c -#define CONCAT4(a,b,c,d) a##b##c##d -#define STRINGX(s) #s -#else -/* Note one should never pass extra whitespace to the CONCATn macros, - e.g. CONCAT2(foo, bar) because traditonal C will keep the space between - the two labels instead of concatenating them. Instead, make sure to - write CONCAT2(foo,bar). */ -#define CONCAT2(a,b) a/**/b -#define CONCAT3(a,b,c) a/**/b/**/c -#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d -#define STRINGX(s) "s" -#endif - -#define XCONCAT2(a,b) CONCAT2(a,b) -#define XCONCAT3(a,b,c) CONCAT3(a,b,c) -#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d) - -/* Note the layer of indirection here is typically used to allow - stringification of the expansion of macros. I.e. "#define foo - bar", "XSTRING(foo)", to yield "bar". Be aware that this only - works for __STDC__, not for traditional C which will still resolve - to "foo". */ -#define XSTRING(s) STRINGX(s) - -#endif /* SYM_CAT_H */

sw/utils/or32-idecode/symcat.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/ansidecl.h =================================================================== --- sw/utils/or32-idecode/ansidecl.h (revision 2) +++ sw/utils/or32-idecode/ansidecl.h (nonexistent) @@ -1,393 +0,0 @@ -/* ANSI and traditional C compatability macros - Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001 - Free Software Foundation, Inc. - This file is part of the GNU C Library. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ - -/* ANSI and traditional C compatibility macros - - ANSI C is assumed if __STDC__ is #defined. - - Macro ANSI C definition Traditional C definition - ----- ---- - ---------- ----------- - ---------- - ANSI_PROTOTYPES 1 not defined - PTR `void *' `char *' - PTRCONST `void *const' `char *' - LONG_DOUBLE `long double' `double' - const not defined `' - volatile not defined `' - signed not defined `' - VA_START(ap, var) va_start(ap, var) va_start(ap) - - Note that it is safe to write "void foo();" indicating a function - with no return value, in all K+R compilers we have been able to test. - - For declaring functions with prototypes, we also provide these: - - PARAMS ((prototype)) - -- for functions which take a fixed number of arguments. Use this - when declaring the function. When defining the function, write a - K+R style argument list. For example: - - char *strcpy PARAMS ((char *dest, char *source)); - ... - char * - strcpy (dest, source) - char *dest; - char *source; - { ... } - - - VPARAMS ((prototype, ...)) - -- for functions which take a variable number of arguments. Use - PARAMS to declare the function, VPARAMS to define it. For example: - - int printf PARAMS ((const char *format, ...)); - ... - int - printf VPARAMS ((const char *format, ...)) - { - ... - } - - For writing functions which take variable numbers of arguments, we - also provide the VA_OPEN, VA_CLOSE, and VA_FIXEDARG macros. These - hide the differences between K+R and C89 more - thoroughly than the simple VA_START() macro mentioned above. - - VA_OPEN and VA_CLOSE are used *instead of* va_start and va_end. - Immediately after VA_OPEN, put a sequence of VA_FIXEDARG calls - corresponding to the list of fixed arguments. Then use va_arg - normally to get the variable arguments, or pass your va_list object - around. You do not declare the va_list yourself; VA_OPEN does it - for you. - - Here is a complete example: - - int - printf VPARAMS ((const char *format, ...)) - { - int result; - - VA_OPEN (ap, format); - VA_FIXEDARG (ap, const char *, format); - - result = vfprintf (stdout, format, ap); - VA_CLOSE (ap); - - return result; - } - - - You can declare variables either before or after the VA_OPEN, - VA_FIXEDARG sequence. Also, VA_OPEN and VA_CLOSE are the beginning - and end of a block. They must appear at the same nesting level, - and any variables declared after VA_OPEN go out of scope at - VA_CLOSE. Unfortunately, with a K+R compiler, that includes the - argument list. You can have multiple instances of VA_OPEN/VA_CLOSE - pairs in a single function in case you need to traverse the - argument list more than once. - - For ease of writing code which uses GCC extensions but needs to be - portable to other compilers, we provide the GCC_VERSION macro that - simplifies testing __GNUC__ and __GNUC_MINOR__ together, and various - wrappers around __attribute__. Also, __extension__ will be #defined - to nothing if it doesn't work. See below. - - This header also defines a lot of obsolete macros: - CONST, VOLATILE, SIGNED, PROTO, EXFUN, DEFUN, DEFUN_VOID, - AND, DOTS, NOARGS. Don't use them. */ - -#ifndef _ANSIDECL_H -#define _ANSIDECL_H 1 - -/* Every source file includes this file, - so they will all get the switch for lint. */ -/* LINTLIBRARY */ - -/* Using MACRO(x,y) in cpp #if conditionals does not work with some - older preprocessors. Thus we can't define something like this: - -#define HAVE_GCC_VERSION(MAJOR, MINOR) \ - (__GNUC__ > (MAJOR) || (__GNUC__ == (MAJOR) && __GNUC_MINOR__ >= (MINOR))) - -and then test "#if HAVE_GCC_VERSION(2,7)". - -So instead we use the macro below and test it against specific values. */ - -/* This macro simplifies testing whether we are using gcc, and if it - is of a particular minimum version. (Both major & minor numbers are - significant.) This macro will evaluate to 0 if we are not using - gcc at all. */ -#ifndef GCC_VERSION -#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__) -#endif /* GCC_VERSION */ - -#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(_WIN32) || (defined(__alpha) && defined(__cplusplus)) -/* All known AIX compilers implement these things (but don't always - define __STDC__). The RISC/OS MIPS compiler defines these things - in SVR4 mode, but does not define __STDC__. */ -/* eraxxon@alumni.rice.edu: The Compaq C++ compiler, unlike many other - C++ compilers, does not define __STDC__, though it acts as if this - was so. (Verified versions: 5.7, 6.2, 6.3, 6.5) */ - -#define ANSI_PROTOTYPES 1 -#define PTR void * -#define PTRCONST void *const -#define LONG_DOUBLE long double - -/* PARAMS is often defined elsewhere (e.g. by libintl.h), so wrap it in - a #ifndef. */ -#ifndef PARAMS -#define PARAMS(ARGS) ARGS -#endif - -#define VPARAMS(ARGS) ARGS -#define VA_START(VA_LIST, VAR) va_start(VA_LIST, VAR) - -/* variadic function helper macros */ -/* "struct Qdmy" swallows the semicolon after VA_OPEN/VA_FIXEDARG's - use without inhibiting further decls and without declaring an - actual variable. */ -#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP, VAR); { struct Qdmy -#define VA_CLOSE(AP) } va_end(AP); } -#define VA_FIXEDARG(AP, T, N) struct Qdmy - -#undef const -#undef volatile -#undef signed - -/* inline requires special treatment; it's in C99, and GCC >=2.7 supports - it too, but it's not in C89. */ -#undef inline -#if __STDC_VERSION__ > 199901L -/* it's a keyword */ -#else -# if GCC_VERSION >= 2007 -# define inline __inline__ /* __inline__ prevents -pedantic warnings */ -# else -# define inline /* nothing */ -# endif -#endif - -/* These are obsolete. Do not use. */ -#ifndef IN_GCC -#define CONST const -#define VOLATILE volatile -#define SIGNED signed - -#define PROTO(type, name, arglist) type name arglist -#define EXFUN(name, proto) name proto -#define DEFUN(name, arglist, args) name(args) -#define DEFUN_VOID(name) name(void) -#define AND , -#define DOTS , ... -#define NOARGS void -#endif /* ! IN_GCC */ - -#else /* Not ANSI C. */ - -#undef ANSI_PROTOTYPES -#define PTR char * -#define PTRCONST PTR -#define LONG_DOUBLE double - -#define PARAMS(args) () -#define VPARAMS(args) (va_alist) va_dcl -#define VA_START(va_list, var) va_start(va_list) - -#define VA_OPEN(AP, VAR) { va_list AP; va_start(AP); { struct Qdmy -#define VA_CLOSE(AP) } va_end(AP); } -#define VA_FIXEDARG(AP, TYPE, NAME) TYPE NAME = va_arg(AP, TYPE) - -/* some systems define these in header files for non-ansi mode */ -#undef const -#undef volatile -#undef signed -#undef inline -#define const -#define volatile -#define signed -#define inline - -#ifndef IN_GCC -#define CONST -#define VOLATILE -#define SIGNED - -#define PROTO(type, name, arglist) type name () -#define EXFUN(name, proto) name() -#define DEFUN(name, arglist, args) name arglist args; -#define DEFUN_VOID(name) name() -#define AND ; -#define DOTS -#define NOARGS -#endif /* ! IN_GCC */ - -#endif /* ANSI C. */ - -/* Define macros for some gcc attributes. This permits us to use the - macros freely, and know that they will come into play for the - version of gcc in which they are supported. */ - -#if (GCC_VERSION < 2007) -# define __attribute__(x) -#endif - -/* Attribute __malloc__ on functions was valid as of gcc 2.96. */ -#ifndef ATTRIBUTE_MALLOC -# if (GCC_VERSION >= 2096) -# define ATTRIBUTE_MALLOC __attribute__ ((__malloc__)) -# else -# define ATTRIBUTE_MALLOC -# endif /* GNUC >= 2.96 */ -#endif /* ATTRIBUTE_MALLOC */ - -/* Attributes on labels were valid as of gcc 2.93. */ -#ifndef ATTRIBUTE_UNUSED_LABEL -# if (!defined (__cplusplus) && GCC_VERSION >= 2093) -# define ATTRIBUTE_UNUSED_LABEL ATTRIBUTE_UNUSED -# else -# define ATTRIBUTE_UNUSED_LABEL -# endif /* !__cplusplus && GNUC >= 2.93 */ -#endif /* ATTRIBUTE_UNUSED_LABEL */ - -#ifndef ATTRIBUTE_UNUSED -#define ATTRIBUTE_UNUSED __attribute__ ((__unused__)) -#endif /* ATTRIBUTE_UNUSED */ - -/* Before GCC 3.4, the C++ frontend couldn't parse attributes placed after the - identifier name. */ -#if ! defined(__cplusplus) || (GCC_VERSION >= 3004) -# define ARG_UNUSED(NAME) NAME ATTRIBUTE_UNUSED -#else /* !__cplusplus || GNUC >= 3.4 */ -# define ARG_UNUSED(NAME) NAME -#endif /* !__cplusplus || GNUC >= 3.4 */ - -#ifndef ATTRIBUTE_NORETURN -#define ATTRIBUTE_NORETURN __attribute__ ((__noreturn__)) -#endif /* ATTRIBUTE_NORETURN */ - -/* Attribute `nonnull' was valid as of gcc 3.3. */ -#ifndef ATTRIBUTE_NONNULL -# if (GCC_VERSION >= 3003) -# define ATTRIBUTE_NONNULL(m) __attribute__ ((__nonnull__ (m))) -# else -# define ATTRIBUTE_NONNULL(m) -# endif /* GNUC >= 3.3 */ -#endif /* ATTRIBUTE_NONNULL */ - -/* Attribute `pure' was valid as of gcc 3.0. */ -#ifndef ATTRIBUTE_PURE -# if (GCC_VERSION >= 3000) -# define ATTRIBUTE_PURE __attribute__ ((__pure__)) -# else -# define ATTRIBUTE_PURE -# endif /* GNUC >= 3.0 */ -#endif /* ATTRIBUTE_PURE */ - -/* Use ATTRIBUTE_PRINTF when the format specifier must not be NULL. - This was the case for the `printf' format attribute by itself - before GCC 3.3, but as of 3.3 we need to add the `nonnull' - attribute to retain this behavior. */ -#ifndef ATTRIBUTE_PRINTF -#define ATTRIBUTE_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) ATTRIBUTE_NONNULL(m) -#define ATTRIBUTE_PRINTF_1 ATTRIBUTE_PRINTF(1, 2) -#define ATTRIBUTE_PRINTF_2 ATTRIBUTE_PRINTF(2, 3) -#define ATTRIBUTE_PRINTF_3 ATTRIBUTE_PRINTF(3, 4) -#define ATTRIBUTE_PRINTF_4 ATTRIBUTE_PRINTF(4, 5) -#define ATTRIBUTE_PRINTF_5 ATTRIBUTE_PRINTF(5, 6) -#endif /* ATTRIBUTE_PRINTF */ - -/* Use ATTRIBUTE_FPTR_PRINTF when the format attribute is to be set on - a function pointer. Format attributes were allowed on function - pointers as of gcc 3.1. */ -#ifndef ATTRIBUTE_FPTR_PRINTF -# if (GCC_VERSION >= 3001) -# define ATTRIBUTE_FPTR_PRINTF(m, n) ATTRIBUTE_PRINTF(m, n) -# else -# define ATTRIBUTE_FPTR_PRINTF(m, n) -# endif /* GNUC >= 3.1 */ -# define ATTRIBUTE_FPTR_PRINTF_1 ATTRIBUTE_FPTR_PRINTF(1, 2) -# define ATTRIBUTE_FPTR_PRINTF_2 ATTRIBUTE_FPTR_PRINTF(2, 3) -# define ATTRIBUTE_FPTR_PRINTF_3 ATTRIBUTE_FPTR_PRINTF(3, 4) -# define ATTRIBUTE_FPTR_PRINTF_4 ATTRIBUTE_FPTR_PRINTF(4, 5) -# define ATTRIBUTE_FPTR_PRINTF_5 ATTRIBUTE_FPTR_PRINTF(5, 6) -#endif /* ATTRIBUTE_FPTR_PRINTF */ - -/* Use ATTRIBUTE_NULL_PRINTF when the format specifier may be NULL. A - NULL format specifier was allowed as of gcc 3.3. */ -#ifndef ATTRIBUTE_NULL_PRINTF -# if (GCC_VERSION >= 3003) -# define ATTRIBUTE_NULL_PRINTF(m, n) __attribute__ ((__format__ (__printf__, m, n))) -# else -# define ATTRIBUTE_NULL_PRINTF(m, n) -# endif /* GNUC >= 3.3 */ -# define ATTRIBUTE_NULL_PRINTF_1 ATTRIBUTE_NULL_PRINTF(1, 2) -# define ATTRIBUTE_NULL_PRINTF_2 ATTRIBUTE_NULL_PRINTF(2, 3) -# define ATTRIBUTE_NULL_PRINTF_3 ATTRIBUTE_NULL_PRINTF(3, 4) -# define ATTRIBUTE_NULL_PRINTF_4 ATTRIBUTE_NULL_PRINTF(4, 5) -# define ATTRIBUTE_NULL_PRINTF_5 ATTRIBUTE_NULL_PRINTF(5, 6) -#endif /* ATTRIBUTE_NULL_PRINTF */ - -/* Attribute `sentinel' was valid as of gcc 3.5. */ -#ifndef ATTRIBUTE_SENTINEL -# if (GCC_VERSION >= 3005) -# define ATTRIBUTE_SENTINEL __attribute__ ((__sentinel__)) -# else -# define ATTRIBUTE_SENTINEL -# endif /* GNUC >= 3.5 */ -#endif /* ATTRIBUTE_SENTINEL */ - - -#ifndef ATTRIBUTE_ALIGNED_ALIGNOF -# if (GCC_VERSION >= 3000) -# define ATTRIBUTE_ALIGNED_ALIGNOF(m) __attribute__ ((__aligned__ (__alignof__ (m)))) -# else -# define ATTRIBUTE_ALIGNED_ALIGNOF(m) -# endif /* GNUC >= 3.0 */ -#endif /* ATTRIBUTE_ALIGNED_ALIGNOF */ - -/* Useful for structures whose layout must much some binary specification - regardless of the alignment and padding qualities of the compiler. */ -#ifndef ATTRIBUTE_PACKED -# define ATTRIBUTE_PACKED __attribute__ ((packed)) -#endif - -/* Attribute `hot' and `cold' was valid as of gcc 4.3. */ -#ifndef ATTRIBUTE_COLD -# if (GCC_VERSION >= 4003) -# define ATTRIBUTE_COLD __attribute__ ((__cold__)) -# else -# define ATTRIBUTE_COLD -# endif /* GNUC >= 4.3 */ -#endif /* ATTRIBUTE_COLD */ -#ifndef ATTRIBUTE_HOT -# if (GCC_VERSION >= 4003) -# define ATTRIBUTE_HOT __attribute__ ((__hot__)) -# else -# define ATTRIBUTE_HOT -# endif /* GNUC >= 4.3 */ -#endif /* ATTRIBUTE_HOT */ - -/* We use __extension__ in some places to suppress -pedantic warnings - about GCC extensions. This feature didn't work properly before - gcc 2.8. */ -#if GCC_VERSION < 2008 -#define __extension__ -#endif - -#endif /* ansidecl.h */

sw/utils/or32-idecode/ansidecl.h Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/or32-idecode/example_input =================================================================== --- sw/utils/or32-idecode/example_input (revision 2) +++ sw/utils/or32-idecode/example_input (nonexistent) @@ -1,32 +0,0 @@ -18000000 -A8200000 -1880B000 -A8A00520 -A8600001 -04000014 -D4041818 -04000012 -D4040000 -E0431804 -0400000F -9C210008 -0400000D -E1031804 -E4080000 -0FFFFFFB -D4081800 -04000008 -9C210004 -D4011800 -E4011000 -0FFFFFFC -A8C00100 -44003000 -D4040018 -D4042810 -84640010 -BC030520 -13FFFFFE -0x15000000 -0x44004800 -0x84640000

sw/utils/or32-idecode/example_input Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/bin2hex.c =================================================================== --- sw/utils/bin2hex.c (revision 2) +++ sw/utils/bin2hex.c (nonexistent) @@ -1,152 +0,0 @@ -/*$$HEADER*/ -/******************************************************************************/ -/* */ -/* H E A D E R I N F O R M A T I O N */ -/* */ -/******************************************************************************/ - -// Project Name : ORPSoC v2 -// File Name : bin2hex.c -// Prepared By : -// Project Start : - -/*$$COPYRIGHT NOTICE*/ -/******************************************************************************/ -/* */ -/* C O P Y R I G H T N O T I C E */ -/* */ -/******************************************************************************/ -/* - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; - version 2.1 of the License, a copy of which is available from - http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/*$$DESCRIPTION*/ -/******************************************************************************/ -/* */ -/* D E S C R I P T I O N */ -/* */ -/******************************************************************************/ -// -// Generates basic ASCII hex output to stdout from binary file input -// Compile and run the program with no options for usage. -// - -#include -#include -#include -/* Number of bytes before line is broken - For example if target flash is 8 bits wide, - define BREAK as 1. If it is 16 bits wide, - define it as 2 etc. -*/ -#define BREAK 1 - -int main(int argc, char **argv) -{ - - FILE *fd; - int c; - int i = 0; - int write_size_word=0; // Disabled by default - int filename_index=1; - int bytes_per_line=1; - int bytes_per_line_index=2; - unsigned int image_size; - - if(argc < 3) { - fprintf(stderr,"\n\tInsufficient options.\n"); - fprintf(stderr,"\tPlease specify, in this order: a binary file to\n"); - fprintf(stderr,"\tconvert and the number of bytes of data to putput\n"); - fprintf(stderr,"\tper line.\n"); - fprintf(stderr,"\tOptionally specify the option -size_word to output,\n"); - fprintf(stderr,"\tthe size of the image in the first 4 bytes. This is\n"); - fprintf(stderr,"\tused by some of the new OR1k bootloaders.\n\n"); - exit(1); - } - - if(argc == 4) - { - if (strcmp("-size_word", argv[3]) == 0) - // We will calculate the number of bytes first - write_size_word=1; - } - - fd = fopen( argv[filename_index], "r" ); - - bytes_per_line = atoi(argv[bytes_per_line_index]); - - if ((bytes_per_line == 0) || (bytes_per_line > 8)) - { - fprintf(stderr,"bytes per line incorrect or missing: %s\n",argv[bytes_per_line_index]); - exit(1); - } - - // Now subtract 1 from bytes_per_line - //if (bytes_per_line == 2) - // bytes_per_line--; - - if (fd == NULL) { - fprintf(stderr,"failed to open input file: %s\n",argv[1]); - exit(1); - } - - if (write_size_word) - { - // or1200 startup method of determining size of boot image we're copying by reading out - // the very first word in flash is used. Determine the length of this file - fseek(fd, 0, SEEK_END); - image_size = ftell(fd); - fseek(fd,0,SEEK_SET); - - // Now we should have the size of the file in bytes. Let's ensure it's a word multiple - image_size+=3; - image_size &= 0xfffffffc; - - // Sanity check on image size - if (image_size < 8){ - fprintf(stderr, "Bad binary image. Size too small\n"); - return 1; - } - - // Now write out the image size - i=0; - printf("%.2x",(image_size >> 24) & 0xff); - if(++i==bytes_per_line){ printf("\n"); i=0; } - printf("%.2x",(image_size >> 16) & 0xff); - if(++i==bytes_per_line){ printf("\n"); i=0; } - printf("%.2x",(image_size >> 8) & 0xff); - if(++i==bytes_per_line){ printf("\n"); i=0; } - printf("%.2x",(image_size) & 0xff); - if(++i==bytes_per_line){ printf("\n"); i=0; } - } - - // Fix for the current bootloader software! Skip the first 4 bytes of application data. Hopefully it's not important. 030509 -- jb - for(i=0;i<4;i++) - c=fgetc(fd); - - i=0; - - // Now write out the binary data to hex format - while ((c = fgetc(fd)) != EOF) { - printf("%.2x", (unsigned int) c); - if (++i == bytes_per_line) { - printf("\n"); - i = 0; - } - } - - return 0; -}

sw/utils/bin2hex.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/bin2vmem.c =================================================================== --- sw/utils/bin2vmem.c (revision 2) +++ sw/utils/bin2vmem.c (nonexistent) @@ -1,159 +0,0 @@ -/*$$HEADER*/ -/******************************************************************************/ -/* */ -/* H E A D E R I N F O R M A T I O N */ -/* */ -/******************************************************************************/ - -// Project Name : ORPSoC v2 -// File Name : bin2vmem.c -// Prepared By : jb, jb@orsoc.se -// Project Start : 2009-05-13 - -/*$$COPYRIGHT NOTICE*/ -/******************************************************************************/ -/* */ -/* C O P Y R I G H T N O T I C E */ -/* */ -/******************************************************************************/ -/* - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; - version 2.1 of the License, a copy of which is available from - http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/*$$DESCRIPTION*/ -/******************************************************************************/ -/* */ -/* D E S C R I P T I O N */ -/* */ -/******************************************************************************/ -// -// Generates VMEM output to stdout from binary images. -// Use with redirection like: ./bin2vmem app.bin > app.vmem -// To change either the number of bytes per word or word per line, change -// the following defines. -// Currently output is WORD addressed, NOT byte addressed -// eg: @00000000 00000000 00000000 00000000 00000000 -// @00000004 00000000 00000000 00000000 00000000 -// @00000008 00000000 00000000 00000000 00000000 -// @0000000c 00000000 00000000 00000000 00000000 -// etc.. -// - -#define WORDS_PER_LINE 4 -#define BYTES_PER_WORD 4 - -#include -#include -#include - -int main(int argc, char **argv) -{ - - FILE *fd; - int c; - int i = 0; - int write_size_word=0; // Disabled by default - int filename_index=1; - unsigned int image_size; - - // Counters keeping track of what we've printed - int current_addr = 0; - int word_counter = 0; - int byte_counter = 0; - - if(argc < 2) { - fprintf(stderr,"\n\tInsufficient options.\n"); - fprintf(stderr,"\tPlease specify a binary file to convert to VMEM\n"); - fprintf(stderr,"\n\tbin2vmem - creates vmem output to stdout from bin\n"); - exit(1); - } - - fd = fopen( argv[filename_index], "r" ); - - if (fd == NULL) { - fprintf(stderr,"failed to open input file: %s\n",argv[1]); - exit(1); - } - - fseek(fd, 0, SEEK_END); - image_size = ftell(fd); - fseek(fd,0,SEEK_SET); - - if (write_size_word) - { - // or1200 startup method of determining size of boot image we're copying by reading out - // the very first word in flash is used. Determine the length of this file - fseek(fd, 0, SEEK_END); - image_size = ftell(fd); - fseek(fd,0,SEEK_SET); - - // Now we should have the size of the file in bytes. Let's ensure it's a word multiple - image_size+=3; - image_size &= 0xfffffffc; - - // Sanity check on image size - if (image_size < 8){ - fprintf(stderr, "Bad binary image. Size too small\n"); - return 1; - } - - // Now write out the image size - printf("@%8x", current_addr); - printf("%8x", image_size); - current_addr += WORDS_PER_LINE * BYTES_PER_WORD; - } - else - { - } - - - // Fix for the current bootloader software! Skip the first 4 bytes of application data. Hopefully it's not important. 030509 -- jb - //for(i=0;i<4;i++) - // c=fgetc(fd); - i=0; - int starting_new_line = 1; - // Now write out the binary data to VMEM format: @ADDRESSS XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX - while ((c = fgetc(fd)) != EOF) { - if (starting_new_line) - { - // New line - print the current addr and then increment it - printf("@%.8x", current_addr); - //current_addr += WORDS_PER_LINE * BYTES_PER_WORD; - current_addr += WORDS_PER_LINE; - starting_new_line = 0; - } - if (byte_counter == 0) - printf(" "); - - printf("%.2x", (unsigned int) c); // now print the actual char - - byte_counter++; - - if (byte_counter == BYTES_PER_WORD) - { - word_counter++; - byte_counter=0; - } - if (word_counter == WORDS_PER_LINE) - { - printf("\n"); - word_counter = 0; - starting_new_line = 1; - } - } - - return 0; -}

sw/utils/bin2vmem.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/marksec =================================================================== --- sw/utils/marksec (revision 2) +++ sw/utils/marksec (nonexistent) @@ -1,8 +0,0 @@ -#!/bin/sh - -LINE_NB=`wc -l < $1` -MIN=`expr $LINE_NB - 1` - -echo "ffffffff" > $2 -tail -$MIN $1 >> $2 -

sw/utils/marksec Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/loader.c =================================================================== --- sw/utils/loader.c (revision 2) +++ sw/utils/loader.c (nonexistent) @@ -1,123 +0,0 @@ -/* Small utility that makes flash image. */ - -#include -#include -#include -#include -#include -#include -#include "../mad-xess/fsyst.h" - -unsigned int swap (unsigned int x) { - return (x & 0xFF) << 24 - | (x & 0xFF00) << 8 - | (x & 0xFF0000) >> 8 - | (x & 0xFF000000) >> 24; -} - -/* Copies data from fi to fo. Returns nonzero - if error. */ -int copy_into (FILE *fo, FILE *fi) -{ - char buf[8192]; - int bread; - do - { - bread = fread (&buf, 1, sizeof(buf), fi); - if (bread != fwrite (&buf, 1, bread, fo)) - return 1; - } while (bread == sizeof(buf)); - return 0; -} - -/* Writes file to fo and returns error. */ -int write_file (FILE *fo, struct file_struct *file) -{ - unsigned int u; - int ok = 0; - u = swap(file->length); - printf("%08x:%08x\n", file->length, u); - if (fwrite(&u, sizeof(unsigned long), 1, fo)) - ok = 1; - u = swap(file->type); - if (fwrite(&u, sizeof(unsigned long), 1, fo) && ok) - return 0; - fprintf (stderr, "Cannot write to file.\n"); - return 1; -} - -int main(int argc, char *argv[]) -{ - int i; - FILE *fo; - struct file_struct file; - - if (argc <= 1) - { - printf ("Usage: loader image_file.mfs [file.mp3 [...]]\n"); - return 1; - } - - if ((fo = fopen (argv[1], "wb+")) == NULL) - { - fprintf (stderr, "Cannot open output file '%s'\n", argv[1]); - return 2; - } - - file.type = FT_ROOT; - file.length = HEADER_SIZE; - if (write_file (fo, &file)) - return 3; - - for (i = 2; i < argc; i++) - { - FILE *fi = fopen (argv[i], "rb"); - struct stat fi_stat; - int align; - if (!fi) - { - fprintf (stderr, "Cannot open input file '%s'\n", argv[i]); - return 1; - } - stat (argv[i], &fi_stat); - printf ("Track %i: %s (size %i)\n", i - 1, argv[i], (int)fi_stat.st_size); - - file.type = FT_TRACK_NO; - file.length = HEADER_SIZE + sizeof (unsigned int); - file.data[0] = swap(i - 1); - if (write_file (fo, &file)) - return 3; - if (!fwrite (&file.data[0], sizeof (unsigned int), 1, fo)) - { - fprintf (stderr, "Cannot write to file.\n"); - return 3; - } - - file.type = FT_TRACK_NAME; - align = (4 - ((strlen (argv[i]) + 1) & 3)) & 3; - file.length = HEADER_SIZE + strlen (argv[i]) + 1 + align; - if (write_file (fo, &file)) - return 3; - if (!fwrite (argv[i], strlen (argv[i]) + 1 + align, 1, fo)) - { - fprintf (stderr, "Cannot write to file.\n"); - return 3; - } - - file.type = FT_TRACK_DATA; - align = (4 - (fi_stat.st_size & 3)) & 3; - file.length = HEADER_SIZE + fi_stat.st_size + align; - if (write_file (fo, &file)) - return 3; - copy_into(fo, fi); - fwrite (&align, 1, align, fo); - fclose (fi); - } - file.type = FT_END; - file.length = 0; - if (write_file (fo, &file)) - return 3; - printf ("Done.\n"); - fclose (fo); - return 0; -}

sw/utils/loader.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: sw/utils/bin2srec.c =================================================================== --- sw/utils/bin2srec.c (revision 2) +++ sw/utils/bin2srec.c (nonexistent) @@ -1,99 +0,0 @@ -/*$$HEADER*/ -/******************************************************************************/ -/* */ -/* H E A D E R I N F O R M A T I O N */ -/* */ -/******************************************************************************/ - -// Project Name : ORPSoC v2 -// File Name : bin2srec.c -// Prepared By : -// Project Start : - -/*$$COPYRIGHT NOTICE*/ -/******************************************************************************/ -/* */ -/* C O P Y R I G H T N O T I C E */ -/* */ -/******************************************************************************/ -/* - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; - version 2.1 of the License, a copy of which is available from - http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/*$$DESCRIPTION*/ -/******************************************************************************/ -/* */ -/* D E S C R I P T I O N */ -/* */ -/******************************************************************************/ -// -// Generates SREC file output to stdout from binary file -// - -#include -#include - -#define SMARK "S214" -#define SADDR 0x000000 -#define INIT_ADDR 0x100100 -#define SCHKSUM 0xff - -int main(int argc, char **argv) -{ - - FILE *fd; - int c, j; - unsigned long addr = INIT_ADDR; - unsigned char chksum; - - if(argc < 2) { - fprintf(stderr,"no input file specified\n"); - exit(1); - } - if(argc > 2) { - fprintf(stderr,"too many input files (more than one) specified\n"); - exit(1); - } - - fd = fopen( argv[1], "r" ); - if (fd == NULL) { - fprintf(stderr,"failed to open input file: %s\n",argv[1]); - exit(1); - } - - while (!feof(fd)) { - j = 0; - chksum = SCHKSUM; - printf("%s%.6lx", SMARK, addr); - while (j < 16) { - c = fgetc(fd); - if (c == EOF) { - c = 0; - } - printf("%.2x", c); - chksum -= c; - j++; - } - - chksum -= addr & 0xff; - chksum -= (addr >> 8) & 0xff; - chksum -= (addr >> 16) & 0xff; - chksum -= 0x14; - printf("%.2x\r\n", chksum); - addr += 16; - } - return 0; -}

sw/utils/bin2srec.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property