URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
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- This comparison shows the changes necessary to convert path
/minsoc/trunk
- from Rev 71 to Rev 70
- ↔ Reverse comparison
Rev 71 → Rev 70
/bench/verilog/minsoc_memory_model.v
51,7 → 51,6
// Created interface and tested |
// |
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`include "timescale.v" |
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module minsoc_memory_model ( |
wb_clk_i, wb_rst_i, |
/bench/verilog/minsoc_bench.v
2,8 → 2,6
`include "minsoc_defines.v" |
`include "or1200_defines.v" |
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`include "timescale.v" |
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module minsoc_bench(); |
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`ifdef POSITIVE_RESET |
/bench/verilog/vpi/dbg_comm_vpi.v
74,7 → 74,6
// |
// |
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`include "timescale.v" |
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`define JP_PORT "4567" |
`define TIMEOUT_COUNT 6'd20 // 1/2 of a TCK clock will be this many SYS_CLK ticks. Must be less than 6 bits. |