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Subversion Repositories mod_sim_exp

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Rev 57 → Rev 58

/newRAMstyle/bench/vhdl/mod_sim_exp_core_tb.vhd
557,7 → 557,7
core_fifo_push <= '1';
wait until rising_edge(clk);
assert (core_fifo_full='0' and core_fifo_nopush='0')
report "Fifo error, full or nopush" severity failure;
report "Fifo error, full or nopush" severity warning;
core_fifo_push <= '0';
wait until rising_edge(clk);
end loop;

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