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/branches/newRAMstyle/doc/src/tables.xlsx Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
branches/newRAMstyle/doc/src/tables.xlsx Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: branches/newRAMstyle/doc/src/plb_interface.tex =================================================================== --- branches/newRAMstyle/doc/src/plb_interface.tex (revision 67) +++ branches/newRAMstyle/doc/src/plb_interface.tex (nonexistent) @@ -1,328 +0,0 @@ -\chapter{PLB interface} -\section{Structure} -The Processor Local Bus interface for this core is structured as in Figure~\ref{PLBstructure}. The core acts as a slave -to the PLB bus. The PLB v4.6 Slave\cite{XilinxPLB} logic translates the interface to a lower level IP Interconnect -Interface (IPIC). -This is then used to connect the core internal components to. The user logic contains the exponentiation core and the -control register for the core its control inputs and outputs. An internal interrupt controller\cite{XilinxIntr} handles -the outgoing interrupt requests and a software reset module is provided to be able to reset the IP core at runtime. This -bus interface is created using the ``Create or Import Peripheral'' wizard from Xilinx Platform Studio.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=7cm]{pictures/plb_interface.pdf} -\caption{PLB IP core structure} -\label{PLBstructure} -\end{figure} - -\newpage -\section{Parameters} -This section describes the parameters used to configure the core, only the relevant parameters are discussed. PLB -specific parameters are left to the user to configure. The IP core specific parameters and their respective use are -listed in the table below. -\begin{center} - \begin{tabular}{|l|p{6.5cm}|c|l|} - \hline - \rowcolor{Gray} - \textbf{Name} & \textbf{Description} & \textbf{VHDL Type} &\textbf{Default Value} \bigstrut\\ - \hline - \multicolumn{4}{|l|}{\textit{\textbf{Memory configuration}}} \\ - \hline - \verb|C_BASEADDR| & base address for the IP core's memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_HIGHADDR| & high address for the IP core's memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_M_BASEADDR| & base address for the modulus memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_M_HIGHADDR| & high address for the modulus memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_OP0_BASEADDR| & base address for the operand 0 memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_OP0_HIGHADDR| & high address for the operand 0 memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_OP1_BASEADDR| & base address for the operand 1 memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_OP1_HIGHADDR| & high address for the operand 1 memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_OP2_BASEADDR| & base address for the operand 2 memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_OP2_HIGHADDR| & high address for the operand 2 memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_OP3_BASEADDR| & base address for the operand 3 memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_OP3_HIGHADDR| & high address for the operand 3 memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \verb|C_FIFO_BASEADDR| & base address for the FIFO memory space & std\_logic\_vector & X"FFFFFFFF" \bigstrut\\ - \hline - \verb|C_FIFO_HIGHADDR| & high address for the FIFO memory space & std\_logic\_vector & X"00000000" \bigstrut\\ - \hline - \multicolumn{4}{|l|}{\textit{\textbf{Multiplier configuration}}} \\ - \hline - \verb|C_NR_BITS_TOTAL| & total width of the multiplier in bits & integer & 1536\bigstrut\\ - \hline - \verb|C_NR_STAGES_TOTAL| & total number of stages in the pipeline & integer & 96\bigstrut\\ - \hline - \verb|C_NR_STAGES_LOW| & number of lower stages in the pipeline, defines the bit-width of the lower pipeline part & integer & 32 \bigstrut\\ - \hline - \verb|C_SPLIT_PIPELINE| & option to split the pipeline in 2 parts & boolean & true \bigstrut\\ - \hline - \end{tabular}% -\end{center} -%\newline - -The complete IP core's memory space can be controlled. As can be seen, the operand, modulus and FIFO memory space can be -chosen separately from the IP core's memory space which hold the registers for control, software reset and interrupt -control. The core's memory space must have a minimum width of 1K byte for all registers to be accessible. For the FIFO -memory space, a minimum width of 4 byte is needed, since the FIFO is only 32 bit wide. The memory space width for the -operands and the modulus need a minimum width equal to the total multiplier width.\\ - -There are 4 parameters to configure the multiplier. These values define the width of the multiplier operands and the -number of pipeline stages. If \verb|C_SPLIT_PIPELINE| is false, only operands with a width of\\\verb|C_NR_BITS_TOTAL| are -valid. Else if \verb|C_SPLIT_PIPELINE| is true, 3 operand widths can be supported: -\begin{itemize} - \item the length of the full pipeline ($C\_NR\_BITS\_TOTAL$) - \item the length of the lower pipeline ($\frac{C\_NR\_BITS\_TOTAL}{C\_NR\_STAGES\_TOTAL} \cdot C\_NR\_STAGES\_LOW $) - \item the length of the higher pipeline ($\frac{C\_NR\_BITS\_TOTAL}{C\_NR\_STAGES\_TOTAL} \cdot (C\_NR\_STAGES\_TOTAL - C\_NR\_STAGES\_LOW$) -\end{itemize} - -\section{IO ports} -\begin{tabular}{|l|c|c|l|} - \hline - \rowcolor{Gray} - \textbf{Port} & \textbf{Width} & \textbf{Direction} & \textbf{Description} \\ - \hline - \multicolumn{4}{|l|}{\textit{\textbf{PLB bus connections}}} \\ - \hline - \verb|SPLB_Clk| & 1 & in & see note 1 \\ - \hline - \verb|SPLB_Rst| & 1 & in & see note 1 \\ - \hline - \verb|PLB_ABus| & 32 & in & see note 1 \\ - \hline - \verb|PLB_PAValid| & 1 & in & see note 1 \\ - \hline - \verb|PLB_masterID| & 3 & in & see note 1 \\ - \hline - \verb|PLB_RNW| & 1 & in & see note 1 \\ - \hline - \verb|PLB_BE| & 4 & in & see note 1 \\ - \hline - \verb|PLB_size| & 4 & in & see note 1 \\ - \hline - \verb|PLB_type| & 3 & in & see note 1 \\ - \hline - \verb|PLB_wrDBus| & 32 & in & see note 1 \\ - \hline - \verb|Sl_addrAck| & 1 & out & see note 1 \\ - \hline - \verb|Sl_SSize| & 2 & out & see note 1 \\ - \hline - \verb|Sl_wait| & 1 & out & see note 1 \\ - \hline - \verb|Sl_rearbitrate| & 1 & out & see note 1 \\ - \hline - \verb|Sl_wrDack| & 1 & out & see note 1 \\ - \hline - \verb|Sl_wrComp| & 1 & out & see note 1 \\ - \hline - \verb|Sl_rdBus| & 32 & out & see note 1 \\ - \hline - \verb|Sl_MBusy| & 8 & out & see note 1 \\ - \hline - \verb|Sl_MWrErr| & 8 & out & see note 1 \\ - \hline - \verb|Sl_MRdErr| & 8 & out & see note 1 \\ - \hline - \multicolumn{4}{|l|}{\textit{\textbf{unused PLB signals}}} \\ - \hline - \verb|PLB_UABus| & 32 & in & see note 1 \\ - \hline - \verb|PLB_SAValid| & 1 & in & see note 1 \\ - \hline - \verb|PLB_rdPrim| & 1 & in & see note 1 \\ - \hline - \verb|PLB_wrPrim| & 1 & in & see note 1 \\ - \hline - \verb|PLB_abort| & 1 & in & see note 1 \\ - \hline - \verb|PLB_busLock| & 1 & in & see note 1 \\ - \hline - \verb|PLB_MSize| & 2 & in & see note 1 \\ - \hline - \verb|PLB_TAttribute| & 16 & in & see note 1 \\ - \hline - \verb|PLB_lockerr| & 1 & in & see note 1 \\ - \hline - \verb|PLB_wrBurst| & 1 & in & see note 1 \\ - \hline - \verb|PLB_rdBurst| & 1 & in & see note 1 \\ - \hline - \verb|PLB_wrPendReq| & 1 & in & see note 1 \\ - \hline - \verb|PLB_rdPendReq| & 1 & in & see note 1 \\ - \hline - \verb|PLB_rdPendPri| & 2 & in & see note 1 \\ - \hline - \verb|PLB_wrPendPri| & 2 & in & see note 1 \\ - \hline - \verb|PLB_reqPri| & 2 & in & see note 1 \\ - \hline - \verb|Sl_wrBTerm| & 1 & out & see note 1 \\ - \hline - \verb|Sl_rdWdAddr| & 4 & out & see note 1 \\ - \hline - \verb|Sl_rdBTerm| & 1 & out & see note 1 \\ - \hline - \verb|Sl_MIRQ| & 8 & out & see note 1 \\ - \hline - \multicolumn{4}{|l|}{\textit{\textbf{Core signals}}} \\ - \hline - \verb|IP2INTC_Irpt| & 1 & out & core interrupt signal \\ - \hline - \verb|calc_time| & 1 & out & is high when core is performing a multiplication, for monitoring \\ - \hline -\end{tabular}% -\newline \newline -\textbf{Note 1:} The function and timing of this signal is defined in the IBM\textsuperscript{\textregistered} 128-Bit Processor Local Bus Architecture Specification -Version 4.6. - -\section{Registers} -This section specifies the IP core internal registers as seen from the software. These registers allow to control and -configure the modular exponentiation core and to read out its state. All addresses given in this table are relative to the -IP core's base address.\\ -\newline -% Table generated by Excel2LaTeX -\begin{tabular}{|l|c|c|c|l|} -\hline -\rowcolor{Gray} -\textbf{Name} & \textbf{Width} & \textbf{Address} & \textbf{Access} & \textbf{Description} \bigstrut\\ -\hline -control register & 32 & 0x0000 & RW & multiplier core control signals and \bigstrut[t]\\ - & & & & interrupt flags register\bigstrut[b]\\ -\hline -software reset & 32 & 0x0100 & W & soft reset for the IP core \bigstrut\\ -\hline -\multicolumn{5}{|l|}{\textbf{\textit{Interrupt controller registers}}} \bigstrut\\ -\hline -global interrupt enable register & 32 & 0x021C & RW & global interrupt enable for the IP core \bigstrut[t]\\ -interrupt status register & 32 & 0x0220 & R & register for interrupt status flags\\ -interrupt enable register & 32 & 0x0228 & RW & register to enable individual IP core interrupts \bigstrut[b]\\ -\hline -\end{tabular}% - -\newpage -\subsection{Control register (offset = 0x0000)} -This registers holds the control inputs to the multiplier core and the interrupt flags.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/plb_control_reg.pdf} -\caption{control register} -\end{figure} - - -\begin{tabular}{ll} -bits 0-1 & P\_SEL : selects which pipeline part to be active\\ - & $\bullet$ "01" lower pipeline part\\ - & $\bullet$ "10" higher pipeline part\\ - & $\bullet$ "11" full pipeline\\ - & $\bullet$ "00" invalid selection\\ - &\\ -bits 2-3 & DEST\_OP : selects the operand (0-3) to store the result in for a single\\ - & Montgomery multiplication\footnotemark\\ - &\\ -bits 4-5 & X\_OP : selects the x operand (0-3) for a single Montgomery multiplication\footnotemark[\value{footnote}]\\ - &\\ -bits 6-7 & Y\_OP : selects the y operand (0-3) for a single Montgomery multiplication\footnotemark[\value{footnote}]\\ - &\\ -bit 8 & START : starts the multiplication/exponentiation\\ - &\\ -bit 9 & EXP/M : selects the operating mode\\ - & $\bullet$ "0" single Montgomery multiplications\\ - & $\bullet$ "1" simultaneous exponentiations\\ - &\\ -bits 10-15 & unimplemented\\ - &\\ -bit 16 & READY : ready flag, "1" when multiplication is done\\ - & must be cleared in software\\ - &\\ -bit 17 & MEM\_ERR : memory collision error flag, "1" when write error occurred\\ - & must be cleared in software\\ - &\\ -bit 18 & FIFO\_FULL : FIFO full error flag, "1" when FIFO is full\\ - & must be cleared in software\\ - &\\ -bit 19 & FIFO\_ERR : FIFO write/push error flag, "1" when push error occurred\\ - & must be cleared in software\\ - &\\ -bits 20-31 & unimplemented\\ - &\\ -\end{tabular} -\newline -\newline -\footnotetext{when the core is running in exponentiation mode, the parameters DEST\_OP, X\_OP and Y\_OP have no effect.} - -\newpage -\subsection{Software reset register (offset = 0x0100)} -This is a register with write only access, and provides the possibility to reset the IP core from software by writing -0x0000000A to this address. The reset affects the full IP core, thus resetting the control register, interrupt controller, -the multiplier pipeline, FIFO and control logic of the core. - -\subsection{Global interrupt enable register (offset = 0x021C)} -This register contains a single defined bit in the high-order position. The GIE bit enables or disables all interrupts -form the IP core.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/plb_gie_reg.pdf} -\caption{Global interrupt enable register} -\end{figure} - -\begin{tabular}{ll} -bit 0 & GIE : Global interrupt enable\\ - & $\bullet$ "0" disables all core interrupts\\ - & $\bullet$ "1" enables all core interrupts\\ - &\\ -bits 1-31 & unimplemented\\ - &\\ -\end{tabular} - -\subsection{Interrupt status register (offset = 0x0220)} -Read-only register that contains the status of the core interrupts. Currently there is only one common interrupt from -the core that is asserted when a multiplication/exponentiation is done, FIFO is full, on FIFO push error or memory write -collision.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/plb_is_reg.pdf} -\caption{Interrupt status register} -\end{figure} - -\begin{tabular}{ll} -bits 0-30 & unimplemented\\ - &\\ -bit 31 & CIS : Core interrupt status\\ - & is high when interrupt is requested from core\\ - &\\ -\end{tabular} - -\subsection{interrupt enable register (offset = 0x0228)} -This register contains the interrupt enable bits for the respective interrupt bits of the interrupt status register.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/plb_ie_reg.pdf} -\caption{Interrupt enable register} -\end{figure} -\begin{tabular}{ll} -bits 0-30 & unimplemented\\ - &\\ -bit 31 & CIE : Core interrupt enable\\ - & $\bullet$ "0" disable core interrupt\\ - & $\bullet$ "1" enable core interrupt\\ - &\\ -\end{tabular} - -\section{Interfacing the core's RAM} -Special attention must be taken when writing data to the operands and modulus. The least significant bit of the data has be on the lowest -address and the most significant bit on the highest address. A write to the RAM has to happen 1 word at a time, byte writes are not -supported due to the structure of the RAM. - -\section{Handling interrupts} -When the embedded processor receives an interrupt signal from this core, it is up to the controlling software to -determine the source of the interrupt by reading out the interrupt flag of the control register. \ No newline at end of file Index: branches/newRAMstyle/doc/src/Speedtest.xlsx =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: branches/newRAMstyle/doc/src/Speedtest.xlsx =================================================================== --- branches/newRAMstyle/doc/src/Speedtest.xlsx (revision 67) +++ branches/newRAMstyle/doc/src/Speedtest.xlsx (nonexistent)
branches/newRAMstyle/doc/src/Speedtest.xlsx Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: branches/newRAMstyle/doc/src/acknowl.tex =================================================================== --- branches/newRAMstyle/doc/src/acknowl.tex (revision 67) +++ branches/newRAMstyle/doc/src/acknowl.tex (nonexistent) @@ -1,30 +0,0 @@ -\chapter*{Acknowledgments} -\addcontentsline{toc}{chapter}{Acknowledgments} -This project is maintained by the DraMCo research group\footnote{\url{http://www.dramco.be/}} of KAHO Sint-Lieven\footnote{\url{http://www.kahosl.be/}}, part of the KU Leuven association\footnote{\url{http://associatie.kuleuven.be/}}. -The base design for this IP core is written by Geoffrey Ottoy, member of the DraMCo research group. Further adjustments have been made by Jonas De Craene - -%\addtocontents{toc}{Document Revision History} - -\chapter*{Document Revision History} -\addcontentsline{toc}{chapter}{Document Revision History} - -\section*{History} -\begin{tabular}{|l|c|l|p{10cm}|} - \hline - \rowcolor{Gray} - \textbf{Revision} & \textbf{Date} & \textbf{By} & \textbf{Description} \\ - \hline - 0 & November 2012 & JDC & First draft of this specification\\ - \hline - 1.0 & November 2012 & JDC & Added sections ``Acknowledgement'' and ``Performance and resource usage'' as well as different fonts for \textit{variables} and \verb|signal_names|\\ - \hline - 1.1 & November 2012 & GO & Added this ``Document Revision History''. Made several small changes in layout and formulation.\\ - \hline -\end{tabular}% - -\section*{Author info} - -\begin{itemize} -\item[GO:] Geoffrey Ottoy\\DraMCo research group\\\url{geoffrey.ottoy@kahosl.be} -\item[JDC:] Jonas De Craene\\KAHO Sint-Lieven\\\url{JonasDC@opencores.org} -\end{itemize} \ No newline at end of file Index: branches/newRAMstyle/doc/src/pictures/Speedtest.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: branches/newRAMstyle/doc/src/pictures/Speedtest.pdf =================================================================== --- branches/newRAMstyle/doc/src/pictures/Speedtest.pdf (revision 67) +++ branches/newRAMstyle/doc/src/pictures/Speedtest.pdf (nonexistent)
branches/newRAMstyle/doc/src/pictures/Speedtest.pdf Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: branches/newRAMstyle/doc/src/pictures/sys_stage.pdf =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: branches/newRAMstyle/doc/src/pictures/sys_stage.pdf =================================================================== --- branches/newRAMstyle/doc/src/pictures/sys_stage.pdf (revision 67) +++ branches/newRAMstyle/doc/src/pictures/sys_stage.pdf (nonexistent)
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branches/newRAMstyle/doc/src/pictures/sys_pipeline_notsplit.pdf Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: branches/newRAMstyle/doc/src/operation.tex =================================================================== --- branches/newRAMstyle/doc/src/operation.tex (revision 67) +++ branches/newRAMstyle/doc/src/operation.tex (nonexistent) @@ -1,122 +0,0 @@ -\chapter{Operation} - -\section{Pipeline operation} -The operation of the pipeline is shown in Figure~\ref{fig:pipeline_op}. One can see that the stages are started -every 2 clock cycles ($\tau_{c}$ is the core clock period). This is needed because the least significant bit of the next -stage result is needed. Every stage has to run $n$ (the width of the operands) times for the multiplication to be complete. - -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=7cm]{pictures/pipeline_operation.pdf} -\caption{Pipeline operation: Each circle represents an active stage. The number indicates how much times that stage - has run. Dotted line contours indicate the stage is inactive.} -\label{fig:pipeline_op} -\end{figure} - -For performing one Montgomery multiplication using this core, the total computation time $T_m$ for an $n$-bit operand -with a $k$-stage pipeline is given by~(\ref{eq:Tmult}). -\begin{align}\label{eq:Tmult} -T_{m} = \left[k + 2(n - 1)\right] \tau_c -\end{align} -\newpage -\section{Modular Simultaneous exponentiation operations} -Exponentiations are calculated with Algorithm~\ref{alg:mme} which uses the Montgomery multiplier as the main computation -step. It uses the principle of a square-and-multiply algorithm to calculate an exponentiation with 2 bases. -\begin{algorithm}[H] % enter the algorithm environment -\caption{Montgomery simultaneous exponentiation} % give the algorithm a caption -\label{alg:mme} % and a label for \ref{} commands later in the document -\algnewcommand\algorithmicdownto{\textbf{downto}} -\algrenewtext{For}[3]% -{\algorithmicfor\ #1 $\gets$ #2 \algorithmicdownto\ #3 \algorithmicdo} -\algnewcommand\algorithmicswitch{\textbf{switch}} -\algrenewtext{While}[2]% -{\algorithmicswitch\ #1, #2} -\algnewcommand\algorithmicinput{\textbf{Input:}} -\algnewcommand\Input{\item[\algorithmicinput]} -\algnewcommand\algorithmicoutput{\textbf{Output:}} -\algnewcommand\Output{\item[\algorithmicoutput]} -\footnotesize -\begin{algorithmic}[1] % enter the algorithmic environment -\Input $g_{0},\:g_{1},\:e_{0}=(e_{0_{t-1}} \cdots e_{0_{0}})_{2},\:e_{1}=(e_{0_{t-1}} \cdots e_{0_{0}})_{2},\:R^{2}\bmod m,\:m$ -\Output $g_{0}^{e_{0}} \cdot g_{1}^{e_{1}} \bmod m$ -\State $\tilde{g}_{0} := \text{Mont}(g_{0}, R^{2}),\:\tilde{g}_{1} := \text{Mont}(g_{1}, R^{2}),\:\tilde{g}_{01} := \text{Mont}(\tilde{g}_{0}, \tilde{g}_{1})$ -\State $a := \text{Mont}(R^{2}, 1)$ -\Comment This is the same as $a := R \bmod m$. -\For{$i$}{$(t-1)$}{0} -\State $a := \text{Mont}(a, a)$ -\While{$e_{1_{i}}$}{$e_{0_{i}}$} % use as switch statement -\State $0,\:1:\;a := \text{Mont}(a, \tilde{g}_{0})$ -\State $1,\:0:\;a := \text{Mont}(a, \tilde{g}_{1})$ -\State $1,\:1:\;a := \text{Mont}(a, \tilde{g}_{01})$ -\EndWhile -\EndFor -\State $a := \text{Mont}(a, 1)$ -\State \Return{$a$} -\end{algorithmic} -\end{algorithm} -It can be seen that the algorithm requires $R^{2}\bmod m$ which is $2^{2n}\bmod m$. We assume $R^2 \bmod m$ can be -provided or pre-computed. The for loop in the algorithm is executed by the control logic of the core. Apart from this, -a few pre- and one post-calculations have to be performed. - -The computation time for an exponentiation depends on the number of zero's in the exponents, from -Algorithm~\ref{alg:mme} one can see that if both exponent bits are zero at a time, no multiplication has to be -performed. Thus reducing the total time. The average computation time for a modular simultaneous exponentiation, with -$n$-bit base operands and $t$-bit exponents is given by~(\ref{eq:Tsime}). -\begin{align}\label{eq:Tsime} -T_{se} = \frac{7}{4} t \cdot T_{m} = \frac{7}{4}t \cdot [k + 2(n - 1)] \tau_c -\end{align} - -For single base exponentiations, i.e. 1 exponent is equal to zero, the average exponentiation time is given by~(\ref{eq:Texp}). -\begin{align}\label{eq:Texp} -T_{e} = \frac{3}{2} t \cdot T_{m} = \frac{3}{2}t \cdot [k + 2(n - 1)] \tau_c -\end{align} - -The formulas~(\ref{eq:Tsime}) and~(\ref{eq:Texp}) given here are only the theoretical average time for an exponentiation, -excluding the pre- and post-computations. - - -\section{Core operation steps} -The core can operate in 2 modes, multiplication or exponentiation mode. The steps required to do one of these actions -are described here. -\subsection{Single Montgomery multiplication} -The following steps are needed for a single Montgomery multiplication: -\begin{enumerate} - \item load the modulus to the RAM using the 32 bit bus - \item load the desired $x$ and $y$ operands into any 2 locations of the operand RAM using the 32 bit bus. - \item select the correct input operands for the multiplier using \verb|x_sel_single| and \verb|y_sel_single| - \item select the result destination operand using \verb|result_dest_op| - \item set \verb|exp/m| = `0' to select multiplication mode - \item set \verb|p_sel| to choose which pipeline part you will use - \item generate a start pulse for the core - \item wait until interrupt is received and read out result in selected operand -\end{enumerate} - -\textbf{Note:} this computation gives a result \( r = x \cdot y \cdot R^{-1} \bmod m\). If the actual product of $x$ and $y$ is -desired, a final Montgomery multiplication of the result with $R^{2}$ is needed. - -\subsection{Modular simultaneous exponentiation} -The core requires $\tilde{g}_{0}$, $\tilde{g}_{0}$, $\tilde{g}_{01}$ and $a$ to be loaded into the correct operand -spaces before starting the exponentiation. These parameters are calculated using single Montgomery multiplications as follows: -\begin{align*} - \tilde{g}_{0} &= Mont(g_{0}, R^{2}) &\,&= g_{0} \cdot R \bmod m & \hspace{3cm}\text{in operand 0}\hspace{4cm}\\ - \tilde{g}_{1} &= Mont(g_{1}, R^{2}) &\,&= g_{1} \cdot R \bmod m & \hspace{3cm}\text{in operand 1}\hspace{4cm}\\ - \tilde{g}_{01} &= Mont(\tilde{g}_{0}, \tilde{g}_{1}) &\,&= g_{0} \cdot g_{1} \cdot R \bmod m & \hspace{3cm}\text{in operand 2}\hspace{4cm}\\ - a &= Mont(R^{2}, 1) &\,&= R \bmod m &\hspace{3cm}\text{in operand 3}\hspace{4cm} -\end{align*} -When the exponentiation is done, a final multiplication has to be started by the software to multiply $a$ with 1. -The steps needed for a full simultaneous exponentiation are: - - -\begin{enumerate} - \item load the modulus to the RAM using the 32 bit bus - \item load the desired $g_0$, $g_1$ operands and \(R^{2} \bmod m\) into the operand RAM using the 32 bit bus. - \item set \verb|p_sel| to choose which pipeline part you will use - \item compute $\tilde{g}_{0}$ by using a single Montgomery multiplication of $g_{0}$ with $R^{2}$ and place the result $\tilde{g}_{0}$ in operand 0. - \item compute $\tilde{g}_{1}$ by using a single Montgomery multiplication of $g_{1}$ with $R^{2}$ and place the result $\tilde{g}_{1}$ in operand 1. - \item compute $\tilde{g}_{01}$ by using a single Montgomery multiplication of $\tilde{g}_{0}$ with $\tilde{g}_{1}$ and place the result $\tilde{g}_{01}$ in operand 2. - \item compute $a$ by using a single Montgomery multiplication of $R^{2}$ with $1$ and place the result $a$ in operand 3. - \item set the core in exponentiation mode ($exp/m$='1') - \item generate a start pulse for the core - \item wait until interrupt is received - \item perform the post-computation using a single Montgomery multiplication of $a$(in operand 3) with 1 and read out result -\end{enumerate} \ No newline at end of file Index: branches/newRAMstyle/doc/src/introduction.tex =================================================================== --- branches/newRAMstyle/doc/src/introduction.tex (revision 67) +++ branches/newRAMstyle/doc/src/introduction.tex (nonexistent) @@ -1,18 +0,0 @@ -\chapter{Introduction} -The Modular Simultaneous Exponentiation core is a flexible hardware design to support modular simultaneous exponentiations -in embedded systems. It is able to compute a double exponentiation as given by~(\ref{eq:mse}) -\begin{align}\label{eq:mse} -g_{0}^{e_0} \cdot g_{1}^{e_1} \bmod m -\end{align} -where: -\begin{align} - g_{0} &= \left(g_{0_{n-1}}, \cdots, g_{0_{1}}, g_{0_{0}}\right)_{2}\hspace{1.5cm} \text{with } n \text{ being the number of bits of the base operands}\nonumber \\ - g_{1} &= \left(g_{1_{n-1}}, \cdots, g_{1_{1}}, g_{1_{0}}\right)_{2}\nonumber \\ - m &=\left(m_{n-1}, \cdots, m_{1}, m_{0}\right)_{2}\nonumber \\ - e_{0} &=\left(e_{0_{t-1}}, \cdots, e_{0_{1}}, e_{0_{0}}\right)_{2}\hspace{1.5cm} \text{with } t \text{ being the number of bits of the exponents}\nonumber \\ - e_{1} &=\left(e_{1_{t-1}}, \cdots, e_{1_{1}}, e_{1_{0}}\right)_{2}\nonumber -\end{align} -This operation is commonly used in anonymous credential and authentication cryptosystems like DSA \footnote{FIPS-186-3, the third and current revision to the official DSA specification:\\\hspace*{1cm}\url{http://csrc.nist.gov/publications/fips/fips186-3/fips_186-3.pdf}}, Idemix \footnote{IBM Idemix project website: \url{https://www.zurich.ibm.com/security/idemix/}}, etc.. For this reason the core is designed with the use of large base operands in mind ($n$=512, 1024, 1536 bit and more..). The hardware is optimized for these -simultaneous exponentiations, but also supports single base exponentiations and single Montgomery multiplications. -Flexibility is offered to the user by providing the possibility to split the multiplier pipeline into 2 smaller parts, so that in total -3 different base operand lengths can be supported. The length of the exponents can be chosen freely\footnote{The controlling software is responsible for loading in the desired number of exponent bits into the core's exponent FIFO} \ No newline at end of file Index: branches/newRAMstyle/doc/src/performance.tex =================================================================== --- branches/newRAMstyle/doc/src/performance.tex (revision 67) +++ branches/newRAMstyle/doc/src/performance.tex (nonexistent) @@ -1,100 +0,0 @@ -\chapter{Performance and resource usage} - -This Modular Simultaneous Exponentiation IP core is designed to speed up modular simultaneous exponentiations on embedded systems. -On embedded processors, software implementations (even with specialized libraries like GMP\footnote{GNU Multiple Precision Arithmetic Library -- Project website: \url{http://gmplib.org/}}), demand much CPU time when large operands are used. -Practical tests of this core have shown a significant speed-up compared to software computations. For $n=1536$ and $t=1024$, hardware is about 70 times faster than a GMP-based implementation (with embedded linux) an a 100 MHz MicroBlaze processor (32-bit).\\ - -For the multiplier, execution time is given by~(\ref{eq:Tmult}), where $\tau_c$ is defined by the core operating -frequency. Since the maximum frequency is highly influenced by the latency in the critical path, we can expect to -achieve higher frequencies for shorter stage lengths. This trend is seen in Figure~\ref{fig:Virtex6exctime} for -different operand lengths, which are results used from the static timing analysis during synthesis. A minimum execution -time in this graph is found when the maximum operating frequency of the core first reaches the maximum frequency of the -FGPA in use. Beyond that point, using a smaller stage width has no positive effect anymore because the frequency can not -rise anymore and the number of clock cycles to complete a multiplication increases. Another remark that can be made is -that splitting the pipeline, has no considerable effect on the performance of the core. - -\begin{figure}[H] -\centering -\includegraphics[trim=2cm 2cm 2cm 2cm, width=16cm]{pictures/Virtex6_stagewidth.pdf} -\caption{Example of multiplication execution time in function of the stage width for a Virtex6 FPGA.} -\label{fig:Virtex6exctime} -\end{figure} - -In general, shorter stage lengths result in smaller execution times. However, using more stages implies that more -flip-flops will be needed, thus more resources are used. A balance must be found between a execution time and resources. -Currently, the core's operating frequency is the same as the bus frequency of the embedded processor. For optimal -operation of the core, the stage width must be chosen so that the maximum frequency given in synthesis is just above or -equal to the bus frequency. - -In the tables below resource usage and timing results are shown for different operand lengths and FPGA's. As a rule of thumb, the number of flip-flops is given by~(\ref{eq:ff}). -\begin{align}\label{eq:ff} -5+2\cdot n+6\cdot\frac{n}{s}+\lceil\log_{2}(n)\rceil+\lceil\log_{2}(\frac{n}{s})\rceil -\end{align} -where $s$ is the stage width. - -The number of LUTs is almost completely determined by $n$ and the number of LUT-inputs. A pre-synthesis estimate can be made with~(\ref{eq:lut4}) and~(\ref{eq:lut6}). -\begin{align} -8\cdot n \hspace{1cm}\text{for 4-input LUTs} \label{eq:lut4}\\ -6\cdot n \hspace{1cm}\text{for 6-input LUTs} \label{eq:lut6} -\end{align} -\newline - -Results for a Virtex 6 device xc6vlx240t-1ff1156, speedgrade -1\\ -Synthesis settings: Optimization: area, Effort: high\\ -% Table generated by Excel2LaTeX from sheet 'Virtex 6' -\begin{tabular}{rcccccccccccc} -\hline -\hline -$n$ & \multicolumn{3}{c}{512} & & \multicolumn{3}{c}{1024} & & \multicolumn{3}{c}{2048} & [bit] \bigstrut[t]\\ -$stage width$ & 64 & 16 & 4 & & 64 & 16 & 4 & & 64 & 16 & 4 & [bit] \bigstrut[b]\\ -\hline -$f_{max}$ & 64,91 & 199,96 & 395,57 & & 64,91 & 199,66 & 358,62 & & 94,91 & 199,96 & 358,62 & [MHz] \bigstrut[t]\\ -$T_m@f_{max}$ & 15,87 & 5,27 & 2,91 & & 31,77 & 10,55 & 9,63 & & 63,57 & 21,11 & 12,84 & [$\mu$s] \\ -$cycles$ & 1030 & 1054 & 1150 & & 2062 & 2110 & 3454 & & 4126 & 4222 & 4606 & [cycles] \\ -\textbf{Resources} & & & & & & & & & & & & \\ -Flipflops & 1089 & 1235 & 1813 & & 2163 & 2453 & 5401 & & 4309 & 4887 & 7193 & \\ -LUT's & 3094 & 3096 & 3102 & & 6169 & 6171 & 9252 & & 12315 & 12318 & 12324 & \bigstrut[b]\\ -\hline -\hline -\end{tabular}% -\vspace{1cm} -\newline -Results for a Spartan 3 device xc3s1000-5fg320, speedgrade -5\\ -Synthesis settings: Optimization: area, Effort: high\\ -% Table generated by Excel2LaTeX from sheet 'Spartan 3' -\begin{tabular}{rccccccccc} -\hline -\hline -$n$ & \multicolumn{3}{c}{256} & & \multicolumn{4}{c}{512} & [bit] \bigstrut[t]\\ -$stage width$ & 32 & 8 & 2 & & 64 & 32 & 8 & 2 & [bit] \bigstrut[b]\\ -\hline -$f_max$ & 21,49 & 69,30 & 127,32 & & 11,36 & 21,49 & 69,30 & 127,32 & [MHz] \bigstrut[t]\\ -$T_m@f_{max}$ & 24,1 & 7,82 & 5,01 & & 90,7 & 48,29 & 15,67 & 10,04 & [$\mu$s] \\ -$cycles$ & 518 & 542 & 638 & & 1030 & 1038 & 1086 & 1278 & [cycles] \\ -\textbf{Resources} & & & & & & & & & \\ -Flipflops & 576 & 722 & 1300 & & 1089 & 1138 & 1428 & 2582 & \\ -LUT's & 2072 & 2074 & 2079 & & 4124 & 4126 & 4128 & 4135 & \bigstrut[b]\\ -\hline -\hline -\end{tabular}% -\vspace{1cm} -\newline -Results for a Virtex 4 device xc4vlx200-11ff1513, speedgrade -11\\ -Synthesis settings: Optimization: area, Effort: high\\ -% Table generated by Excel2LaTeX from sheet 'Virtex 4' -\begin{tabular}{rcccccccccc} -\hline -\hline -$n$ & \multicolumn{4}{c}{512} & & \multicolumn{4}{c}{1024} & [bit] \bigstrut[t]\\ -$stage width$ & 64 & 32 & 8 & 2 & & 128 & 32 & 8 & 2 & [bit] \bigstrut[b]\\ -\hline -$f_{max}$ & 22,83 & 43,05 & 138,31 & 246,98 & & 11,77 & 43,05 & 138,31 & 246,98 & [MHz] \bigstrut[t]\\ -$T_m@f_{max}$ & 45,12 & 24,11 & 7,85 & 5,17 & & 87,5 & 24,5 & 8,31 & 6,21 & [$\mu$s] \\ -$cycles$ & 1030 & 1038 & 1086 & 1278 & & 1030 & 1054 & 1150 & 1534 & [cycles] \\ -\textbf{Resources} & & & & & & & & & & \\ -Flipflops & 1089 & 1138 & 1428 & 2582 & & 2114 & 2260 & 2838 & 5144 & \\ -LUT's & 4124 & 4126 & 4128 & 4135 & & 8225 & 8230 & 8234 & 8238 & \bigstrut[b]\\ -\hline -\hline -\end{tabular}% - Index: branches/newRAMstyle/doc/src/architecture.tex =================================================================== --- branches/newRAMstyle/doc/src/architecture.tex (revision 67) +++ branches/newRAMstyle/doc/src/architecture.tex (nonexistent) @@ -1,179 +0,0 @@ -\chapter{Architecture} - -\section{Block diagram} -The architecture for the full IP core is shown in the Figure~\ref{blockdiagram}. It consists of 2 major parts, the actual -exponentiation core (\verb|mod_sim_exp_core| entity) with a bus interface wrapped around it. In the following sections these -different blocks are described in detail.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=10cm]{pictures/block_diagram.pdf} -\caption{Block diagram of the Modular Simultaneous Exponentiation IP core} -\label{blockdiagram} -\end{figure} -\newpage - -\section{Exponentiation core} -The exponentiation core (\verb|mod_sim_exp_core| entity) is the top level of the modular simultaneous exponentiation -core. It is made up by 4 main blocks (Figure~\ref{msec_structure}):\\ - -\begin{itemize} - \item a pipelined Montgomery multiplier as the main processing unit - \item RAM to store the operands and the modulus - \item a FIFO to store the exponents - \item a control unit which controls the multiplier for the exponentiation and multiplication operations -\end{itemize} - -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=10cm]{pictures/mod_sim_exp_core.pdf} -\cprotect\caption{\verb|mod_sim_exp_core| structure} -\label{msec_structure} -\end{figure} - -\subsection{Multiplier} -The kernel of this design is a pipelined Montgomery multiplier. A Montgomery multiplication\cite{MontModMul} allows efficient implementation of a -modular multiplication without explicitly carrying out the classical modular reduction step. Right-shift operations ensure that the length of the (intermediate) results does not exceed $n+1$ bits. The result of a Montgomery multiplication is given by~(\ref{eq:mont}): -\begin{align}\label{eq:mont} -r = x \cdot y \cdot R^{-1} \bmod m \hspace{1.5cm}\text{with } R = 2^{n} -\end{align} -For the structure of the multiplier, the work of \textit{Nedjah and Mourelle}\cite{NedMour} is used as a basis. They show that for large operands ($>$512 bits) the $time\times area$ product is minimal when a systolic implementation is used. This construction is composed of cells that each compute a bit of the (intermediate) result. - -Because a fully unrolled two-dimensional systolic implementation would require too many resources, a systolic array (one-dimensional) implementation is chosen. This implies that the intermediate results are fed back to the same same array of cells through a register. A shift register will shift-in a bit of the $x$ operand for every step in the calculation (figure~\ref{mult_structure}). When multiplication is completed, a final check is made to ensure the result is smaller than the modulus. If not, a final reduction with $m$ is necessary. - -\textbf{Note:} For this implementation the modulus $m$ has to be uneven to obtain a correct result. However, we can assume that for cryptographic applications, this is the case. - - -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/mult_structure.pdf} -\caption{Multiplier structure. For clarification the $my$ adder and reduction logic are depicted separately, whereas in practice they are internal parts of the stages. (See Figure~\ref{stage_structure})} -\label{mult_structure} -\end{figure} - -\subsubsection{Stage and pipeline structure} -The Montgomery algorithm uses a series of additions and right shifts to obtain the desired result. The main disadvantage is the carry propagation in the adder, and therefore a pipelined version is used. The length of the operands ($n$) and the number of pipeline stages can be chosen before synthesis. The user has the option to split the pipeline into 2 smaller parts so there are 3 operand lengths available during runtime\footnote{e.g. a total pipeline length of 1536 bit split into a part of 512 bit and a part of 1024 bit}. - -The stages and first and last cell logic design are presented in Figure~\ref{stage_structure}. Each stage takes in a part of the modulus $m$ and $y$ operand and for each step of the multiplication, a bit of the $x$ operand is fed to the pipeline (together with the generated $q$ signal), starting with the Least Significant Bit. The systolic array cells need the modulus $m$, the operand $y$ and the sum $m+y$ as an input. The result from the cells is latched into a register, and then passed back to the systolic cells for the next bit of $x$. During this pass the right shift operation is -implemented. Each stage thus needs the least significant bit from the next stage to calculate the next step. Final reduction logic is also present in the stages for when the multiplication is complete. - -An example of the standard pipeline structure is presented in Figure~\ref{pipeline_structure}. It is constructed using stages with a predefined width. The first cell logic processes the first bit of the $m$ and $y$ operand and generates the $q$ signal. The last cell logic finishes the reduction and selects the correct result. For operation of this pipeline, it is clear that each stage can only compute a step every 2 clock cycles. This is because the stages rely on the result of the next stage. - -In Figure~\ref{pipeline_structure_split} an example pipeline design is drawn for a split pipeline. All multiplexers on -this figure are controlled by the pipeline select signal (\verb|p_sel|). During runtime the user can choose which part -of the pipeline is used, the lower or higher part or the full pipeline. - -\newpage -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=25cm, angle=90]{pictures/sys_stage.pdf} -\caption{Pipeline stage and first and last cell logic} -\label{stage_structure} -\end{figure} -\newpage - -\newpage -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=25cm, angle=90]{pictures/sys_pipeline_notsplit.pdf} -\caption{Example of the pipeline structure (3 stages)} -\label{pipeline_structure} -\end{figure} -\newpage - -\newpage -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=22cm, angle=90]{pictures/sys_pipeline.pdf} -\caption{Example of a split pipeline (1+2 stages)} -\label{pipeline_structure_split} -\end{figure} -\newpage - - -\subsection{Operand RAM and exponent FIFO} -In the core's RAM there is space for 4 operands and 1 modulus. Currently this is instantiated using Xilinx BRAM -primitives, so there is a fixed RAM of 4x1536 bit for the operands + 1536 bit for the modulus available. If using a split -pipeline, it is important that operands for the higher part of the pipeline are loaded into the RAM with preceding -zero's for the lower bits of the pipeline. To store the exponents there is a FIFO of 32 bit wide and 512 deep (also a -Xilinx primitive, FIFO18E1), so it is able to store 2 exponents of each 8192 bit long. Every 32 bit entry has to be -pushed in as 16 bit of $e_0$ for the lower part [15:0] and 16 bit of $e_1$ for the higher part [31:16]. Starting -with the least significant word and ending with the most significant word of the exponents. - -\subsection{Control unit} -The control unit loads in the operands and has full control over the multiplier. For single multiplications, it latches in -the $x$ operand, then places the $y$ operand on the bus and starts the multiplier. In case of an exponentiation, the FIFO is -emptied while the necessary single multiplications are performed. When the computation is done, the ready signal is -asserted to notify the system. - -\newpage -\subsection{IO ports and memory map} -The \verb|mod_sim_exp_core| IO ports\\ -\newline -% Table generated by Excel2LaTeX -\begin{tabular}{|l|c|c|p{8cm}|} -\hline -\rowcolor{Gray} -\textbf{Port} & \textbf{Width} & \textbf{Direction} & \textbf{Description} \bigstrut\\ -\hline -\verb|clk| & 1 & in & core clock input \bigstrut\\ -\hline -\verb|reset| & 1 & in & reset signal (active high) resets the pipeline, fifo and control logic \bigstrut\\ -\hline -\multicolumn{4}{|l|}{\textbf{\textit{operand memory interface}}} \bigstrut\\ -\hline -\verb|rw_address| & 9 & in & operand memory read/write address (structure descibed below) \bigstrut\\ -\hline -\verb|data_out| & 32 & out & operand data out (0 is lsb) \bigstrut\\ -\hline -\verb|data_in| & 32 & in & operand data in (0 is lsb) \bigstrut\\ -\hline -\verb|write_enable| & 1 & in & write enable signal, latches \verb|data_in| to operand RAM \bigstrut\\ -\hline -\verb|collision| & 1 & out & collision output, asserts on a write error \bigstrut\\ -\hline -\multicolumn{4}{|l|}{\textbf{\textit{exponent FIFO interface}}} \bigstrut\\ -\hline -\verb|fifo_din| & 32 & in & FIFO data in, bits [31:16] for $e_1$ operand and bits [15:0] for $e_0$ operand \bigstrut\\ -\hline -\verb|fifo_push| & 1 & in & push \verb|fifo_din| into the FIFO \bigstrut\\ -\hline -\verb|fifo_nopush| & 1 & out & flag to indicate if there was an error pushing the word to the FIFO \bigstrut\\ -\hline -\verb|fifo_full| & 1 & out & flag to indicate the FIFO is full \bigstrut\\ -\hline -\multicolumn{4}{|l|}{\textbf{\textit{control signals}}} \bigstrut\\ -\hline -\verb|x_sel_single| & 2 & in & selection for x operand source during single multiplication \bigstrut\\ -\hline -\verb|y_sel_single| & 2 & in & selection for y operand source during single multiplication \bigstrut\\ -\hline -\verb|dest_op_single| & 2 & in & selection for the result destination operand for single multiplication \bigstrut\\ -\hline -\verb|p_sel| & 2 & in & specifies which pipeline part to use for exponentiation / multiplication. \bigstrut[t]\\ - & & & ``01'' : use lower pipeline part \\ - & & & ``10'' : use higher pipeline part \\ - & & & ``11'' : use full pipeline \bigstrut[b]\\ -\hline -\verb|exp_m| & 1 & in & core operation mode. ``0'' for single multiplications and ``1'' for exponentiations \bigstrut\\ -\hline -\verb|start| & 1 & in & start the calculation for current mode \bigstrut\\ -\hline -\verb|ready| & 1 & out & indicates the multiplication/exponentiation is done \bigstrut\\ -\hline -\verb|calc_time| & 1 & out & is high during a multiplication, indicator for used calculation time \bigstrut\\ -\hline -\end{tabular}% -\newpage -The following figure describes the structure of the Operand RAM memory, for every operand there is a space of 2048 bits -reserved.\\ -\begin{figure}[H] -\centering -\includegraphics[trim=1.2cm 1.2cm 1.2cm 1.2cm, width=15cm]{pictures/msec_memory.pdf} -\caption{RAM structure of the exponentiation core} -\label{RAM_structure} -\end{figure} - -\section{Bus interface} -The bus interface implements the register necessary for the control unit inputs to the \verb|mod_sim_exp_core| entity. -It also maps the memory to the required bus and connects the interrupt signals. The embedded processor then has full control -over the core. \ No newline at end of file Index: branches/newRAMstyle/doc/src/mod_sim_exp_style.sty =================================================================== --- branches/newRAMstyle/doc/src/mod_sim_exp_style.sty (revision 67) +++ branches/newRAMstyle/doc/src/mod_sim_exp_style.sty (nonexistent) @@ -1,139 +0,0 @@ -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% This syntax file is intended for students of the % -% KaHo St. Lieven writing their master thesis. % -% We hope they can use it as a helping hand in writing % -% their thesis. % -% % -% This package will take care of the formatting of the % -% document. When all student used this syntax (or % -% another), we can come to an universal thesis format % -% which adds to the professionalism of our university % -% documents % -% % -% Syntax originally written by Filip Van Rysselberghe % -% Adapted for KaHo St. Lieven by Bart Blanckaert % -% minor correction: "Katholieke Hogeschool Sint-Lieven" % -% instead of "KaHo Sint-Lieven Hogeschool" necessary % -% for official publication, by Karel Van den Steen % -% % -% Modified by Koen Vangheluwe based on PhD stylefile of RUG % -% minor corrections by Jannes Verstichel and Tom Hamelinckx % -% Last modified: 17/05/2011 v0.92 % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\makeatletter - -% fancyheadings -\usepackage{fancyhdr} -\pagestyle{fancy} -\renewcommand{\chaptermark}[1]{\markboth{\thechapter\ #1}{}} -\renewcommand{\sectionmark}[1]{\markright{\thesection\ #1}} -\fancyhf{} -%\fancyhead[RE,LO]{\scriptsize\bfseries\sffamily\rightmark} -\fancyhead[LO,RE]{\scriptsize\bfseries\sffamily\leftmark} % hoofdstuk titel -\fancyhead[RO,LE]{\scriptsize\bfseries\sffamily\thetitle\space-- \version} % document naam -\fancyfoot[RO,LE]{\scriptsize\bfseries\sffamily\thepage} % pagina nummer -\fancyfoot[LO,RE]{\scriptsize\bfseries\sffamily\dramco} % dramco, kaho, kul -%\fancyfoot[C]{\scriptsize\bfseries\sffamily\thetitle -- \version} -\renewcommand{\headrulewidth}{.8pt} -\renewcommand{\footrulewidth}{.8pt} -\fancypagestyle{plain}{ - \fancyhf{} - \fancyfoot[RO,LE]{\scriptsize\bfseries\sffamily\thepage} - \fancyfoot[LO,RE]{\scriptsize\bfseries\sffamily\dramco} - \renewcommand{\headrulewidth}{0pt} - \renewcommand{\footrulewidth}{.8pt} -} - -% Koen Vangheluwe 29/05/2009: toegevoegd om "\headheight is too small" warning te voorkomen -\setlength{\headheight}{14pt} - -% Koen Vangheluwe 16/03/2010: toegevoegd wegens voor witte pagina's met empty style bij het gebruik van twoside en report -\def\cleardoublepage{\clearpage\if@twoside \ifodd\c@page\else - \hbox{} - \thispagestyle{empty} - \newpage - \if@twocolumn\hbox{}\newpage\fi\fi\fi} - - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% We'll head off with the definitions of the new commands % -% as promotor, copromotor, etc % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\def\promotorA[#1]#2{\gdef\@promotorAtype{#1}\gdef\@promotorAname{#2}} -\def\authorEmail#1{\gdef\@authorEmail{#1}} -\def\hwDesigner#1{\gdef\@hwDesigner{#1}} -\def\hwCoDesigner#1{\gdef\@hwCoDesigner{#1}} -\def\company#1{\gdef\@company{#1}} - -\newcommand{\footstar}[1]{$^*$ \footnotetext{$^*$#1}} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% Secondly we declare and fill in the newly created variables % -% Sometimes we use standard definitions as is the case for % -% the titles. % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\def\@title{} -\def\@author{} -\def\@authorEmail{} - -\def\@hwDesigner{} -\def\@hwCoDesigner{} -\def\@company{} - -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% This function formats the titlepage using the % -% variables set before. % -% Variables used: % -% - dept % -% - title % -% - author % -% - degree % -% % -% When one of those wasn't specified in the tex-file % -% you will end up with an incomplete and non uniform % -% titlepage % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\def\titlep{% - \thispagestyle{empty} - \includegraphics[width=8cm]{pictures/opencores.jpg} - \hfill - \vspace{7cm} - \begin{center} - \bf{\Huge\textsf{\@title}} - \end{center} - \vfill - \vspace{7cm} - \includegraphics[width=\textwidth]{pictures/logos.jpg} - \cleardoublepage -} - -% Indentation -\setlength{\parindent}{0pt} -%\setlength{\parskip}{1ex plus 0.5ex minus 0.25ex} -\setlength{\abovedisplayskip}{12pt plus 3pt} -\setlength{\belowdisplayskip}{12pt plus 3pt} -\setlength{\abovedisplayshortskip}{12pt plus 3pt} -\setlength{\belowdisplayshortskip}{12pt plus 3pt} - -%\parskip 1mm - -%%%%%%%%%%%%%%%%%%%%%%%%&&&&&&&&&&&%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% BeforePreface adds the titlepage and when you % -% turned on the acknowledgements page, it will be generated too % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\def\preface{ - - - \pagenumbering{roman} - \titlep - - \input{acknowl} - \tableofcontents - - \cleardoublepage - \pagenumbering{arabic} -} - -% Start with pagestyle{headings} in case front matter isn't processed -\pagenumbering{arabic} -\makeatother \ No newline at end of file Index: branches/newRAMstyle/doc/src/license.tex =================================================================== --- branches/newRAMstyle/doc/src/license.tex (revision 67) +++ branches/newRAMstyle/doc/src/license.tex (nonexistent) @@ -1,15 +0,0 @@ -\chapter*{License} -Copyright (C) 2011 DraMCo research group and OPENCORES.ORG \\This project may be used and distributed without restriction -provided that the copyright statement is not removed from the files and that any derivative work contains the original -copyright notice and the associated disclaimer.\\ - -This project is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public -License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later -version.\\ - -This project is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more -details.\\ - -You should have received a copy of the GNU Lesser General Public License along with this source; if not, download it -from http://www.opencores.org/lgpl.shtml \ No newline at end of file Index: branches/newRAMstyle/doc/src/mod_sim_exp.tex =================================================================== --- branches/newRAMstyle/doc/src/mod_sim_exp.tex (revision 67) +++ branches/newRAMstyle/doc/src/mod_sim_exp.tex (nonexistent) @@ -1,63 +0,0 @@ -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -% % -% LaTeX, Modular Simultaneous Exponentiation core documentation % -% % -%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -\documentclass[11pt,a4paper,twoside]{report} - -\usepackage[a4paper,left=2.5cm, right=2cm, top=2cm, bottom=2cm]{geometry} -\usepackage{graphicx} -\usepackage[latin1]{inputenc} -\usepackage{listings} % for showing source code -\usepackage{verbatim} -\usepackage{hyperref} -\usepackage{url} -\usepackage[small,bf,hang]{caption} -\usepackage{pslatex} -\usepackage{bigstrut} -\usepackage{color, colortbl} -\usepackage[bottom]{footmisc} % to place footnotes at the bottom - -\usepackage{algorithm} % for pseudocode -\usepackage{algorithmicx} -\usepackage[noend]{algpseudocode} -\usepackage[fleqn]{amsmath} - -\usepackage{cprotect} % for verb in caption - -\usepackage{sectsty} % adjust fonts from sections and captions -\allsectionsfont{\sffamily} -\chapterfont{\raggedright\sffamily} - -\usepackage{float} % ex. \begin{figure}[H] - -\newcommand{\tab}{\hspace*{2em}} -\newcommand{\version}{v1.1} -\newcommand{\dramco}{DraMCo research group -- KAHO Sint-Lieven\\Association KU Leuven} -\newcommand{\thetitle}{Modular Simultaneous Exponentiation\\IP Core Specification} - -\usepackage{mod_sim_exp_style} -\definecolor{Gray}{gray}{0.9} -\bibliographystyle{ieeetr} - -\title{\thetitle} -\author{Jonas De Craene} -\authorEmail{JonasDC@opencores.org} -\hwDesigner{Geoffrey Ottoy, DraMCo research group} -\hwCoDesigner{Jonas De Craene} -\company{DraMCo research group, \href{mailto:info@dramco.org}{info@dramco.org}} - -\begin{document} - -\preface -\raggedbottom -\input{introduction} -\input{architecture} -\input{operation} -\input{plb_interface} -\input{performance} - -\bibliography{cited} - -\input{license} -\end{document} Index: branches/newRAMstyle/doc/src/cited.bib =================================================================== --- branches/newRAMstyle/doc/src/cited.bib (revision 67) +++ branches/newRAMstyle/doc/src/cited.bib (nonexistent) @@ -1,31 +0,0 @@ -@article{MontModMul, - author = {Peter L. Montgomery }, - title = {Modular Multiplication Without Trail Division}, - year = {1985}, - journal = {Mathematics of Computation}, - volume = {44}, - number = {170}, - pages = {519-521} -} - -@article{NedMour, - author = {Nedjah N. de Macedo Mourelle L.}, - title = {Three Hardware Architectures for the Binary Modular Exponentiation: Sequential, Parallel, and Systolic}, - journal = {IEEE Transactions on Circuits and Systems - I: Regular Papers}, - volume = {53}, - number = {3}, - pages = {627-633}, - year = {2006} -} - -@misc{XilinxPLB, - author = {Xilinx}, - title = {PLBV46 SLAVE SINGLE (v1.01a) DS561}, - howpublished = {\url{http://www.xilinx.com/support/documentation/ip_documentation/plbv46_slave_single.pdf}} -} - -@misc{XilinxIntr, - author = {Xilinx}, - title = {Interrupt Control (v2.01a) DS516}, - howpublished = {\url{http://www.xilinx.com/support/documentation/ip_documentation/interrupt_control.pdf}} -} Index: branches/newRAMstyle/sim/mod_sim_exp.do =================================================================== --- branches/newRAMstyle/sim/mod_sim_exp.do (revision 67) +++ branches/newRAMstyle/sim/mod_sim_exp.do (nonexistent) @@ -1,2 +0,0 @@ -nolog -all -run -all \ No newline at end of file Index: branches/newRAMstyle/sim/out =================================================================== --- branches/newRAMstyle/sim/out (revision 67) +++ branches/newRAMstyle/sim/out (nonexistent)
branches/newRAMstyle/sim/out Property changes : Deleted: svn:ignore ## -1 +0,0 ## -sim_output.txt Index: branches/newRAMstyle/sim/src/sim_input.txt =================================================================== --- branches/newRAMstyle/sim/src/sim_input.txt (revision 67) +++ branches/newRAMstyle/sim/src/sim_input.txt (nonexistent) @@ -1,86 +0,0 @@ --- input generator program --- generates test values per bit input pair --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -512 -128 -24975b1d37a43bd7f7dfd3273f5ec1a26fcc9d7df3c448f4c9ff6408bc35a26f6897875b2213ac6a6ccfc061ce46d6df12ec86f376377b51c9b4feccafbb8f3d -d81ddf249fc542fecf52269df27e64bf995a026b71ff631d3dfa8c84a14ebef82079ff92946188eba0c2a04b54c1f324c073081f38380719ab64359dddcb8266 -f42b1776c84acd0e9983b2ede9391126 -b9671c7bbce53881ac1112b0b83be497 -f628fd05af868a7d066aed834cdb9d9e3a3a5b60ded9799b40fa0edbbcc80b1808182f5eaeb77735213231178f3637cea7b9b0b7da170b8903bb7f28f0e8393d -40dc9d887efb51275cd5a25c7921d9a9d176ecc55506b71db0e0dc7b92433274d6f6c29301ac0bf68a9cd96f7eb018797b714465c544f4c7c62fa2c3779da899 -09d702fa50797582f995127cb3246261c5c5a49f21268664bf05f1244337f4e7f7e7d0a1514888cadecdcee870c9c83158464f4825e8f476fc4480d70f17c6c3 -52dcefc28c657903548086a23e868781fdd34c6b49c6d32031423b4a478a5889ffb983d434f11a9c18e83dd0dad3d82547cb28f3f04de8188cc07e98aff33df0 -6af4590e9c711a276abb98454796629f4ff290f5b3eb76db0f527243b5b187a5e1e868d649b618820ec0f6a94d3c25b8d3daca641544a70087b440e325e6407d -9e75604d7e2fa8586421372e59e3bc2ec4c6cb7d26a58cb14cd9e6818b8b68b02b41d3a9099acfe2ac85423216611152b32b6105499a15c81e20bf9cbdf200e8 -7ac5af5644c929b02d301a14890bd3e19a6d469e69b12b603b975ab4dbaaf8d8bc31c82a69a3f1ce08d4711df4ad9e558a6e5519f2244378ca6a70ed753add30 --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -512 -32 -de0bbade38204e63359a46e672a8d0a2fd5300692ab48f9ef732f5c3fa212b90c98229bbb79bece734a622154c904dce9a0f53d4a88b3e558ef7612f6694ce75 -2e5d3fea7d9d0d33ac553eecd5c3f27a310115d283e49377820195c8e67781b6f112a625b14b747fa4cc13d06eba0917246c775f5c732865701ae9349ea8729c -64150a6d -8593f0d7 -18f204fe6846aeb6f58174d57a3372363c0d9fcfaa3dc18b1eff7e89bf7678636580d17dd84a873b14b9c0e1680bbdc87647f3c382902d2f58d2754b39bca875 -098eb081ecfa53f3f90e7dbf1e10b6e29ee45d6b02bff85403b335c0c6d5e1ab6eec5d670afb95713ed15f9723e5faedd6a42d95effafa771cb0c72d3a73c905 -068bce0fed3d2cda68f16fa939fd89e1a777c1e359967090ca050e9e855f4c1e08f7d1158d16b7b130be7731ef8a962b61307a5ce65e3c2687c76b0fbea16b6e -14026cdda1794a94d7fa3cc76c69f6e43b5da0597c4040c6eb5cf65f677cac9bd85b08af0c998241ed365decd2d1cf2a62ccb6138a409224f7f03184d2cd77b5 -047d6c7653eca32d15971be88eba38526fea6bbb9f991ad6c8d9ede11bb11dc888444923c5732d57d31a4aeea397179007927ba14cfdd1078664dcbbfcc3aaf4 -00a84956047b71ed15148f0fc4be161c3fe4fe03650dff8e239982c0ebbbdbfbea2087f0c2f725a023e1e568e56e980e36524cbc29190b698bcb62534aa47c3b -0ae33423c12184905fb44e34ae955ac5a502c9983910135ae22ae1f477c7e4532cf1134dde48ccc4126124f91085d64d6106c503b6e71b0ce5333d679b0f016f --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -1024 -16 -895f783fab56a353b58a8c4316eacf3012c77e6fbfdb4be7ed3cd27fc1c72a98f7733050ae2a4bd8c2b356f3f81de6f56258f69355b9321117b905723db3fe533ff94c12502b145c53e61608834634eae18e60c5b991b9f8d71b2d971cbe5ac9e09f4814addab421efdcc2870d2c92c87003fcff55ccba1d4f22f5ab90950fb0 -2a46626cf17c40bc08e57582f9852ad12cf0ee16f2440678d35a31147278a27658a66182b41c8327a559d058a9e9df5a55fe9eeccd16fd651c2d7f13a9942e7418052b4ae1b98f8ca3f3e828532a453289bd47b363738f866debf04222abeecac1e11f980b6f115f097f4540aa7735b993f17f55083caeb6a80f80d092c59d2f -7c1f -5eb8 -20f8be80ba9b4c7ca011f74c2d41581f0036d233b5e8e58b6dd5ca6db0625d764b927a43fe78844090c6843f29a331b76f8ece93e7e313eccb9bcb6ed2330923899aae43a0fd2430cb6772793755e74862e61e2ac376cfab9d61827e646421b28e9e0e2aca4625731aebbb69ea37e0fa859e499b8a186c8ee6196954170eb807 -06412c26297124ba58188bc306fa67d5e2349d33c677cb3701084ab808780e2d89f5d0b912e4866f37f4fec043a08c1991c2ef1a4d9f81b6bd6e8449cf2dfa510a0417db84ec15bea71c17b483852b918137926002c232d2adfd304c7a1beef79b83544bc405d714a10e1b2ed02e33cfbf25b0dffdda16e76d92e84d778dcc27 -1932ca7ae5c0e8979f823ceac3369726fe80409606a1b92fff2777002d4f71c3eefea8240ab4623c0a926245dc89a3fbf31859f4a8ca74866ebd6ff8409ac0073cc53c26991402aa702bdeaf7ca6ad054bb52cd4a7c0524eb2556e8b4143141e19ad9cd47814f9da438de01a9878d92658abfcbf39550817b54e1eb35e98f7cf -1563cce47758b785cfd5bf169f156b4e4328b02221faa51d65cc5e819abd176948d3262a5f54a3dd960d1aeaba079bb8ad3d9926d0b5f3ff3dada08f6219e932ff858e754ef7ccc3f3b63cb0be8d2b346ef8054ed96a1bfcb6ab110f52d2c601f4cca7149a7a3ae60aae54611266844562f93a152656d6c857bb8e41209e2904 -19d524c74c54446433fd52e430bc5ab765afcdff9f13cfe2b81958baf4c1804e6f0ded2b6e39a37d59a9d6f9f833c6225920c7700a06f308074df8027b47ee5b4e0e3a96bcf2f44f74e5ff4b9eda59538c88e9e86f321f28584be5a4738eb56925cd464b980cbca2f78c2d456fc9c46bb58d34425dfa4b12ad486a7b79982e7f -1544b14914333391b50ddc809fdd3b372f607292a3677ac566448683b734ba6feecb8ae791e6ba01dfdf37441676459f27343e727c5ce647e4e5f3fd5cea23e891525229306db57a0df7abf72d167a09cf3daf35e24628a39cd85b824dd548c516a36586e77a844677f3889a58ff57e80734c70d37e403eb0bc122825c36585c -1324646bfb0bad60a82843ae9b47e64d4fb298550061b01755aed16ba0448afc9cac7557640de2e8eda59e5c9e29483ed5181d997d9f73e8edcfd671a724cc1f2ec976ed97b392148d8f1156f0cb4cab35a2b378c7a63b539daa0588260aa6fb2ab3f8ad497c96305a0fa081ee6ab4bb7067d3ea85c6455bf6f9af37deb38eb3 --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -1536 -16 -b2c5bdfaf2ba8f23d35f13f9f77a1b8efd364518248b0ab2010d3260a3445f5a0a8aa4198b0c3207d3458a2e1539a16f8d4ae39b8913a951884085dcf22f2fb08291d7363204e5335e697f7398a9eceb1cafbcd348517674f15bbcbea90537ca2c8e6364d67421f29b9ae1c2e5f17872c08b122dd36a9965916287d08d8e2ece0500d4f1e37b45e29cb056efcd1449220d602e7cf13ec97b6c4f17a7e57af9c8ec65cb9864b7a4c83290855c8ffc55bc1da64e43b9ec4e9f266dce489d14aa8c -c7a679c71dcaa96a8401dd62d7e71f68532c71819b8fe7ab721fb04b4dced1df8486000094ae3410622cd598ed3e74ab64952eee06659e1a891ccbd3702155bcbd3931224694faa89b4055c056e0aa844139fbbfe3d9b568b58387f1a955ee2e0043e5adbea47beace8589dd09bd98826db084ec7172c76b92d315d164f26c049784ed73ae654e5ca1c1d1faf227ce981b624ea7f57aab0a06b88d2b3105b957b1a19d1899b8e544f05c6de4756b8b095d2e346da3ecdb386b33fbe48f5254b1 -ed01 -611e -da67cd50b638d8454a6854741126c4a07cc716330a37576e5021ca2fd2f24b31e027c0b9bc2929f2a2a38c9d003ae5b45d153957d2d0fe1cd05a87f375d050f6341d1e83f0583276902503259190aa7b0353e99a8b404da6feabe3a3b4a54263523a3619aedffe301db8be0aa07b04b8d8c1210cbb3034856d6f46dec94cf866558439083e26bd03dc4c11a81239654b516b2f891d20d0f7fc98547fac560ab315de74e6eb71dccef15a3ac85d3daa6072603a608a1d9201d5f09ad67ed8ce95 -27d738be5b0ccb62aec64623adfec2fb3fbdc26be7040817f764250d3f8f324ac468575a3953cfa8ea853097d17b71e3ed7a81255688a155c1f84c81f8288019a364e4a267a828ab90919f1d034743f88b81aecef510ef66dc7c45971ec384c4433bd9377cf72c97af9af5b36ea8522dea929d219819bd178b910c8c54365d5071ad39c2527b64d878d3df051b0fc82c71155571f9ea89f9a16b1ec77a05d39fd6840328958da9bb19c637d3952d0b704ff176b4ce18d782030310527785f8b6 -259832af49c727bab597ab8beed93b5f8338e9ccf5c8a891afde35d02d0db4ce1fd83f4643d6d60d5d5c7362ffc51a4ba2eac6a82d2f01e32fa5780c8a2faf09cbe2e17c0fa7cd896fdafcda6e6f5584fcac166574bfb25901541c5c4b5abd9cadc5c9e6512001cfe24741f55f84fb47273edef344cfcb7a9290b92136b30799aa7bc6f7c1d942fc23b3ee57edc69ab4ae94d076e2df2f080367ab8053a9f54cea218b19148e23310ea5c537a2c2559f8d9fc59f75e26dfe2a0f65298127316b -bf4e8a2aff25f970db92a08206b2662fade7e2dee533fc585f0ebf85280f8760a45a7af38aec082a8bf07b380a3814e52b38147b7e92cde28cb7d0500bacba0e79a7d9752bc3f6b4a8ce7e9091d8f614fe8b970135d27e63f81faa587f35871abd5b3a8d4bd84e6ab717d1e49c5f92470547d4bf977a07eefcbdebe1754278afc06505e4058c099da4632614db98d9e3d7447e2a48403bd9cda0efb7fbc4e43a9e962cc9abe24f6312893a165927614519ccf6897d3f17f3d9ff5ca3abb00117 -4505cc0eb73a76e09af6c512b4b3611d7c3b3108a68ad4d08aca6ca13756e553efe6ade8c7a0ae6b5bbad04ba0a281824de0a13763c3aca96930c4f9aec2e9ed52e9f329db58ec6acc4d1a86df706f3e74b2e088f9064caef6a0074d63e726243779721517848124ea65c1ccd3e8a1471afa3f25811a577757aa2807577a7c6a77c3634813f92cdaade697cb17fa0555918d53a75e05c263e807f107437a5c4032c68f18b8ca54a61caff215debc1a0988933e6e442501a8fbc497403631d543 -51fe92e79cf87e206a6a1d6192cc670090a20ad3fcc36f13ce25fc7ca15f7c0cf5fc1f466beb949c01af87520731b63699900f0d4bbc21d2fc13b30a66fd767d76b6d391fb1418edc2e07057d9fa124c99dfe154e46f98a718a09ccfd01862ebbff0221cdfe9039851872526aee09be7efe4f1fe3d2fdf747e0ab0fce0f5062e7379e19fbe8f25647a081a90e5a8c9c28fa7a2d600c9072b139c901236ec3e04ab2e67c684348d07c0857b7d85dabe1e232eeb63675c63d6732f2bfea20dcd6b -5ed841eda3b8c955fe433d971816c55f290735fd5c60aa5c0021f441172383463e18835ff4962fcc76c9b59894a8a11c5748183a3453c9e9d3caace2834a285f326d49742b2e56ff7d1dccb91bb2f3059f6a3c509c7fb62d929b8002619bb70676b5ec0617b3d36fd2fabb2701ff9c0b94b3942673de0fe22e4d13969398f8da5563959c05328ef7767b6e4e11e4e31a3196f35919b29464e45e5a8a461bd9533a11a3bdf9c1f57ec911b496b05072f45427293234f8189d0649f8a05b91ffb5 --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -1024 -512 -0126538af61e4b9f2405432519e527626a7ea735b5459b6427ec6cba1cab45bf7aab3960e23bc7155efb1817eae0633b99b178ec507dfce68c2ce2631a625123ebe9cf0b8c142464ed1766b69d7eb5c50bc8c63238b615ebfce42d087ed87c6cb3cd7d83d561dd350f9aee914cb73edcbfcb307e1cf03ea2be449e902d3c15d5 -035eba4b3cf6071c40367c2041ef9ffac1d2c79350add0d1fdf4ee9f51a64a16c7c8f6d6413633936d759972da423643be8db98385c24d66909cea2796b8226b766f7fc5cae66d2b3f31c84c8480be3e406162450ab0af1def7fbe722db19f19a7ea88beb2e91def31de051b36bd6547b986b04b55adbd048314b61252b8a9e0 -a9f9dd3f39ec1201fcfaa04bb03fa4c349a339d12936c0eb50eb5e369b13ef6b511105b6a2b25c28c15a9cf28ba4b4feae22142bee272537ddf138c6b3e2cda6 -96c8d52f036b4737cc82a3bc596fb56ccb664c98abd4fc3f21682bf7d1f58dc7ec16c3c10da1827e071d840349c281b57f7d11c7f67432f04da27baff2beee40 -82c446d9e92eecb5e5fbca71054a857fb1034b61da0412b91adef3d7f1eb2c535e06fba295d0b284b6a68ac4a863cca066972fa321e81874b531fce0066a9b0853e6c06e863235e023a604ae694e55595d939aa4522bf699278dc2d8efce5159bb4f969137483722a7a515bb500d476fab7a907cb7d58884b067254ab6c13349 -0735c537ca9ea8e0dad6690df05bd11c7a85d1c9562953827050dba75def5056a10ab8fae72f4b6d0a340fd64ca33fc23c00a289f8e343c81405c82e9b4dbaf3a88c1026750d1d7b2b782695bc99e6f1f8d4b28bcf761749cedcf72a7a5985f05009518e112d2493871726ecb6e6d8f6470de830d60c9a1b32b6a1edd39ec0f7 -7d3bb92616d1134a1a04358efab57a804efcb49e25fbed46e5210c280e14d3aca1f9045d6a2f4d7b4959753b579c335f9968d05cde17e78b4ace031ff99564f7ac193f9179cdca1fdc59fb5196b1aaa6a26c655badd40966d8723d271031aea644b0696ec8b7c8dd585aea44aff2b89054856f83482a777b4f98dab5493eccb7 -4285a744d12f6aa1c9f4582446dd94ff628277af87556f6f17843436b0e9137289ab910d65b32e53b301bc36e0f0d5b13969e2ec3e6df758c743dfe9a55d6fabb95da94bd0a8b602fc9d8df22c66743b9e7cec51209dd8d1116f3236545bd248cf7d3e7c051776ada4dfbb49e712d96b65ee552cd4105dd28083ea55a954d063 -39524dd2f0bc2a1d467576b8993f857856fb73ee13118371d3ab937502597964a2108e33eb5bdbfc7e6b8ffefb7cd4e3e989c40ea68e3c22f6e1890317431bb98f0001383a6958534c2c9b3b0756961ce1f082747a13d603ba82a8600f27ac90fae049302cb538afa101e21f3320f5e3329f485e42bb0f72b2cbd376216f8eb9 -4ce2fb9260e27689d8f0f458f220d54e75f6d9ee6a21135c8943c285392c3b6d6cadda3304d456d43d3d54add2abd1c61da46344bf721d43f3e600d1af39849b319faeb8f3a7237c37bf7201c41916bf2dd54ba1d482195f588e06f4c482c74d264e7d3effcd375839593384a8df9baed7c6c51029dbdbee7091007e05ac2027 -0aa2585482729c69fa31c138cd8f6a92068ddae69dcc6b42d5ab3ca4a510ebb3c03c5d346a970c180bc6af7dcb92b2e08edb9088812833d47004025ab398558022f0b6cb836936a2c42b05f3c00e69f4b81e2195319b0bfeaaffedc38e16c0d3b6e2538da25b22b11b3234aec3848136ed9c4bd4bcaab9d3ffa5066678971c7d --- base_width, exp_width, g0, g1, e0, e1, m, R^2, result -1536 -1024 -b715f2aa7bbe5d63f9e346a354be5b4aaf95a52abdc71ec6ed17158105ea05eecb9ac14c45c871eba0b4806fc2c902a71a642aaa6ffd31418495b6337be786c39b309e7f2828b7a9eaf39efe24d34be63f5bedff9b3ff5c8d9b3d3abe05d899165992b3279857e6888c89e02a489690979376f05e3299360868a37fb8014494edef41c009b5f29ca0110b390d11c13574297784180be412ff866338e1e8a3a1c0f885e07b4cb38b2836dc1307ce2fc60abd9a47ca24ddfe030f470060a07f742 -96815116c690888a046c216cf843d63b0a71eb930063bbdb884d4c9efd372339bf2bef0fd77793eda3d89508c83719acd72725df7a456c5acfaa54ad27fafcf461e92981322977a38543f3af1c1cd8027e4a4f35b16e1657cfc7ed6ab932fffb0dfd75374195e5fc3f30a36b0eb2ab17c06312d850e541be4b24c664811e80cb0a8d4ed6b21f1533d55477d1b8ac8e4b25441b52f75a90c23e7c81b42da33e9f7d6a02b8c172a8341aec8222fa2f9540a64c79a0e8837c0b02c82f75aa0a529b -3d4f5df1fd0608dcdf41292cd1de964de30857a70c90e7a7eefdc466536e91d3e54f0432b0cd3dcefb8f817903498c2774bfc2d311b1d26616cfb90aa08c53e65e98b0674b1e93be44b23dc41f6c4eb5c911111ad90be093cf6d8a1ffe1c7160797d7708bcb4c28aa937b49835f12fbd95dfe180e645801fa2298d6f66797843 -f08a44e041abe9132a7ae203dea533ffe043e52ad362a7e52e690c6f6be93c7764505ff8ab421c0d07aeed189e06619b72712729e743275562fcc12a8305eb92b4243ea28343d4c2e1238afe94021cab7a0d78bbe1e875fad56837189c46d04e7efb4f72aa81b931a73b40c4c6b9d18c70882d52769649e271e724f08604a0e6 -f2a61d1861dbbab3ea6d7654fc1271b0a53a3319215334aafc6d22b8e29913f15be747ec36b7623fbf1c9c32f12a5493fe585e2d1d0fae7a653966632f7d3db993b85403fe179955cb944b2a400624da1d353599e37b40432ddd88cd8f7ff40b96f9bd9019334c935cca7a527bf1bd7d2271b1effcf8b1348948de020935779bdf8192b2c07ad6549837072505edff25ec7d1b9ea671a839c0039ab85146217a6367395890cd978cfd461fe82f3bb22f074c6c33ec4ccf395799ab830fbcc731 -7f879e0b0ef3066c64170ebedffd4fdbe9dc108c912ba300c3a28f815e65714e332c67b83f9101f9d1bfe774ef5e2ab8553b57df41d725b7472c80e6fb5c1e7d01cfecf247e1fa2f9899684aee009f2d4c9eb0a5d9ed8cc1f02e86a585550b124e9c31843d490c9d651b1033535779b0d4febf509dac2983b1aed065dc2ce4f220fa90216e292ec44c6161139c9255f5d8e6aa24018d7580db19fce33859135b8900f077c8c12945feb9c7e8f013e9aa9ba5829cee86c3f20402187a0714baf8 -0d59e2e79e24454c159289ab03ed8e4f5ac5cce6deaccb550392dd471d66ec0ea418b813c9489dc040e363cd0ed5ab6c01a7a1d2e2f051859ac6999cd082c2466c47abfc01e866aa346bb4d5bff9db25e2caca661c84bfbcd222773270800bf46906426fe6ccb36ca33585ad840e4282dd8e4e1003074ecb76b721fdf6ca8864207e6d4d3f8529ab67c8f8dafa1200da1382e461598e57c63ffc6547aeb9de859c98c6a76f32687302b9e017d0c44dd0f8b393cc13b330c6a866547cf04338cf -a24d5ff5ec90041f8585e5a3eaa80d4ae79d51c503fdc297af56a80e3bf58e733426cd856674044ff48a614486e19aac545bc5c9d4d26c7dbc82293e217afc9401e5fbe0e1f2201707524fff02516afd014c97e45d7f2ebca4995ad9d71c5d64595b3a799211ee7a00d100dde2bd668c8ebefdd33ff85dedc7ba36aad28473071f79984d691203febdc8d4cb1429c06aabd28682324869a628e58d693233293fb6b80350489dfc8262492d55b84cb58f66dd7ab085f769588c92c98577dae82a -1300e3e89ba220fb27e1d2ba33f31cd2f425f88fc232904e9636bd8bce5ab3132213ad74050662839715dc75efb6eba06b76142087de5abcf7dd7fa46c59508c2ed48ed23ce28601f85cdf3fc2bceaaa58d553c7fc5fb2b1de38baac935232d301521759c94dbb17bd2717e95fd898edf1d07119e0804fdca0bf1472f67cf24c7b3b3d05427e2215fb76b12d4541a17d151c66266735375d93290ee0dd1853bb2f0e0da52ddd5fabb78a0429eabc57dc5183698dcd0eeb7855db074adbc031c1 -61b777b3f0d965918154c110832797ac576ee410393a854f63b65e671a5ff8d7a06fcabeb78dd88ca33235d82089cc479d40f73fec8b70909511c751a96996d2fd55ccd161883739ac16a2fa3cdef00ac8a44dfb4a694903edc7cbf0bcabdb516c6739255f046799c31ad9127033e418d32c64dff6477cc7e6b9567ebfe81b91f02a88d739da6185eb436b747582936cbce1a2083a901f367d420adb95a48b5e2e94fd4a32844ca4fd11f97d521ac0c747b8f1844d5047bef01a6aba7ee4e903 -df854897557eebad8b4b05d4d0f460bd52bee45a5b0044ad3dd41ceba28f474a90c1541c8b2b456c9b0d673e75e8eff3e904ed6386764bd31b54bc3ae639bd50cae76b4925d303e85eba38a08fb867c9b350b4c465a9c5800c19378b39dc00e17bfd5e696b31c5e2eeff4b7c9811a3c15decd58bf6ecca7eafcab4a74864626516b0203434c2ca1685729e1ef74a09294b710e2168d8063f3a026f6e263b26fa6be9be46f3ea4b7ab1ec7bd85d4ffa63f54e1fdabe07b3368377387052dc55b6 Index: branches/newRAMstyle/sim/src/sim_mult_input.txt =================================================================== --- branches/newRAMstyle/sim/src/sim_mult_input.txt (revision 67) +++ branches/newRAMstyle/sim/src/sim_mult_input.txt (nonexistent) @@ -1,127 +0,0 @@ --- input generator program --- generates test values for multiplier testbench --- x, y, m, result -53e61608834634eae18e60c5b991b9f8d71b2d971cbe5ac9e09f4814addab421efdcc2870d2c92c87003fcff55ccba1d4f22f5ab90950fb020f8be80ba9b4c7ca011f74c2d41581f0036d233b5e8e58b6dd5ca6db0625d764b927a43fe78844090c6843f29a331b76f8ece93e7e313eccb9bcb6ed2330923899aae43a0fd2430cb6772793755e74862e61e2ac376cfab9d61827e646421b28e9e0e2aca4625731aebbb69ea37e0fa859e499b8a186c8ee6196954170eb8068593f0d764150a6d -281d2450fb801da066c8f6ded6b0e52a3dac5b06c9b87ab1b98b8bc3fec0305217617dcf521ba13284d317cf9387d89f668a77f5f603d7d804d7e1ebcfed747f7e9c79cb45a3c796dd21dca6446bff5f3f4f61547a8ec6dc87f70007bb0d0e871bdd6034b504ea047ccd079f45e3290616e8261439fc0a17d468b142a245de837b2a8e38517c8db806fa26b39ba0281ff318f6ca93426fe8f87fd83b57e2fb6e8613fae2a05de379028df84982dc5ef1f260ebeb9cd706d90bec6c867e73b5ae -2e5d3fea7d9d0d33ac553eecd5c3f27a310115d283e49377820195c8e67781b6f112a625b14b747fa4cc13d06eba0917246c775f5c732865701ae9349ea8729cde0bbade38204e63359a46e672a8d0a2fd5300692ab48f9ef732f5c3fa212b90c98229bbb79bece734a622154c904dce9a0f53d4a88b3e558ef7612f6694ce7518f204fe6846aeb6f58174d57a3372363c0d9fcfaa3dc18b1eff7e89bf7678636580d17dd84a873b14b9c0e1680bbdc87647f3c382902d2f58d2754b39bca875 -29140212acd8740607cfcdc1a566e44a24d122f4ce5ac6080a6b52ce0e49f2668b07a1c19b3031b6daad9222582854ec088b515a225c2b40faff6bcf4174eed2448b122f712a8aa8101cdb4e9f1d183b9aa952b7ee85f4f61013c08d4d0a091dfb099b40a482d40c6366d34563091bdf63ff7fa59de0d162e9b5fdeecec7d9b538d36b4611cb1b469bea02e78f30b612567012f8ba1f50beb9a94ed7a3cc87452830c23af7a51725512be7de0e9ef801ccc3225f59a7ad008d0d55d688b43661 --- x, y, m, result -7cc716330a37576e5021ca2fd2f24b31e027c0b9bc2929f2a2a38c9d003ae5b45d153957d2d0fe1cd05a87f375d050f6341d1e83f0583276902503259190aa7b0353e99a8b404da6feabe3a3b4a54263523a3619aedffe301db8be0aa07b04b8d8c1210cbb3034856d6f46dec94cf866558439083e26bd03dc4c11a81239654b516b2f891d20d0f7fc98547fac560ab315de74e6eb71dccef15a3ac85d3daa6072603a608a1d9201d5f09ad67ed8ce94a6b25eb8a8fc7c1f2a46626cf17c40bc -025a82b89f8df97d24457adabe8d71547932939de3798812b66fe245a8dfa10a4ad9c30f35524607492bc874c537e0919628407a494e9ec98a07900650221fed8a938fa08cfe21a9c62d0332cd7a9cc7d180f09f0dbff606e3a7e65c3eee75f76642cb165f9794632d2cb116499915da1163e396d821637a47a0f37a14f43eeb1dfcd5b9257642687b2a58c2007c748f961c1b956be83d6b2b6de70bf7de53bd069694c0943a99761d80181a46aa47fff21704dd8ddab1422641191a8afa07e6 -08e57582f9852ad12cf0ee16f2440678d35a31147278a27658a66182b41c8327a559d058a9e9df5a55fe9eeccd16fd651c2d7f13a9942e7418052b4ae1b98f8ca3f3e828532a453289bd47b363738f866debf04222abeecac1e11f980b6f115f097f4540aa7735b993f17f55083caeb6a80f80d092c59d2f895f783fab56a353b58a8c4316eacf3012c77e6fbfdb4be7ed3cd27fc1c72a98f7733050ae2a4bd8c2b356f3f81de6f56258f69355b9321117b905723db3fe533ff94c12502b145d -08e4197f1c9b38dd964a07317ec91387c7c0e6e24ec6d19b3e8f593552d524c9bc0348d8f0cc229a3ba6fe9ca8e219e3047323d5074756e783c14ff0f66e12c73cdde3123c0643c4f3301f4d25d71a1cfee87ba02789f700ffdccddf4cdc25cf5a9dd0ea926bd596a2e5b08ab2e79ac188b6d6b8b5d6a4901db97ed4a5136aac1496bbfcca283d9d8568afe79955188fbaab77cf4e222ffab441553f2b26501d569e2ed2700e3622a3c15a4f1b93bba77fff312011bc3f793b25c9e2f2935e5a --- x, y, m, result -532c71819b8fe7ab721fb04b4dced1df8486000094ae3410622cd598ed3e74ab64952eee06659e1a891ccbd3702155bcbd3931224694faa89b4055c056e0aa844139fbbfe3d9b568b58387f1a955ee2e0043e5adbea47beace8589dd09bd98826db084ec7172c76b92d315d164f26c049784ed73ae654e5ca1c1d1faf227ce981b624ea7f57aab0a06b88d2b3105b957b1a19d1899b8e544f05c6de4756b8b095d2e346da3ecdb386b33fbe48f5254b1b2c5bdfaf2ba8f23d35f13f9f77a1b8e -2edde8a2abd33709760f08338f2603ef03e9fb17a40a905fd138bd887fe192c3499881e837e30894ade6d1d9d80600afe24a43d147098f723b3a4f92d3f4c9eb0c29339d26416f9754408a8a8e7139e3cdb1be621b1c7c3cecdfb49ff5ec3f441330cd3e4c8f55ff4e7ff8746b53e2b4423a8bd6027afdeea7cae939b028f85eb9af1aa34e3dba8c0ae7f9019ffa63cbd9538b58b4b31836728fb824e3c82025aa553da6b1b36ef019d77ce842d63d0722cb99fc40d8e6b425e45c2bcf7675ee -fd364518248b0ab2010d3260a3445f5a0a8aa4198b0c3207d3458a2e1539a16f8d4ae39b8913a951884085dcf22f2fb08291d7363204e5335e697f7398a9eceb1cafbcd348517674f15bbcbea90537ca2c8e6364d67421f29b9ae1c2e5f17872c08b122dd36a9965916287d08d8e2ece0500d4f1e37b45e29cb056efcd1449220d602e7cf13ec97b6c4f17a7e57af9c8ec65cb9864b7a4c83290855c8ffc55bc1da64e43b9ec4e9f266dce489d14aa8cda67cd50b638d8454a6854741126c4a1 -dd6f908415f8bcb9abf4efb3975a5aa8c77fafcbfa6b0c6c2b8c7cc47f8e8b0dd361003322b9bf9b34ce587a58dd249b239e37034b44265b8569ece779f82d03e88eb18db6b5cfba0b7c326b7793889bf2905180180983bed767e62cb76d97633af1b64f9cb29b59af9d7c5b2e6e3869c7dad3f3d49f0d1747b54dd74f42644bbeb72031c971e136ae3e0fea8cba9b7cc79a3880a73e483e4a7f90d9a77bd00c69683d61ddef9b83a024d75a95fee0d4d3757a5d5b1db1deb108a75fba244c75 --- x, y, m, result -be449e902d3c15d582c446d9e92eecb5e5fbca71054a857fb1034b61da0412b91adef3d7f1eb2c535e06fba295d0b284b6a68ac4a863cca066972fa321e81874b531fce0066a9b0853e6c06e863235e023a604ae694e55595d939aa4522bf699278dc2d8efce5159bb4f969137483722a7a515bb500d476fab7a907cb7d58884b067254ab6c13349b9671c7bbce53881ac1112b0b83be497f42b1776c84acd0e9983b2ede9391126d81ddf249fc542fecf52269df27e64bf995a026b71ff631d -229fdaaec4289b13fe8499b8b2a273f67f9630c0663a14f4657c795ed19b9beb2d9e6ba08935f17f52e4b86d25d74a67c37c8c041ab9455f1f084d5ab9942518f0d23d3cab5bb5e9537c8f35de80edc62dd51990de636e3a9dbb6893dfa7a88e72ab334eee79ece1fcdbb083dc4df36ff39ff9a65ee028d3efac71f02c68e6477d6bcb14a88b8a4b2f284ac80d7a2d796c7c44e567266d3cc0d1b695d9d5dd566d27d3d598a40d859cafb2fd3a6a3ebbef1b936944dc3b27c411c9c4f86ca97b -3dfa8c84a14ebef82079ff92946188eba0c2a04b54c1f324c073081f38380719ab64359dddcb826624975b1d37a43bd7f7dfd3273f5ec1a26fcc9d7df3c448f4c9ff6408bc35a26f6897875b2213ac6a6ccfc061ce46d6df12ec86f376377b51c9b4feccafbb8f3df628fd05af868a7d066aed834cdb9d9e3a3a5b60ded9799b40fa0edbbcc80b1808182f5eaeb77735213231178f3637cea7b9b0b7da170b8903bb7f28f0e8393daf89611e3aa8ed01c7a679c71dcaa96a8401dd62d7e71f69 -2d2e8292b4d76354773c846e80069e3e9ffc59719410220574b52afcd94f582650725d1cfe06f1a6cccf598e7b49df4ef57cef26a12fc58a8992e9fd889535f660e66e833c12c2cb5c16fe9683dd977528cb274b6fbd17236dc1eb38190adee9fe82ab3c0a5951314130c5b34f3beb8558da09539d7fcec64c3198a8f9f94619705f2d6df75906c50ab1d34ddd5ef88fc489f426007c76232f74f2c4881aa940ee57938e39063d1459172c886e779e9d1e370a4fdfe98875420b121cba413b00 --- x, y, m, result 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-909cea2796b8226b766f7fc5cae66d2b3f31c84c8480be3e406162450ab0af1def7fbe722db19f19a7ea88beb2e91def31de051b36bd6547b986b04b55adbd048314b61252b8a9e00126538af61e4b9f2405432519e527626a7ea735b5459b6427ec6cba1cab45bf7aab3960e23bc7155efb1817eae0633b99b178ec507dfce68c2ce2631a625123ebe9cf0b8c142464ed1766b69d7eb5c50bc8c63238b615ebfce42d087ed87c6cb3cd7d83d561dd350f9aee914cb73edcbfcb307e1cf03ea3 -78a18445fc4e11957e873abacb6992d46fab8570c61e9ff9c3ad6ac42c92bcac3d289650236d07c7a78f7d92503326a2e6e57a8a1e48f493b630253c5939aec36d4200975c3ab1ec49c1edc4b9e427ec172e8d4ee41df31cb618900d5977968b5bd4bac8ea08412863f1ebee7a7f41438ee4833679af041e42ca0e5b984a16e9b2343f22b7a0edcbec37381ee72d8395072fb19b8fed08acd9215d554b2267c26a1e4932c203195e456907911714f9f309d38b5628e665befa0ec0e1477384b1 --- x, y, m, result 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-62fcc12a8305eb92b4243ea28343d4c2e1238afe94021cab7a0d78bbe1e875fad56837189c46d04e7efb4f72aa81b931a73b40c4c6b9d18c70882d52769649e271e724f08604a0e63d4f5df1fd0608dcdf41292cd1de964de30857a70c90e7a7eefdc466536e91d3e54f0432b0cd3dcefb8f817903498c2774bfc2d311b1d26616cfb90aa08c53e65e98b0674b1e93be44b23dc41f6c4eb5c911111ad90be093cf6d8a1ffe1c7160797d7708bcb4c28aa937b49835f12fbd95dfe180e645801f -7d49f655b8667eabba8b3dbd2ffadb250a934aea3c36542864b923b515bfda13a9d7316c8d64f2872211555ff3602349b6d06c1e8cadb6074eff8298b5bbdefc15f2f08740c71013d60ba03de320e1546396a334125f255d1ecee470723af91d7677f19ed2a73f0c48fb6b9d9222b2e279309707cd81350ffef57d778f136a3c50639adb752e0f58e5a809d4a8ed15d90c1273b4635b59073686f946946c5eb4210b545ed5cb6272568fb0173fa140c3189e5a851d2bcb10c7cc95811826e811 -a2298d6f6679784396815116c690888a046c216cf843d63b0a71eb930063bbdb884d4c9efd372339bf2bef0fd77793eda3d89508c83719acd72725df7a456c5acfaa54ad27fafcf461e92981322977a38543f3af1c1cd8027e4a4f35b16e1657cfc7ed6ab932fffb0dfd75374195e5fc3f30a36b0eb2ab17c06312d850e541be4b24c664811e80cb0a8d4ed6b21f1533d55477d1b8ac8e4b25441b52f75a90c23e7c81b42da33e9f7d6a02b8c172a8341aec8222fa2f9540a64c79a0e8837c0b -9e13514fe5fa670bd744b7ef3a6102b2ea1601cf80298a48f62c9a78b3f40d5ace7e2857bf2df8a959b5a3b657850e0c36a6063f90ff4ab4d19857b29af2d7003ab7bfc320b5d95c2531a343be250768274cc5c38a0ca0e9cf4a4d8f517711e36b396546f775386e8b1db413ab000ef2fc43547bb01d28a66ecefe39a299c7d44fa5f522bb3993a1a136b02c401e3372b2f4edb65261ed59b127063661c6b7c579b7098e86b886965da6d819e319fed015a56255243a3f5cc63638621248f80d --- x, y, m, result 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-e0aa4bcb02f7e9e49692fd279e5102c63133f66ea0183ad6b5f24f2430736c0dc7486d4f2a9e0aa658eda7db3a908efbb3c1d6ed1c7f27c2034ec1ce8be9a4b8e5552e1cdc27cd78e0864371d9802cbeae36857fcd296922528a1966f8b32e32ae5557a5a9002b4ad763bb7bf50e05e31e0a98e500e5f43a59dbc6c76c8f8330805e4ee38ee9349ff08a44e041abe9132a7ae203dea533ffe043e52ad362a7e52e690c6f6be93c7764505ff8ab421c0d07aeed189e06619b72712729e7432755 -3f36c162be0f06570f2c74aeeb584f45a12f95b691fb605858229ed42879cf13fdcc9375ce0ca60135aeef1181ee14c88ff489f27f89a5ff30bfb2c922f47c59e7e6e9bec588e8b0be70e05aaa71f38a714d996aa8909d065288b22b2742807059add3ec0a0a7911297d72eb5c970414a26a4aab789169fd694d185d91f8fca4ed59f821146d47b9e423189199432e42e6f40e6bc79eced5e622aaeafdcbcc285b6156f7e9263bc6b06313124fc4d27241401f8a55c412a4cb1d63da683576e5 --- x, y, m, result -5ab045b42aa62e2b430a692d385849d0084e7a8e11ece2225c3cb5c393988f0ec08ff29dce9d081f16c787bab4eecb2a011989dc31b2e389973d5c4b2d8fd3e13f419697bfa5ae62e0ecaf69bb443faa1d1ca7c88cc1485e0e542c16825fcac0be41bdee32dbd4c6cf4d036d760e3c5173bef4fb2b3e4b103ad8082249c14baa80e85fe0bcf8a253dd36dfd2744533a593165b021872f5ce857da213ecab759e432beeb23cae1ad0836581105496558519fa901451856d68bf52a57db2d87a34 -31a5ae819137e2b166c05c8389a2c99fcb56ba8d2bb525020175a1c3b8e70b785f0dc344e1a3302ff6c9495119f6d5e735558728c1b3eef9c1b9e7097af05ddae501ca8a4b361cf60603e6362a4e6d62b09146f7d9fed448e6054a89851a539769a48b7265b29486a4cce66927d90eec39bd6e9c64ab368300a0233ddf12f1148fb5e8ce4e2914583a38f1260b1d2614fcee30a2e997f3025c1dd9509b3cc898009c4a7223e64fcb0dd5cd6cc327fd6b0e70f0e48432f2bc673b626326efbacd -341c4c871bf58078144f57425c3fc3dfa090fbb680e17e4b161c5a459a1911775034477104b7c374bbd21d2212778155dd9ee244136816960f2464e0d10e31ba71013d0318b1dbd0b049084c00624093e85839cd58ef2c749dc35dae9cfa046f669913a5414eabc6514b1b23dc60f4a977e3aa552d45b23380bb1498c5ed431c430d4cc265a07403091e668a7511be81a6e583ed9677699b25069a079cc133ab7860c946f4c4ae7d46497d33070a9a9684a27fdaad4e4380ededa4695e681519 -264f01daaa47334f48016a2a90831dd167ec353b7d791c6c4ef2a09f999a49449ffafbc448ba444686b6427938593f8866d5c97b50517dca549052258e5250f8494e4987760e85417791efe7cd68b234e0a1f67658cce6b9e20870875aa91a6b9d5b2444e9c6b11796cc86516164539d90afc40285b0ad367bb14048f41407161eaef682de73616c935396227a5ade5d629bfb5b6c63ee0b30ee8abae1fae7742f7c47f2eb411c1d805183df5063ffb45f9053f636334ef051cdd6820338fa29 --- x, y, m, result -21038003813bf3e6331af4714f03cbe6d812169c6cfad8fc0a0b1f074ecd0943dfa26cdbe05fd38943e1d66c1249944e2ccb6009f1545995a9604c326325a28d28b2343cd8095adbeaff6317d0c9101cc8346ca25bd9f34293d3d29b312439c4bdb1fc14ef9e7aa3db6ed0af3b0bae589c2841cfd059a45a4447d17d2cedf655887063dd41e8a8bab49ab8924c1789242a4690c35a1a02db93dcda752a813cef0911302b7a344f894ec884f2403858c1d88b97248ec1b59a9caa63039d6f6c61 -3b3a623bf8dd6decfb0e14214966cded0de7406080f591e687021f9d6ef2b5e81d2a8e17644cf1e9ca7309c912490c16999f0f8d3eaf764c3a33896724f0a9c456153ea5ff1b5bce11d71d535807336acefbda25b0f2b4e551f407de7e4066d9490394b8da0454e6d629aecc5eab8d98626eb4e2425cedd37d2a8ecbfd6bb84066d6c17cd05cb5584a7b59fdc37d5db67c690a189629e526652fc5f9607d0d47f6755c4f08e3ecddb74ea59c9088bd3b522c113143181f91b39fb3c1162f543e -60f6704c35bc87d7edda8f848edf19ebe104e32a7d25b5253bfd996621284cef35766572c78c1635bb7ee7c4daf81cc17e7cc8c0c8fca8d5dd6ce8ceeb0781ab5214f2095c3ed948ff26706405d5630c79268d3496434d0562cb2045e0017dbb8fcbb11c22f14e7627703cecc970e2de91ecd3e9bc6b575ade98802aad7a30f027263655e0a0ea62cf511a8dcdc0ce5e3d7f74d7d0014f612ac2a6ad1a8a9ab3d08cda37bcd9c8bf1d7077c17e9e78cf3699995ef5dd39ab20586b55f56995c5 -28f81ba268cffc72caff7900c50a0bfe55cca904729cca38ae6b31147a989b8c45899b4b7660fea756ff0b279ed64b1b0b8a4f64215d641f9b4ead1a1d9b57bcf22620381aedf038897c9b0014130aa954bcd09bcf37954ed2bc6304cbef847521f7a3e484370e7d504fda12af5c1b2b76b25d8dcc01f3630e1bc3b0227cd78ece7b22f2205931f0b892ca27bca0c244c677a0cbe12f2333473b87588611d9d5a62b0bf225cbb25be4aa376095cb8e71d32fe6c24aac634859481f105267b8cd --- x, y, m, result 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-6d8114a306f79329139f632c98e34b03de0ca0ae677c56c623d0f0ee9ed7458d66049cc9d4ea9c310623c90f1c04c6c2fe9c0adcf6e6ebaa083c4cd3b8f7e0bf7a2245fe79b02ec78147e3275d82222141bb2da8857889646ac721582fe23999ea86b5a2c843f6674bf9cb1c6a0bd0e13ff33c19f0cbb72ff70654d2a64c460a1188a26a4beb414075682a595c90939b9ef4abcd7f8e69697d725ea3129ff79bc9008ce1a3c0c59ab56e5e6ba1b3ee5dff2e295569c1364eb8db9e703416960d -2d55dddd298f7d568cd9fb26fa9103fab71a5eeacbf736d78bbcc0ab08f158079a7ee7e15bc785ea8639458b3df09d81054673a21a7ea90360f41a53c0bf242019edf2853b8ef3323a9a43ac1fef1187b290a3c33372a869c6b78c89a7f5cfa270739c61694896d2835460cf4761cd8b946a20913d4c022dae0de139dec7a7c9b35482f4b54223583c50fe37140a6634fbf7b68e0f868b45a6b7fcae6f39fde126bead6cb16ff7666ba1dd38552a51ba6c2c4b0605eff9c73c1f1fdc670f93cf --- x, y, m, result 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-c2454aa891f5dba11ff450afcd26afc571858df2230ee7c33e86e814c52780128400e8efd60a3980557b3e95e8e6b01ce80d9a3a08faf1730d065ef1229a853be5558da54d189215b844fb02b2e27026f80c7c99d2c6404c40a2dda986050e33e926ef7c0fa60c32f92a04dc7bb706d52fbaa8d616ab8d1c139fedfcb334646bb7422dd3d2b45dc4699940c5599a8dbfcb983cae10f7202f7d62bfe612e6cc8013c743e33f50fbe3ca6fc10dc3915fd64289ab032c02ec2b22d4820b4f4fdecd -9e4bb95740d06b1a4264175651a64fbed16f8e12b6ed0741b1af8859eccac70be4f3e632b1e31590c6da5196d83e81f616b897a2929d9e62d7d2b109a0d62499463c20608e8181123f8f3d7ddfe5aca157b2fcd27efbfe32ed474244acd53c205ef9a9146eb5ac1fdcdc7d50b980117151c09d4b1af692bb309d590f4d756a6229ba0163a4585dca6a35fe2a5d1e9d65d3e458b13918eac0e5bebecfdb52dbba164d073e4e03f0ddd3f62332bc0427ee74a9f269408f03e80e7a9402299d4fad --- x, y, m, result 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-a42b9f1752ebee13497d62d013af00871e03ff635ae5b0aef7e5d8af4456f848d6563e961e96fd5d9f7d85f2d12178bc4976222dd3450480223cd8889c65c63a185a0ad0804a8d4a2b87d1056596ee174050a4ba755fc884d5b4db41cff6f2ca17f57d388f0c8439a80f0c54b5105baafec9e23f6d0a3bd25f3953ab7377a7c9a4dc693372f62b0f2980e43da3cda33af8a9cd502481f32794ef5090864bdeac1eac5efdf2c187bd2c1bb88eff32a393f4747a4c1af5565bd6a84510edfd23bd -29d118f6030a1fde0542380a2551900d03a0aab11652b14f4d47e78c0eec78e8473b20d99430bcbdb1099bd337324d3c8f9cfad40aa39e0afa395dc009453fcc6a38ec6001fd101f9363bc5281af14845a23b0024b5344f2fae5f5443ce1a4956b0f12edf95ffb650aabab6fed04444624971e5ca641dbf5f13c767ad2c8114d96031cd17c64505250e59d381e62f5b9b1fda668b2f06b162b0b660e20a1624da8ed80e29d792fe407d62d1608c227de4982a0cf544daee9e08357531cbf0110 --- x, y, m, result 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@@ -#VCOM = /usr/local/bin/vcom -VCOMOPS = -explicit -check_synthesis -2002 -quiet -#MAKEFLAGS = --silent -HDL_DIR = ../rtl/vhdl/ - - -## -# avs_aes hdl files -## -CORE_SRC =$(HDL_DIR)/core/mod_sim_exp_pkg.vhd \ - $(HDL_DIR)/core/adder_block.vhd \ - $(HDL_DIR)/core/autorun_cntrl.vhd \ - $(HDL_DIR)/core/cell_1b_adder.vhd \ - $(HDL_DIR)/core/cell_1b_mux.vhd \ - $(HDL_DIR)/core/cell_1b.vhd \ - $(HDL_DIR)/core/counter_sync.vhd \ - $(HDL_DIR)/core/d_flip_flop.vhd \ - $(HDL_DIR)/core/fifo_primitive.vhd \ - $(HDL_DIR)/core/modulus_ram.vhd \ - $(HDL_DIR)/core/mont_ctrl.vhd \ - $(HDL_DIR)/core/mod_sim_exp_core.vhd \ - $(HDL_DIR)/core/operand_dp.vhd \ - $(HDL_DIR)/core/operand_mem.vhd \ - $(HDL_DIR)/core/operand_ram.vhd \ - $(HDL_DIR)/core/operands_sp.vhd \ - $(HDL_DIR)/core/register_1b.vhd \ - $(HDL_DIR)/core/register_n.vhd \ - $(HDL_DIR)/core/standard_cell_block.vhd \ - $(HDL_DIR)/core/stepping_logic.vhd \ - $(HDL_DIR)/core/x_shift_reg.vhd \ - $(HDL_DIR)/core/sys_stage.vhd \ - $(HDL_DIR)/core/sys_last_cell_logic.vhd \ - $(HDL_DIR)/core/sys_first_cell_logic.vhd \ - $(HDL_DIR)/core/sys_pipeline.vhd \ - $(HDL_DIR)/core/mont_multiplier.vhd \ - - -## -# Testbench HDL file -## -TB_SRC_DIR = ../bench/vhdl/ -TB_SRC = $(TB_SRC_DIR)mod_sim_exp_core_tb.vhd - -####################################### -all: mod_sim_exp - -clean: - rm -rf *_lib - -mod_sim_exp_lib: - vlib mod_sim_exp - -work_lib: - vlib work - -libs: mod_sim_exp work_lib - -mod_sim_exp_com: mod_sim_exp_lib - #echo -- - #echo building Modular Exponentiation Core - #echo -- - vcom $(VCOMOPS) -work mod_sim_exp $(CORE_SRC) - -mod_sim_exp_tb: work_lib - #echo -- - #echo building Modular Exponentiation Core Testbench - #echo -- - vcom $(VCOMOPS) -work work $(TB_SRC) - -mod_sim_exp: mod_sim_exp_com mod_sim_exp_tb - vsim -c -do mod_sim_exp.do -lib work mod_sim_exp_core_tb Index: branches/newRAMstyle/sw/ModMult/src/ModMult.c =================================================================== --- branches/newRAMstyle/sw/ModMult/src/ModMult.c (revision 67) +++ branches/newRAMstyle/sw/ModMult/src/ModMult.c (nonexistent) @@ -1,70 +0,0 @@ -/* - ============================================================================ - Name : ModExp.c - Author : - Version : - Copyright : Your copyright notice - Description : Hello World in C, Ansi-style - ============================================================================ - */ - -#include -#include -#include - -int main(void) { - unsigned int base_width; - mpz_t x, m, r, R, R2; - gmp_randstate_t state; - - gmp_randinit_mt(state); - mpz_init(x); - mpz_init(m); - mpz_init(r); - mpz_init(R); - mpz_init(R2); - - printf("-- input generator program\n"); - printf("-- generates test values for multiplier testbench\n"); - - while (1){ - - //read in base_width - scanf("%d", &base_width); - if (base_width == 0) break; - - //generate modulus (must be uneven) - mpz_urandomb(m, state, base_width); - mpz_setbit(m, 0); //uneven - - //generate x - mpz_urandomb(x, state, base_width); - - //calculate R - mpz_set_ui(R, 2); - mpz_powm_ui(R, R, base_width, m); //R = 2^n mod m - - //calculate R2 - mpz_set_ui(R2, 2); - mpz_powm(R2, R, R2, m); //R2 = R mod m = 2^2n mod m - - //calculate result - mpz_mul(r, x, R); - mpz_powm_ui(r, r, 1, m); - - printf("-- x, y, m, result\n"); - gmp_printf("%Zx\n", x); - gmp_printf("%Zx\n", R2); - gmp_printf("%Zx\n", m); - gmp_printf("%Zx\n", r); - } - - mpz_clear(x); - mpz_clear(R2); - mpz_clear(m); - mpz_clear(r); - mpz_clear(R); - gmp_randclear(state); - - return EXIT_SUCCESS; -} Index: branches/newRAMstyle/sw/ModMult/.cproject =================================================================== --- branches/newRAMstyle/sw/ModMult/.cproject (revision 67) +++ branches/newRAMstyle/sw/ModMult/.cproject (nonexistent) @@ -1,115 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: branches/newRAMstyle/sw/ModMult/.settings/org.eclipse.cdt.managedbuilder.core.prefs =================================================================== --- branches/newRAMstyle/sw/ModMult/.settings/org.eclipse.cdt.managedbuilder.core.prefs (revision 67) +++ branches/newRAMstyle/sw/ModMult/.settings/org.eclipse.cdt.managedbuilder.core.prefs (nonexistent) @@ -1,21 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/CPATH/delimiter=; -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/CPATH/operation=remove -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/append=true -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/appendContributed=true -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/CPATH/delimiter=; -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/CPATH/operation=remove -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/C_INCLUDE_PATH/delimiter=; -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/C_INCLUDE_PATH/operation=remove -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/append=true -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/appendContributed=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/append=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.2041168883/appendContributed=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/append=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.2071011908/appendContributed=true Index: branches/newRAMstyle/sw/ModMult/Release/ModMult.exe =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: branches/newRAMstyle/sw/ModMult/Release/ModMult.exe =================================================================== --- branches/newRAMstyle/sw/ModMult/Release/ModMult.exe (revision 67) +++ branches/newRAMstyle/sw/ModMult/Release/ModMult.exe (nonexistent)
branches/newRAMstyle/sw/ModMult/Release/ModMult.exe Property changes : Deleted: svn:mime-type ## -1 +0,0 ## -application/octet-stream \ No newline at end of property Index: branches/newRAMstyle/sw/ModMult/.project =================================================================== --- branches/newRAMstyle/sw/ModMult/.project (revision 67) +++ branches/newRAMstyle/sw/ModMult/.project (nonexistent) @@ -1,26 +0,0 @@ - - - ModMult - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - Index: branches/newRAMstyle/sw/ModExp/.project =================================================================== --- branches/newRAMstyle/sw/ModExp/.project (revision 67) +++ branches/newRAMstyle/sw/ModExp/.project (nonexistent) @@ -1,26 +0,0 @@ - - - ModExp - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - Index: branches/newRAMstyle/sw/ModExp/src/ModExp.c =================================================================== --- branches/newRAMstyle/sw/ModExp/src/ModExp.c (revision 67) +++ branches/newRAMstyle/sw/ModExp/src/ModExp.c (nonexistent) @@ -1,113 +0,0 @@ -/* - ============================================================================ - Name : ModExp.c - Author : - Version : - Copyright : Your copyright notice - Description : Hello World in C, Ansi-style - ============================================================================ - */ - -#include -#include -#include - -int main(void) { - unsigned int base_width, exp_width; - mpz_t m, g0, g1, e0, e1, R, R2, result, tmp, gt0, gt1, gt01; - gmp_randstate_t state; - - gmp_randinit_default(state); - mpz_init(m); - mpz_init(g0); - mpz_init(g1); - mpz_init(e0); - mpz_init(e1); - mpz_init(R); - mpz_init(R2); - mpz_init(result); - mpz_init(tmp); - mpz_init(gt0); - mpz_init(gt1); - mpz_init(gt01); - - printf("-- input generator program\n"); - printf("-- generates test values per bit input pair\n"); - - while (1){ - - //read in base_width - scanf("%d", &base_width); - if (base_width == 0) break; - scanf("%d", &exp_width); - - //generate modulus (must be uneven) - mpz_urandomb(m, state, base_width); - mpz_setbit(m, 0); //uneven - - //generate g0 - mpz_urandomb(g0, state, base_width); - - //generate g1 - mpz_urandomb(g1, state, base_width); - - //generate e0 - mpz_urandomb(e0, state, exp_width); - - //generate e1 - mpz_urandomb(e1, state, exp_width); - - //calculate R - mpz_set_ui(R, 2); - mpz_powm_ui(R, R, base_width, m); //R = 2^n mod m - - //calculate R2 - mpz_set_ui(R2, 2); - mpz_powm(R2, R, R2, m); //R2 = R mod m = 2^2n mod m - - //calc precompute values - mpz_mul(gt0, g0, R); - mpz_powm_ui(gt0, gt0, 1, m); - mpz_mul(gt1, g1, R); - mpz_powm_ui(gt1, gt1, 1, m); - mpz_mul(gt01, g0, g1); - mpz_mul(gt01, gt01, R); - mpz_powm_ui(gt01, gt01, 1, m); - - //calculate result - mpz_powm(result, g0, e0, m); - mpz_powm(tmp, g1, e1, m); - mpz_mul(result, result, tmp); - mpz_powm_ui(result, result, 1, m); - - printf("-- base_width, exp_width, g0, g1, e0, e1, m, R^2, result\n"); - printf("%d\n", base_width); - printf("%d\n", exp_width); - gmp_printf("%Zx\n", g0); - gmp_printf("%Zx\n", g1); - gmp_printf("%Zx\n", e0); - gmp_printf("%Zx\n", e1); - gmp_printf("%Zx\n", m); - gmp_printf("%Zx\n", R2); - gmp_printf("%Zx\n", R); - gmp_printf("%Zx\n", gt0); - gmp_printf("%Zx\n", gt1); - gmp_printf("%Zx\n", gt01); - gmp_printf("%Zx\n", result); - } - - mpz_clear(g0); - mpz_clear(g1); - mpz_clear(e0); - mpz_clear(e1); - mpz_clear(m); - mpz_clear(result); - mpz_clear(tmp); - mpz_clear(R); - mpz_clear(R2); - mpz_clear(gt0); - mpz_clear(gt1); - mpz_clear(gt01); - - return EXIT_SUCCESS; -} Index: branches/newRAMstyle/sw/ModExp/.cproject =================================================================== --- branches/newRAMstyle/sw/ModExp/.cproject (revision 67) +++ branches/newRAMstyle/sw/ModExp/.cproject (nonexistent) @@ -1,124 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Index: branches/newRAMstyle/sw/ModExp/.settings/org.eclipse.cdt.managedbuilder.core.prefs =================================================================== --- branches/newRAMstyle/sw/ModExp/.settings/org.eclipse.cdt.managedbuilder.core.prefs (revision 67) +++ branches/newRAMstyle/sw/ModExp/.settings/org.eclipse.cdt.managedbuilder.core.prefs (nonexistent) @@ -1,21 +0,0 @@ -eclipse.preferences.version=1 -environment/buildEnvironmentInclude/cdt.managedbuild.config.gnu.mingw.exe.debug.231013975/CPATH/delimiter=; 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-environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.231013975/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.231013975/append=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.debug.231013975/appendContributed=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.725964274/LIBRARY_PATH/delimiter=; -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.725964274/LIBRARY_PATH/operation=remove -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.725964274/append=true -environment/buildEnvironmentLibrary/cdt.managedbuild.config.gnu.mingw.exe.release.725964274/appendContributed=true Index: branches/newRAMstyle/sw/ModExp/Release/sim.txt =================================================================== --- branches/newRAMstyle/sw/ModExp/Release/sim.txt (revision 67) +++ branches/newRAMstyle/sw/ModExp/Release/sim.txt (nonexistent) @@ -1,7 +0,0 @@ -512 -32 -1024 -16 -1536 -16 -0 Index: branches/newRAMstyle/sw/ModExp/Release/ModExp.exe =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Index: branches/newRAMstyle/sw/ModExp/Release/ModExp.exe =================================================================== --- branches/newRAMstyle/sw/ModExp/Release/ModExp.exe (revision 67) +++ branches/newRAMstyle/sw/ModExp/Release/ModExp.exe (nonexistent)
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branches/newRAMstyle Property changes : Deleted: svn:ignore ## -1 +0,0 ## -.project

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