URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/openrisc/trunk/rtos
- from Rev 659 to Rev 664
- ↔ Reverse comparison
Rev 659 → Rev 664
/freertos-6.1.1/Source/portable/GCC/OpenRISC/port.c
85,42 → 85,15
return value; |
} |
|
|
/* |
* naked attribute is ignored or32-elf-gcc 4.5.1-or32-1.0rc1 |
* use assemble routines in portasm.S |
*/ |
#if 0 |
void vPortDisableInterrupts( void ) __attribute__ ((__naked__)) |
inline void vPortDisableInterrupts( void ) |
{ |
asm volatile ( \ |
" @ get current SR \n\t" \ |
" l.mfspr r3, r0, SPR_SR \n\t" \ |
" l.addi r4, r0, SPR_SR_TEE \n\t" \ |
" l.xori r4, r4, 0xffffffff \n\t" \ |
" l.and r3, r3, r4 \n\t" \ |
" l.addi r4, r0, SPR_SR_IEE \n\t" \ |
" l.xori r4, r4, 0xffffffff \n\t" \ |
" l.and r3, r3, r4 \n\t" \ |
" @ update SR \n\t" \ |
" l.mtspr r0, r3, SPR_SR \n\t" \ |
); |
mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt stop |
} |
|
void vPortEnableInterrupts( void ) __attribute__ ((__naked__)) |
inline void vPortEnableInterrupts( void ) |
{ |
asm volatile ( \ |
" @ get current SR \n\t" \ |
" l.mfspr r3, r0, SPR_SR \n\t" \ |
" @ enable Tick Timer Interrupt \n\t" \ |
" l.ori r3, r3, SPR_SR_TEE \n\t" \ |
" @ enable External Interrupt \n\t" \ |
" l.ori r3, r3, SPR_SR_IEE \n\t" \ |
" @ update SR \n\t" \ |
" l.mtspr r0, r3, SPR_SR \n\t" \ |
); |
mtspr(SPR_SR, mfspr(SPR_SR) | (SPR_SR_TEE|SPR_SR_IEE)); // Tick, interrupt start |
} |
#endif |
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/* |
131,9 → 104,9
*/ |
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) |
{ |
unsigned portLONG uTaskSR = mfspr(SPR_ESR_BASE); |
uTaskSR &= ~SPR_SR_SM; // User mode |
uTaskSR |= (SPR_SR_TEE | SPR_SR_IEE); // Tick interrupt enable, All External interupt enable |
unsigned portLONG uTaskSR = mfspr(SPR_SR); |
uTaskSR |= SPR_SR_SM; // Supervisor mode |
uTaskSR |= (SPR_SR_TEE | SPR_SR_IEE); // Tick interrupt enable, All External interupt enable |
|
/* Setup the initial stack of the task. The stack is set exactly as |
expected by the portRESTORE_CONTEXT() macro. */ |
/freertos-6.1.1/Source/portable/GCC/OpenRISC/portasm.S
3,36 → 3,6
.file "portasm.S" |
.section .text |
|
.text |
.global vPortDisableInterrupts |
.type vPortDisableInterrupts, %function |
vPortDisableInterrupts: |
l.mfspr r3, r0, SPR_SR # get current SR |
l.addi r4, r0, SPR_SR_TEE |
l.xori r4, r4, 0xffffffff |
l.and r3, r3, r4 # disable Tick Timer Interrupt |
l.addi r4, r0, SPR_SR_IEE |
l.xori r4, r4, 0xffffffff |
l.and r3, r3, r4 # disable External Interrupt |
l.mtspr r0, r3, SPR_SR # update SR |
l.jr r9 |
l.nop |
.size vPortDisableInterrupts, .-vPortDisableInterrupts |
|
|
.text |
.global vPortEnableInterrupts |
.type vPortEnableInterrupts, %function |
vPortEnableInterrupts: |
l.mfspr r3, r0, SPR_SR # get current SR |
l.ori r3, r3, SPR_SR_TEE # enable Tick Timer Interrup |
l.ori r3, r3, SPR_SR_IEE # enable External Interrupt |
l.mtspr r0, r3, SPR_SR # update SR |
l.jr r9 |
l.nop |
.size vPortEnableInterrupts, .-vPortEnableInterrupts |
|
|
.macro portSAVE_REGISTER |
l.addi r1, r1, -116 |
l.sw 0x00(r1), r3 |
232,29 → 202,11
.global vPortSystemCall |
.type vPortSystemCall, %function |
vPortSystemCall: |
l.sfeqi r11, 0xFCC |
l.bf 1f |
l.nop |
portSAVE_CONTEXT |
|
l.sw -120(r1), r11 |
l.lwz r11, -4(r1) |
portSAVE_REGISTER |
|
l.jal syscall_except |
l.lwz r3, -4(r1) |
|
portRESTORE_REGISTER |
l.rfe |
l.jal vTaskSwitchContext |
l.nop |
|
1: |
l.sw -132(r1), r11 |
l.lwz r11, -4(r1) |
portSAVE_CONTEXT |
|
l.jal syscall_except |
l.lwz r3, -4(r1) |
|
portRESTORE_CONTEXT |
.size vPortSystemCall, .-vPortSystemCall |
|
/freertos-6.1.1/Source/portable/GCC/OpenRISC/portmacro.h
83,10 → 83,9
#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) |
#define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 ) |
|
#define portYIELD_FROM_ISR() vTaskSwitchContext() |
#define portYIELD_FROM_ISR() portYIELD() |
#define portYIELD() { \ |
__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \ |
__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCC" ); \ |
__asm__ __volatile__ ( "l.nop " ); \ |
__asm__ __volatile__ ( "l.sys 0x0FCC" ); \ |
__asm__ __volatile__ ( "l.nop " ); \ |
} |
93,41 → 92,18
#define portNOP() __asm__ __volatile__ ( "l.nop" ) |
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/* |
* naked attribute is ignored or32-elf-gcc 4.5.1-or32-1.0rc1 |
* use assemble routines in portasm.S |
*/ |
#if 0 |
extern void vPortDisableInterrupts( void ) __attribute__ ((__naked__)); |
extern void vPortEnableInterrupts( void ) __attribute__ ((__naked__)); |
#else |
void vPortDisableInterrupts( void ); |
void vPortEnableInterrupts( void ); |
#endif |
|
#define portDISABLE_INTERRUPTS() vPortDisableInterrupts() |
#define portENABLE_INTERRUPTS() vPortEnableInterrupts() |
|
/*-----------------------------------------------------------*/ |
|
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// Critical section handling. |
// switch supervisormode, disable tick interrupt and all external interrupt, switch back usermode |
#define portENTER_CRITICAL() { \ |
__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \ |
__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCE" ); \ |
__asm__ __volatile__ ( "l.sys 0x0FCE" ); \ |
__asm__ __volatile__ ( "l.nop " ); \ |
} |
extern void vTaskEnterCritical( void ); |
extern void vTaskExitCritical( void ); |
#define portENTER_CRITICAL() vTaskEnterCritical() |
#define portEXIT_CRITICAL() vTaskExitCritical() |
|
// switch supervisormode, enable tick interrupt and all external interrupt, switch back usermode |
#define portEXIT_CRITICAL() { \ |
__asm__ __volatile__ ( "l.sw -4(r1), r11" ); \ |
__asm__ __volatile__ ( "l.addi r11, r0, 0x0FCF" ); \ |
__asm__ __volatile__ ( "l.sys 0x0FCF" ); \ |
__asm__ __volatile__ ( "l.nop " ); \ |
} |
|
/* Task function macros as described on the FreeRTOS.org WEB site. */ |
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
242,4 → 218,8
" l.nop \n\t" \ |
); |
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#ifdef __cplusplus |
} |
#endif |
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#endif /* PORTMACRO_H */ |