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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk/PCIe
    from Rev 36 to Rev 37
    Reverse comparison

Rev 36 → Rev 37

/sim/src/riffa_agent_class_pkg.sv
57,8 → 57,7
task queue_tx_constant(int len, int off, bit last, logic [(8*N)-1:0] value);
tr_h = new(len, off, last);
tr_h.constant(len, off, last, value);
tx_h.put(tr_h);
tx_q.put(tr_h);
queue_tx(tr_h);
endtask: queue_tx_constant
 
 
67,8 → 66,7
task queue_tx_counting(int len, int off, bit last);
tr_h = new(len, off, last);
tr_h.counting(len, off, last);
tx_h.put(tr_h);
tx_q.put(tr_h);
queue_tx(tr_h);
endtask: queue_tx_counting
 
 
77,8 → 75,7
task queue_tx_random(int len, int off, bit last);
tr_h = new(len, off, last);
tr_h.random(len, off, last);
tx_h.put(tr_h);
tx_q.put(tr_h);
queue_tx(tr_h);
endtask: queue_tx_random
 
 
/sim/src/riffa_bfm_class_pkg.sv
111,7 → 111,7
begin
if(error_count > max_mismatches)
break;
if(this.data[i] != to.data[i])
if(this.data[i] !== to.data[i])
begin
$display("!!! %16.t | ERROR! | 0x%x | this != to | 0x%x != 0x%x", $time, i, this.data[i], to.data[i]);
error_count++;
/sim/tests/tb_riffa_register_file/the_test.sv
67,9 → 67,15
 
// --------------------------------------------------------------------
tb_top.a_h.queue_rx(RW*B, 0, 1);
tb_top.a_h.wait_for_rx();
#200ns;
 
// --------------------------------------------------------------------
tb_top.a_h.tr_h = new(RW, 0, 1);
tb_top.a_h.tr_h.constant(RW, 0, 1, 1);
tb_top.a_h.queue_tx(tb_top.a_h.tr_h);
tb_top.a_h.wait_for_tx();
// --------------------------------------------------------------------
#200ns;
 
// --------------------------------------------------------------------
/src/RIFFA/riffa_axis_test_pattern.sv
58,8 → 58,7
//
axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out(.*);
 
// axis_test_patern #(.N(N), .W(W), .WPB(WPB))
axis_test_patern #(.W(W), .WPB(WPB))
axis_test_patern #(.N(N), .W(W), .WPB(WPB))
axis_test_patern_i(.*);
 
 
/src/RIFFA/riffa_register_file.sv
82,12 → 82,13
begin: register_j_gen
for(k = 0; k < RW; k = k + 1)
begin: register_k_gen
assign register_select[(j*RW) + k] = (rx_index[30:$clog2(RW)] == j);
assign register_select[(j*RW) + k] = (rx_index[30:$clog2(RW)] == j);
assign r_if.wr_en[(j*RW) + k] = rd_en & register_select[(j*RW) + k];
 
always_ff @(posedge clk)
if(reset)
r_if.register_out[(j*RW) + k] <= 0;
else if(rd_en & register_select[(j*RW) + k])
else if(r_if.wr_en[(j*RW) + k])
r_if.register_out[(j*RW) + k] <= rd_data[k*32 +: 32];
end
end
102,7 → 103,8
 
// --------------------------------------------------------------------
//
wire tx_ready = 1;
// write to register[0][0] to enable reading
wire tx_ready = r_if.wr_en[0] & rd_data[0];
wire tx_last = 1;
wire acked;
wire [31:0] tx_len = RC;
/src/RIFFA/riffa_register_if.sv
39,8 → 39,9
input reset
);
 
wire [31:0] register_in [RC-1:0];
reg [31:0] register_out [RC-1:0];
wire [31:0] register_in [RC-1:0];
reg [31:0] register_out [RC-1:0];
reg wr_en [RC-1:0];
 
 
// --------------------------------------------------------------------

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