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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk/avalon_lib/sim
    from Rev 32 to Rev 33
    Reverse comparison

Rev 32 → Rev 33

/tests/tb_ast_monitor/tb_ast_monitor.sv
58,12 → 58,6
 
 
// --------------------------------------------------------------------
//
 
 
 
 
// --------------------------------------------------------------------
// sim models
// | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
88,8 → 82,8
.ST_MAX_CHANNELS(ST_MAX_CHANNELS)
)
ast_monitor_i(.sink(src), .src(sink), .*);
 
 
// --------------------------------------------------------------------
//
ast_source
126,9 → 120,9
.ST_MAX_CHANNELS(ST_MAX_CHANNELS)
)
ast_sink_i(.*);
 
 
 
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
// | | | | | | | | | | | | | | | | |
/tests/tb_ast_monitor/the_test.sv
52,8 → 52,8
// --------------------------------------------------------------------
// set_verbosity(VERBOSITY_DEBUG);
tb_top.ast_source_i.st_source_bfm_i.init();
tb_top.ast_sink_i.st_sink_bfm_i.init();
tb_top.ast_source_i.bfm.init();
tb_top.ast_sink_i.bfm.init();
 
// --------------------------------------------------------------------
wait(~tb_rst);
60,30 → 60,51
 
// --------------------------------------------------------------------
#200ns;
tb_top.ast_source_i.st_source_bfm_i.set_transaction_data(0);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_sop(1);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_eop(0);
tb_top.ast_source_i.st_source_bfm_i.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h0000_0000);
tb_top.ast_source_i.bfm.set_transaction_sop(1);
tb_top.ast_source_i.bfm.set_transaction_eop(0);
tb_top.ast_source_i.bfm.push_transaction();
tb_top.ast_source_i.st_source_bfm_i.set_transaction_data(1);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_sop(0);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_eop(0);
tb_top.ast_source_i.st_source_bfm_i.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h1111_1111);
tb_top.ast_source_i.bfm.set_transaction_sop(0);
tb_top.ast_source_i.bfm.set_transaction_eop(0);
tb_top.ast_source_i.bfm.push_transaction();
tb_top.ast_source_i.st_source_bfm_i.set_transaction_data(2);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_sop(0);
tb_top.ast_source_i.st_source_bfm_i.set_transaction_eop(1);
tb_top.ast_source_i.st_source_bfm_i.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h2222_2222);
tb_top.ast_source_i.bfm.set_transaction_sop(0);
tb_top.ast_source_i.bfm.set_transaction_eop(1);
tb_top.ast_source_i.bfm.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h3333_3333);
tb_top.ast_source_i.bfm.set_transaction_sop(1);
tb_top.ast_source_i.bfm.set_transaction_eop(0);
tb_top.ast_source_i.bfm.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h4444_4444);
tb_top.ast_source_i.bfm.set_transaction_sop(0);
tb_top.ast_source_i.bfm.set_transaction_eop(0);
tb_top.ast_source_i.bfm.push_transaction();
tb_top.ast_source_i.bfm.set_transaction_data(32'h5555_5555);
tb_top.ast_source_i.bfm.set_transaction_sop(0);
tb_top.ast_source_i.bfm.set_transaction_eop(1);
tb_top.ast_source_i.bfm.push_transaction();
 
// --------------------------------------------------------------------
#200ns;
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(0);
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(0);
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.st_sink_bfm_i.set_ready(0);
@(posedge tb_clk) tb_top.ast_sink_i.bfm.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.bfm.set_ready(0);
repeat(2) @(posedge tb_clk);
tb_top.ast_sink_i.bfm.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.bfm.set_ready(0);
repeat(3) @(posedge tb_clk);
tb_top.ast_sink_i.bfm.set_ready(1);
repeat(3) @(posedge tb_clk);
tb_top.ast_sink_i.bfm.set_ready(0);
repeat(10) @(posedge tb_clk);
tb_top.ast_sink_i.bfm.set_ready(1);
@(posedge tb_clk) tb_top.ast_sink_i.bfm.set_ready(0);
 
 
// --------------------------------------------------------------------

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