URL
https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk
Subversion Repositories qaz_libs
Compare Revisions
- This comparison shows the changes necessary to convert path
/qaz_libs/trunk/axi4_stream_lib/sim
- from Rev 50 to Rev 49
- ↔ Reverse comparison
Rev 50 → Rev 49
/src/axis_bfm_pkg.sv
0,0 → 1,220
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
package axis_bfm_pkg; |
|
|
// -------------------------------------------------------------------- |
// |
import q_pkg::*; |
import bfm_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
class axis_tr_class #(N, I, D, U) |
extends transaction_class #(axis_tr_class #(N, I, D, U)); |
|
rand logic [(8*N)-1:0] tdata; |
rand logic [N-1:0] tstrb; |
rand logic [N-1:0] tkeep; |
rand logic tlast; |
rand logic [I-1:0] tid; |
rand logic [D-1:0] tdest; |
rand logic [U-1:0] tuser; |
|
// -------------------------------------------------------------------- |
// |
function void copy(TR_T from); |
// delay_class delay_h; |
this.tdata = from.tdata; |
this.tstrb = from.tstrb; |
this.tkeep = from.tkeep; |
this.tlast = from.tlast; |
this.tid = from.tid; |
this.tdest = from.tdest; |
this.tuser = from.tuser; |
endfunction: copy |
|
|
// -------------------------------------------------------------------- |
// |
endclass: axis_tr_class |
|
|
// -------------------------------------------------------------------- |
// |
class axis_tx_bfm_class #(N, I, D, U) |
extends blocking_transmission_q_class #(axis_tr_class #(.N(N), .I(I), .D(D), .U(U))); |
|
virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out; |
|
|
//-------------------------------------------------------------------- |
// |
function void set_default; |
axis_out.cb_m.tvalid <= 0; |
axis_out.cb_m.tdata <= 'bx; |
axis_out.cb_m.tstrb <= 'bx; |
axis_out.cb_m.tkeep <= 'bx; |
axis_out.cb_m.tlast <= 'bx; |
axis_out.cb_m.tid <= 'bx; |
axis_out.cb_m.tdest <= 'bx; |
axis_out.cb_m.tuser <= 'bx; |
endfunction: set_default |
|
|
//-------------------------------------------------------------------- |
// |
task tx_transaction(axis_tr_class #(.N(N), .I(I), .D(D), .U(U)) tr_h); |
axis_out.zero_cycle_delay(); |
repeat(tr_h.delay_h.delay) @(axis_out.cb_m); |
|
axis_out.cb_m.tvalid <= 1; |
axis_out.cb_m.tdata <= tr_h.tdata; |
axis_out.cb_m.tstrb <= 0; |
axis_out.cb_m.tkeep <= 0; |
axis_out.cb_m.tlast <= tr_h.tlast; |
axis_out.cb_m.tid <= 0; |
axis_out.cb_m.tdest <= 0; |
axis_out.cb_m.tuser <= tr_h.tuser; |
|
@(axis_out.cb_m); |
wait(axis_out.cb_m.tready); |
// @(axis_out.cb_m iff axis_out.cb_m.tready); |
|
set_default(); |
endtask: tx_transaction |
|
|
// -------------------------------------------------------------------- |
// |
event tx_done; |
|
task automatic transmit(ref Q_T tr_h); |
tx_transaction(tr_h); |
->tx_done; |
endtask: transmit |
|
|
//-------------------------------------------------------------------- |
// |
task init; |
set_default(); |
endtask: init |
|
|
//-------------------------------------------------------------------- |
// |
function new(virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out); |
this.axis_out = axis_out; |
tr_h = new(); |
fork |
init(); |
join_none |
$display("^^^ %16.t | %m", $time); |
endfunction: new |
|
// -------------------------------------------------------------------- |
// |
endclass: axis_tx_bfm_class |
|
|
// -------------------------------------------------------------------- |
// |
class axis_rx_bfm_class #(N, I, D, U) |
extends blocking_receiver_q_class #(axis_tr_class #(.N(N), .I(I), .D(D), .U(U))); |
|
virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in; |
|
|
//-------------------------------------------------------------------- |
// |
function void set_tready(bit value); |
axis_in.cb_s.tready <= value; |
endfunction: set_tready |
|
|
//-------------------------------------------------------------------- |
// |
task rx_transaction(axis_tr_class #(.N(N), .I(I), .D(D), .U(U)) tr_h); |
repeat(tr_h.delay_h.delay) @(axis_in.cb_s); |
axis_in.cb_s.tready <= 1; |
|
@(axis_in.cb_s); |
wait(axis_in.cb_s.tvalid); |
// @(axis_in.cb_s iff axis_in.cb_s.tvalid); |
|
tr_h.tdata <= axis_in.cb_s.tdata; |
tr_h.tstrb <= axis_in.cb_s.tstrb; |
tr_h.tkeep <= axis_in.cb_s.tkeep; |
tr_h.tlast <= axis_in.cb_s.tlast; |
tr_h.tid <= axis_in.cb_s.tid; |
tr_h.tdest <= axis_in.cb_s.tdest; |
tr_h.tuser <= axis_in.cb_s.tuser; |
|
axis_in.cb_s.tready <= 0; |
endtask: rx_transaction |
|
|
// -------------------------------------------------------------------- |
// |
event rx_frame_done; |
|
virtual task receive(ref Q_T tr_h); |
tr_h = new(); |
void'(tr_h.delay_h.next()); |
rx_transaction(tr_h); |
->rx_frame_done; |
endtask: receive |
|
|
//-------------------------------------------------------------------- |
// |
task init; |
set_tready(0); |
endtask: init |
|
|
//-------------------------------------------------------------------- |
// |
function new (virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in); |
this.axis_in = axis_in; |
fork |
init(); |
join_none |
$display("^^^ %16.t | %m", $time); |
endfunction: new |
|
endclass: axis_rx_bfm_class |
|
|
// -------------------------------------------------------------------- |
// |
endpackage: axis_bfm_pkg |
|
/src/tb_axis_to_axi4_agent_class_pkg.sv
0,0 → 1,158
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
package tb_axis_to_axi4_agent_class_pkg; |
|
// -------------------------------------------------------------------- |
// |
import axi4_memory_pkg::*; |
import axis_bfm_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
class tb_axis_to_axi4_agent_class #(N, A, I, D, U); |
|
axi4_memory_class #(A, N, I) m_h; |
axis_tx_bfm_class #(N, I, D, U) s_h; |
memory_tr_class #(A, N, I) m_tr_h; |
axis_tr_class #(N, I, D, U) s_tr_h; |
|
virtual axi4_if #(.A(A), .N(N), .I(I)) axi4_m; |
virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in; |
|
mailbox #(memory_tr_class #(A, N, I)) q; |
|
|
// -------------------------------------------------------------------- |
// |
task wait_for_sof; |
@(posedge axis_in.cb_s.tuser); |
$display("^^^ %16.t | %m", $time); |
endtask: wait_for_sof |
|
|
// -------------------------------------------------------------------- |
// |
task wait_for_dma_done(int bvalid_count); |
repeat(bvalid_count) |
@(axi4_m.cb_s iff axi4_m.cb_m.bvalid & axi4_m.cb_s.bready); |
$display("^^^ %16.t | %m", $time); |
endtask: wait_for_dma_done |
|
|
// -------------------------------------------------------------------- |
// |
task random_transaction(int addr, int size, int stride); |
m_h.clear_all(); |
m_tr_h = new(); |
m_tr_h.random(addr, size); |
q.put(m_tr_h); |
|
$display("^^^ %16.t | %m | m_tr_h.data.size = %x", $time, m_tr_h.data.size); |
for(int i = 0; i < m_tr_h.data.size; i += N) |
begin |
s_tr_h = new(); |
for(int k = 0; k < N; k++) |
begin |
s_tr_h.tdata[k*8 +: 8] = m_tr_h.data[i + k]; |
end |
|
if(i == 0) |
s_tr_h.tuser = 'b1; |
else |
s_tr_h.tuser = 'b0; |
|
if(i + N < m_tr_h.data.size) |
s_tr_h.tlast = 1'b0; |
else |
s_tr_h.tlast = 1'b1; |
|
s_h.q.put(s_tr_h); |
end |
|
wait_for_dma_done(size / stride); |
endtask: random_transaction |
|
|
// -------------------------------------------------------------------- |
// |
task automatic compare(int offset); |
byte data[]; |
|
$display("^^^ %16.t | %m", $time); |
$display("^^^ %16.t | q.num = %d", $time, q.num); |
$display("^^^ %16.t | s_h.q.num = %d", $time, s_h.q.num); |
$display("^^^ %16.t | m_tr_h.data.size = %d", $time, m_tr_h.data.size); |
|
if(q.try_get(m_tr_h) == 0) |
begin |
$display("!!! %16.t | ERROR!!! try_get(m_tr_h) == 0", $time); |
$stop; |
end |
|
data = new[m_tr_h.data.size]; |
m_h.dump_words(offset, data); |
|
foreach(m_tr_h.data[i]) |
if(data[i] != m_tr_h.data[i]) |
begin |
$display("!!! %16.t | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^", $time); |
$display("!!! %16.t | %x ", $time, i); |
$display("!!! %16.t | %x | %x |", $time, data[i], m_tr_h.data[i]); |
$stop; |
end |
|
$display("^^^ %16.t | %m | done!", $time); |
|
endtask: compare |
|
|
//-------------------------------------------------------------------- |
// |
function new |
( |
virtual axi4_if #(.A(A), .N(N), .I(I)) axi4_m, |
virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in |
); |
|
this.axi4_m = axi4_m; |
this.axis_in = axis_in; |
m_h = new(axi4_m); |
s_h = new(axis_in); |
q = new(); |
endfunction: new |
|
|
// -------------------------------------------------------------------- |
// |
endclass: tb_axis_to_axi4_agent_class |
|
// -------------------------------------------------------------------- |
// |
endpackage: tb_axis_to_axi4_agent_class_pkg |
/src/tb_axis_upsizer.sv
0,0 → 1,144
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
module tb_top(); |
|
// -------------------------------------------------------------------- |
// test bench clock & reset |
wire clk_200mhz; |
wire tb_clk = clk_200mhz; |
wire tb_rst; |
|
tb_base #(.PERIOD(5_000)) tb(clk_200mhz, tb_rst); |
|
|
// -------------------------------------------------------------------- |
// |
wire tb_rst_s; |
wire aclk = tb_clk; |
wire aresetn = ~tb_rst_s; |
|
sync_reset |
sync_reset_i(aclk, tb_rst, tb_rst_s); |
|
|
// -------------------------------------------------------------------- |
// |
import tb_axis_upsizer_class_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
axis_if #(.N(AVF_N), .U(AVF_U)) axis_in(.*); |
axis_if #(.N(AVF_N * S), .U(AVF_U * S)) axis_out(.*); |
|
|
// -------------------------------------------------------------------- |
// |
axis_upsizer |
#( |
.N(AVF_N), // data bus width in bytes |
.I(1), // TID width |
.D(1), // TDEST width |
.U(AVF_U), // TUSER width |
.S(S), // tdata size multiplier |
.USE_TSTRB(0), // set to 1 to enable, 0 to disable |
.USE_TKEEP(0), // set to 1 to enable, 0 to disable |
.BYTES_PER_TUSER(0) // bytes per tuser bit. Set to 0 for transfer based. |
) |
dut(.*); |
|
|
// -------------------------------------------------------------------- |
// sim models |
// | | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ |
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' |
|
// -------------------------------------------------------------------- |
// |
axis_checker #(.N(AVF_N * S), .I(1), .D(1), .U(AVF_U)) |
axis_checker_i(.*); |
|
|
// -------------------------------------------------------------------- |
// |
axis_if #(.N(AVF_N * S), .U(AVF_U)) avf_axis_in_if(.*); |
|
assign axis_out.tready = avf_axis_in_if.tready; |
assign avf_axis_in_if.tvalid = axis_out.tvalid; |
assign avf_axis_in_if.tdata = axis_out.tdata; |
assign avf_axis_in_if.tuser = {axis_out.tuser[(AVF_U*S)-1], axis_out.tuser[1:0]}; |
assign avf_axis_in_if.tlast = axis_out.tlast; |
|
|
// -------------------------------------------------------------------- |
// |
tb_axis_upsizer_class a_h; |
|
initial |
a_h = new(.avf_axis_in_if(avf_axis_in_if), .avf_axis_out_if(axis_in)); |
|
|
// -------------------------------------------------------------------- |
// |
|
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' |
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ |
// | | | | | | | | | | | | | | | | | |
// sim models |
// -------------------------------------------------------------------- |
|
|
// -------------------------------------------------------------------- |
// debug wires |
|
|
// -------------------------------------------------------------------- |
// test |
the_test test( tb_clk, tb_rst ); |
|
initial |
begin |
|
test.run_the_test(); |
|
$display("^^^---------------------------------"); |
$display("^^^ %16.t | Testbench done.", $time); |
$display("^^^---------------------------------"); |
|
$display("^^^---------------------------------"); |
|
$stop(); |
|
end |
|
endmodule |
|
|
|
/src/tb_axis_upsizer_agent_class_pkg.sv
0,0 → 1,129
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
package tb_axis_upsizer_agent_class_pkg; |
|
// -------------------------------------------------------------------- |
// |
import video_frame_pkg::*; |
import axis_video_frame_bfm_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
class tb_axis_upsizer_agent_class #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE, AVF_N, AVF_U, S); |
|
virtual axis_if #(.N(AVF_N * S), .U(AVF_U)) avf_axis_in_if; |
virtual axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis_out_if; |
|
avf_config_class c_h; |
|
avf_tx_class #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE, AVF_U) tx_h; |
avf_rx_class #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE * S, AVF_U) rx_h; |
|
video_frame_class clone_h; |
video_frame_class sent_f_h; |
video_frame_class rx_f_h; |
|
mailbox #(video_frame_class) q; |
|
|
// -------------------------------------------------------------------- |
// |
virtual task |
queue_frame |
( |
string pattern = "", |
int pixel = 0 |
); |
|
if(pattern != "") |
tx_h.make_frame(pattern, pixel); |
|
clone_h = tx_h.tx_bfm_h[0].f_h.clone(); |
tx_h.tx_bfm_h[0].put(clone_h); |
q.put(clone_h); |
|
$display("^^^ %16.t | %m | using %s pattern", $time, pattern); |
|
endtask: queue_frame |
|
|
// -------------------------------------------------------------------- |
// |
virtual task automatic |
compare_frame; |
|
int mismatch_count; |
|
$display("^^^ %16.t | %m", $time); |
|
q.get(sent_f_h); |
rx_h.rx_bfm_h[0].get(rx_f_h); |
mismatch_count = sent_f_h.compare(8, rx_f_h); |
|
endtask: compare_frame |
|
|
//-------------------------------------------------------------------- |
// |
function void init(avf_config_class in_c_h, avf_config_class out_c_h); |
|
rx_h = new(in_c_h, '{avf_axis_in_if}); |
tx_h = new(out_c_h, '{avf_axis_out_if}); |
|
this.q = new(); |
|
endfunction: init |
|
|
//-------------------------------------------------------------------- |
// |
function new |
( |
virtual axis_if #(.N(AVF_N * S), .U(AVF_U)) avf_axis_in_if, |
virtual axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis_out_if |
); |
|
this.avf_axis_in_if = avf_axis_in_if; |
this.avf_axis_out_if = avf_axis_out_if; |
endfunction: new |
|
|
// -------------------------------------------------------------------- |
// |
endclass: tb_axis_upsizer_agent_class |
|
// -------------------------------------------------------------------- |
// |
endpackage: tb_axis_upsizer_agent_class_pkg |
|
|
|
|
|
/src/tb_axis_upsizer_class_pkg.sv
0,0 → 1,114
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
package tb_axis_upsizer_class_pkg; |
|
// -------------------------------------------------------------------- |
// |
import axis_video_frame_bfm_pkg::*; |
import tb_axis_upsizer_agent_class_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
localparam WIDTH = 32; // tile width |
localparam HEIGHT = 16; // tile height |
localparam OUTPUTS_PER_TILE = 1; // outputs per tile |
localparam BYTES_PER_PIXEL = 2; |
localparam BITS_PER_PIXEL = 16; |
localparam VERTICAL_BLANKING = 20; |
|
localparam S = 4; // tdata size multiplier |
localparam AVF_N = BYTES_PER_PIXEL * OUTPUTS_PER_TILE; // data bus width in bytes |
localparam AVF_U = 3; // TUSER width |
|
|
// -------------------------------------------------------------------- |
// |
class tb_axis_upsizer_class |
extends tb_axis_upsizer_agent_class #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE, AVF_N, AVF_U, S); |
|
avf_config_class in_c_h; |
avf_config_class out_c_h; |
avf_tile_config_t tile_config[]; |
|
|
//-------------------------------------------------------------------- |
// |
function new |
( |
virtual axis_if #(.N(AVF_N * S), .U(AVF_U)) avf_axis_in_if, |
virtual axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis_out_if |
); |
|
super.new(avf_axis_in_if, avf_axis_out_if); |
|
this.tile_config = new[1]; |
this.tile_config[0].direction = RIGHT_DOWN; |
|
this.in_c_h = new |
( |
.width(WIDTH), |
.height(HEIGHT), |
.bytes_per_pixel(BYTES_PER_PIXEL), |
.bits_per_pixel(BITS_PER_PIXEL), |
.pixels_per_clk(OUTPUTS_PER_TILE * S), |
.name("IN_"), |
.vertical_blanking(VERTICAL_BLANKING), |
.tile(tile_config) |
); |
|
this.out_c_h = new |
( |
.width(WIDTH), |
.height(HEIGHT), |
.bytes_per_pixel(BYTES_PER_PIXEL), |
.bits_per_pixel(BITS_PER_PIXEL), |
.pixels_per_clk(OUTPUTS_PER_TILE), |
.name("OUT_"), |
.vertical_blanking(VERTICAL_BLANKING), |
.tile(tile_config) |
); |
|
super.init(in_c_h, out_c_h); |
|
endfunction: new |
|
|
// -------------------------------------------------------------------- |
// |
endclass: tb_axis_upsizer_class |
|
// -------------------------------------------------------------------- |
// |
endpackage: tb_axis_upsizer_class_pkg |
|
|
|
|
|
/src/tb_axis_register_slice.sv
0,0 → 1,159
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2015 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
|
|
module tb_top(); |
|
// -------------------------------------------------------------------- |
// test bench clock & reset |
wire clk_200mhz; |
wire tb_clk = clk_200mhz; |
wire tb_rst; |
wire aclk = tb_clk; |
wire aresetn = ~tb_rst; |
|
tb_base #( .PERIOD(5_000) ) tb( clk_200mhz, tb_rst ); |
|
|
// -------------------------------------------------------------------- |
// |
localparam TILES = 1; |
localparam WIDTH = 32; // tile width |
localparam HEIGHT = 16; // tile height |
localparam OUTPUTS_PER_TILE = 1; // outputs per tile |
localparam BYTES_PER_PIXEL = 2; |
localparam BITS_PER_PIXEL = 16; |
localparam VERTICAL_BLANKING = 20; |
|
|
// -------------------------------------------------------------------- |
// |
localparam AVF_N = BYTES_PER_PIXEL * OUTPUTS_PER_TILE; // data bus width in bytes |
localparam AVF_U = 1; // TUSER width |
|
axis_if #(.N(AVF_N), .U(AVF_U)) axis_in[TILES](.*); |
axis_if #(.N(AVF_N), .U(AVF_U)) axis_out[TILES](.*); |
|
|
// -------------------------------------------------------------------- |
// |
axis_register_slice #(.N(AVF_N), .U(AVF_U)) |
dut |
( |
.axis_en(1'b1), |
.axis_in(axis_in.slave[0]), |
.axis_out(axis_out.master[0]), |
.* |
); |
|
|
// -------------------------------------------------------------------- |
// |
import axis_video_frame_bfm_pkg::*; |
import avf_agent_class_pkg::*; |
|
|
// -------------------------------------------------------------------- |
// |
avf_agent_config_class avf_agent_config_h; |
avf_agent_class #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE) avf_agent_h; |
|
initial |
begin |
|
avf_agent_config_h = new |
( |
.width(WIDTH), |
.height(HEIGHT), |
.bytes_per_pixel(BYTES_PER_PIXEL), |
.bits_per_pixel(BITS_PER_PIXEL), |
.tiles(TILES), |
.outputs_per_tile(OUTPUTS_PER_TILE), |
.name("AVF_"), |
.vertical_blanking(VERTICAL_BLANKING) |
); |
|
avf_agent_config_h.tile[0].direction = RIGHT_DOWN; |
|
avf_agent_h = new |
( |
.avf_agent_config(avf_agent_config_h), |
.avf_axis_in_if(axis_out), |
.avf_axis_out_if(axis_in) |
); |
|
avf_agent_h.init(); |
|
end |
|
|
// -------------------------------------------------------------------- |
// sim models |
// | | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ |
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' |
|
// -------------------------------------------------------------------- |
// |
|
|
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' |
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ |
// | | | | | | | | | | | | | | | | | |
// sim models |
// -------------------------------------------------------------------- |
|
|
// -------------------------------------------------------------------- |
// debug wires |
for(genvar j = 0; j < TILES; j++) |
axis_video_debug #(BYTES_PER_PIXEL, OUTPUTS_PER_TILE) avf_debug(axis_out[j]); |
|
|
// -------------------------------------------------------------------- |
// test |
the_test test( tb_clk, tb_rst ); |
|
initial |
begin |
|
test.run_the_test(); |
|
$display("^^^---------------------------------"); |
$display("^^^ %16.t | Testbench done.", $time); |
$display("^^^---------------------------------"); |
|
$display("^^^---------------------------------"); |
|
$stop(); |
|
end |
|
endmodule |
|
|
|
/tests/legacy/tb_recursive_axis_catenate/the_test.sv
File deleted
/tests/legacy/tb_recursive_axis_catenate/sim.do
File deleted
/tests/legacy/tb_recursive_axis_mux/sim.do
File deleted
/tests/legacy/tb_recursive_axis_mux/init_test.do
File deleted
/tests/legacy/tb_recursive_axis_mux/the_test.sv
File deleted
/tests/legacy/defparam_test_case.zip
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
tests/legacy/defparam_test_case.zip
Property changes :
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: tests/legacy/tb_axis_upsizer/tb_axis_upsizer.f
===================================================================
--- tests/legacy/tb_axis_upsizer/tb_axis_upsizer.f (revision 50)
+++ tests/legacy/tb_axis_upsizer/tb_axis_upsizer.f (nonexistent)
@@ -1,6 +0,0 @@
-#
-
-${PROJECT_DIR}/sim/src/tb_axis_upsizer_agent_class_pkg.sv
-${PROJECT_DIR}/sim/src/tb_axis_upsizer_class_pkg.sv
-
-${PROJECT_DIR}/src/axis_upsizer.sv
Index: tests/legacy/tb_axis_upsizer/init_test.do
===================================================================
--- tests/legacy/tb_axis_upsizer/init_test.do (revision 50)
+++ tests/legacy/tb_axis_upsizer/init_test.do (nonexistent)
@@ -1,37 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-set env(ROOT_DIR) ../../../../..
-set env(PROJECT_DIR) ../../..
-set env(SIM_TARGET) fpga
-
-# load sim procedures
-do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
-
-radix -hexadecimal
-
-make_lib work 1
-
-sim_compile_all tb_packages
-sim_compile_all bfm_packages
-sim_compile_all axi4_lib
-sim_compile_all qaz_libs
-sim_compile_all sim
-vlog -f ./tb_axis_upsizer.f
-
-# simulation $root
-vlog $env(PROJECT_DIR)/sim/src/tb_axis_upsizer.sv
-
-# compile test last
-vlog ./the_test.sv
-
-# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
-
-# run the sim
-sim_run_test
-
-
-
Index: tests/legacy/tb_axis_upsizer/the_test.sv
===================================================================
--- tests/legacy/tb_axis_upsizer/the_test.sv (revision 50)
+++ tests/legacy/tb_axis_upsizer/the_test.sv (nonexistent)
@@ -1,98 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-`timescale 1ps/1ps
-
-
-module
- the_test(
- input tb_clk,
- input tb_rst
- );
-
- // --------------------------------------------------------------------
- //
- int mismatch_count = 0;
-
-
- // --------------------------------------------------------------------
- //
- task run_the_test;
-
- // --------------------------------------------------------------------
- // insert test below
- // --------------------------------------------------------------------
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench begun.\n", $time);
- $display("^^^---------------------------------");
-
- // --------------------------------------------------------------------
- tb_top.tb.timeout_stop(50us);
-
-
- // --------------------------------------------------------------------
- wait(tb_top.aresetn);
- #1us;
-
- // --------------------------------------------------------------------
- repeat(3) tb_top.a_h.queue_frame("counting");
- repeat(3) tb_top.a_h.compare_frame();
-
- // --------------------------------------------------------------------
- tb_top.a_h.tx_h.make_frame("constant", 16'habba);
- tb_top.a_h.queue_frame();
- tb_top.a_h.compare_frame();
-
- tb_top.a_h.queue_frame("random");
- tb_top.a_h.compare_frame();
-
- tb_top.a_h.queue_frame("constant", 16'hbeef);
- tb_top.a_h.compare_frame();
-
- tb_top.a_h.queue_frame("random");
- tb_top.a_h.rx_h.wait_for_rx_frames(1);
- tb_top.a_h.compare_frame();
-
- tb_top.a_h.queue_frame("counting");
- tb_top.a_h.compare_frame();
-
- repeat(3) tb_top.a_h.queue_frame("random");
- repeat(3) tb_top.a_h.compare_frame();
-
- // --------------------------------------------------------------------
- #1us;
- // #6us;
-
- // --------------------------------------------------------------------
- // insert test above
- // --------------------------------------------------------------------
-
- endtask
-
-
-endmodule
-
Index: tests/legacy/tb_axis_upsizer/sim.do
===================================================================
--- tests/legacy/tb_axis_upsizer/sim.do (revision 50)
+++ tests/legacy/tb_axis_upsizer/sim.do (nonexistent)
@@ -1,16 +0,0 @@
-#
-#
-
-
-quit -sim
-
-# vsim opt_tb_top
-vsim -novopt work.tb_top
-# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
-
-# log all signals
-log -r *
-
-# run -all
-
-
Index: tests/legacy/tb_axis_switch_allocator/the_test.sv
===================================================================
--- tests/legacy/tb_axis_switch_allocator/the_test.sv (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/the_test.sv (nonexistent)
@@ -1,88 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-`timescale 1ps/1ps
-
-
-module the_test(input tb_clk, input tb_rst);
-
- // --------------------------------------------------------------------
- //
- import tb_axis_switch_allocator_pkg::*;
-
- // --------------------------------------------------------------------
- //
- int i = 0;
-
- task automatic run_the_test;
-
- // --------------------------------------------------------------------
- // insert test below
- // --------------------------------------------------------------------
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench begun.", $time);
- $display("^^^---------------------------------");
-
- // --------------------------------------------------------------------
- tb_top.tb.timeout_stop(2ms);
- wait(~tb_rst);
-
- // --------------------------------------------------------------------
- #1us;
-
- // // --------------------------------------------------------------------
- // repeat(1)tb_top.a_h.queue_frame("counting");
-
- // // --------------------------------------------------------------------
- // repeat(1) tb_top.a_h.queue_frame("random");
- // repeat(1)tb_top.a_h.queue_frame("counting");
- // repeat(3) tb_top.a_h.queue_frame("random");
- // tb_top.a_h.queue_frame("constant", 16'habba);
-
- // // --------------------------------------------------------------------
- // for(i = 0; i < SD; i++)
- // begin
- // #1us;
- // tb_top.a_h.queue_frame("counting");
- // #8us;
- // end
-
- // --------------------------------------------------------------------
- repeat(SD * 2) tb_top.a_h.queue_frame("counting");
-
- // --------------------------------------------------------------------
- #100us;
-
- // --------------------------------------------------------------------
- // insert test above
- // --------------------------------------------------------------------
-
- endtask
-
-
-endmodule
-
Index: tests/legacy/tb_axis_switch_allocator/sim.do
===================================================================
--- tests/legacy/tb_axis_switch_allocator/sim.do (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/sim.do (nonexistent)
@@ -1,11 +0,0 @@
-#
-#
-
-quit -sim
-
-vsim -novopt work.tb_top
-# vsim -f ./sim.f work.tb_top
-
-# log all signals
-log -r *
-
Index: tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.f
===================================================================
--- tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.f (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.f (nonexistent)
@@ -1,6 +0,0 @@
-#
-
-${PROJECT_DIR}/src/axis_switch.sv
-${PROJECT_DIR}/src/recursive_axis_switch.sv
-
-${PROJECT_DIR}/src/axis_switch_allocator.sv
Index: tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.sv
===================================================================
--- tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (nonexistent)
@@ -1,118 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-// ----------------------------------------------------------------------------
-
-
-module tb_top();
-
- // --------------------------------------------------------------------
- // test bench clock & reset
- wire clk_100mhz;
- wire tb_clk = clk_100mhz;
- wire tb_rst;
-
- tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
-
-
- // --------------------------------------------------------------------
- //
- wire tb_rst_s;
- wire aclk = tb_clk;
- wire aresetn = ~tb_rst_s;
- wire clk = tb_clk;
- wire reset = tb_rst_s;
-
- sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
-
-
- // --------------------------------------------------------------------
- //
- import tb_axis_switch_allocator_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
- axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);
-
-
- // --------------------------------------------------------------------
- //
- axis_switch_allocator #(.N(N), .I(I), .D(D), .U(U), .U_IS_EOP(U_IS_EOP), .SA(SA))
- dut(.*);
-
-
- // --------------------------------------------------------------------
- // sim models
- // | | | | | | | | | | | | | | | | |
- // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
-
-
- // --------------------------------------------------------------------
- //
- tb_axis_switch_allocator_class a_h;
-
- initial
- a_h = new(axis_in, axis_out);
-
-
-
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
- // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
- // | | | | | | | | | | | | | | | | |
- // sim models
- // --------------------------------------------------------------------
-
-
- // --------------------------------------------------------------------
- // debug wires
-
-
- // --------------------------------------------------------------------
- // test
- the_test test(tb_clk, tb_rst);
-
- initial
- begin
-
- test.run_the_test();
-
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench done.", $time);
- $display("^^^---------------------------------");
-
- $display("^^^---------------------------------");
-
- $stop();
-
- end
-
-endmodule
-
-
-
Index: tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv
===================================================================
--- tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (nonexistent)
@@ -1,143 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-
-package tb_axis_switch_allocator_pkg;
-
- // --------------------------------------------------------------------
- //
- import video_frame_pkg::*;
- import axis_video_frame_bfm_pkg::*;
- import avf_agent_class_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- localparam AW = 32; // active width
- localparam AH = 16; // active height
- localparam B = 2; // bytes per pixel
- localparam T = 1; // pixels per clock
- localparam VERTICAL_BLANKING = AW * 4;
- localparam N = B * T; // data bus width in bytes
- localparam I = 1; // TID width
- localparam D = 1; // TDEST width
- localparam U = 3; // TUSER width
- localparam U_IS_EOP = 2;
- localparam SA = 3;
- localparam SD = 2 ** SA;
-
-
- // --------------------------------------------------------------------
- //
- class tb_axis_switch_allocator_class;
-
- avf_config_class c_h;
- avf_tile_config_t tile_config[];
-
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[];
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in;
-
- avf_tx_class #(B, T, U) tx_h;
- avf_rx_class #(B, T, U) rx_h;
-
- // video_frame_class clone_h;
- // video_frame_class sent_f_h;
- // video_frame_class rx_f_h;
-
- // mailbox #(video_frame_class) q[];
-
-
- // --------------------------------------------------------------------
- //
- task automatic
- queue_frame
- (
- string pattern = "",
- int pixel = 0
- );
- video_frame_class clone_h;
-
- if(pattern != "")
- tx_h.make_frame(pattern, pixel);
-
- foreach(tx_h.tx_bfm_h[i])
- begin
- clone_h = tx_h.tx_bfm_h[i].f_h.clone();
- tx_h.tx_bfm_h[i].put(clone_h);
- // q[i].put(clone_h);
- end
-
- $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
-
- endtask: queue_frame
-
-
- //--------------------------------------------------------------------
- //
- function new
- (
- virtual axis_if #(.N(N), .U(U)) axis_in,
- virtual axis_if #(.N(N), .U(U)) axis_out[]
- );
-
- this.axis_out = axis_out;
- this.axis_in = axis_in;
-
- this.tile_config = new[T];
- this.tile_config[0].direction = RIGHT_DOWN;
-
- this.c_h = new
- (
- .width(AW),
- .height(AH),
- .bytes_per_pixel(B),
- .bits_per_pixel(B * 8),
- .pixels_per_clk(T),
- .name("AVR_"),
- .vertical_blanking(VERTICAL_BLANKING),
- .tile(tile_config)
- );
-
- rx_h = new(c_h, axis_out);
- tx_h = new(c_h, '{axis_in});
-
- endfunction: new
-
-
- // --------------------------------------------------------------------
- //
- endclass: tb_axis_switch_allocator_class
-
-
-// --------------------------------------------------------------------
-//
-endpackage: tb_axis_switch_allocator_pkg
-
-
-
-
-
Index: tests/legacy/tb_axis_switch_allocator/init_test.do
===================================================================
--- tests/legacy/tb_axis_switch_allocator/init_test.do (revision 50)
+++ tests/legacy/tb_axis_switch_allocator/init_test.do (nonexistent)
@@ -1,35 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-# setup environment
-do ../../../../scripts/sim_env.do
-set env(SIM_TARGET) fpga
-set env(SIM_TB) tb_axis_switch_allocator
-
-radix -hexadecimal
-
-make_lib work 1
-
-sim_compile_lib $env(LIB_BASE_DIR) tb_packages
-sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
-sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
-sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
-sim_compile_lib $env(LIB_BASE_DIR) sim
-
-# compile simulation files
-vlog -f ./$env(SIM_TB).f
-
-# simulation $root
-vlog ./$env(SIM_TB)_pkg.sv
-vlog ./$env(SIM_TB).sv
-
-# compile test last
-vlog ./the_test.sv
-
-# run the sim
-sim_run_test
-
-
Index: tests/legacy/tb_axis_register_slice/sim.do
===================================================================
--- tests/legacy/tb_axis_register_slice/sim.do (revision 50)
+++ tests/legacy/tb_axis_register_slice/sim.do (nonexistent)
@@ -1,21 +0,0 @@
-#
-#
-
-
-quit -sim
-
-# vsim opt_tb_top
-
-vsim -novopt work.tb_top
-# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
-
-# vsim -voptargs="+acc=rn+/tb_top/dut" -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
-# vsim -pli "C:/Xilinx/Vivado/2015.4/lib/win64.o/libxil_vsim.dll" -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
-
-
-# # log all signals
-# log -r *
-
-# run -all
-
-
Index: tests/legacy/tb_axis_register_slice/wip.do
===================================================================
--- tests/legacy/tb_axis_register_slice/wip.do (revision 50)
+++ tests/legacy/tb_axis_register_slice/wip.do (nonexistent)
@@ -1,12 +0,0 @@
-#
-
-
-vlog -f ../../libs/axi4_stream_lib_verilog/axi4_stream_lib.f
-
-# simulation $root
-vlog ../../src/tb_axis_register_slice.sv
-
-# compile test last
-vlog ./the_test.sv
-
-
Index: tests/legacy/tb_axis_register_slice/init_test.do
===================================================================
--- tests/legacy/tb_axis_register_slice/init_test.do (revision 50)
+++ tests/legacy/tb_axis_register_slice/init_test.do (nonexistent)
@@ -1,35 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-set env(ROOT_DIR) ../../../../..
-set env(PROJECT_DIR) ../../..
-set env(SIM_TARGET) fpga
-
-# load sim procedures
-do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
-
-radix -hexadecimal
-
-make_lib work 1
-
-# sim_compile_all FPGA
-sim_compile_all sim
-sim_compile_all sync_fifo
-sim_compile_all axi4_stream_lib
-
-# simulation $root
-vlog $env(PROJECT_DIR)/sim/src/tb_axis_register_slice.sv
-
-# compile test last
-vlog ./the_test.sv
-
-# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
-
-# run the sim
-sim_run_test
-
-
-
Index: tests/legacy/tb_axis_register_slice/the_test.sv
===================================================================
--- tests/legacy/tb_axis_register_slice/the_test.sv (revision 50)
+++ tests/legacy/tb_axis_register_slice/the_test.sv (nonexistent)
@@ -1,79 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-`timescale 1ps/1ps
-
-
-module
- the_test(
- input tb_clk,
- input tb_rst
- );
-
- // --------------------------------------------------------------------
- //
- int mismatch_count = 0;
-
-
- // --------------------------------------------------------------------
- //
- task run_the_test;
-
- // --------------------------------------------------------------------
- // insert test below
- // --------------------------------------------------------------------
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench begun.\n", $time);
- $display("^^^---------------------------------");
- // --------------------------------------------------------------------
-
- // --------------------------------------------------------------------
- tb_top.tb.timeout_stop(4us);
- wait(~tb_rst);
-
-
- // --------------------------------------------------------------------
- repeat(100) @(posedge tb_clk);
- tb_top.avf_agent_h.make_frame("counting");
- tb_top.avf_agent_h.get_frame();
- tb_top.avf_agent_h.put_frame();
-
- wait(~tb_top.avf_agent_h.put_frame_active);
- wait(~tb_top.avf_agent_h.get_frame_active);
-
- mismatch_count = tb_top.avf_agent_h.compare_frame();
-
-
- // --------------------------------------------------------------------
- // insert test above
- // --------------------------------------------------------------------
-
- endtask
-
-
-endmodule
-
Index: tests/legacy/tb_axis_gear_box/tests_pkg.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/tests_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/tests_pkg.sv (nonexistent)
@@ -1,196 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-// --------------------------------------------------------------------
-//
-package tests_pkg;
-
- // --------------------------------------------------------------------
- //
- import uvm_pkg::*;
- `include "uvm_macros.svh"
- import axis_pkg::*;
- import tb_axis_gear_box_pkg::*;
- import tests_base_pkg::*;
-
- // --------------------------------------------------------------------
- //
- class t_counting extends test_base;
- `uvm_component_utils(t_counting)
-
- // --------------------------------------------------------------------
- //
- function new(string name = "my_test", uvm_component parent);
- super.new(name, parent);
- endfunction
-
- // --------------------------------------------------------------------
- //
- virtual function void end_of_elaboration_phase(uvm_phase phase);
- uvm_phase run_phase = uvm_run_phase::get();
- run_phase.phase_done.set_drain_time(this, 300ns);
- endfunction
-
- // --------------------------------------------------------------------
- //
- virtual task run_phase(uvm_phase phase);
- axis_counting_sequence #(dut_cfg.axis_cfg_in) seq_h;
- super.run_phase(phase);
- phase.raise_objection(this);
- fork
- repeat(3)
- begin
- seq_h = axis_counting_sequence #(dut_cfg.axis_cfg_in)::type_id::create("seq_h");
- seq_h.start(env_h.agent_h.sequencer);
- end
- join
- phase.drop_objection(this);
- endtask : run_phase
-
- // --------------------------------------------------------------------
- //
- endclass : t_counting
- // --------------------------------------------------------------------
- //
-
- // --------------------------------------------------------------------
- //
- class gear_box_sequence #(dut_config_t dut_cfg)
- extends uvm_sequence #(axis_sequence_item #(dut_cfg.axis_cfg_in));
- `uvm_object_param_utils(gear_box_sequence #(dut_cfg))
-
- rand int length = 7 * 3;
-
- // --------------------------------------------------------------------
- //
- typedef logic [15:0] packed_data_t[7];
-
- function packed_data_t next_data(int init);
- static logic [15:0] previous_value;
- logic [13:0] unpacked_data[8];
- logic [15:0] packed_data[7];
-
- if(init == 0)
- previous_value = 0;
-
- foreach(unpacked_data[i])
- begin
- unpacked_data[i] = previous_value;
- // $display("^^^ %16.t | unpacked_data[%0.d] = %h", $time, i, unpacked_data[i]);
- previous_value++;
- end
-
- packed_data = {<<16{{<<14{unpacked_data}}}};
-
- // $display("^^^ %16.t | %p", $time, packed_data);
-
- // foreach(packed_data[i])
- // $display("^^^ %16.t | packed_data[%0.d] = %h", $time, i, packed_data[i]);
-
- next_data = packed_data;
- endfunction
-
-
- // --------------------------------------------------------------------
- //
- virtual task body();
- localparam CHUNKS = 3;
- axis_sequence_item #(dut_cfg.axis_cfg_in) item;
- logic [15:0] data[7];
-
- item = axis_sequence_item #(dut_cfg.axis_cfg_in)::type_id::create("axis_sequence_item");
-
- for(int i = 0; i < CHUNKS; i++)
- begin
- data = next_data(i);
-
- foreach(data[k])
- begin
- start_item(item);
- item.tdata = data[k];
- item.tlast = (i == CHUNKS - 1) & (k == 0);
- item.tuser = 0;
- finish_item(item);
- // $display("^^^ %16.t | %d | %x", $time, (i * 7) + k, item.tdata);
- end
- end
-
- endtask
-
- // --------------------------------------------------------------------
- //
- function new(string name = "gear_box_sequence");
- super.new(name);
- endfunction
-
- // --------------------------------------------------------------------
- //
- endclass : gear_box_sequence
-
- // --------------------------------------------------------------------
- //
- class t_debug extends test_debug_base;
- `uvm_component_utils(t_debug)
-
- // --------------------------------------------------------------------
- //
- function new(string name = "t_debug", uvm_component parent);
- super.new(name, parent);
- endfunction
-
- // --------------------------------------------------------------------
- //
- function void end_of_elaboration_phase(uvm_phase phase);
- uvm_phase run_phase = uvm_run_phase::get();
- run_phase.phase_done.set_drain_time(this, 300ns);
- endfunction
-
- // --------------------------------------------------------------------
- //
- virtual task run_phase(uvm_phase phase);
- gear_box_sequence #(dut_cfg) seq_h;
- super.run_phase(phase);
- phase.raise_objection(this);
-
- fork
- repeat(3)
- begin
- seq_h = gear_box_sequence #(dut_cfg)::type_id::create("seq_h");
- seq_h.start(env_h.agent_h.sequencer);
- end
- join
-
- phase.drop_objection(this);
- endtask : run_phase
-
- // --------------------------------------------------------------------
- //
- endclass : t_debug
-
-// --------------------------------------------------------------------
-//
-endpackage: tests_pkg
Index: tests/legacy/tb_axis_gear_box/axis_pkg.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/axis_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/axis_pkg.sv (nonexistent)
@@ -1,328 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-// --------------------------------------------------------------------
-//
-package axis_pkg;
-
- // --------------------------------------------------------------------
- //
- import uvm_pkg::*;
- `include "uvm_macros.svh"
- import bfm_pkg::*;
-
- // --------------------------------------------------------------------
- //
- typedef struct
- {
- int unsigned N; // data bus width in bytes
- int unsigned I; // TID width
- int unsigned D; // TDEST width
- int unsigned U; // TUSER width
- bit USE_TSTRB; // set to 1 to enable, 0 to disable
- bit USE_TKEEP; // set to 1 to enable, 0 to disable
- bit USE_ROUTING; // set to 1 to enable, 0 to disable
- } axis_config_t;
-
- // --------------------------------------------------------------------
- //
- class axis_sequence_item #(axis_config_t cfg)
- extends uvm_sequence_item;
- `uvm_object_param_utils(axis_sequence_item #(cfg))
-
- // --------------------------------------------------------------------
- //
- localparam N = cfg.N;
- localparam I = cfg.I;
- localparam D = cfg.D;
- localparam U = cfg.U;
- localparam USE_TSTRB = cfg.USE_TSTRB;
- localparam USE_TKEEP = cfg.USE_TKEEP;
- localparam USE_ROUTING = cfg.USE_ROUTING;
-
- // --------------------------------------------------------------------
- //
- delay_class delay_h;
- rand logic [(8*N)-1:0] tdata;
- rand logic [N-1:0] tstrb;
- rand logic [N-1:0] tkeep;
- rand logic tlast;
- rand logic [I-1:0] tid;
- rand logic [D-1:0] tdest;
- rand logic [U-1:0] tuser;
-
- // --------------------------------------------------------------------
- //
- function new(string name = "");
- super.new(name);
- delay_h = new;
- endfunction : new
-
- // --------------------------------------------------------------------
- //
- function bit do_compare(uvm_object rhs, uvm_comparer comparer);
- axis_sequence_item #(cfg) tested;
- bit same;
-
- if (rhs==null)
- `uvm_fatal(get_type_name(), "| %m | comparison to a null pointer");
-
- if (!$cast(tested,rhs))
- same = 0;
- else
- same = super.do_compare(rhs, comparer)
- & (tested.tdata == tdata)
- & (USE_TSTRB ? (tested.tstrb == tstrb) : 1)
- & (USE_TKEEP ? (tested.tkeep == tkeep) : 1)
- & (tested.tlast == tlast)
- & (USE_ROUTING ? (tested.tid == tid) : 1)
- & (USE_ROUTING ? (tested.tdest == tdest) : 1)
- & (tested.tuser == tuser);
- return same;
- endfunction : do_compare
-
- // --------------------------------------------------------------------
- //
- function void do_copy(uvm_object rhs);
- axis_sequence_item #(cfg) item;
- assert(rhs != null) else
- `uvm_fatal(get_type_name(), "| %m | copy null transaction");
- super.do_copy(rhs);
- assert($cast(item,rhs)) else
- `uvm_fatal(get_type_name(), "| %m | failed cast");
- tdata = item.tdata;
- tstrb = item.tstrb;
- tkeep = item.tkeep;
- tlast = item.tlast;
- tid = item.tid;
- tdest = item.tdest;
- tuser = item.tuser;
- endfunction : do_copy
-
- // --------------------------------------------------------------------
- //
- function string convert2string();
- string s0, s1;
- s0 = $sformatf("| tdata: %h\n" ,tdata);
- s1 = $sformatf("| tlast: %1h | tuser: %h" , tlast, tuser);
- return {s1, s0};
- endfunction : convert2string
-
- // --------------------------------------------------------------------
- //
- endclass : axis_sequence_item
-
- // --------------------------------------------------------------------
- //
- class axis_driver #(parameter axis_config_t cfg)
- extends uvm_driver #(axis_sequence_item #(cfg));
- `uvm_component_param_utils(axis_driver#(cfg))
-
- // --------------------------------------------------------------------
- //
- localparam N = cfg.N;
- localparam I = cfg.I;
- localparam D = cfg.D;
- localparam U = cfg.U;
- localparam USE_TSTRB = cfg.USE_TSTRB;
- localparam USE_TKEEP = cfg.USE_TKEEP;
- localparam USE_ROUTING = cfg.USE_ROUTING;
-
- // --------------------------------------------------------------------
- //
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus;
-
- //--------------------------------------------------------------------
- //
- function void set_default;
- axis_bus.cb_m.tvalid <= 0;
- axis_bus.cb_m.tdata <= 'bx;
- axis_bus.cb_m.tstrb <= 'bx;
- axis_bus.cb_m.tkeep <= 'bx;
- axis_bus.cb_m.tlast <= 'bx;
- axis_bus.cb_m.tid <= 'bx;
- axis_bus.cb_m.tdest <= 'bx;
- axis_bus.cb_m.tuser <= 'bx;
- endfunction: set_default
-
- //--------------------------------------------------------------------
- //
- virtual task run_phase(uvm_phase phase);
- axis_sequence_item #(cfg) item;
- super.run_phase(phase);
-
- set_default();
- wait(~axis_bus.aresetn);
- @(axis_bus.cb_m);
-
- forever
- begin
- // seq_item_port.try_next_item(item);
- seq_item_port.get_next_item(item);
-
- axis_bus.cb_m.tvalid <= 1;
- axis_bus.cb_m.tdata <= item.tdata;
- axis_bus.cb_m.tstrb <= 0;
- axis_bus.cb_m.tkeep <= 0;
- axis_bus.cb_m.tlast <= item.tlast;
- axis_bus.cb_m.tid <= 0;
- axis_bus.cb_m.tdest <= 0;
- axis_bus.cb_m.tuser <= item.tuser;
-
- @(axis_bus.cb_m);
- wait(axis_bus.cb_m.tready);
- // @(axis_bus.cb_m iff axis_bus.cb_m.tready);
-
- set_default();
- repeat(item.delay_h.next()) @(axis_bus.cb_m);
-
- seq_item_port.item_done();
- end
- endtask : run_phase
-
- //--------------------------------------------------------------------
- //
- function new(string name, uvm_component parent);
- super.new(name, parent);
- endfunction
-
- // --------------------------------------------------------------------
- //
- endclass : axis_driver
-
- // --------------------------------------------------------------------
- //
- class axis_sequencer #(axis_config_t cfg)
- extends uvm_sequencer #(axis_sequence_item #(cfg));
- `uvm_component_param_utils(axis_sequencer #(cfg))
-
- // --------------------------------------------------------------------
- //
- function new(string name, uvm_component parent);
- super.new(name, parent);
- endfunction
-
- // --------------------------------------------------------------------
- //
- endclass : axis_sequencer
-
- // --------------------------------------------------------------------
- //
- class axis_counting_sequence #(axis_config_t cfg)
- extends uvm_sequence #(axis_sequence_item #(cfg));
- `uvm_object_param_utils(axis_counting_sequence #(cfg))
-
- rand int length = 16;
-
- // --------------------------------------------------------------------
- //
- virtual task body();
- axis_sequence_item #(cfg) item;
-
- for(int i = 0; i < length; i++)
- begin
- item = axis_sequence_item #(cfg)::type_id::create("axis_sequence_item");
-
- item.tdata = i;
- item.tlast = (i == length - 1);
-
- start_item (item);
- finish_item(item);
- end
- endtask
-
- // --------------------------------------------------------------------
- //
- function new(string name = "axis_counting_sequence");
- super.new(name);
- endfunction
-
- // --------------------------------------------------------------------
- //
- endclass : axis_counting_sequence
-
- // --------------------------------------------------------------------
- //
- class axis_agent #(axis_config_t cfg)
- extends uvm_agent;
- `uvm_component_param_utils(axis_agent #(cfg))
-
- // --------------------------------------------------------------------
- //
- localparam N = cfg.N;
- localparam I = cfg.I;
- localparam D = cfg.D;
- localparam U = cfg.U;
- localparam USE_TSTRB = cfg.USE_TSTRB;
- localparam USE_TKEEP = cfg.USE_TKEEP;
- localparam USE_ROUTING = cfg.USE_ROUTING;
-
- // --------------------------------------------------------------------
- //
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus;
-
- axis_driver #(cfg) driver;
- // my_monitor #(cfg) monitor;
- axis_sequencer #(cfg) sequencer;
-
- // --------------------------------------------------------------------
- //
- virtual function void build_phase(uvm_phase phase);
- super.build_phase(phase);
-
- if(!uvm_config_db #(virtual axis_if #(.N(N), .I(I), .D(D), .U(U)))::get(this, "", "axis_bus", axis_bus))
- `uvm_fatal(get_name(), "Couldn't get virtual interface!")
-
- driver = axis_driver #(cfg)::type_id::create("driver", this);
- // monitor = my_monitor #(cfg)::type_id::create("monitor" , this);
- sequencer = axis_sequencer #(cfg)::type_id::create("sequencer", this);
- endfunction
-
- // --------------------------------------------------------------------
- //
- virtual function void connect_phase(uvm_phase phase);
- super.connect_phase(phase);
-
- driver.axis_bus = axis_bus;
- // monitor.vif = vif;
-
- driver.seq_item_port.connect(sequencer.seq_item_export);
- endfunction
-
- // --------------------------------------------------------------------
- //
- function new(string name, uvm_component parent);
- super.new(name, parent);
- endfunction
-
- // --------------------------------------------------------------------
- //
- endclass : axis_agent
-
-// --------------------------------------------------------------------
-//
-endpackage: axis_pkg
Index: tests/legacy/tb_axis_gear_box/wip.do
===================================================================
--- tests/legacy/tb_axis_gear_box/wip.do (revision 50)
+++ tests/legacy/tb_axis_gear_box/wip.do (nonexistent)
@@ -1,11 +0,0 @@
-#
-
-# compile simulation files
-vlog -f ./$env(SIM_TB).f
-
-vlog ./$env(SIM_TB)_pkg.sv
-vlog ./tests_pkg.sv
-
-# simulation $root
-vlog ./$env(SIM_TB).sv
-
Index: tests/legacy/tb_axis_gear_box/init_test.do
===================================================================
--- tests/legacy/tb_axis_gear_box/init_test.do (revision 50)
+++ tests/legacy/tb_axis_gear_box/init_test.do (nonexistent)
@@ -1,42 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-# setup environment
-do ../../../../scripts/sim_env.do
-set env(SIM_TARGET) fpga
-set env(SIM_TB) tb_axis_gear_box
-
-radix -hexadecimal
-
-make_lib work 1
-
-sim_compile_lib $env(LIB_BASE_DIR) tb_packages
-sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
-sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
-sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
-sim_compile_lib $env(LIB_BASE_DIR) sim
-
-# AXI4 streaming package
-vlog ./axis_pkg.sv
-
-vlog ./$env(SIM_TB)_pkg.sv
-vlog ./tests_base_pkg.sv
-vlog ./tests_pkg.sv
-vlog ./tb_dut_if.sv
-
-# simulation $root
-vlog ./$env(SIM_TB).sv
-
-# compile simulation files
-vlog -f ./$env(SIM_TB).f
-
-# # compile test last
-# vlog ./the_test.sv
-
-# run the sim
-sim_run_test
-
-
Index: tests/legacy/tb_axis_gear_box/tb_axis_gear_box.f
===================================================================
--- tests/legacy/tb_axis_gear_box/tb_axis_gear_box.f (revision 50)
+++ tests/legacy/tb_axis_gear_box/tb_axis_gear_box.f (nonexistent)
@@ -1,6 +0,0 @@
-#
-
-./axis_pkg.sv
-
-${PROJECT_DIR}/src/axis_gear_box.sv
-
Index: tests/legacy/tb_axis_gear_box/tests_base_pkg.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/tests_base_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/tests_base_pkg.sv (nonexistent)
@@ -1,85 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-// --------------------------------------------------------------------
-//
-package tests_base_pkg;
-
- // --------------------------------------------------------------------
- //
- import uvm_pkg::*;
- `include "uvm_macros.svh"
- import tb_axis_gear_box_pkg::*;
-
- // --------------------------------------------------------------------
- //
- virtual class test_base extends uvm_test;
- `uvm_component_utils(test_base);
- tb_env env_h;
-
- // --------------------------------------------------------------------
- //
- function void build_phase(uvm_phase phase);
- env_h = tb_env::type_id::create("env_h",this);
- endfunction : build_phase
-
- // --------------------------------------------------------------------
- //
- function new (string name, uvm_component parent);
- super.new(name,parent);
- endfunction : new
-
- // --------------------------------------------------------------------
- //
- endclass : test_base
-
- // --------------------------------------------------------------------
- //
- class test_debug_base extends test_base;
- `uvm_component_utils(test_debug_base)
-
- // --------------------------------------------------------------------
- //
- function new (string name, uvm_component parent);
- super.new(name,parent);
- endfunction : new
-
- // --------------------------------------------------------------------
- //
- function void final_phase(uvm_phase phase);
- super.final_phase(phase);
- $display("^^^ %16.t | %m | Test Done!!!", $time);
- $stop;
- endfunction : final_phase
-
- // --------------------------------------------------------------------
- //
- endclass : test_debug_base
-
-// --------------------------------------------------------------------
-//
-endpackage: tests_base_pkg
Index: tests/legacy/tb_axis_gear_box/tb_dut_if.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/tb_dut_if.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/tb_dut_if.sv (nonexistent)
@@ -1,63 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-import tb_axis_gear_box_pkg::*;
-
-interface
- tb_dut_if #(dut_config_t dut_cfg)
- (
- input aclk,
- input aresetn
- );
-
- // --------------------------------------------------------------------
- //
- axis_if
- #(
- .N(dut_cfg.axis_cfg_in.N),
- .I(dut_cfg.axis_cfg_in.I),
- .D(dut_cfg.axis_cfg_in.D),
- .U(dut_cfg.axis_cfg_in.U)
- )
- axis_in(.*);
-
- // --------------------------------------------------------------------
- //
- axis_if
- #(
- .N(dut_cfg.axis_cfg_out.N),
- .I(dut_cfg.axis_cfg_out.I),
- .D(dut_cfg.axis_cfg_out.D),
- .U(dut_cfg.axis_cfg_out.U)
- )
- axis_out(.*);
-
-// --------------------------------------------------------------------
-//
-endinterface: tb_dut_if
-
-
Index: tests/legacy/tb_axis_gear_box/tb_axis_gear_box.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/tb_axis_gear_box.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/tb_axis_gear_box.sv (nonexistent)
@@ -1,90 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-// ----------------------------------------------------------------------------
-
-import tb_axis_gear_box_pkg::*;
-import tests_pkg::*;
-import uvm_pkg::*;
-`include "uvm_macros.svh"
-
-module tb_top();
-
- // --------------------------------------------------------------------
- // test bench clock & reset
- wire clk_100mhz;
- wire tb_clk = clk_100mhz;
- wire tb_rst;
-
- tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
-
- // --------------------------------------------------------------------
- //
- wire tb_rst_s;
- wire aclk = tb_clk;
- wire aresetn = ~tb_rst_s;
- wire clk = tb_clk;
- wire reset = tb_rst_s;
-
- sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
-
- // --------------------------------------------------------------------
- //
- import tb_axis_gear_box_pkg::*;
-
- // --------------------------------------------------------------------
- //
- tb_dut_if #(dut_cfg) dut_bus(.*);
-
- // --------------------------------------------------------------------
- //
- axis_gear_box
- dut
- (
- .axis_in(dut_bus.axis_in),
- .axis_out(dut_bus.axis_out),
- .aclk(dut_bus.aclk),
- .aresetn(dut_bus.aresetn)
- );
-
- // --------------------------------------------------------------------
- //
- assign dut_bus.axis_out.tready = 1;
-
- // --------------------------------------------------------------------
- //
- tb_dut_config #(dut_cfg) cfg_h;
-
- initial
- begin
- cfg_h = new(dut_bus);
- uvm_config_db #(tb_dut_config #(dut_cfg))::set(null, "*env_h", "tb_dut_config", cfg_h);
- run_test("t_debug");
- end
-
-// --------------------------------------------------------------------
-//
-endmodule
Index: tests/legacy/tb_axis_gear_box/tb_axis_gear_box_pkg.sv
===================================================================
--- tests/legacy/tb_axis_gear_box/tb_axis_gear_box_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_gear_box/tb_axis_gear_box_pkg.sv (nonexistent)
@@ -1,139 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-package tb_axis_gear_box_pkg;
-
- // --------------------------------------------------------------------
- //
- import uvm_pkg::*;
- `include "uvm_macros.svh"
- import axis_pkg::*;
-
- // --------------------------------------------------------------------
- //
- typedef struct
- {
- axis_config_t axis_cfg_in;
- axis_config_t axis_cfg_out;
- } dut_config_t;
-
- localparam dut_config_t dut_cfg =
- '{
- '{ N : 2 // data bus width in bytes.
- , I : 1 // TID width
- , D : 1 // TDEST width
- , U : 1 // TUSER width
- , USE_TSTRB : 0
- , USE_TKEEP : 0
- , USE_ROUTING : 0
- },
- '{ N : 2 // data bus width in bytes.
- , I : 1 // TID width
- , D : 1 // TDEST width
- , U : 1 // TUSER width
- , USE_TSTRB : 0
- , USE_TKEEP : 0
- , USE_ROUTING : 0
- }
- };
-
- // --------------------------------------------------------------------
- //
- class tb_dut_config #(dut_config_t dut_cfg);
-
- virtual tb_dut_if #(dut_cfg) dut_bus;
-
- // --------------------------------------------------------------------
- //
- function new(virtual tb_dut_if #(dut_cfg) dut_bus);
- this.dut_bus = dut_bus;
- endfunction : new
-
- // --------------------------------------------------------------------
- //
- endclass : tb_dut_config
-
- // --------------------------------------------------------------------
- //
- class tb_env extends uvm_env;
- `uvm_component_utils(tb_env);
-
- // --------------------------------------------------------------------
- //
- // coverage coverage_h;
- // scoreboard scoreboard_h;
- axis_agent #(dut_cfg.axis_cfg_in) agent_h;
-
- // --------------------------------------------------------------------
- //
- function new (string name, uvm_component parent);
- super.new(name,parent);
- endfunction : new
-
- // --------------------------------------------------------------------
- //
- function void build_phase(uvm_phase phase);
- tb_dut_config #(dut_cfg) cfg_h;
- if (!uvm_config_db#(tb_dut_config #(dut_cfg))::get(this, "", "tb_dut_config", cfg_h))
- `uvm_fatal(get_name(), "Couldn't get config object!")
-
- uvm_config_db
- #(
- virtual axis_if
- #( .N(dut_cfg.axis_cfg_in.N)
- , .I(dut_cfg.axis_cfg_in.I)
- , .D(dut_cfg.axis_cfg_in.D)
- , .U(dut_cfg.axis_cfg_in.U)
- )
- )::set(this, "*agent_h", "axis_bus", cfg_h.dut_bus.axis_in);
-
- // // analysis
- // coverage_h = coverage::type_id::create ("coverage_h",this);
- // scoreboard_h = scoreboard::type_id::create("scoreboard",this);
-
- agent_h = axis_agent #(dut_cfg.axis_cfg_in)::type_id::create("agent_h", this);
-
- endfunction : build_phase
-
- // // --------------------------------------------------------------------
- // //
- // function void connect_phase(uvm_phase phase);
-
- // endfunction : connect_phase
-
-// --------------------------------------------------------------------
-//
-endclass : tb_env
-
-// --------------------------------------------------------------------
-//
-endpackage: tb_axis_gear_box_pkg
-
-
-
-
-
Index: tests/legacy/tb_axis_gear_box/sim.do
===================================================================
--- tests/legacy/tb_axis_gear_box/sim.do (revision 50)
+++ tests/legacy/tb_axis_gear_box/sim.do (nonexistent)
@@ -1,11 +0,0 @@
-#
-#
-
-quit -sim
-
-vsim -novopt work.tb_top
-# vsim -f ./sim.f work.tb_top
-
-# # log all signals
-# log -r *
-
Index: tests/legacy/tb_recursive_axis_switch/init_test.do
===================================================================
--- tests/legacy/tb_recursive_axis_switch/init_test.do (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/init_test.do (nonexistent)
@@ -1,35 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-# setup environment
-do ../../../../scripts/sim_env.do
-set env(SIM_TARGET) fpga
-set env(SIM_TB) tb_recursive_axis_switch
-
-radix -hexadecimal
-
-make_lib work 1
-
-sim_compile_lib $env(LIB_BASE_DIR) tb_packages
-sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
-sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
-sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
-sim_compile_lib $env(LIB_BASE_DIR) sim
-
-# compile simulation files
-vlog -f ./$env(SIM_TB).f
-
-# simulation $root
-vlog ./$env(SIM_TB)_pkg.sv
-vlog ./$env(SIM_TB).sv
-
-# compile test last
-vlog ./the_test.sv
-
-# run the sim
-sim_run_test
-
-
Index: tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.f
===================================================================
--- tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.f (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.f (nonexistent)
@@ -1,5 +0,0 @@
-#
-
-${PROJECT_DIR}/src/axis_switch.sv
-${PROJECT_DIR}/src/recursive_axis_switch.sv
-
Index: tests/legacy/tb_recursive_axis_switch/the_test.sv
===================================================================
--- tests/legacy/tb_recursive_axis_switch/the_test.sv (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/the_test.sv (nonexistent)
@@ -1,86 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-`timescale 1ps/1ps
-
-
-module the_test(input tb_clk, input tb_rst);
-
- // --------------------------------------------------------------------
- //
- import tb_recursive_axis_switch_pkg::*;
-
- // --------------------------------------------------------------------
- //
- int i = 0;
-
- task automatic run_the_test;
-
- // --------------------------------------------------------------------
- // insert test below
- // --------------------------------------------------------------------
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench begun.", $time);
- $display("^^^---------------------------------");
-
- // --------------------------------------------------------------------
- tb_top.tb.timeout_stop(2ms);
- wait(~tb_rst);
-
- // --------------------------------------------------------------------
- #1us;
-
- // // --------------------------------------------------------------------
- // repeat(1)tb_top.a_h.queue_frame("counting");
-
- // // --------------------------------------------------------------------
- // repeat(1) tb_top.a_h.queue_frame("random");
- // repeat(1)tb_top.a_h.queue_frame("counting");
- // repeat(3) tb_top.a_h.queue_frame("random");
- // tb_top.a_h.queue_frame("constant", 16'habba);
-
- // --------------------------------------------------------------------
- for(i = 0; i < SD; i++)
- begin
- force tb_top.select = i;
- #1us;
- tb_top.a_h.queue_frame("counting");
- #8us;
- end
-
- // --------------------------------------------------------------------
- #5us;
-
- // --------------------------------------------------------------------
- // insert test above
- // --------------------------------------------------------------------
-
- endtask
-
-
-endmodule
-
Index: tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.sv
===================================================================
--- tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (nonexistent)
@@ -1,127 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-// ----------------------------------------------------------------------------
-
-`timescale 1ps/1ps
-
-module tb_top();
-
- // --------------------------------------------------------------------
- // test bench clock & reset
- wire clk_100mhz;
- wire tb_clk = clk_100mhz;
- wire tb_rst;
-
- tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
-
-
- // --------------------------------------------------------------------
- //
- wire tb_rst_s;
- wire aclk = tb_clk;
- wire aresetn = ~tb_rst_s;
- wire clk = tb_clk;
- wire reset = tb_rst_s;
-
- sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
-
-
- // --------------------------------------------------------------------
- //
- import tb_recursive_axis_switch_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
- axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);
-
-
- // --------------------------------------------------------------------
- //
- wire [SA-1:0] select = 0;
-
- recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA))
- dut(.*);
-
-
- // --------------------------------------------------------------------
- // sim models
- // | | | | | | | | | | | | | | | | |
- // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
-
-
- // // --------------------------------------------------------------------
- // //
- // initial
- // axis_out.cb_s.tready <= 1;
-
-
- // --------------------------------------------------------------------
- //
- tb_recursive_axis_switch_class a_h;
-
- initial
- a_h = new(axis_in, axis_out);
-
-
-
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
- // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
- // | | | | | | | | | | | | | | | | |
- // sim models
- // --------------------------------------------------------------------
-
-
- // --------------------------------------------------------------------
- // debug wires
-
-
- // --------------------------------------------------------------------
- // test
- the_test test(tb_clk, tb_rst);
-
- initial
- begin
-
- test.run_the_test();
-
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench done.", $time);
- $display("^^^---------------------------------");
-
- $display("^^^---------------------------------");
-
- $stop();
-
- end
-
-endmodule
-
-
-
Index: tests/legacy/tb_recursive_axis_switch/sim.do
===================================================================
--- tests/legacy/tb_recursive_axis_switch/sim.do (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/sim.do (nonexistent)
@@ -1,11 +0,0 @@
-#
-#
-
-quit -sim
-
-vsim -novopt work.tb_top
-# vsim -f ./sim.f work.tb_top
-
-# log all signals
-log -r *
-
Index: tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv
===================================================================
--- tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (revision 50)
+++ tests/legacy/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (nonexistent)
@@ -1,142 +0,0 @@
-//////////////////////////////////////////////////////////////////////
-//// ////
-//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
-//// ////
-//// This source file may be used and distributed without ////
-//// restriction provided that this copyright statement is not ////
-//// removed from the file and that any derivative work contains ////
-//// the original copyright notice and the associated disclaimer. ////
-//// ////
-//// This source file is free software; you can redistribute it ////
-//// and/or modify it under the terms of the GNU Lesser General ////
-//// Public License as published by the Free Software Foundation; ////
-//// either version 2.1 of the License, or (at your option) any ////
-//// later version. ////
-//// ////
-//// This source is distributed in the hope that it will be ////
-//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
-//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
-//// PURPOSE. See the GNU Lesser General Public License for more ////
-//// details. ////
-//// ////
-//// You should have received a copy of the GNU Lesser General ////
-//// Public License along with this source; if not, download it ////
-//// from http://www.opencores.org/lgpl.shtml ////
-//// ////
-//////////////////////////////////////////////////////////////////////
-
-
-package tb_recursive_axis_switch_pkg;
-
- // --------------------------------------------------------------------
- //
- import video_frame_pkg::*;
- import axis_video_frame_bfm_pkg::*;
- import avf_agent_class_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- localparam AW = 32; // active width
- localparam AH = 16; // active height
- localparam B = 2; // bytes per pixel
- localparam T = 1; // pixels per clock
- localparam VERTICAL_BLANKING = AW * 4;
- localparam N = B * T; // data bus width in bytes
- localparam I = 1; // TID width
- localparam D = 1; // TDEST width
- localparam U = 3; // TUSER width
- localparam SA = 2;
- localparam SD = 2 ** SA;
-
-
- // --------------------------------------------------------------------
- //
- class tb_recursive_axis_switch_class;
-
- avf_config_class c_h;
- avf_tile_config_t tile_config[];
-
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[];
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in;
-
- avf_tx_class #(B, T, U) tx_h;
- avf_rx_class #(B, T, U) rx_h;
-
- // video_frame_class clone_h;
- // video_frame_class sent_f_h;
- // video_frame_class rx_f_h;
-
- // mailbox #(video_frame_class) q[];
-
-
- // --------------------------------------------------------------------
- //
- task automatic
- queue_frame
- (
- string pattern = "",
- int pixel = 0
- );
- video_frame_class clone_h;
-
- if(pattern != "")
- tx_h.make_frame(pattern, pixel);
-
- foreach(tx_h.tx_bfm_h[i])
- begin
- clone_h = tx_h.tx_bfm_h[i].f_h.clone();
- tx_h.tx_bfm_h[i].put(clone_h);
- // q[i].put(clone_h);
- end
-
- $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
-
- endtask: queue_frame
-
-
- //--------------------------------------------------------------------
- //
- function new
- (
- virtual axis_if #(.N(N), .U(U)) axis_in,
- virtual axis_if #(.N(N), .U(U)) axis_out[]
- );
-
- this.axis_out = axis_out;
- this.axis_in = axis_in;
-
- this.tile_config = new[T];
- this.tile_config[0].direction = RIGHT_DOWN;
-
- this.c_h = new
- (
- .width(AW),
- .height(AH),
- .bytes_per_pixel(B),
- .bits_per_pixel(B * 8),
- .pixels_per_clk(T),
- .name("AVR_"),
- .vertical_blanking(VERTICAL_BLANKING),
- .tile(tile_config)
- );
-
- rx_h = new(c_h, axis_out);
- tx_h = new(c_h, '{axis_in});
-
- endfunction: new
-
-
- // --------------------------------------------------------------------
- //
- endclass: tb_recursive_axis_switch_class
-
-
-// --------------------------------------------------------------------
-//
-endpackage: tb_recursive_axis_switch_pkg
-
-
-
-
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/init_test.do
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/init_test.do (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/init_test.do (nonexistent)
@@ -1,34 +0,0 @@
-# ------------------------------------
-#
-# ------------------------------------
-
-global env
-
-# setup environment
-do ../../../../scripts/sim_env.do
-set env(SIM_TARGET) fpga
-set env(SIM_TB) tb_axis_to_axi4_basic_dma
-
-radix -hexadecimal
-
-make_lib work 1
-
-sim_compile_all tb_packages
-sim_compile_all bfm_packages
-sim_compile_all axi4_lib
-sim_compile_all qaz_lib
-sim_compile_all sim
-
-# compile simulation files
-vlog -f ./$env(SIM_TB).f
-
-# simulation $root
-vlog ./$env(SIM_TB)_pkg.sv
-vlog ./$env(SIM_TB).sv
-
-# compile test last
-vlog ./the_test.sv
-
-# run the sim
-sim_run_test
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/the_test.sv
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/the_test.sv (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/the_test.sv (nonexistent)
@@ -1,60 +0,0 @@
-// --------------------------------------------------------------------
-//
-// --------------------------------------------------------------------
-
-`timescale 1ps/1ps
-
-
-module
- the_test(
- input tb_clk,
- input tb_rst
- );
-
- // --------------------------------------------------------------------
- //
- import tb_axis_to_axi4_basic_dma_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- task run_the_test;
-
- // --------------------------------------------------------------------
- // insert test below
- // --------------------------------------------------------------------
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench begun.", $time);
- $display("^^^---------------------------------");
-
- // --------------------------------------------------------------------
- tb_top.tb.timeout_stop(50us);
-
- // --------------------------------------------------------------------
- wait(tb_top.aresetn);
- #200ns;
-
- // --------------------------------------------------------------------
- force tb_top.dma_enable = 1;
- #100ns;
-
- // --------------------------------------------------------------------
- repeat(8)
- begin
- tb_top.a_h.random_transaction(BASE_ADDRESS, BUFFER_SIZE, N * BURST_LENGTH);
- tb_top.a_h.compare(BASE_ADDRESS);
- end
-
- // --------------------------------------------------------------------
- #200ns;
-
- // --------------------------------------------------------------------
- // insert test above
- // --------------------------------------------------------------------
-
- endtask
-
-// --------------------------------------------------------------------
-//
-endmodule
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f (nonexistent)
@@ -1,12 +0,0 @@
-#
-
-${LIB_BASE_DIR}/axi4_stream_lib/sim/src/axis_bfm_pkg.sv
-${LIB_BASE_DIR}/axi4_lib/sim/src/axi4_models/axi4_memory_pkg.sv
-
-${PROJECT_DIR}/sim/src/tb_axis_to_axi4_agent_class_pkg.sv
-
-${PROJECT_DIR}/src/axis_to_axi4_basic_dma.sv
-
-./${SIM_TB}_pkg.sv
-./${SIM_TB}.sv
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv (nonexistent)
@@ -1,115 +0,0 @@
-// --------------------------------------------------------------------
-//
-// --------------------------------------------------------------------
-
-
-module tb_top();
-
- // --------------------------------------------------------------------
- // test bench clock & reset
- wire clk_200mhz;
- wire tb_clk = clk_200mhz;
- wire tb_rst;
-
- tb_base #(.PERIOD(5_000)) tb(clk_200mhz, tb_rst);
-
-
- // --------------------------------------------------------------------
- //
- wire tb_rst_s;
- wire aclk = tb_clk;
- wire aresetn = ~tb_rst_s;
-
- sync_reset
- sync_reset_i(aclk, tb_rst, tb_rst_s);
-
-
- // --------------------------------------------------------------------
- //
- import tb_axis_to_axi4_basic_dma_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- axi4_if #(.A(A), .N(N), .I(I)) axi4_m(.*);
- axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
-
-
- // --------------------------------------------------------------------
- //
- logic dma_enable = 0;
-
- axis_to_axi4_basic_dma
- #(
- .A(A),
- .N(N),
- .I(I),
- .BASE_ADDRESS(BASE_ADDRESS),
- .BUFFER_SIZE(BUFFER_SIZE),
- .BURST_LENGTH(BURST_LENGTH),
- .MAX_BURSTS(MAX_BURSTS),
- .BYTES_PER_TUSER(BYTES_PER_TUSER)
- )
- dut(.*);
-
-
- // --------------------------------------------------------------------
- // sim models
- // | | | | | | | | | | | | | | | | |
- // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
-
- // --------------------------------------------------------------------
- //
- axi4_checker #(.A(A), .N(N), .MAXWAITS(64))
- axi4_checker_i(.axi4_in(axi4_m));
-
-
- // --------------------------------------------------------------------
- //
- axis_checker #(.N(N), .I(I), .D(D), .U(U), .MAXWAITS(64))
- axis_checker_i(.axis_in(axis_in));
-
-
- // --------------------------------------------------------------------
- //
- tb_axis_to_axi4_basic_dma_class a_h;
-
- initial
- a_h = new(axi4_m, axis_in);
-
-
- // --------------------------------------------------------------------
- //
-
- // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
- // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
- // | | | | | | | | | | | | | | | | |
- // sim models
- // --------------------------------------------------------------------
-
-
- // --------------------------------------------------------------------
- // debug wires
-
-
- // --------------------------------------------------------------------
- // test
- the_test test(tb_clk, tb_rst);
-
- initial
- begin
-
- test.run_the_test();
-
- $display("^^^---------------------------------");
- $display("^^^ %16.t | Testbench done.", $time);
- $display("^^^---------------------------------");
-
- $display("^^^---------------------------------");
-
- $stop();
-
- end
-
-endmodule
Index: tests/legacy/tb_axis_to_axi4_basic_dma/sim.do
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/sim.do (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/sim.do (nonexistent)
@@ -1,13 +0,0 @@
-#
-#
-
-quit -sim
-
-vsim -novopt work.tb_top
-
-# log all signals
-log -r *
-
-# run -all
-
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv (nonexistent)
@@ -1,58 +0,0 @@
-// --------------------------------------------------------------------
-//
-// --------------------------------------------------------------------
-
-
-package tb_axis_to_axi4_basic_dma_pkg;
-
- // --------------------------------------------------------------------
- //
- import tb_axis_to_axi4_agent_class_pkg::*;
-
-
- // --------------------------------------------------------------------
- //
- localparam BASE_ADDRESS = 32'h0000_0000; // must be on 4K boundry
- localparam BUFFER_SIZE = 'h800;
- localparam BURST_LENGTH = 8'h08;
- localparam MAX_BURSTS = 4;
- localparam BYTES_PER_TUSER = 2; // bytes per tuser bit. Set to 0 for transfer based.
-
- localparam N = 8; // data bus width in bytes
- localparam A = 32; // address bus width
- localparam I = 1; // ID width
- localparam D = 1; // TDEST width
- localparam U = N / BYTES_PER_TUSER; // TUSER width
-
-
- // --------------------------------------------------------------------
- //
- class tb_axis_to_axi4_basic_dma_class
- extends tb_axis_to_axi4_agent_class #(N, A, I, D, U);
-
-
- //--------------------------------------------------------------------
- //
- function new
- (
- virtual axi4_if #(.A(A), .N(N), .I(I)) axi4_m,
- virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in
- );
-
- super.new(.axi4_m(axi4_m), .axis_in(axis_in));
-
- endfunction: new
-
-
- // --------------------------------------------------------------------
- //
- endclass: tb_axis_to_axi4_basic_dma_class
-
-// --------------------------------------------------------------------
-//
-endpackage: tb_axis_to_axi4_basic_dma_pkg
-
-
-
-
-
Index: tests/legacy/tb_axis_to_axi4_basic_dma/wip.do
===================================================================
--- tests/legacy/tb_axis_to_axi4_basic_dma/wip.do (revision 50)
+++ tests/legacy/tb_axis_to_axi4_basic_dma/wip.do (nonexistent)
@@ -1,11 +0,0 @@
-#
-
-vlog -f ./tb_axis_to_axi4_basic_dma.f
-
-# simulation $root
-vlog ./tb_axis_to_axi4_basic_dma.sv
-
-# compile test last
-vlog ./the_test.sv
-
-
Index: tests/tb_axis_gear_box/axis_pkg.sv
===================================================================
--- tests/tb_axis_gear_box/axis_pkg.sv (nonexistent)
+++ tests/tb_axis_gear_box/axis_pkg.sv (revision 49)
@@ -0,0 +1,328 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+// --------------------------------------------------------------------
+//
+package axis_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import uvm_pkg::*;
+ `include "uvm_macros.svh"
+ import bfm_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ typedef struct
+ {
+ int unsigned N; // data bus width in bytes
+ int unsigned I; // TID width
+ int unsigned D; // TDEST width
+ int unsigned U; // TUSER width
+ bit USE_TSTRB; // set to 1 to enable, 0 to disable
+ bit USE_TKEEP; // set to 1 to enable, 0 to disable
+ bit USE_ROUTING; // set to 1 to enable, 0 to disable
+ } axis_config_t;
+
+ // --------------------------------------------------------------------
+ //
+ class axis_sequence_item #(axis_config_t cfg)
+ extends uvm_sequence_item;
+ `uvm_object_param_utils(axis_sequence_item #(cfg))
+
+ // --------------------------------------------------------------------
+ //
+ localparam N = cfg.N;
+ localparam I = cfg.I;
+ localparam D = cfg.D;
+ localparam U = cfg.U;
+ localparam USE_TSTRB = cfg.USE_TSTRB;
+ localparam USE_TKEEP = cfg.USE_TKEEP;
+ localparam USE_ROUTING = cfg.USE_ROUTING;
+
+ // --------------------------------------------------------------------
+ //
+ delay_class delay_h;
+ rand logic [(8*N)-1:0] tdata;
+ rand logic [N-1:0] tstrb;
+ rand logic [N-1:0] tkeep;
+ rand logic tlast;
+ rand logic [I-1:0] tid;
+ rand logic [D-1:0] tdest;
+ rand logic [U-1:0] tuser;
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name = "");
+ super.new(name);
+ delay_h = new;
+ endfunction : new
+
+ // --------------------------------------------------------------------
+ //
+ function bit do_compare(uvm_object rhs, uvm_comparer comparer);
+ axis_sequence_item #(cfg) tested;
+ bit same;
+
+ if (rhs==null)
+ `uvm_fatal(get_type_name(), "| %m | comparison to a null pointer");
+
+ if (!$cast(tested,rhs))
+ same = 0;
+ else
+ same = super.do_compare(rhs, comparer)
+ & (tested.tdata == tdata)
+ & (USE_TSTRB ? (tested.tstrb == tstrb) : 1)
+ & (USE_TKEEP ? (tested.tkeep == tkeep) : 1)
+ & (tested.tlast == tlast)
+ & (USE_ROUTING ? (tested.tid == tid) : 1)
+ & (USE_ROUTING ? (tested.tdest == tdest) : 1)
+ & (tested.tuser == tuser);
+ return same;
+ endfunction : do_compare
+
+ // --------------------------------------------------------------------
+ //
+ function void do_copy(uvm_object rhs);
+ axis_sequence_item #(cfg) item;
+ assert(rhs != null) else
+ `uvm_fatal(get_type_name(), "| %m | copy null transaction");
+ super.do_copy(rhs);
+ assert($cast(item,rhs)) else
+ `uvm_fatal(get_type_name(), "| %m | failed cast");
+ tdata = item.tdata;
+ tstrb = item.tstrb;
+ tkeep = item.tkeep;
+ tlast = item.tlast;
+ tid = item.tid;
+ tdest = item.tdest;
+ tuser = item.tuser;
+ endfunction : do_copy
+
+ // --------------------------------------------------------------------
+ //
+ function string convert2string();
+ string s0, s1;
+ s0 = $sformatf("| tdata: %h\n" ,tdata);
+ s1 = $sformatf("| tlast: %1h | tuser: %h" , tlast, tuser);
+ return {s1, s0};
+ endfunction : convert2string
+
+ // --------------------------------------------------------------------
+ //
+ endclass : axis_sequence_item
+
+ // --------------------------------------------------------------------
+ //
+ class axis_driver #(parameter axis_config_t cfg)
+ extends uvm_driver #(axis_sequence_item #(cfg));
+ `uvm_component_param_utils(axis_driver#(cfg))
+
+ // --------------------------------------------------------------------
+ //
+ localparam N = cfg.N;
+ localparam I = cfg.I;
+ localparam D = cfg.D;
+ localparam U = cfg.U;
+ localparam USE_TSTRB = cfg.USE_TSTRB;
+ localparam USE_TKEEP = cfg.USE_TKEEP;
+ localparam USE_ROUTING = cfg.USE_ROUTING;
+
+ // --------------------------------------------------------------------
+ //
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus;
+
+ //--------------------------------------------------------------------
+ //
+ function void set_default;
+ axis_bus.cb_m.tvalid <= 0;
+ axis_bus.cb_m.tdata <= 'bx;
+ axis_bus.cb_m.tstrb <= 'bx;
+ axis_bus.cb_m.tkeep <= 'bx;
+ axis_bus.cb_m.tlast <= 'bx;
+ axis_bus.cb_m.tid <= 'bx;
+ axis_bus.cb_m.tdest <= 'bx;
+ axis_bus.cb_m.tuser <= 'bx;
+ endfunction: set_default
+
+ //--------------------------------------------------------------------
+ //
+ virtual task run_phase(uvm_phase phase);
+ axis_sequence_item #(cfg) item;
+ super.run_phase(phase);
+
+ set_default();
+ wait(~axis_bus.aresetn);
+ @(axis_bus.cb_m);
+
+ forever
+ begin
+ // seq_item_port.try_next_item(item);
+ seq_item_port.get_next_item(item);
+
+ axis_bus.cb_m.tvalid <= 1;
+ axis_bus.cb_m.tdata <= item.tdata;
+ axis_bus.cb_m.tstrb <= 0;
+ axis_bus.cb_m.tkeep <= 0;
+ axis_bus.cb_m.tlast <= item.tlast;
+ axis_bus.cb_m.tid <= 0;
+ axis_bus.cb_m.tdest <= 0;
+ axis_bus.cb_m.tuser <= item.tuser;
+
+ @(axis_bus.cb_m);
+ wait(axis_bus.cb_m.tready);
+ // @(axis_bus.cb_m iff axis_bus.cb_m.tready);
+
+ set_default();
+ repeat(item.delay_h.next()) @(axis_bus.cb_m);
+
+ seq_item_port.item_done();
+ end
+ endtask : run_phase
+
+ //--------------------------------------------------------------------
+ //
+ function new(string name, uvm_component parent);
+ super.new(name, parent);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ endclass : axis_driver
+
+ // --------------------------------------------------------------------
+ //
+ class axis_sequencer #(axis_config_t cfg)
+ extends uvm_sequencer #(axis_sequence_item #(cfg));
+ `uvm_component_param_utils(axis_sequencer #(cfg))
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name, uvm_component parent);
+ super.new(name, parent);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ endclass : axis_sequencer
+
+ // --------------------------------------------------------------------
+ //
+ class axis_counting_sequence #(axis_config_t cfg)
+ extends uvm_sequence #(axis_sequence_item #(cfg));
+ `uvm_object_param_utils(axis_counting_sequence #(cfg))
+
+ rand int length = 16;
+
+ // --------------------------------------------------------------------
+ //
+ virtual task body();
+ axis_sequence_item #(cfg) item;
+
+ for(int i = 0; i < length; i++)
+ begin
+ item = axis_sequence_item #(cfg)::type_id::create("axis_sequence_item");
+
+ item.tdata = i;
+ item.tlast = (i == length - 1);
+
+ start_item (item);
+ finish_item(item);
+ end
+ endtask
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name = "axis_counting_sequence");
+ super.new(name);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ endclass : axis_counting_sequence
+
+ // --------------------------------------------------------------------
+ //
+ class axis_agent #(axis_config_t cfg)
+ extends uvm_agent;
+ `uvm_component_param_utils(axis_agent #(cfg))
+
+ // --------------------------------------------------------------------
+ //
+ localparam N = cfg.N;
+ localparam I = cfg.I;
+ localparam D = cfg.D;
+ localparam U = cfg.U;
+ localparam USE_TSTRB = cfg.USE_TSTRB;
+ localparam USE_TKEEP = cfg.USE_TKEEP;
+ localparam USE_ROUTING = cfg.USE_ROUTING;
+
+ // --------------------------------------------------------------------
+ //
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus;
+
+ axis_driver #(cfg) driver;
+ // my_monitor #(cfg) monitor;
+ axis_sequencer #(cfg) sequencer;
+
+ // --------------------------------------------------------------------
+ //
+ virtual function void build_phase(uvm_phase phase);
+ super.build_phase(phase);
+
+ if(!uvm_config_db #(virtual axis_if #(.N(N), .I(I), .D(D), .U(U)))::get(this, "", "axis_bus", axis_bus))
+ `uvm_fatal(get_name(), "Couldn't get virtual interface!")
+
+ driver = axis_driver #(cfg)::type_id::create("driver", this);
+ // monitor = my_monitor #(cfg)::type_id::create("monitor" , this);
+ sequencer = axis_sequencer #(cfg)::type_id::create("sequencer", this);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ virtual function void connect_phase(uvm_phase phase);
+ super.connect_phase(phase);
+
+ driver.axis_bus = axis_bus;
+ // monitor.vif = vif;
+
+ driver.seq_item_port.connect(sequencer.seq_item_export);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name, uvm_component parent);
+ super.new(name, parent);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ endclass : axis_agent
+
+// --------------------------------------------------------------------
+//
+endpackage: axis_pkg
Index: tests/tb_axis_gear_box/init_test.do
===================================================================
--- tests/tb_axis_gear_box/init_test.do (nonexistent)
+++ tests/tb_axis_gear_box/init_test.do (revision 49)
@@ -0,0 +1,42 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_axis_gear_box
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_lib $env(LIB_BASE_DIR) tb_packages
+sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
+sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
+sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
+sim_compile_lib $env(LIB_BASE_DIR) sim
+
+# AXI4 streaming package
+vlog ./axis_pkg.sv
+
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./tests_base_pkg.sv
+vlog ./tests_pkg.sv
+vlog ./tb_dut_if.sv
+
+# simulation $root
+vlog ./$env(SIM_TB).sv
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# # compile test last
+# vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
+
Index: tests/tb_axis_gear_box/tb_axis_gear_box.f
===================================================================
--- tests/tb_axis_gear_box/tb_axis_gear_box.f (nonexistent)
+++ tests/tb_axis_gear_box/tb_axis_gear_box.f (revision 49)
@@ -0,0 +1,6 @@
+#
+
+./axis_pkg.sv
+
+${PROJECT_DIR}/src/axis_gear_box.sv
+
Index: tests/tb_axis_gear_box/tb_axis_gear_box.sv
===================================================================
--- tests/tb_axis_gear_box/tb_axis_gear_box.sv (nonexistent)
+++ tests/tb_axis_gear_box/tb_axis_gear_box.sv (revision 49)
@@ -0,0 +1,90 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+// ----------------------------------------------------------------------------
+
+import tb_axis_gear_box_pkg::*;
+import tests_pkg::*;
+import uvm_pkg::*;
+`include "uvm_macros.svh"
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_100mhz;
+ wire tb_clk = clk_100mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+ wire clk = tb_clk;
+ wire reset = tb_rst_s;
+
+ sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_gear_box_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ tb_dut_if #(dut_cfg) dut_bus(.*);
+
+ // --------------------------------------------------------------------
+ //
+ axis_gear_box
+ dut
+ (
+ .axis_in(dut_bus.axis_in),
+ .axis_out(dut_bus.axis_out),
+ .aclk(dut_bus.aclk),
+ .aresetn(dut_bus.aresetn)
+ );
+
+ // --------------------------------------------------------------------
+ //
+ assign dut_bus.axis_out.tready = 1;
+
+ // --------------------------------------------------------------------
+ //
+ tb_dut_config #(dut_cfg) cfg_h;
+
+ initial
+ begin
+ cfg_h = new(dut_bus);
+ uvm_config_db #(tb_dut_config #(dut_cfg))::set(null, "*env_h", "tb_dut_config", cfg_h);
+ run_test("t_debug");
+ end
+
+// --------------------------------------------------------------------
+//
+endmodule
Index: tests/tb_axis_gear_box/tb_axis_gear_box_pkg.sv
===================================================================
--- tests/tb_axis_gear_box/tb_axis_gear_box_pkg.sv (nonexistent)
+++ tests/tb_axis_gear_box/tb_axis_gear_box_pkg.sv (revision 49)
@@ -0,0 +1,139 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+package tb_axis_gear_box_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import uvm_pkg::*;
+ `include "uvm_macros.svh"
+ import axis_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ typedef struct
+ {
+ axis_config_t axis_cfg_in;
+ axis_config_t axis_cfg_out;
+ } dut_config_t;
+
+ localparam dut_config_t dut_cfg =
+ '{
+ '{ N : 2 // data bus width in bytes.
+ , I : 1 // TID width
+ , D : 1 // TDEST width
+ , U : 1 // TUSER width
+ , USE_TSTRB : 0
+ , USE_TKEEP : 0
+ , USE_ROUTING : 0
+ },
+ '{ N : 2 // data bus width in bytes.
+ , I : 1 // TID width
+ , D : 1 // TDEST width
+ , U : 1 // TUSER width
+ , USE_TSTRB : 0
+ , USE_TKEEP : 0
+ , USE_ROUTING : 0
+ }
+ };
+
+ // --------------------------------------------------------------------
+ //
+ class tb_dut_config #(dut_config_t dut_cfg);
+
+ virtual tb_dut_if #(dut_cfg) dut_bus;
+
+ // --------------------------------------------------------------------
+ //
+ function new(virtual tb_dut_if #(dut_cfg) dut_bus);
+ this.dut_bus = dut_bus;
+ endfunction : new
+
+ // --------------------------------------------------------------------
+ //
+ endclass : tb_dut_config
+
+ // --------------------------------------------------------------------
+ //
+ class tb_env extends uvm_env;
+ `uvm_component_utils(tb_env);
+
+ // --------------------------------------------------------------------
+ //
+ // coverage coverage_h;
+ // scoreboard scoreboard_h;
+ axis_agent #(dut_cfg.axis_cfg_in) agent_h;
+
+ // --------------------------------------------------------------------
+ //
+ function new (string name, uvm_component parent);
+ super.new(name,parent);
+ endfunction : new
+
+ // --------------------------------------------------------------------
+ //
+ function void build_phase(uvm_phase phase);
+ tb_dut_config #(dut_cfg) cfg_h;
+ if (!uvm_config_db#(tb_dut_config #(dut_cfg))::get(this, "", "tb_dut_config", cfg_h))
+ `uvm_fatal(get_name(), "Couldn't get config object!")
+
+ uvm_config_db
+ #(
+ virtual axis_if
+ #( .N(dut_cfg.axis_cfg_in.N)
+ , .I(dut_cfg.axis_cfg_in.I)
+ , .D(dut_cfg.axis_cfg_in.D)
+ , .U(dut_cfg.axis_cfg_in.U)
+ )
+ )::set(this, "*agent_h", "axis_bus", cfg_h.dut_bus.axis_in);
+
+ // // analysis
+ // coverage_h = coverage::type_id::create ("coverage_h",this);
+ // scoreboard_h = scoreboard::type_id::create("scoreboard",this);
+
+ agent_h = axis_agent #(dut_cfg.axis_cfg_in)::type_id::create("agent_h", this);
+
+ endfunction : build_phase
+
+ // // --------------------------------------------------------------------
+ // //
+ // function void connect_phase(uvm_phase phase);
+
+ // endfunction : connect_phase
+
+// --------------------------------------------------------------------
+//
+endclass : tb_env
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_axis_gear_box_pkg
+
+
+
+
+
Index: tests/tb_axis_gear_box/tb_dut_if.sv
===================================================================
--- tests/tb_axis_gear_box/tb_dut_if.sv (nonexistent)
+++ tests/tb_axis_gear_box/tb_dut_if.sv (revision 49)
@@ -0,0 +1,63 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+import tb_axis_gear_box_pkg::*;
+
+interface
+ tb_dut_if #(dut_config_t dut_cfg)
+ (
+ input aclk,
+ input aresetn
+ );
+
+ // --------------------------------------------------------------------
+ //
+ axis_if
+ #(
+ .N(dut_cfg.axis_cfg_in.N),
+ .I(dut_cfg.axis_cfg_in.I),
+ .D(dut_cfg.axis_cfg_in.D),
+ .U(dut_cfg.axis_cfg_in.U)
+ )
+ axis_in(.*);
+
+ // --------------------------------------------------------------------
+ //
+ axis_if
+ #(
+ .N(dut_cfg.axis_cfg_out.N),
+ .I(dut_cfg.axis_cfg_out.I),
+ .D(dut_cfg.axis_cfg_out.D),
+ .U(dut_cfg.axis_cfg_out.U)
+ )
+ axis_out(.*);
+
+// --------------------------------------------------------------------
+//
+endinterface: tb_dut_if
+
+
Index: tests/tb_axis_gear_box/tests_base_pkg.sv
===================================================================
--- tests/tb_axis_gear_box/tests_base_pkg.sv (nonexistent)
+++ tests/tb_axis_gear_box/tests_base_pkg.sv (revision 49)
@@ -0,0 +1,85 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+// --------------------------------------------------------------------
+//
+package tests_base_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import uvm_pkg::*;
+ `include "uvm_macros.svh"
+ import tb_axis_gear_box_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ virtual class test_base extends uvm_test;
+ `uvm_component_utils(test_base);
+ tb_env env_h;
+
+ // --------------------------------------------------------------------
+ //
+ function void build_phase(uvm_phase phase);
+ env_h = tb_env::type_id::create("env_h",this);
+ endfunction : build_phase
+
+ // --------------------------------------------------------------------
+ //
+ function new (string name, uvm_component parent);
+ super.new(name,parent);
+ endfunction : new
+
+ // --------------------------------------------------------------------
+ //
+ endclass : test_base
+
+ // --------------------------------------------------------------------
+ //
+ class test_debug_base extends test_base;
+ `uvm_component_utils(test_debug_base)
+
+ // --------------------------------------------------------------------
+ //
+ function new (string name, uvm_component parent);
+ super.new(name,parent);
+ endfunction : new
+
+ // --------------------------------------------------------------------
+ //
+ function void final_phase(uvm_phase phase);
+ super.final_phase(phase);
+ $display("^^^ %16.t | %m | Test Done!!!", $time);
+ $stop;
+ endfunction : final_phase
+
+ // --------------------------------------------------------------------
+ //
+ endclass : test_debug_base
+
+// --------------------------------------------------------------------
+//
+endpackage: tests_base_pkg
Index: tests/tb_axis_gear_box/tests_pkg.sv
===================================================================
--- tests/tb_axis_gear_box/tests_pkg.sv (nonexistent)
+++ tests/tb_axis_gear_box/tests_pkg.sv (revision 49)
@@ -0,0 +1,196 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+// --------------------------------------------------------------------
+//
+package tests_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import uvm_pkg::*;
+ `include "uvm_macros.svh"
+ import axis_pkg::*;
+ import tb_axis_gear_box_pkg::*;
+ import tests_base_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ class t_counting extends test_base;
+ `uvm_component_utils(t_counting)
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name = "my_test", uvm_component parent);
+ super.new(name, parent);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ virtual function void end_of_elaboration_phase(uvm_phase phase);
+ uvm_phase run_phase = uvm_run_phase::get();
+ run_phase.phase_done.set_drain_time(this, 300ns);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ virtual task run_phase(uvm_phase phase);
+ axis_counting_sequence #(dut_cfg.axis_cfg_in) seq_h;
+ super.run_phase(phase);
+ phase.raise_objection(this);
+ fork
+ repeat(3)
+ begin
+ seq_h = axis_counting_sequence #(dut_cfg.axis_cfg_in)::type_id::create("seq_h");
+ seq_h.start(env_h.agent_h.sequencer);
+ end
+ join
+ phase.drop_objection(this);
+ endtask : run_phase
+
+ // --------------------------------------------------------------------
+ //
+ endclass : t_counting
+ // --------------------------------------------------------------------
+ //
+
+ // --------------------------------------------------------------------
+ //
+ class gear_box_sequence #(dut_config_t dut_cfg)
+ extends uvm_sequence #(axis_sequence_item #(dut_cfg.axis_cfg_in));
+ `uvm_object_param_utils(gear_box_sequence #(dut_cfg))
+
+ rand int length = 7 * 3;
+
+ // --------------------------------------------------------------------
+ //
+ typedef logic [15:0] packed_data_t[7];
+
+ function packed_data_t next_data(int init);
+ static logic [15:0] previous_value;
+ logic [13:0] unpacked_data[8];
+ logic [15:0] packed_data[7];
+
+ if(init == 0)
+ previous_value = 0;
+
+ foreach(unpacked_data[i])
+ begin
+ unpacked_data[i] = previous_value;
+ // $display("^^^ %16.t | unpacked_data[%0.d] = %h", $time, i, unpacked_data[i]);
+ previous_value++;
+ end
+
+ packed_data = {<<16{{<<14{unpacked_data}}}};
+
+ // $display("^^^ %16.t | %p", $time, packed_data);
+
+ // foreach(packed_data[i])
+ // $display("^^^ %16.t | packed_data[%0.d] = %h", $time, i, packed_data[i]);
+
+ next_data = packed_data;
+ endfunction
+
+
+ // --------------------------------------------------------------------
+ //
+ virtual task body();
+ localparam CHUNKS = 3;
+ axis_sequence_item #(dut_cfg.axis_cfg_in) item;
+ logic [15:0] data[7];
+
+ item = axis_sequence_item #(dut_cfg.axis_cfg_in)::type_id::create("axis_sequence_item");
+
+ for(int i = 0; i < CHUNKS; i++)
+ begin
+ data = next_data(i);
+
+ foreach(data[k])
+ begin
+ start_item(item);
+ item.tdata = data[k];
+ item.tlast = (i == CHUNKS - 1) & (k == 0);
+ item.tuser = 0;
+ finish_item(item);
+ // $display("^^^ %16.t | %d | %x", $time, (i * 7) + k, item.tdata);
+ end
+ end
+
+ endtask
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name = "gear_box_sequence");
+ super.new(name);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ endclass : gear_box_sequence
+
+ // --------------------------------------------------------------------
+ //
+ class t_debug extends test_debug_base;
+ `uvm_component_utils(t_debug)
+
+ // --------------------------------------------------------------------
+ //
+ function new(string name = "t_debug", uvm_component parent);
+ super.new(name, parent);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ function void end_of_elaboration_phase(uvm_phase phase);
+ uvm_phase run_phase = uvm_run_phase::get();
+ run_phase.phase_done.set_drain_time(this, 300ns);
+ endfunction
+
+ // --------------------------------------------------------------------
+ //
+ virtual task run_phase(uvm_phase phase);
+ gear_box_sequence #(dut_cfg) seq_h;
+ super.run_phase(phase);
+ phase.raise_objection(this);
+
+ fork
+ repeat(3)
+ begin
+ seq_h = gear_box_sequence #(dut_cfg)::type_id::create("seq_h");
+ seq_h.start(env_h.agent_h.sequencer);
+ end
+ join
+
+ phase.drop_objection(this);
+ endtask : run_phase
+
+ // --------------------------------------------------------------------
+ //
+ endclass : t_debug
+
+// --------------------------------------------------------------------
+//
+endpackage: tests_pkg
Index: tests/tb_axis_gear_box/sim.do
===================================================================
--- tests/tb_axis_gear_box/sim.do (nonexistent)
+++ tests/tb_axis_gear_box/sim.do (revision 49)
@@ -0,0 +1,11 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+# vsim -f ./sim.f work.tb_top
+
+# # log all signals
+# log -r *
+
Index: tests/tb_axis_gear_box/wip.do
===================================================================
--- tests/tb_axis_gear_box/wip.do (nonexistent)
+++ tests/tb_axis_gear_box/wip.do (revision 49)
@@ -0,0 +1,11 @@
+#
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./tests_pkg.sv
+
+# simulation $root
+vlog ./$env(SIM_TB).sv
+
Index: tests/defparam_test_case.zip
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: tests/defparam_test_case.zip
===================================================================
--- tests/defparam_test_case.zip (nonexistent)
+++ tests/defparam_test_case.zip (revision 49)
tests/defparam_test_case.zip
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: tests/tb_axis_switch_allocator/init_test.do
===================================================================
--- tests/tb_axis_switch_allocator/init_test.do (nonexistent)
+++ tests/tb_axis_switch_allocator/init_test.do (revision 49)
@@ -0,0 +1,35 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_axis_switch_allocator
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_lib $env(LIB_BASE_DIR) tb_packages
+sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
+sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
+sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
+sim_compile_lib $env(LIB_BASE_DIR) sim
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# simulation $root
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./$env(SIM_TB).sv
+
+# compile test last
+vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
+
Index: tests/tb_axis_switch_allocator/sim.do
===================================================================
--- tests/tb_axis_switch_allocator/sim.do (nonexistent)
+++ tests/tb_axis_switch_allocator/sim.do (revision 49)
@@ -0,0 +1,11 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+# vsim -f ./sim.f work.tb_top
+
+# log all signals
+log -r *
+
Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f
===================================================================
--- tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f (nonexistent)
+++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f (revision 49)
@@ -0,0 +1,6 @@
+#
+
+${PROJECT_DIR}/src/axis_switch.sv
+${PROJECT_DIR}/src/recursive_axis_switch.sv
+
+${PROJECT_DIR}/src/axis_switch_allocator.sv
Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv
===================================================================
--- tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (nonexistent)
+++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (revision 49)
@@ -0,0 +1,118 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+// ----------------------------------------------------------------------------
+
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_100mhz;
+ wire tb_clk = clk_100mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+ wire clk = tb_clk;
+ wire reset = tb_rst_s;
+
+ sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
+
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_switch_allocator_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_switch_allocator #(.N(N), .I(I), .D(D), .U(U), .U_IS_EOP(U_IS_EOP), .SA(SA))
+ dut(.*);
+
+
+ // --------------------------------------------------------------------
+ // sim models
+ // | | | | | | | | | | | | | | | | |
+ // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+
+
+ // --------------------------------------------------------------------
+ //
+ tb_axis_switch_allocator_class a_h;
+
+ initial
+ a_h = new(axis_in, axis_out);
+
+
+
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+ // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
+ // | | | | | | | | | | | | | | | | |
+ // sim models
+ // --------------------------------------------------------------------
+
+
+ // --------------------------------------------------------------------
+ // debug wires
+
+
+ // --------------------------------------------------------------------
+ // test
+ the_test test(tb_clk, tb_rst);
+
+ initial
+ begin
+
+ test.run_the_test();
+
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench done.", $time);
+ $display("^^^---------------------------------");
+
+ $display("^^^---------------------------------");
+
+ $stop();
+
+ end
+
+endmodule
+
+
+
Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv
===================================================================
--- tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (nonexistent)
+++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (revision 49)
@@ -0,0 +1,143 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+
+package tb_axis_switch_allocator_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import video_frame_pkg::*;
+ import axis_video_frame_bfm_pkg::*;
+ import avf_agent_class_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ localparam AW = 32; // active width
+ localparam AH = 16; // active height
+ localparam B = 2; // bytes per pixel
+ localparam T = 1; // pixels per clock
+ localparam VERTICAL_BLANKING = AW * 4;
+ localparam N = B * T; // data bus width in bytes
+ localparam I = 1; // TID width
+ localparam D = 1; // TDEST width
+ localparam U = 3; // TUSER width
+ localparam U_IS_EOP = 2;
+ localparam SA = 3;
+ localparam SD = 2 ** SA;
+
+
+ // --------------------------------------------------------------------
+ //
+ class tb_axis_switch_allocator_class;
+
+ avf_config_class c_h;
+ avf_tile_config_t tile_config[];
+
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[];
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in;
+
+ avf_tx_class #(B, T, U) tx_h;
+ avf_rx_class #(B, T, U) rx_h;
+
+ // video_frame_class clone_h;
+ // video_frame_class sent_f_h;
+ // video_frame_class rx_f_h;
+
+ // mailbox #(video_frame_class) q[];
+
+
+ // --------------------------------------------------------------------
+ //
+ task automatic
+ queue_frame
+ (
+ string pattern = "",
+ int pixel = 0
+ );
+ video_frame_class clone_h;
+
+ if(pattern != "")
+ tx_h.make_frame(pattern, pixel);
+
+ foreach(tx_h.tx_bfm_h[i])
+ begin
+ clone_h = tx_h.tx_bfm_h[i].f_h.clone();
+ tx_h.tx_bfm_h[i].put(clone_h);
+ // q[i].put(clone_h);
+ end
+
+ $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
+
+ endtask: queue_frame
+
+
+ //--------------------------------------------------------------------
+ //
+ function new
+ (
+ virtual axis_if #(.N(N), .U(U)) axis_in,
+ virtual axis_if #(.N(N), .U(U)) axis_out[]
+ );
+
+ this.axis_out = axis_out;
+ this.axis_in = axis_in;
+
+ this.tile_config = new[T];
+ this.tile_config[0].direction = RIGHT_DOWN;
+
+ this.c_h = new
+ (
+ .width(AW),
+ .height(AH),
+ .bytes_per_pixel(B),
+ .bits_per_pixel(B * 8),
+ .pixels_per_clk(T),
+ .name("AVR_"),
+ .vertical_blanking(VERTICAL_BLANKING),
+ .tile(tile_config)
+ );
+
+ rx_h = new(c_h, axis_out);
+ tx_h = new(c_h, '{axis_in});
+
+ endfunction: new
+
+
+ // --------------------------------------------------------------------
+ //
+ endclass: tb_axis_switch_allocator_class
+
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_axis_switch_allocator_pkg
+
+
+
+
+
Index: tests/tb_axis_switch_allocator/the_test.sv
===================================================================
--- tests/tb_axis_switch_allocator/the_test.sv (nonexistent)
+++ tests/tb_axis_switch_allocator/the_test.sv (revision 49)
@@ -0,0 +1,88 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module the_test(input tb_clk, input tb_rst);
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_switch_allocator_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ int i = 0;
+
+ task automatic run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(2ms);
+ wait(~tb_rst);
+
+ // --------------------------------------------------------------------
+ #1us;
+
+ // // --------------------------------------------------------------------
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+
+ // // --------------------------------------------------------------------
+ // repeat(1) tb_top.a_h.queue_frame("random");
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+ // repeat(3) tb_top.a_h.queue_frame("random");
+ // tb_top.a_h.queue_frame("constant", 16'habba);
+
+ // // --------------------------------------------------------------------
+ // for(i = 0; i < SD; i++)
+ // begin
+ // #1us;
+ // tb_top.a_h.queue_frame("counting");
+ // #8us;
+ // end
+
+ // --------------------------------------------------------------------
+ repeat(SD * 2) tb_top.a_h.queue_frame("counting");
+
+ // --------------------------------------------------------------------
+ #100us;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_recursive_axis_catenate/init_test.do
===================================================================
--- tests/tb_recursive_axis_catenate/init_test.do (nonexistent)
+++ tests/tb_recursive_axis_catenate/init_test.do (revision 49)
@@ -0,0 +1,35 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_recursive_axis_catenate
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_lib $env(LIB_BASE_DIR) tb_packages
+sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
+sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
+sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
+sim_compile_lib $env(LIB_BASE_DIR) sim
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# simulation $root
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./$env(SIM_TB).sv
+
+# compile test last
+vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
+
Index: tests/tb_recursive_axis_catenate/sim.do
===================================================================
--- tests/tb_recursive_axis_catenate/sim.do (nonexistent)
+++ tests/tb_recursive_axis_catenate/sim.do (revision 49)
@@ -0,0 +1,11 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+# vsim -f ./sim.f work.tb_top
+
+# log all signals
+log -r *
+
Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f
===================================================================
--- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f (nonexistent)
+++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f (revision 49)
@@ -0,0 +1,6 @@
+#
+
+${PROJECT_DIR}/src/recursive_axis_mux.sv
+${PROJECT_DIR}/src/axis_catenate.sv
+${PROJECT_DIR}/src/recursive_axis_catenate.sv
+
Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv
===================================================================
--- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv (nonexistent)
+++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv (revision 49)
@@ -0,0 +1,126 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+// ----------------------------------------------------------------------------
+
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_100mhz;
+ wire tb_clk = clk_100mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+ wire clk = tb_clk;
+ wire reset = tb_rst_s;
+
+ sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
+
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_catenate_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[MD-1:0](.*);
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out(.*);
+
+
+ // --------------------------------------------------------------------
+ //
+ recursive_axis_catenate
+ #(
+ .N(N),
+ .I(I),
+ .D(D),
+ .U(U),
+ .U_IS_EOP(U_IS_EOP),
+ .MA(MA)
+ )
+ dut(.*);
+
+
+ // --------------------------------------------------------------------
+ // sim models
+ // | | | | | | | | | | | | | | | | |
+ // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+
+
+ // --------------------------------------------------------------------
+ //
+ tb_recursive_axis_catenate_class a_h;
+
+ initial
+ a_h = new(axis_in, axis_out);
+
+
+
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+ // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
+ // | | | | | | | | | | | | | | | | |
+ // sim models
+ // --------------------------------------------------------------------
+
+
+ // --------------------------------------------------------------------
+ // debug wires
+
+
+ // --------------------------------------------------------------------
+ // test
+ the_test test(tb_clk, tb_rst);
+
+ initial
+ begin
+
+ test.run_the_test();
+
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench done.", $time);
+ $display("^^^---------------------------------");
+
+ $display("^^^---------------------------------");
+
+ $stop();
+
+ end
+
+endmodule
+
+
+
Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv
===================================================================
--- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv (nonexistent)
+++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv (revision 49)
@@ -0,0 +1,144 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+
+package tb_recursive_axis_catenate_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import video_frame_pkg::*;
+ import axis_video_frame_bfm_pkg::*;
+ import avf_agent_class_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ localparam AW = 32; // active width
+ localparam AH = 16; // active height
+ localparam B = 2; // bytes per pixel
+ localparam T = 1; // pixels per clock
+ localparam VERTICAL_BLANKING = AW * 4;
+ localparam N = B * T; // data bus width in bytes
+ localparam I = 1; // TID width
+ localparam D = 1; // TDEST width
+ localparam U = 3; // TUSER width
+ // localparam U_IS_EOP = 2;
+ localparam U_IS_EOP = -1;
+ localparam MA = 2;
+ localparam MD = 2 ** MA;
+
+
+ // --------------------------------------------------------------------
+ //
+ class tb_recursive_axis_catenate_class;
+
+ avf_config_class c_h;
+ avf_tile_config_t tile_config[];
+
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out;
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[];
+
+ avf_tx_class #(B, T, U) tx_h;
+ avf_rx_class #(B, T, U) rx_h;
+
+ // video_frame_class clone_h;
+ // video_frame_class sent_f_h;
+ // video_frame_class rx_f_h;
+
+ // mailbox #(video_frame_class) q[];
+
+
+ // --------------------------------------------------------------------
+ //
+ task automatic
+ queue_frame
+ (
+ string pattern = "",
+ int pixel = 0
+ );
+ video_frame_class clone_h;
+
+ if(pattern != "")
+ tx_h.make_frame(pattern, pixel);
+
+ foreach(tx_h.tx_bfm_h[i])
+ begin
+ clone_h = tx_h.tx_bfm_h[i].f_h.clone();
+ tx_h.tx_bfm_h[i].put(clone_h);
+ // q[i].put(clone_h);
+ end
+
+ $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
+
+ endtask: queue_frame
+
+
+ //--------------------------------------------------------------------
+ //
+ function new
+ (
+ virtual axis_if #(.N(N), .U(U)) axis_in[],
+ virtual axis_if #(.N(N), .U(U)) axis_out
+ );
+
+ this.axis_out = axis_out;
+ this.axis_in = axis_in;
+
+ this.tile_config = new[T];
+ this.tile_config[0].direction = RIGHT_DOWN;
+
+ this.c_h = new
+ (
+ .width(AW),
+ .height(AH),
+ .bytes_per_pixel(B),
+ .bits_per_pixel(B * 8),
+ .pixels_per_clk(T),
+ .name("AVR_"),
+ .vertical_blanking(VERTICAL_BLANKING),
+ .tile(tile_config)
+ );
+
+ rx_h = new(c_h, '{axis_out});
+ tx_h = new(c_h, axis_in);
+
+ endfunction: new
+
+
+ // --------------------------------------------------------------------
+ //
+ endclass: tb_recursive_axis_catenate_class
+
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_recursive_axis_catenate_pkg
+
+
+
+
+
Index: tests/tb_recursive_axis_catenate/the_test.sv
===================================================================
--- tests/tb_recursive_axis_catenate/the_test.sv (nonexistent)
+++ tests/tb_recursive_axis_catenate/the_test.sv (revision 49)
@@ -0,0 +1,84 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module the_test(input tb_clk, input tb_rst);
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_catenate_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ int i = 0;
+
+ task automatic run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(2ms);
+ wait(~tb_rst);
+
+ // --------------------------------------------------------------------
+ #1us;
+
+ // --------------------------------------------------------------------
+ repeat(10)tb_top.a_h.queue_frame("counting");
+
+ // // --------------------------------------------------------------------
+ // repeat(1) tb_top.a_h.queue_frame("random");
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+ // repeat(3) tb_top.a_h.queue_frame("random");
+ // tb_top.a_h.queue_frame("constant", 16'habba);
+
+ // // --------------------------------------------------------------------
+ // for(i = 0; i < MD; i++)
+ // begin
+ // force tb_top.select = i;
+ // #20us;
+ // end
+
+ // --------------------------------------------------------------------
+ #100us;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_recursive_axis_mux/init_test.do
===================================================================
--- tests/tb_recursive_axis_mux/init_test.do (nonexistent)
+++ tests/tb_recursive_axis_mux/init_test.do (revision 49)
@@ -0,0 +1,35 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_recursive_axis_mux
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_lib $env(LIB_BASE_DIR) tb_packages
+sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
+sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
+sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
+sim_compile_lib $env(LIB_BASE_DIR) sim
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# simulation $root
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./$env(SIM_TB).sv
+
+# compile test last
+vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
+
Index: tests/tb_recursive_axis_mux/sim.do
===================================================================
--- tests/tb_recursive_axis_mux/sim.do (nonexistent)
+++ tests/tb_recursive_axis_mux/sim.do (revision 49)
@@ -0,0 +1,11 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+# vsim -f ./sim.f work.tb_top
+
+# log all signals
+log -r *
+
Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f
===================================================================
--- tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f (nonexistent)
+++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f (revision 49)
@@ -0,0 +1,4 @@
+#
+
+${PROJECT_DIR}/src/recursive_axis_mux.sv
+
Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv
===================================================================
--- tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv (nonexistent)
+++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv (revision 49)
@@ -0,0 +1,126 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+// ----------------------------------------------------------------------------
+
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_100mhz;
+ wire tb_clk = clk_100mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+ wire clk = tb_clk;
+ wire reset = tb_rst_s;
+
+ sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
+
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_mux_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[MD-1:0](.*);
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out(.*);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire [MA-1:0] select = 0;
+
+ recursive_axis_mux #(.N(N), .I(I), .D(D), .U(U), .MA(MA))
+ dut(.*);
+
+
+ // --------------------------------------------------------------------
+ // sim models
+ // | | | | | | | | | | | | | | | | |
+ // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+
+
+ // --------------------------------------------------------------------
+ //
+ initial
+ axis_out.cb_s.tready <= 1;
+
+
+ // --------------------------------------------------------------------
+ //
+ tb_recursive_axis_mux_class a_h;
+
+ initial
+ a_h = new(axis_in, axis_out);
+
+
+
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+ // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
+ // | | | | | | | | | | | | | | | | |
+ // sim models
+ // --------------------------------------------------------------------
+
+
+ // --------------------------------------------------------------------
+ // debug wires
+
+
+ // --------------------------------------------------------------------
+ // test
+ the_test test(tb_clk, tb_rst);
+
+ initial
+ begin
+
+ test.run_the_test();
+
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench done.", $time);
+ $display("^^^---------------------------------");
+
+ $display("^^^---------------------------------");
+
+ $stop();
+
+ end
+
+endmodule
+
+
+
Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv
===================================================================
--- tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv (nonexistent)
+++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv (revision 49)
@@ -0,0 +1,142 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+
+package tb_recursive_axis_mux_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import video_frame_pkg::*;
+ import axis_video_frame_bfm_pkg::*;
+ import avf_agent_class_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ localparam AW = 32; // active width
+ localparam AH = 16; // active height
+ localparam B = 2; // bytes per pixel
+ localparam T = 1; // pixels per clock
+ localparam VERTICAL_BLANKING = AW * 4;
+ localparam N = B * T; // data bus width in bytes
+ localparam I = 1; // TID width
+ localparam D = 1; // TDEST width
+ localparam U = 3; // TUSER width
+ localparam MA = 5;
+ localparam MD = 2 ** MA;
+
+
+ // --------------------------------------------------------------------
+ //
+ class tb_recursive_axis_mux_class;
+
+ avf_config_class c_h;
+ avf_tile_config_t tile_config[];
+
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out;
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[];
+
+ avf_tx_class #(B, T, U) tx_h;
+ avf_rx_class #(B, T, U) rx_h;
+
+ // video_frame_class clone_h;
+ // video_frame_class sent_f_h;
+ // video_frame_class rx_f_h;
+
+ // mailbox #(video_frame_class) q[];
+
+
+ // --------------------------------------------------------------------
+ //
+ task automatic
+ queue_frame
+ (
+ string pattern = "",
+ int pixel = 0
+ );
+ video_frame_class clone_h;
+
+ if(pattern != "")
+ tx_h.make_frame(pattern, pixel);
+
+ foreach(tx_h.tx_bfm_h[i])
+ begin
+ clone_h = tx_h.tx_bfm_h[i].f_h.clone();
+ tx_h.tx_bfm_h[i].put(clone_h);
+ // q[i].put(clone_h);
+ end
+
+ $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
+
+ endtask: queue_frame
+
+
+ //--------------------------------------------------------------------
+ //
+ function new
+ (
+ virtual axis_if #(.N(N), .U(U)) axis_in[],
+ virtual axis_if #(.N(N), .U(U)) axis_out
+ );
+
+ this.axis_out = axis_out;
+ this.axis_in = axis_in;
+
+ this.tile_config = new[T];
+ this.tile_config[0].direction = RIGHT_DOWN;
+
+ this.c_h = new
+ (
+ .width(AW),
+ .height(AH),
+ .bytes_per_pixel(B),
+ .bits_per_pixel(B * 8),
+ .pixels_per_clk(T),
+ .name("AVR_"),
+ .vertical_blanking(VERTICAL_BLANKING),
+ .tile(tile_config)
+ );
+
+ rx_h = new(c_h, '{axis_out});
+ tx_h = new(c_h, axis_in);
+
+ endfunction: new
+
+
+ // --------------------------------------------------------------------
+ //
+ endclass: tb_recursive_axis_mux_class
+
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_recursive_axis_mux_pkg
+
+
+
+
+
Index: tests/tb_recursive_axis_mux/the_test.sv
===================================================================
--- tests/tb_recursive_axis_mux/the_test.sv (nonexistent)
+++ tests/tb_recursive_axis_mux/the_test.sv (revision 49)
@@ -0,0 +1,84 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module the_test(input tb_clk, input tb_rst);
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_mux_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ int i = 0;
+
+ task automatic run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ // tb_top.tb.timeout_stop(2ms);
+ wait(~tb_rst);
+
+ // --------------------------------------------------------------------
+ #1us;
+
+ // --------------------------------------------------------------------
+ repeat(1)tb_top.a_h.queue_frame("counting");
+
+ // // --------------------------------------------------------------------
+ // repeat(1) tb_top.a_h.queue_frame("random");
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+ // repeat(3) tb_top.a_h.queue_frame("random");
+ // tb_top.a_h.queue_frame("constant", 16'habba);
+
+ // --------------------------------------------------------------------
+ for(i = 0; i < MD; i++)
+ begin
+ force tb_top.select = i;
+ #20us;
+ end
+
+ // --------------------------------------------------------------------
+ #10us;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_recursive_axis_switch/init_test.do
===================================================================
--- tests/tb_recursive_axis_switch/init_test.do (nonexistent)
+++ tests/tb_recursive_axis_switch/init_test.do (revision 49)
@@ -0,0 +1,35 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_recursive_axis_switch
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_lib $env(LIB_BASE_DIR) tb_packages
+sim_compile_lib $env(LIB_BASE_DIR) bfm_packages
+sim_compile_lib $env(LIB_BASE_DIR) axi4_lib
+sim_compile_lib $env(LIB_BASE_DIR) qaz_lib
+sim_compile_lib $env(LIB_BASE_DIR) sim
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# simulation $root
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./$env(SIM_TB).sv
+
+# compile test last
+vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
+
Index: tests/tb_recursive_axis_switch/sim.do
===================================================================
--- tests/tb_recursive_axis_switch/sim.do (nonexistent)
+++ tests/tb_recursive_axis_switch/sim.do (revision 49)
@@ -0,0 +1,11 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+# vsim -f ./sim.f work.tb_top
+
+# log all signals
+log -r *
+
Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f
===================================================================
--- tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f (nonexistent)
+++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f (revision 49)
@@ -0,0 +1,5 @@
+#
+
+${PROJECT_DIR}/src/axis_switch.sv
+${PROJECT_DIR}/src/recursive_axis_switch.sv
+
Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv
===================================================================
--- tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (nonexistent)
+++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (revision 49)
@@ -0,0 +1,127 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+// ----------------------------------------------------------------------------
+
+`timescale 1ps/1ps
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_100mhz;
+ wire tb_clk = clk_100mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+ wire clk = tb_clk;
+ wire reset = tb_rst_s;
+
+ sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
+
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_switch_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire [SA-1:0] select = 0;
+
+ recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA))
+ dut(.*);
+
+
+ // --------------------------------------------------------------------
+ // sim models
+ // | | | | | | | | | | | | | | | | |
+ // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+
+
+ // // --------------------------------------------------------------------
+ // //
+ // initial
+ // axis_out.cb_s.tready <= 1;
+
+
+ // --------------------------------------------------------------------
+ //
+ tb_recursive_axis_switch_class a_h;
+
+ initial
+ a_h = new(axis_in, axis_out);
+
+
+
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+ // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
+ // | | | | | | | | | | | | | | | | |
+ // sim models
+ // --------------------------------------------------------------------
+
+
+ // --------------------------------------------------------------------
+ // debug wires
+
+
+ // --------------------------------------------------------------------
+ // test
+ the_test test(tb_clk, tb_rst);
+
+ initial
+ begin
+
+ test.run_the_test();
+
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench done.", $time);
+ $display("^^^---------------------------------");
+
+ $display("^^^---------------------------------");
+
+ $stop();
+
+ end
+
+endmodule
+
+
+
Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv
===================================================================
--- tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (nonexistent)
+++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (revision 49)
@@ -0,0 +1,142 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+
+package tb_recursive_axis_switch_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import video_frame_pkg::*;
+ import axis_video_frame_bfm_pkg::*;
+ import avf_agent_class_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ localparam AW = 32; // active width
+ localparam AH = 16; // active height
+ localparam B = 2; // bytes per pixel
+ localparam T = 1; // pixels per clock
+ localparam VERTICAL_BLANKING = AW * 4;
+ localparam N = B * T; // data bus width in bytes
+ localparam I = 1; // TID width
+ localparam D = 1; // TDEST width
+ localparam U = 3; // TUSER width
+ localparam SA = 2;
+ localparam SD = 2 ** SA;
+
+
+ // --------------------------------------------------------------------
+ //
+ class tb_recursive_axis_switch_class;
+
+ avf_config_class c_h;
+ avf_tile_config_t tile_config[];
+
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[];
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in;
+
+ avf_tx_class #(B, T, U) tx_h;
+ avf_rx_class #(B, T, U) rx_h;
+
+ // video_frame_class clone_h;
+ // video_frame_class sent_f_h;
+ // video_frame_class rx_f_h;
+
+ // mailbox #(video_frame_class) q[];
+
+
+ // --------------------------------------------------------------------
+ //
+ task automatic
+ queue_frame
+ (
+ string pattern = "",
+ int pixel = 0
+ );
+ video_frame_class clone_h;
+
+ if(pattern != "")
+ tx_h.make_frame(pattern, pixel);
+
+ foreach(tx_h.tx_bfm_h[i])
+ begin
+ clone_h = tx_h.tx_bfm_h[i].f_h.clone();
+ tx_h.tx_bfm_h[i].put(clone_h);
+ // q[i].put(clone_h);
+ end
+
+ $display("^^^ %16.t | %m | using %s pattern", $time, pattern);
+
+ endtask: queue_frame
+
+
+ //--------------------------------------------------------------------
+ //
+ function new
+ (
+ virtual axis_if #(.N(N), .U(U)) axis_in,
+ virtual axis_if #(.N(N), .U(U)) axis_out[]
+ );
+
+ this.axis_out = axis_out;
+ this.axis_in = axis_in;
+
+ this.tile_config = new[T];
+ this.tile_config[0].direction = RIGHT_DOWN;
+
+ this.c_h = new
+ (
+ .width(AW),
+ .height(AH),
+ .bytes_per_pixel(B),
+ .bits_per_pixel(B * 8),
+ .pixels_per_clk(T),
+ .name("AVR_"),
+ .vertical_blanking(VERTICAL_BLANKING),
+ .tile(tile_config)
+ );
+
+ rx_h = new(c_h, axis_out);
+ tx_h = new(c_h, '{axis_in});
+
+ endfunction: new
+
+
+ // --------------------------------------------------------------------
+ //
+ endclass: tb_recursive_axis_switch_class
+
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_recursive_axis_switch_pkg
+
+
+
+
+
Index: tests/tb_recursive_axis_switch/the_test.sv
===================================================================
--- tests/tb_recursive_axis_switch/the_test.sv (nonexistent)
+++ tests/tb_recursive_axis_switch/the_test.sv (revision 49)
@@ -0,0 +1,86 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module the_test(input tb_clk, input tb_rst);
+
+ // --------------------------------------------------------------------
+ //
+ import tb_recursive_axis_switch_pkg::*;
+
+ // --------------------------------------------------------------------
+ //
+ int i = 0;
+
+ task automatic run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(2ms);
+ wait(~tb_rst);
+
+ // --------------------------------------------------------------------
+ #1us;
+
+ // // --------------------------------------------------------------------
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+
+ // // --------------------------------------------------------------------
+ // repeat(1) tb_top.a_h.queue_frame("random");
+ // repeat(1)tb_top.a_h.queue_frame("counting");
+ // repeat(3) tb_top.a_h.queue_frame("random");
+ // tb_top.a_h.queue_frame("constant", 16'habba);
+
+ // --------------------------------------------------------------------
+ for(i = 0; i < SD; i++)
+ begin
+ force tb_top.select = i;
+ #1us;
+ tb_top.a_h.queue_frame("counting");
+ #8us;
+ end
+
+ // --------------------------------------------------------------------
+ #5us;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_axis_to_axi4_basic_dma/init_test.do
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/init_test.do (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/init_test.do (revision 49)
@@ -0,0 +1,34 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+# setup environment
+do ../../../../scripts/sim_env.do
+set env(SIM_TARGET) fpga
+set env(SIM_TB) tb_axis_to_axi4_basic_dma
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_all tb_packages
+sim_compile_all bfm_packages
+sim_compile_all axi4_lib
+sim_compile_all qaz_lib
+sim_compile_all sim
+
+# compile simulation files
+vlog -f ./$env(SIM_TB).f
+
+# simulation $root
+vlog ./$env(SIM_TB)_pkg.sv
+vlog ./$env(SIM_TB).sv
+
+# compile test last
+vlog ./the_test.sv
+
+# run the sim
+sim_run_test
+
Index: tests/tb_axis_to_axi4_basic_dma/sim.do
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/sim.do (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/sim.do (revision 49)
@@ -0,0 +1,13 @@
+#
+#
+
+quit -sim
+
+vsim -novopt work.tb_top
+
+# log all signals
+log -r *
+
+# run -all
+
+
Index: tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.f (revision 49)
@@ -0,0 +1,12 @@
+#
+
+${LIB_BASE_DIR}/axi4_stream_lib/sim/src/axis_bfm_pkg.sv
+${LIB_BASE_DIR}/axi4_lib/sim/src/axi4_models/axi4_memory_pkg.sv
+
+${PROJECT_DIR}/sim/src/tb_axis_to_axi4_agent_class_pkg.sv
+
+${PROJECT_DIR}/src/axis_to_axi4_basic_dma.sv
+
+./${SIM_TB}_pkg.sv
+./${SIM_TB}.sv
+
Index: tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma.sv (revision 49)
@@ -0,0 +1,115 @@
+// --------------------------------------------------------------------
+//
+// --------------------------------------------------------------------
+
+
+module tb_top();
+
+ // --------------------------------------------------------------------
+ // test bench clock & reset
+ wire clk_200mhz;
+ wire tb_clk = clk_200mhz;
+ wire tb_rst;
+
+ tb_base #(.PERIOD(5_000)) tb(clk_200mhz, tb_rst);
+
+
+ // --------------------------------------------------------------------
+ //
+ wire tb_rst_s;
+ wire aclk = tb_clk;
+ wire aresetn = ~tb_rst_s;
+
+ sync_reset
+ sync_reset_i(aclk, tb_rst, tb_rst_s);
+
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_to_axi4_basic_dma_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ axi4_if #(.A(A), .N(N), .I(I)) axi4_m(.*);
+ axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
+
+
+ // --------------------------------------------------------------------
+ //
+ logic dma_enable = 0;
+
+ axis_to_axi4_basic_dma
+ #(
+ .A(A),
+ .N(N),
+ .I(I),
+ .BASE_ADDRESS(BASE_ADDRESS),
+ .BUFFER_SIZE(BUFFER_SIZE),
+ .BURST_LENGTH(BURST_LENGTH),
+ .MAX_BURSTS(MAX_BURSTS),
+ .BYTES_PER_TUSER(BYTES_PER_TUSER)
+ )
+ dut(.*);
+
+
+ // --------------------------------------------------------------------
+ // sim models
+ // | | | | | | | | | | | | | | | | |
+ // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+
+ // --------------------------------------------------------------------
+ //
+ axi4_checker #(.A(A), .N(N), .MAXWAITS(64))
+ axi4_checker_i(.axi4_in(axi4_m));
+
+
+ // --------------------------------------------------------------------
+ //
+ axis_checker #(.N(N), .I(I), .D(D), .U(U), .MAXWAITS(64))
+ axis_checker_i(.axis_in(axis_in));
+
+
+ // --------------------------------------------------------------------
+ //
+ tb_axis_to_axi4_basic_dma_class a_h;
+
+ initial
+ a_h = new(axi4_m, axis_in);
+
+
+ // --------------------------------------------------------------------
+ //
+
+ // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
+ // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
+ // | | | | | | | | | | | | | | | | |
+ // sim models
+ // --------------------------------------------------------------------
+
+
+ // --------------------------------------------------------------------
+ // debug wires
+
+
+ // --------------------------------------------------------------------
+ // test
+ the_test test(tb_clk, tb_rst);
+
+ initial
+ begin
+
+ test.run_the_test();
+
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench done.", $time);
+ $display("^^^---------------------------------");
+
+ $display("^^^---------------------------------");
+
+ $stop();
+
+ end
+
+endmodule
Index: tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/tb_axis_to_axi4_basic_dma_pkg.sv (revision 49)
@@ -0,0 +1,58 @@
+// --------------------------------------------------------------------
+//
+// --------------------------------------------------------------------
+
+
+package tb_axis_to_axi4_basic_dma_pkg;
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_to_axi4_agent_class_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ localparam BASE_ADDRESS = 32'h0000_0000; // must be on 4K boundry
+ localparam BUFFER_SIZE = 'h800;
+ localparam BURST_LENGTH = 8'h08;
+ localparam MAX_BURSTS = 4;
+ localparam BYTES_PER_TUSER = 2; // bytes per tuser bit. Set to 0 for transfer based.
+
+ localparam N = 8; // data bus width in bytes
+ localparam A = 32; // address bus width
+ localparam I = 1; // ID width
+ localparam D = 1; // TDEST width
+ localparam U = N / BYTES_PER_TUSER; // TUSER width
+
+
+ // --------------------------------------------------------------------
+ //
+ class tb_axis_to_axi4_basic_dma_class
+ extends tb_axis_to_axi4_agent_class #(N, A, I, D, U);
+
+
+ //--------------------------------------------------------------------
+ //
+ function new
+ (
+ virtual axi4_if #(.A(A), .N(N), .I(I)) axi4_m,
+ virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in
+ );
+
+ super.new(.axi4_m(axi4_m), .axis_in(axis_in));
+
+ endfunction: new
+
+
+ // --------------------------------------------------------------------
+ //
+ endclass: tb_axis_to_axi4_basic_dma_class
+
+// --------------------------------------------------------------------
+//
+endpackage: tb_axis_to_axi4_basic_dma_pkg
+
+
+
+
+
Index: tests/tb_axis_to_axi4_basic_dma/the_test.sv
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/the_test.sv (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/the_test.sv (revision 49)
@@ -0,0 +1,60 @@
+// --------------------------------------------------------------------
+//
+// --------------------------------------------------------------------
+
+`timescale 1ps/1ps
+
+
+module
+ the_test(
+ input tb_clk,
+ input tb_rst
+ );
+
+ // --------------------------------------------------------------------
+ //
+ import tb_axis_to_axi4_basic_dma_pkg::*;
+
+
+ // --------------------------------------------------------------------
+ //
+ task run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(50us);
+
+ // --------------------------------------------------------------------
+ wait(tb_top.aresetn);
+ #200ns;
+
+ // --------------------------------------------------------------------
+ force tb_top.dma_enable = 1;
+ #100ns;
+
+ // --------------------------------------------------------------------
+ repeat(8)
+ begin
+ tb_top.a_h.random_transaction(BASE_ADDRESS, BUFFER_SIZE, N * BURST_LENGTH);
+ tb_top.a_h.compare(BASE_ADDRESS);
+ end
+
+ // --------------------------------------------------------------------
+ #200ns;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+// --------------------------------------------------------------------
+//
+endmodule
+
Index: tests/tb_axis_to_axi4_basic_dma/wip.do
===================================================================
--- tests/tb_axis_to_axi4_basic_dma/wip.do (nonexistent)
+++ tests/tb_axis_to_axi4_basic_dma/wip.do (revision 49)
@@ -0,0 +1,11 @@
+#
+
+vlog -f ./tb_axis_to_axi4_basic_dma.f
+
+# simulation $root
+vlog ./tb_axis_to_axi4_basic_dma.sv
+
+# compile test last
+vlog ./the_test.sv
+
+
Index: tests/tb_axis_upsizer/init_test.do
===================================================================
--- tests/tb_axis_upsizer/init_test.do (nonexistent)
+++ tests/tb_axis_upsizer/init_test.do (revision 49)
@@ -0,0 +1,37 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+set env(ROOT_DIR) ../../../../..
+set env(PROJECT_DIR) ../../..
+set env(SIM_TARGET) fpga
+
+# load sim procedures
+do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
+
+radix -hexadecimal
+
+make_lib work 1
+
+sim_compile_all tb_packages
+sim_compile_all bfm_packages
+sim_compile_all axi4_lib
+sim_compile_all qaz_libs
+sim_compile_all sim
+vlog -f ./tb_axis_upsizer.f
+
+# simulation $root
+vlog $env(PROJECT_DIR)/sim/src/tb_axis_upsizer.sv
+
+# compile test last
+vlog ./the_test.sv
+
+# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
+
+# run the sim
+sim_run_test
+
+
+
Index: tests/tb_axis_upsizer/sim.do
===================================================================
--- tests/tb_axis_upsizer/sim.do (nonexistent)
+++ tests/tb_axis_upsizer/sim.do (revision 49)
@@ -0,0 +1,16 @@
+#
+#
+
+
+quit -sim
+
+# vsim opt_tb_top
+vsim -novopt work.tb_top
+# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
+
+# log all signals
+log -r *
+
+# run -all
+
+
Index: tests/tb_axis_upsizer/tb_axis_upsizer.f
===================================================================
--- tests/tb_axis_upsizer/tb_axis_upsizer.f (nonexistent)
+++ tests/tb_axis_upsizer/tb_axis_upsizer.f (revision 49)
@@ -0,0 +1,6 @@
+#
+
+${PROJECT_DIR}/sim/src/tb_axis_upsizer_agent_class_pkg.sv
+${PROJECT_DIR}/sim/src/tb_axis_upsizer_class_pkg.sv
+
+${PROJECT_DIR}/src/axis_upsizer.sv
Index: tests/tb_axis_upsizer/the_test.sv
===================================================================
--- tests/tb_axis_upsizer/the_test.sv (nonexistent)
+++ tests/tb_axis_upsizer/the_test.sv (revision 49)
@@ -0,0 +1,98 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module
+ the_test(
+ input tb_clk,
+ input tb_rst
+ );
+
+ // --------------------------------------------------------------------
+ //
+ int mismatch_count = 0;
+
+
+ // --------------------------------------------------------------------
+ //
+ task run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.\n", $time);
+ $display("^^^---------------------------------");
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(50us);
+
+
+ // --------------------------------------------------------------------
+ wait(tb_top.aresetn);
+ #1us;
+
+ // --------------------------------------------------------------------
+ repeat(3) tb_top.a_h.queue_frame("counting");
+ repeat(3) tb_top.a_h.compare_frame();
+
+ // --------------------------------------------------------------------
+ tb_top.a_h.tx_h.make_frame("constant", 16'habba);
+ tb_top.a_h.queue_frame();
+ tb_top.a_h.compare_frame();
+
+ tb_top.a_h.queue_frame("random");
+ tb_top.a_h.compare_frame();
+
+ tb_top.a_h.queue_frame("constant", 16'hbeef);
+ tb_top.a_h.compare_frame();
+
+ tb_top.a_h.queue_frame("random");
+ tb_top.a_h.rx_h.wait_for_rx_frames(1);
+ tb_top.a_h.compare_frame();
+
+ tb_top.a_h.queue_frame("counting");
+ tb_top.a_h.compare_frame();
+
+ repeat(3) tb_top.a_h.queue_frame("random");
+ repeat(3) tb_top.a_h.compare_frame();
+
+ // --------------------------------------------------------------------
+ #1us;
+ // #6us;
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_axis_register_slice/init_test.do
===================================================================
--- tests/tb_axis_register_slice/init_test.do (nonexistent)
+++ tests/tb_axis_register_slice/init_test.do (revision 49)
@@ -0,0 +1,35 @@
+# ------------------------------------
+#
+# ------------------------------------
+
+global env
+
+set env(ROOT_DIR) ../../../../..
+set env(PROJECT_DIR) ../../..
+set env(SIM_TARGET) fpga
+
+# load sim procedures
+do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
+
+radix -hexadecimal
+
+make_lib work 1
+
+# sim_compile_all FPGA
+sim_compile_all sim
+sim_compile_all sync_fifo
+sim_compile_all axi4_stream_lib
+
+# simulation $root
+vlog $env(PROJECT_DIR)/sim/src/tb_axis_register_slice.sv
+
+# compile test last
+vlog ./the_test.sv
+
+# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
+
+# run the sim
+sim_run_test
+
+
+
Index: tests/tb_axis_register_slice/sim.do
===================================================================
--- tests/tb_axis_register_slice/sim.do (nonexistent)
+++ tests/tb_axis_register_slice/sim.do (revision 49)
@@ -0,0 +1,21 @@
+#
+#
+
+
+quit -sim
+
+# vsim opt_tb_top
+
+vsim -novopt work.tb_top
+# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
+
+# vsim -voptargs="+acc=rn+/tb_top/dut" -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
+# vsim -pli "C:/Xilinx/Vivado/2015.4/lib/win64.o/libxil_vsim.dll" -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
+
+
+# # log all signals
+# log -r *
+
+# run -all
+
+
Index: tests/tb_axis_register_slice/the_test.sv
===================================================================
--- tests/tb_axis_register_slice/the_test.sv (nonexistent)
+++ tests/tb_axis_register_slice/the_test.sv (revision 49)
@@ -0,0 +1,79 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+
+`timescale 1ps/1ps
+
+
+module
+ the_test(
+ input tb_clk,
+ input tb_rst
+ );
+
+ // --------------------------------------------------------------------
+ //
+ int mismatch_count = 0;
+
+
+ // --------------------------------------------------------------------
+ //
+ task run_the_test;
+
+ // --------------------------------------------------------------------
+ // insert test below
+ // --------------------------------------------------------------------
+ $display("^^^---------------------------------");
+ $display("^^^ %16.t | Testbench begun.\n", $time);
+ $display("^^^---------------------------------");
+ // --------------------------------------------------------------------
+
+ // --------------------------------------------------------------------
+ tb_top.tb.timeout_stop(4us);
+ wait(~tb_rst);
+
+
+ // --------------------------------------------------------------------
+ repeat(100) @(posedge tb_clk);
+ tb_top.avf_agent_h.make_frame("counting");
+ tb_top.avf_agent_h.get_frame();
+ tb_top.avf_agent_h.put_frame();
+
+ wait(~tb_top.avf_agent_h.put_frame_active);
+ wait(~tb_top.avf_agent_h.get_frame_active);
+
+ mismatch_count = tb_top.avf_agent_h.compare_frame();
+
+
+ // --------------------------------------------------------------------
+ // insert test above
+ // --------------------------------------------------------------------
+
+ endtask
+
+
+endmodule
+
Index: tests/tb_axis_register_slice/wip.do
===================================================================
--- tests/tb_axis_register_slice/wip.do (nonexistent)
+++ tests/tb_axis_register_slice/wip.do (revision 49)
@@ -0,0 +1,12 @@
+#
+
+
+vlog -f ../../libs/axi4_stream_lib_verilog/axi4_stream_lib.f
+
+# simulation $root
+vlog ../../src/tb_axis_register_slice.sv
+
+# compile test last
+vlog ./the_test.sv
+
+