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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk/sim
    from Rev 32 to Rev 34
    Reverse comparison

Rev 32 → Rev 34

/libs/qaz_lib_verilog/basal.f
0,0 → 1,42
#
 
${LIB_BASE_DIR}/basal/src/8b10b/decode_8b10b.v
${LIB_BASE_DIR}/basal/src/8b10b/encode_8b10b.v
 
${LIB_BASE_DIR}/basal/src/FIFOs/bc_sync_fifo.v
${LIB_BASE_DIR}/basal/src/FIFOs/fifo_write_if.sv
${LIB_BASE_DIR}/basal/src/FIFOs/sync_fifo.sv
${LIB_BASE_DIR}/basal/src/FIFOs/sync_fifo.v
${LIB_BASE_DIR}/basal/src/FIFOs/tiny_async_fifo.sv
${LIB_BASE_DIR}/basal/src/FIFOs/tiny_sync_fifo.sv
 
${LIB_BASE_DIR}/basal/src/misc/bit_connect_big_to_little.v
${LIB_BASE_DIR}/basal/src/misc/bit_connect_little_to_big.v
${LIB_BASE_DIR}/basal/src/misc/bit_swap_big_to_little.v
${LIB_BASE_DIR}/basal/src/misc/bit_swap_little_to_big.v
${LIB_BASE_DIR}/basal/src/misc/one_hot_encoder.sv
${LIB_BASE_DIR}/basal/src/misc/pulse_stretcher.v
${LIB_BASE_DIR}/basal/src/misc/recursive_mux.sv
${LIB_BASE_DIR}/basal/src/misc/sr_latch.v
 
${LIB_BASE_DIR}/basal/src/PRBS/cf_pnmon.v
${LIB_BASE_DIR}/basal/src/PRBS/pcie_scrambler.v
${LIB_BASE_DIR}/basal/src/PRBS/prbs_23_to_16.v
${LIB_BASE_DIR}/basal/src/PRBS/prbs_23_to_64.v
${LIB_BASE_DIR}/basal/src/PRBS/prbs_23_to_8.v
${LIB_BASE_DIR}/basal/src/PRBS/prbs_7_to_14.v
${LIB_BASE_DIR}/basal/src/PRBS/prbs_7_to_8.v
 
${LIB_BASE_DIR}/basal/src/RAM/asym_ram_sdp_read_wider.v
${LIB_BASE_DIR}/basal/src/RAM/asym_ram_sdp_write_wider.v
${LIB_BASE_DIR}/basal/src/RAM/bram_tdp.v
${LIB_BASE_DIR}/basal/src/RAM/byte_enabled_simple_dual_port_ram.sv
${LIB_BASE_DIR}/basal/src/RAM/read_mixed_width_ram.sv
${LIB_BASE_DIR}/basal/src/RAM/write_mixed_width_ram.sv
 
${LIB_BASE_DIR}/basal/src/synchronize/debounce.v
${LIB_BASE_DIR}/basal/src/synchronize/debounce_high.v
${LIB_BASE_DIR}/basal/src/synchronize/debounce_low.v
${LIB_BASE_DIR}/basal/src/synchronize/synchronizer.v
${LIB_BASE_DIR}/basal/src/synchronize/sync_reset.v
 
/libs/sim_verilog/BFM.f
0,0 → 1,19
#
 
${LIB_BASE_DIR}/BFM/src/axis_video_frame/axis_video_frame_bfm_pkg.sv
${LIB_BASE_DIR}/BFM/src/axis_video_frame/avf_agent_class_pkg.sv
# ${LIB_BASE_DIR}/BFM/src/axis_video_frame/avf_agent.sv
# ${LIB_BASE_DIR}/BFM/src/axis_video_frame/avf_rx.sv
# ${LIB_BASE_DIR}/BFM/src/axis_video_frame/avf_tx.sv
 
# ${LIB_BASE_DIR}/BFM/src/clock/clock_checker.v
# ${LIB_BASE_DIR}/BFM/src/clock/clock_mult.v
# ${LIB_BASE_DIR}/BFM/src/clock/recover_clock.v
${LIB_BASE_DIR}/BFM/src/clock/tb_clk.v
# ${LIB_BASE_DIR}/BFM/src/clock/tb_programmable_clk.v
 
# ${LIB_BASE_DIR}/BFM/src/tb/rand_delays_c.sv
${LIB_BASE_DIR}/BFM/src/tb/tb_base.sv
${LIB_BASE_DIR}/BFM/src/tb/tb_bfm_pkg.sv
${LIB_BASE_DIR}/BFM/src/tb/tb_clk.sv
${LIB_BASE_DIR}/BFM/src/tb/tb_clk_class.sv
/libs/tb_packages_verilog/BFM.f
0,0 → 1,8
#
 
${LIB_BASE_DIR}/tb_class/src/tb_clk_pkg.sv
${LIB_BASE_DIR}/tb_class/src/q_pkg.sv
${LIB_BASE_DIR}/tb_class/src/bfm_pkg.sv
${LIB_BASE_DIR}/tb_class/src/logger_pkg.sv
 
${LIB_BASE_DIR}/video_frame_class/src/video_frame_pkg.sv

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