OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /qaz_libs/trunk
    from Rev 5 to Rev 6
    Reverse comparison

Rev 5 → Rev 6

/tb_class/src/tb_clk.sv
0,0 → 1,34
// --------------------------------------------------------------------
//
// --------------------------------------------------------------------
 
`include "../../../../tb_class/src/tb_clk_class.sv"
 
 
module
tb_clk
#(
parameter PERIOD = 0
)
(
output clock
);
tb_clk_class tb_clk_clk_c;
tb_clk_if tb_clk_driver();
assign clock = tb_clk_driver.clk;
initial
begin
tb_clk_c = new( tb_clk_driver );
if( PERIOD != 0 )
tb_clk_clk_c.init_basic_clock( PERIOD );
end
endmodule
/tb_class/src/tb_base.sv
0,0 → 1,65
// --------------------------------------------------------------------
//
// --------------------------------------------------------------------
 
`include "../../../../tb_class/src/tb_clk_class.sv"
 
 
module
tb_base
#(
parameter PERIOD = 0,
parameter ASSERT_TIME = 0
)
(
output clock,
);
 
// --------------------------------------------------------------------
//
task assert_reset
(
input time assert_reset
);
reset = 1;
$display("^^^ %16.t | %m | Reset asserted!.", $time );
#assert_reset;
reset = 0;
$display("^^^ %16.t | %m | Reset deasserted!.", $time );
endmodule
 
 
// --------------------------------------------------------------------
//
tb_clk_class tb_clk_clk_c;
tb_clk_if tb_clk_driver();
assign clock = tb_clk_driver.clk;
time reset_assert = (PERIOD * 5) + (PERIOD / 3);
logic init_done = 0;
initial
begin
reset = 1;
tb_clk_c = new( tb_clk_driver );
if( PERIOD != 0 )
tb_clk_clk_c.init_basic_clock( PERIOD );
if( ASSERT_TIME != 0 )
reset_assert( ASSERT_TIME );
else if( reset_assert != 0 )
reset_assert( reset_assert );
init_done = 1;
end
endmodule
/tb_class/src/tb_clk_class.sv
0,0 → 1,86
// --------------------------------------------------------------------
//
 
`timescale 1ps/1ps
 
 
// --------------------------------------------------------------------
//
interface tb_clk_if
logic clk = 0;
logic enable = 0;
time period;
event clk_rise;
event clk_fall;
modport tb_m
(
output clk
);
endinterface: tb_clk_if
 
 
// --------------------------------------------------------------------
//
class
tb_clk_class;
virtual tb_clk_if tb;
 
// --------------------------------------------------------------------
//
function
new
(
virtual tb_clk_if tb
);
this.tb = tb;
endfunction: new
 
// --------------------------------------------------------------------
//
function
init_basic_clock
(
time period
);
this.period = period;
this.enable = 1;
$display("^^^ %16.t | %m | Starting clock with period %t.", $time, period );
fork
forever
if( tb.enable )
begin
#(period/2) tb.clk = 1;
-> tb.clk_rise;
#(period/2) tb.clk = 0;
-> tb.clk_fall;
end
join_none
endfunction: init_basic_clock
// --------------------------------------------------------------------
//
task
enable_clock
(
logic enable
);
tb.enable = enable;
$display("^^^ %16.t | %m | Clock Enable = %h.", $time, enable );
endtask: enable_clock
endclass: tb_clk_class
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.