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tests/defparam_test_case.zip Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: tests/tb_axis_switch_allocator/init_test.do =================================================================== --- tests/tb_axis_switch_allocator/init_test.do (nonexistent) +++ tests/tb_axis_switch_allocator/init_test.do (revision 36) @@ -0,0 +1,35 @@ +# ------------------------------------ +# +# ------------------------------------ + +global env + +# setup environment +do ../../../../scripts/sim_env.do +set env(SIM_TARGET) fpga +set env(SIM_TB) tb_axis_switch_allocator + +radix -hexadecimal + +make_lib work 1 + +sim_compile_lib $env(LIB_BASE_DIR) tb_packages +sim_compile_lib $env(LIB_BASE_DIR) bfm_packages +sim_compile_lib $env(LIB_BASE_DIR) axi4_lib +sim_compile_lib $env(LIB_BASE_DIR) qaz_lib +sim_compile_lib $env(LIB_BASE_DIR) sim + +# compile simulation files +vlog -f ./$env(SIM_TB).f + +# simulation $root +vlog ./$env(SIM_TB)_pkg.sv +vlog ./$env(SIM_TB).sv + +# compile test last +vlog ./the_test.sv + +# run the sim +sim_run_test + + Index: tests/tb_axis_switch_allocator/sim.do =================================================================== --- tests/tb_axis_switch_allocator/sim.do (nonexistent) +++ tests/tb_axis_switch_allocator/sim.do (revision 36) @@ -0,0 +1,11 @@ +# +# + +quit -sim + +vsim -novopt work.tb_top +# vsim -f ./sim.f work.tb_top + +# log all signals +log -r * + Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f =================================================================== --- tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f (nonexistent) +++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator.f (revision 36) @@ -0,0 +1,6 @@ +# + +${PROJECT_DIR}/src/axis_switch.sv +${PROJECT_DIR}/src/recursive_axis_switch.sv + +${PROJECT_DIR}/src/axis_switch_allocator.sv Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv =================================================================== --- tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (nonexistent) +++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator.sv (revision 36) @@ -0,0 +1,118 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// ---------------------------------------------------------------------------- + + +module tb_top(); + + // -------------------------------------------------------------------- + // test bench clock & reset + wire clk_100mhz; + wire tb_clk = clk_100mhz; + wire tb_rst; + + tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst); + + + // -------------------------------------------------------------------- + // + wire tb_rst_s; + wire aclk = tb_clk; + wire aresetn = ~tb_rst_s; + wire clk = tb_clk; + wire reset = tb_rst_s; + + sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s); + + + // -------------------------------------------------------------------- + // + import tb_axis_switch_allocator_pkg::*; + + + // -------------------------------------------------------------------- + // + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*); + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*); + + + // -------------------------------------------------------------------- + // + axis_switch_allocator #(.N(N), .I(I), .D(D), .U(U), .U_IS_EOP(U_IS_EOP), .SA(SA)) + dut(.*); + + + // -------------------------------------------------------------------- + // sim models + // | | | | | | | | | | | | | | | | | + // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + + + // -------------------------------------------------------------------- + // + tb_axis_switch_allocator_class a_h; + + initial + a_h = new(axis_in, axis_out); + + + + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ + // | | | | | | | | | | | | | | | | | + // sim models + // -------------------------------------------------------------------- + + + // -------------------------------------------------------------------- + // debug wires + + + // -------------------------------------------------------------------- + // test + the_test test(tb_clk, tb_rst); + + initial + begin + + test.run_the_test(); + + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench done.", $time); + $display("^^^---------------------------------"); + + $display("^^^---------------------------------"); + + $stop(); + + end + +endmodule + + + Index: tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv =================================================================== --- tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (nonexistent) +++ tests/tb_axis_switch_allocator/tb_axis_switch_allocator_pkg.sv (revision 36) @@ -0,0 +1,143 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + + +package tb_axis_switch_allocator_pkg; + + // -------------------------------------------------------------------- + // + import video_frame_pkg::*; + import axis_video_frame_bfm_pkg::*; + import avf_agent_class_pkg::*; + + + // -------------------------------------------------------------------- + // + localparam AW = 32; // active width + localparam AH = 16; // active height + localparam B = 2; // bytes per pixel + localparam T = 1; // pixels per clock + localparam VERTICAL_BLANKING = AW * 4; + localparam N = B * T; // data bus width in bytes + localparam I = 1; // TID width + localparam D = 1; // TDEST width + localparam U = 3; // TUSER width + localparam U_IS_EOP = 2; + localparam SA = 3; + localparam SD = 2 ** SA; + + + // -------------------------------------------------------------------- + // + class tb_axis_switch_allocator_class; + + avf_config_class c_h; + avf_tile_config_t tile_config[]; + + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[]; + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in; + + avf_tx_class #(B, T, U) tx_h; + avf_rx_class #(B, T, U) rx_h; + + // video_frame_class clone_h; + // video_frame_class sent_f_h; + // video_frame_class rx_f_h; + + // mailbox #(video_frame_class) q[]; + + + // -------------------------------------------------------------------- + // + task automatic + queue_frame + ( + string pattern = "", + int pixel = 0 + ); + video_frame_class clone_h; + + if(pattern != "") + tx_h.make_frame(pattern, pixel); + + foreach(tx_h.tx_bfm_h[i]) + begin + clone_h = tx_h.tx_bfm_h[i].f_h.clone(); + tx_h.tx_bfm_h[i].put(clone_h); + // q[i].put(clone_h); + end + + $display("^^^ %16.t | %m | using %s pattern", $time, pattern); + + endtask: queue_frame + + + //-------------------------------------------------------------------- + // + function new + ( + virtual axis_if #(.N(N), .U(U)) axis_in, + virtual axis_if #(.N(N), .U(U)) axis_out[] + ); + + this.axis_out = axis_out; + this.axis_in = axis_in; + + this.tile_config = new[T]; + this.tile_config[0].direction = RIGHT_DOWN; + + this.c_h = new + ( + .width(AW), + .height(AH), + .bytes_per_pixel(B), + .bits_per_pixel(B * 8), + .pixels_per_clk(T), + .name("AVR_"), + .vertical_blanking(VERTICAL_BLANKING), + .tile(tile_config) + ); + + rx_h = new(c_h, axis_out); + tx_h = new(c_h, '{axis_in}); + + endfunction: new + + + // -------------------------------------------------------------------- + // + endclass: tb_axis_switch_allocator_class + + +// -------------------------------------------------------------------- +// +endpackage: tb_axis_switch_allocator_pkg + + + + + Index: tests/tb_axis_switch_allocator/the_test.sv =================================================================== --- tests/tb_axis_switch_allocator/the_test.sv (nonexistent) +++ tests/tb_axis_switch_allocator/the_test.sv (revision 36) @@ -0,0 +1,88 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + +`timescale 1ps/1ps + + +module the_test(input tb_clk, input tb_rst); + + // -------------------------------------------------------------------- + // + import tb_axis_switch_allocator_pkg::*; + + // -------------------------------------------------------------------- + // + int i = 0; + + task automatic run_the_test; + + // -------------------------------------------------------------------- + // insert test below + // -------------------------------------------------------------------- + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench begun.", $time); + $display("^^^---------------------------------"); + + // -------------------------------------------------------------------- + tb_top.tb.timeout_stop(2ms); + wait(~tb_rst); + + // -------------------------------------------------------------------- + #1us; + + // // -------------------------------------------------------------------- + // repeat(1)tb_top.a_h.queue_frame("counting"); + + // // -------------------------------------------------------------------- + // repeat(1) tb_top.a_h.queue_frame("random"); + // repeat(1)tb_top.a_h.queue_frame("counting"); + // repeat(3) tb_top.a_h.queue_frame("random"); + // tb_top.a_h.queue_frame("constant", 16'habba); + + // // -------------------------------------------------------------------- + // for(i = 0; i < SD; i++) + // begin + // #1us; + // tb_top.a_h.queue_frame("counting"); + // #8us; + // end + + // -------------------------------------------------------------------- + repeat(SD * 2) tb_top.a_h.queue_frame("counting"); + + // -------------------------------------------------------------------- + #100us; + + // -------------------------------------------------------------------- + // insert test above + // -------------------------------------------------------------------- + + endtask + + +endmodule + Index: tests/tb_recursive_axis_catenate/init_test.do =================================================================== --- tests/tb_recursive_axis_catenate/init_test.do (nonexistent) +++ tests/tb_recursive_axis_catenate/init_test.do (revision 36) @@ -0,0 +1,35 @@ +# ------------------------------------ +# +# ------------------------------------ + +global env + +# setup environment +do ../../../../scripts/sim_env.do +set env(SIM_TARGET) fpga +set env(SIM_TB) tb_recursive_axis_catenate + +radix -hexadecimal + +make_lib work 1 + +sim_compile_lib $env(LIB_BASE_DIR) tb_packages +sim_compile_lib $env(LIB_BASE_DIR) bfm_packages +sim_compile_lib $env(LIB_BASE_DIR) axi4_lib +sim_compile_lib $env(LIB_BASE_DIR) qaz_lib +sim_compile_lib $env(LIB_BASE_DIR) sim + +# compile simulation files +vlog -f ./$env(SIM_TB).f + +# simulation $root +vlog ./$env(SIM_TB)_pkg.sv +vlog ./$env(SIM_TB).sv + +# compile test last +vlog ./the_test.sv + +# run the sim +sim_run_test + + Index: tests/tb_recursive_axis_catenate/sim.do =================================================================== --- tests/tb_recursive_axis_catenate/sim.do (nonexistent) +++ tests/tb_recursive_axis_catenate/sim.do (revision 36) @@ -0,0 +1,11 @@ +# +# + +quit -sim + +vsim -novopt work.tb_top +# vsim -f ./sim.f work.tb_top + +# log all signals +log -r * + Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f =================================================================== --- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f (nonexistent) +++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.f (revision 36) @@ -0,0 +1,6 @@ +# + +${PROJECT_DIR}/src/recursive_axis_mux.sv +${PROJECT_DIR}/src/axis_catenate.sv +${PROJECT_DIR}/src/recursive_axis_catenate.sv + Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv =================================================================== --- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv (nonexistent) +++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate.sv (revision 36) @@ -0,0 +1,126 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// ---------------------------------------------------------------------------- + + +module tb_top(); + + // -------------------------------------------------------------------- + // test bench clock & reset + wire clk_100mhz; + wire tb_clk = clk_100mhz; + wire tb_rst; + + tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst); + + + // -------------------------------------------------------------------- + // + wire tb_rst_s; + wire aclk = tb_clk; + wire aresetn = ~tb_rst_s; + wire clk = tb_clk; + wire reset = tb_rst_s; + + sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s); + + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_catenate_pkg::*; + + + // -------------------------------------------------------------------- + // + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[MD-1:0](.*); + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out(.*); + + + // -------------------------------------------------------------------- + // + recursive_axis_catenate + #( + .N(N), + .I(I), + .D(D), + .U(U), + .U_IS_EOP(U_IS_EOP), + .MA(MA) + ) + dut(.*); + + + // -------------------------------------------------------------------- + // sim models + // | | | | | | | | | | | | | | | | | + // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + + + // -------------------------------------------------------------------- + // + tb_recursive_axis_catenate_class a_h; + + initial + a_h = new(axis_in, axis_out); + + + + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ + // | | | | | | | | | | | | | | | | | + // sim models + // -------------------------------------------------------------------- + + + // -------------------------------------------------------------------- + // debug wires + + + // -------------------------------------------------------------------- + // test + the_test test(tb_clk, tb_rst); + + initial + begin + + test.run_the_test(); + + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench done.", $time); + $display("^^^---------------------------------"); + + $display("^^^---------------------------------"); + + $stop(); + + end + +endmodule + + + Index: tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv =================================================================== --- tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv (nonexistent) +++ tests/tb_recursive_axis_catenate/tb_recursive_axis_catenate_pkg.sv (revision 36) @@ -0,0 +1,144 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + + +package tb_recursive_axis_catenate_pkg; + + // -------------------------------------------------------------------- + // + import video_frame_pkg::*; + import axis_video_frame_bfm_pkg::*; + import avf_agent_class_pkg::*; + + + // -------------------------------------------------------------------- + // + localparam AW = 32; // active width + localparam AH = 16; // active height + localparam B = 2; // bytes per pixel + localparam T = 1; // pixels per clock + localparam VERTICAL_BLANKING = AW * 4; + localparam N = B * T; // data bus width in bytes + localparam I = 1; // TID width + localparam D = 1; // TDEST width + localparam U = 3; // TUSER width + // localparam U_IS_EOP = 2; + localparam U_IS_EOP = -1; + localparam MA = 2; + localparam MD = 2 ** MA; + + + // -------------------------------------------------------------------- + // + class tb_recursive_axis_catenate_class; + + avf_config_class c_h; + avf_tile_config_t tile_config[]; + + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out; + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[]; + + avf_tx_class #(B, T, U) tx_h; + avf_rx_class #(B, T, U) rx_h; + + // video_frame_class clone_h; + // video_frame_class sent_f_h; + // video_frame_class rx_f_h; + + // mailbox #(video_frame_class) q[]; + + + // -------------------------------------------------------------------- + // + task automatic + queue_frame + ( + string pattern = "", + int pixel = 0 + ); + video_frame_class clone_h; + + if(pattern != "") + tx_h.make_frame(pattern, pixel); + + foreach(tx_h.tx_bfm_h[i]) + begin + clone_h = tx_h.tx_bfm_h[i].f_h.clone(); + tx_h.tx_bfm_h[i].put(clone_h); + // q[i].put(clone_h); + end + + $display("^^^ %16.t | %m | using %s pattern", $time, pattern); + + endtask: queue_frame + + + //-------------------------------------------------------------------- + // + function new + ( + virtual axis_if #(.N(N), .U(U)) axis_in[], + virtual axis_if #(.N(N), .U(U)) axis_out + ); + + this.axis_out = axis_out; + this.axis_in = axis_in; + + this.tile_config = new[T]; + this.tile_config[0].direction = RIGHT_DOWN; + + this.c_h = new + ( + .width(AW), + .height(AH), + .bytes_per_pixel(B), + .bits_per_pixel(B * 8), + .pixels_per_clk(T), + .name("AVR_"), + .vertical_blanking(VERTICAL_BLANKING), + .tile(tile_config) + ); + + rx_h = new(c_h, '{axis_out}); + tx_h = new(c_h, axis_in); + + endfunction: new + + + // -------------------------------------------------------------------- + // + endclass: tb_recursive_axis_catenate_class + + +// -------------------------------------------------------------------- +// +endpackage: tb_recursive_axis_catenate_pkg + + + + + Index: tests/tb_recursive_axis_catenate/the_test.sv =================================================================== --- tests/tb_recursive_axis_catenate/the_test.sv (nonexistent) +++ tests/tb_recursive_axis_catenate/the_test.sv (revision 36) @@ -0,0 +1,84 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + +`timescale 1ps/1ps + + +module the_test(input tb_clk, input tb_rst); + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_catenate_pkg::*; + + // -------------------------------------------------------------------- + // + int i = 0; + + task automatic run_the_test; + + // -------------------------------------------------------------------- + // insert test below + // -------------------------------------------------------------------- + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench begun.", $time); + $display("^^^---------------------------------"); + + // -------------------------------------------------------------------- + tb_top.tb.timeout_stop(2ms); + wait(~tb_rst); + + // -------------------------------------------------------------------- + #1us; + + // -------------------------------------------------------------------- + repeat(10)tb_top.a_h.queue_frame("counting"); + + // // -------------------------------------------------------------------- + // repeat(1) tb_top.a_h.queue_frame("random"); + // repeat(1)tb_top.a_h.queue_frame("counting"); + // repeat(3) tb_top.a_h.queue_frame("random"); + // tb_top.a_h.queue_frame("constant", 16'habba); + + // // -------------------------------------------------------------------- + // for(i = 0; i < MD; i++) + // begin + // force tb_top.select = i; + // #20us; + // end + + // -------------------------------------------------------------------- + #100us; + + // -------------------------------------------------------------------- + // insert test above + // -------------------------------------------------------------------- + + endtask + + +endmodule + Index: tests/tb_recursive_axis_mux/init_test.do =================================================================== --- tests/tb_recursive_axis_mux/init_test.do (nonexistent) +++ tests/tb_recursive_axis_mux/init_test.do (revision 36) @@ -0,0 +1,35 @@ +# ------------------------------------ +# +# ------------------------------------ + +global env + +# setup environment +do ../../../../scripts/sim_env.do +set env(SIM_TARGET) fpga +set env(SIM_TB) tb_recursive_axis_mux + +radix -hexadecimal + +make_lib work 1 + +sim_compile_lib $env(LIB_BASE_DIR) tb_packages +sim_compile_lib $env(LIB_BASE_DIR) bfm_packages +sim_compile_lib $env(LIB_BASE_DIR) axi4_lib +sim_compile_lib $env(LIB_BASE_DIR) qaz_lib +sim_compile_lib $env(LIB_BASE_DIR) sim + +# compile simulation files +vlog -f ./$env(SIM_TB).f + +# simulation $root +vlog ./$env(SIM_TB)_pkg.sv +vlog ./$env(SIM_TB).sv + +# compile test last +vlog ./the_test.sv + +# run the sim +sim_run_test + + Index: tests/tb_recursive_axis_mux/sim.do =================================================================== --- tests/tb_recursive_axis_mux/sim.do (nonexistent) +++ tests/tb_recursive_axis_mux/sim.do (revision 36) @@ -0,0 +1,11 @@ +# +# + +quit -sim + +vsim -novopt work.tb_top +# vsim -f ./sim.f work.tb_top + +# log all signals +log -r * + Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f =================================================================== --- tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f (nonexistent) +++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux.f (revision 36) @@ -0,0 +1,4 @@ +# + +${PROJECT_DIR}/src/recursive_axis_mux.sv + Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv =================================================================== --- tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv (nonexistent) +++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux.sv (revision 36) @@ -0,0 +1,126 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// ---------------------------------------------------------------------------- + + +module tb_top(); + + // -------------------------------------------------------------------- + // test bench clock & reset + wire clk_100mhz; + wire tb_clk = clk_100mhz; + wire tb_rst; + + tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst); + + + // -------------------------------------------------------------------- + // + wire tb_rst_s; + wire aclk = tb_clk; + wire aresetn = ~tb_rst_s; + wire clk = tb_clk; + wire reset = tb_rst_s; + + sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s); + + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_mux_pkg::*; + + + // -------------------------------------------------------------------- + // + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[MD-1:0](.*); + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out(.*); + + + // -------------------------------------------------------------------- + // + wire [MA-1:0] select = 0; + + recursive_axis_mux #(.N(N), .I(I), .D(D), .U(U), .MA(MA)) + dut(.*); + + + // -------------------------------------------------------------------- + // sim models + // | | | | | | | | | | | | | | | | | + // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + + + // -------------------------------------------------------------------- + // + initial + axis_out.cb_s.tready <= 1; + + + // -------------------------------------------------------------------- + // + tb_recursive_axis_mux_class a_h; + + initial + a_h = new(axis_in, axis_out); + + + + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ + // | | | | | | | | | | | | | | | | | + // sim models + // -------------------------------------------------------------------- + + + // -------------------------------------------------------------------- + // debug wires + + + // -------------------------------------------------------------------- + // test + the_test test(tb_clk, tb_rst); + + initial + begin + + test.run_the_test(); + + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench done.", $time); + $display("^^^---------------------------------"); + + $display("^^^---------------------------------"); + + $stop(); + + end + +endmodule + + + Index: tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv =================================================================== --- tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv (nonexistent) +++ tests/tb_recursive_axis_mux/tb_recursive_axis_mux_pkg.sv (revision 36) @@ -0,0 +1,142 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + + +package tb_recursive_axis_mux_pkg; + + // -------------------------------------------------------------------- + // + import video_frame_pkg::*; + import axis_video_frame_bfm_pkg::*; + import avf_agent_class_pkg::*; + + + // -------------------------------------------------------------------- + // + localparam AW = 32; // active width + localparam AH = 16; // active height + localparam B = 2; // bytes per pixel + localparam T = 1; // pixels per clock + localparam VERTICAL_BLANKING = AW * 4; + localparam N = B * T; // data bus width in bytes + localparam I = 1; // TID width + localparam D = 1; // TDEST width + localparam U = 3; // TUSER width + localparam MA = 5; + localparam MD = 2 ** MA; + + + // -------------------------------------------------------------------- + // + class tb_recursive_axis_mux_class; + + avf_config_class c_h; + avf_tile_config_t tile_config[]; + + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out; + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in[]; + + avf_tx_class #(B, T, U) tx_h; + avf_rx_class #(B, T, U) rx_h; + + // video_frame_class clone_h; + // video_frame_class sent_f_h; + // video_frame_class rx_f_h; + + // mailbox #(video_frame_class) q[]; + + + // -------------------------------------------------------------------- + // + task automatic + queue_frame + ( + string pattern = "", + int pixel = 0 + ); + video_frame_class clone_h; + + if(pattern != "") + tx_h.make_frame(pattern, pixel); + + foreach(tx_h.tx_bfm_h[i]) + begin + clone_h = tx_h.tx_bfm_h[i].f_h.clone(); + tx_h.tx_bfm_h[i].put(clone_h); + // q[i].put(clone_h); + end + + $display("^^^ %16.t | %m | using %s pattern", $time, pattern); + + endtask: queue_frame + + + //-------------------------------------------------------------------- + // + function new + ( + virtual axis_if #(.N(N), .U(U)) axis_in[], + virtual axis_if #(.N(N), .U(U)) axis_out + ); + + this.axis_out = axis_out; + this.axis_in = axis_in; + + this.tile_config = new[T]; + this.tile_config[0].direction = RIGHT_DOWN; + + this.c_h = new + ( + .width(AW), + .height(AH), + .bytes_per_pixel(B), + .bits_per_pixel(B * 8), + .pixels_per_clk(T), + .name("AVR_"), + .vertical_blanking(VERTICAL_BLANKING), + .tile(tile_config) + ); + + rx_h = new(c_h, '{axis_out}); + tx_h = new(c_h, axis_in); + + endfunction: new + + + // -------------------------------------------------------------------- + // + endclass: tb_recursive_axis_mux_class + + +// -------------------------------------------------------------------- +// +endpackage: tb_recursive_axis_mux_pkg + + + + + Index: tests/tb_recursive_axis_mux/the_test.sv =================================================================== --- tests/tb_recursive_axis_mux/the_test.sv (nonexistent) +++ tests/tb_recursive_axis_mux/the_test.sv (revision 36) @@ -0,0 +1,84 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + +`timescale 1ps/1ps + + +module the_test(input tb_clk, input tb_rst); + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_mux_pkg::*; + + // -------------------------------------------------------------------- + // + int i = 0; + + task automatic run_the_test; + + // -------------------------------------------------------------------- + // insert test below + // -------------------------------------------------------------------- + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench begun.", $time); + $display("^^^---------------------------------"); + + // -------------------------------------------------------------------- + // tb_top.tb.timeout_stop(2ms); + wait(~tb_rst); + + // -------------------------------------------------------------------- + #1us; + + // -------------------------------------------------------------------- + repeat(1)tb_top.a_h.queue_frame("counting"); + + // // -------------------------------------------------------------------- + // repeat(1) tb_top.a_h.queue_frame("random"); + // repeat(1)tb_top.a_h.queue_frame("counting"); + // repeat(3) tb_top.a_h.queue_frame("random"); + // tb_top.a_h.queue_frame("constant", 16'habba); + + // -------------------------------------------------------------------- + for(i = 0; i < MD; i++) + begin + force tb_top.select = i; + #20us; + end + + // -------------------------------------------------------------------- + #10us; + + // -------------------------------------------------------------------- + // insert test above + // -------------------------------------------------------------------- + + endtask + + +endmodule + Index: tests/tb_recursive_axis_switch/init_test.do =================================================================== --- tests/tb_recursive_axis_switch/init_test.do (nonexistent) +++ tests/tb_recursive_axis_switch/init_test.do (revision 36) @@ -0,0 +1,35 @@ +# ------------------------------------ +# +# ------------------------------------ + +global env + +# setup environment +do ../../../../scripts/sim_env.do +set env(SIM_TARGET) fpga +set env(SIM_TB) tb_recursive_axis_switch + +radix -hexadecimal + +make_lib work 1 + +sim_compile_lib $env(LIB_BASE_DIR) tb_packages +sim_compile_lib $env(LIB_BASE_DIR) bfm_packages +sim_compile_lib $env(LIB_BASE_DIR) axi4_lib +sim_compile_lib $env(LIB_BASE_DIR) qaz_lib +sim_compile_lib $env(LIB_BASE_DIR) sim + +# compile simulation files +vlog -f ./$env(SIM_TB).f + +# simulation $root +vlog ./$env(SIM_TB)_pkg.sv +vlog ./$env(SIM_TB).sv + +# compile test last +vlog ./the_test.sv + +# run the sim +sim_run_test + + Index: tests/tb_recursive_axis_switch/sim.do =================================================================== --- tests/tb_recursive_axis_switch/sim.do (nonexistent) +++ tests/tb_recursive_axis_switch/sim.do (revision 36) @@ -0,0 +1,11 @@ +# +# + +quit -sim + +vsim -novopt work.tb_top +# vsim -f ./sim.f work.tb_top + +# log all signals +log -r * + Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f =================================================================== --- tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f (nonexistent) +++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch.f (revision 36) @@ -0,0 +1,5 @@ +# + +${PROJECT_DIR}/src/axis_switch.sv +${PROJECT_DIR}/src/recursive_axis_switch.sv + Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv =================================================================== --- tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (nonexistent) +++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch.sv (revision 36) @@ -0,0 +1,127 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// +// ---------------------------------------------------------------------------- + +`timescale 1ps/1ps + +module tb_top(); + + // -------------------------------------------------------------------- + // test bench clock & reset + wire clk_100mhz; + wire tb_clk = clk_100mhz; + wire tb_rst; + + tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst); + + + // -------------------------------------------------------------------- + // + wire tb_rst_s; + wire aclk = tb_clk; + wire aresetn = ~tb_rst_s; + wire clk = tb_clk; + wire reset = tb_rst_s; + + sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s); + + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_switch_pkg::*; + + + // -------------------------------------------------------------------- + // + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*); + axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*); + + + // -------------------------------------------------------------------- + // + wire [SA-1:0] select = 0; + + recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA)) + dut(.*); + + + // -------------------------------------------------------------------- + // sim models + // | | | | | | | | | | | | | | | | | + // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/ + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + + + // // -------------------------------------------------------------------- + // // + // initial + // axis_out.cb_s.tready <= 1; + + + // -------------------------------------------------------------------- + // + tb_recursive_axis_switch_class a_h; + + initial + a_h = new(axis_in, axis_out); + + + + // ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' + // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\ + // | | | | | | | | | | | | | | | | | + // sim models + // -------------------------------------------------------------------- + + + // -------------------------------------------------------------------- + // debug wires + + + // -------------------------------------------------------------------- + // test + the_test test(tb_clk, tb_rst); + + initial + begin + + test.run_the_test(); + + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench done.", $time); + $display("^^^---------------------------------"); + + $display("^^^---------------------------------"); + + $stop(); + + end + +endmodule + + + Index: tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv =================================================================== --- tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (nonexistent) +++ tests/tb_recursive_axis_switch/tb_recursive_axis_switch_pkg.sv (revision 36) @@ -0,0 +1,142 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + + +package tb_recursive_axis_switch_pkg; + + // -------------------------------------------------------------------- + // + import video_frame_pkg::*; + import axis_video_frame_bfm_pkg::*; + import avf_agent_class_pkg::*; + + + // -------------------------------------------------------------------- + // + localparam AW = 32; // active width + localparam AH = 16; // active height + localparam B = 2; // bytes per pixel + localparam T = 1; // pixels per clock + localparam VERTICAL_BLANKING = AW * 4; + localparam N = B * T; // data bus width in bytes + localparam I = 1; // TID width + localparam D = 1; // TDEST width + localparam U = 3; // TUSER width + localparam SA = 2; + localparam SD = 2 ** SA; + + + // -------------------------------------------------------------------- + // + class tb_recursive_axis_switch_class; + + avf_config_class c_h; + avf_tile_config_t tile_config[]; + + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[]; + virtual axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in; + + avf_tx_class #(B, T, U) tx_h; + avf_rx_class #(B, T, U) rx_h; + + // video_frame_class clone_h; + // video_frame_class sent_f_h; + // video_frame_class rx_f_h; + + // mailbox #(video_frame_class) q[]; + + + // -------------------------------------------------------------------- + // + task automatic + queue_frame + ( + string pattern = "", + int pixel = 0 + ); + video_frame_class clone_h; + + if(pattern != "") + tx_h.make_frame(pattern, pixel); + + foreach(tx_h.tx_bfm_h[i]) + begin + clone_h = tx_h.tx_bfm_h[i].f_h.clone(); + tx_h.tx_bfm_h[i].put(clone_h); + // q[i].put(clone_h); + end + + $display("^^^ %16.t | %m | using %s pattern", $time, pattern); + + endtask: queue_frame + + + //-------------------------------------------------------------------- + // + function new + ( + virtual axis_if #(.N(N), .U(U)) axis_in, + virtual axis_if #(.N(N), .U(U)) axis_out[] + ); + + this.axis_out = axis_out; + this.axis_in = axis_in; + + this.tile_config = new[T]; + this.tile_config[0].direction = RIGHT_DOWN; + + this.c_h = new + ( + .width(AW), + .height(AH), + .bytes_per_pixel(B), + .bits_per_pixel(B * 8), + .pixels_per_clk(T), + .name("AVR_"), + .vertical_blanking(VERTICAL_BLANKING), + .tile(tile_config) + ); + + rx_h = new(c_h, axis_out); + tx_h = new(c_h, '{axis_in}); + + endfunction: new + + + // -------------------------------------------------------------------- + // + endclass: tb_recursive_axis_switch_class + + +// -------------------------------------------------------------------- +// +endpackage: tb_recursive_axis_switch_pkg + + + + + Index: tests/tb_recursive_axis_switch/the_test.sv =================================================================== --- tests/tb_recursive_axis_switch/the_test.sv (nonexistent) +++ tests/tb_recursive_axis_switch/the_test.sv (revision 36) @@ -0,0 +1,86 @@ +////////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2017 Authors and OPENCORES.ORG //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer. //// +//// //// +//// This source file is free software; you can redistribute it //// +//// and/or modify it under the terms of the GNU Lesser General //// +//// Public License as published by the Free Software Foundation; //// +//// either version 2.1 of the License, or (at your option) any //// +//// later version. //// +//// //// +//// This source is distributed in the hope that it will be //// +//// useful, but WITHOUT ANY WARRANTY; without even the implied //// +//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// +//// PURPOSE. See the GNU Lesser General Public License for more //// +//// details. //// +//// //// +//// You should have received a copy of the GNU Lesser General //// +//// Public License along with this source; if not, download it //// +//// from http://www.opencores.org/lgpl.shtml //// +//// //// +////////////////////////////////////////////////////////////////////// + +`timescale 1ps/1ps + + +module the_test(input tb_clk, input tb_rst); + + // -------------------------------------------------------------------- + // + import tb_recursive_axis_switch_pkg::*; + + // -------------------------------------------------------------------- + // + int i = 0; + + task automatic run_the_test; + + // -------------------------------------------------------------------- + // insert test below + // -------------------------------------------------------------------- + $display("^^^---------------------------------"); + $display("^^^ %16.t | Testbench begun.", $time); + $display("^^^---------------------------------"); + + // -------------------------------------------------------------------- + tb_top.tb.timeout_stop(2ms); + wait(~tb_rst); + + // -------------------------------------------------------------------- + #1us; + + // // -------------------------------------------------------------------- + // repeat(1)tb_top.a_h.queue_frame("counting"); + + // // -------------------------------------------------------------------- + // repeat(1) tb_top.a_h.queue_frame("random"); + // repeat(1)tb_top.a_h.queue_frame("counting"); + // repeat(3) tb_top.a_h.queue_frame("random"); + // tb_top.a_h.queue_frame("constant", 16'habba); + + // -------------------------------------------------------------------- + for(i = 0; i < SD; i++) + begin + force tb_top.select = i; + #1us; + tb_top.a_h.queue_frame("counting"); + #8us; + end + + // -------------------------------------------------------------------- + #5us; + + // -------------------------------------------------------------------- + // insert test above + // -------------------------------------------------------------------- + + endtask + + +endmodule +