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URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

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Rev 22 → Rev 23

/trunk/scripts/sim_procs.do
0,0 → 1,131
# //////////////////////////////////////////////////////////////////////
# //// ////
# //// Copyright (C) 2015 Authors and OPENCORES.ORG ////
# //// ////
# //// This source file may be used and distributed without ////
# //// restriction provided that this copyright statement is not ////
# //// removed from the file and that any derivative work contains ////
# //// the original copyright notice and the associated disclaimer. ////
# //// ////
# //// This source file is free software; you can redistribute it ////
# //// and/or modify it under the terms of the GNU Lesser General ////
# //// Public License as published by the Free Software Foundation; ////
# //// either version 2.1 of the License, or (at your option) any ////
# //// later version. ////
# //// ////
# //// This source is distributed in the hope that it will be ////
# //// useful, but WITHOUT ANY WARRANTY; without even the implied ////
# //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
# //// PURPOSE. See the GNU Lesser General Public License for more ////
# //// details. ////
# //// ////
# //// You should have received a copy of the GNU Lesser General ////
# //// Public License along with this source; if not, download it ////
# //// from http://www.opencores.org/lgpl.shtml ////
# //// ////
# //////////////////////////////////////////////////////////////////////
 
 
# ------------------------------------
#
proc sim_compile_all { target } {
 
global env
 
echo "INFO: compiling $target rtl"
foreach filename [glob -nocomplain -directory ../../libs/${target}_verilog/ *.f] {
echo "INFO: compiling $filename"
vlog -f $filename
}
foreach filename [glob -nocomplain -directory ../../libs/${target}_VHDL/ *.f] {
echo "INFO: compiling $filename"
vcom -explicit -f $filename
}
}
 
 
# ------------------------------------
#
proc sim_run_sim { } {
 
if {[file exists ./sim.do]} {
do ./sim.do
} elseif {[file exists ../../libs/sim.do]} {
do ../../libs/sim.do
} elseif {[file exists ../../libs/altera_sim.f]} {
vsim -novopt -f ../../libs/altera_sim.f -l transcript.txt work.tb_top
} elseif {[file exists ../../libs/xilinx_sim.f]} {
vsim -novopt -f ../../libs/xilinx_sim.f -l transcript.txt work.tb_top work.glbl
}
if { [file exists ./wave.do] } {
do ./wave.do
}
}
 
 
# ------------------------------------
#
proc sim_run_test { } {
 
global env
 
# unique setup
if { [file exists ./setup_test.do] } {
do ./setup_test.do
}
 
if { [info exists env(MAKEFILE_TEST_RUN)] } {
vlog +define+MAKEFILE_TEST_RUN ../../src/tb_top.v
} else {
sim_run_sim
}
 
run -all
}
 
 
# ------------------------------------
#
proc sim_restart { } {
 
global env
 
# work in progress files to compile
if { [file exists ./wip.do] } {
echo "INFO: found ./wip.do"
do ./wip.do
}
if { [string equal nodesign [runStatus]] } {
sim_run_sim
} else {
restart -force
}
 
run -all
}
 
 
# ------------------------------------
#
proc make_lib { lib {rebuild 0} } {
 
if {[file exists $lib/_info]} {
echo "INFO: Simulation library $lib already exists"
if { $rebuild != 0 } {
echo "INFO: Rebuilding library. Deleting ./$lib and recompiling all"
quit -sim
file delete -force ./$lib
vlib $lib
vmap $lib $lib
}
} else {
vlib $lib
vmap $lib $lib
}
}
/trunk/scripts/sim_run_test.do
0,0 → 1,13
# ------------------------------------
#
# ------------------------------------
 
do ../../scripts/sim_procs.do
 
 
sim_run_test
 
quit
 
 
 
/trunk/axis_video_frame_class/src/axis_video_frame.sv
0,0 → 1,195
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
axis_video_frame
#(
BYTES_PER_PIXEL = 2,
AVF_OUTPUTS = 4,
AVF_TILES = 1
)
(
input aclk,
input aresetn
);
 
// --------------------------------------------------------------------
//
import axis_video_frame_pkg::*;
localparam AVF_N = BYTES_PER_PIXEL * AVF_OUTPUTS; // data bus width in bytes
localparam AVF_U = 1; // TUSER width
localparam AVF_B = BYTES_PER_PIXEL * 8; // bits per pixel on TDATA
 
axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis[AVF_TILES](.*);
 
for(genvar j = 0; j < AVF_TILES; j++)
assign avf_axis[j].tready = 1;
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_tx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_tx_h[j] = new(avf_axis[j]);
 
f_tx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("tx")
);
 
f_tx_h[j].make_counting();
end
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_rx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_rx_h[j] = new(avf_axis[j]);
 
f_rx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("rx")
);
end
 
 
// --------------------------------------------------------------------
//
logic put_frame_active = 0;
 
task automatic
put_frame;
 
if(put_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already put a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | Putting a frame.", $time);
put_frame_active = 1;
 
fork
begin
 
foreach(f_tx_h[i])
f_tx_h[i].avf_tx(RIGHT_DOWN, 0);
 
wait fork;
put_frame_active = 0;
$display("^^^ %16.t | %m | Put a frame.", $time);
 
end
join_none
 
 
endtask: put_frame
 
 
// --------------------------------------------------------------------
//
logic get_frame_active = 0;
 
task automatic
get_frame;
 
if(get_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already getting a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | getting a frame.", $time);
get_frame_active = 1;
 
fork
begin
 
foreach(f_rx_h[i])
f_rx_h[i].avf_rx(RIGHT_DOWN);
 
wait fork;
get_frame_active = 0;
$display("^^^ %16.t | %m | Got a frame.", $time);
 
end
join_none
 
 
endtask: get_frame
 
 
// --------------------------------------------------------------------
//
import video_frame_pkg::*;
video_frame_class f_h;
 
function automatic
int compare_frame;
 
int mismatch_count[AVF_TILES];
 
foreach(f_rx_h[i])
begin
 
$display("^^^ %16.t | %m | Got a frame.", $time);
 
f_h = f_tx_h[i];
 
mismatch_count[i] = f_rx_h[i].compare(8, f_h);
end
 
 
endfunction: compare_frame
 
 
// --------------------------------------------------------------------
//
for(genvar j = 0; j < AVF_TILES; j++)
axis_video_debug #(BYTES_PER_PIXEL, AVF_OUTPUTS) avf_debug(avf_axis[j]);
 
 
endmodule
 
 
 
/trunk/axis_video_frame_class/src/axis_video_frame_pkg.sv
0,0 → 1,375
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
package axis_video_frame_pkg;
 
typedef enum
{
RIGHT_DOWN,
RIGHT_UP,
LEFT_DOWN,
LEFT_UP
} avf_direction_t;
 
// --------------------------------------------------------------------
//
import video_frame_pkg::*;
 
class axis_video_frame_class #(BYTES_PER_PIXEL = 2, AVF_OUTPUTS = 1) extends video_frame_class;
 
localparam AVF_N = BYTES_PER_PIXEL * AVF_OUTPUTS; // data bus width in bytes
localparam AVF_U = 1; // TUSER width
localparam AVF_B = BYTES_PER_PIXEL * 8; // bits per pixel on TDATA
int avf_width = 16;
int avf_height = 16;
// int unsigned avf_delay = 0;
string avf_name = "";
string avf_type = "";
virtual axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis_if;
 
 
//--------------------------------------------------------------------
function new
(
virtual axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis_if
);
 
super.new;
this.avf_axis_if = avf_axis_if;
 
endfunction: new
 
 
// --------------------------------------------------------------------
//
function void init
(
input int avf_width,
input int avf_height,
input int avf_bits_per_pixel,
input string avf_name,
input string avf_type
);
 
super.init
(
.pixels_per_line(avf_width),
.lines_per_frame(avf_height),
.bits_per_pixel(avf_bits_per_pixel)
);
 
this.avf_width = avf_width;
this.avf_height = avf_height;
this.avf_name = avf_name;
this.avf_type = avf_type;
 
if(avf_type == "rx")
begin
avf_axis_if.cb_s.tready <= 1;
end
else if(avf_type == "tx")
begin
avf_axis_if.cb_m.tvalid <= 0;
avf_axis_if.cb_m.tdata <= 0;
avf_axis_if.cb_m.tlast <= 0;
avf_axis_if.cb_m.tuser <= 0;
end
else
begin
$display("^^^ %16.t | %m | ERROR! avf_type %s is invalid", $time, avf_type);
end
 
$display("^^^ %16.t | %m | initialization of %s for %s", $time, avf_name, avf_type);
 
endfunction: init
 
// --------------------------------------------------------------------
//
task automatic
avf_direction
(
input avf_direction_t direction,
output frame_coordinate_t inc
);
 
case(direction)
RIGHT_DOWN: inc = '{ 1, 1};
RIGHT_UP: inc = '{ 1, -1};
LEFT_DOWN: inc = '{-1, 1};
LEFT_UP: inc = '{-1, -1};
default: $display("^^^ %16.t | %m | ERROR!!! Incorrect AVF direction.", $time );
endcase
 
endtask: avf_direction
 
// --------------------------------------------------------------------
//
task automatic
set_tready
(
input data
);
 
avf_axis_if.cb_s.tready <= data;
 
endtask: set_tready
 
 
// --------------------------------------------------------------------
//
task automatic
avf_calculate
(
input avf_direction_t direction,
output frame_coordinate_t start,
output frame_coordinate_t inc,
output int x_end,
output int y_end,
output int x_eol
);
 
case(direction)
RIGHT_DOWN: start = '{0, 0 };
RIGHT_UP: start = '{0, avf_height - 1 };
LEFT_DOWN: start = '{avf_width - 1, 0 };
LEFT_UP: start = '{avf_width - 1, avf_height - 1 };
default: $display("^^^ %16.t | %m | [%04d, %04d] | ERROR!!! Incorrect AVF direction.", $time, start.x, start.y );
endcase
 
avf_direction(direction, inc);
 
x_end = (start.x + (avf_width * inc.x));
y_end = (start.y + (avf_height * inc.y));
inc.x *= AVF_OUTPUTS; // increment stride by number of outputs
x_eol = x_end - inc.x;
// $display("^^^ %16.t | %m | [%04d, %04d] | inc.x = %d", $time, start.x, start.y, inc.x);
// $display("^^^ %16.t | %m | [%04d, %04d] | inc.y = %d", $time, start.x, start.y, inc.y);
// $display("^^^ %16.t | %m | [%04d, %04d] | x_end = %d", $time, start.x, start.y, x_end);
// $display("^^^ %16.t | %m | [%04d, %04d] | y_end = %d", $time, start.x, start.y, y_end);
// $display("^^^ %16.t | %m | [%04d, %04d] | x_eol = %d", $time, start.x, start.y, x_eol);
 
endtask: avf_calculate
 
 
// --------------------------------------------------------------------
//
task automatic
debug_print
(
int l,
int p
);
$display("^^^ %16.t | %m | AVF %s configured for %s", $time, avf_name, avf_type);
 
if((p == 0))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
if((p == 1))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
if((p == 2))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
if((p == 157))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
if((p == 158))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
if((p == 159))
$display("^^^ %16.t | %m || [%04d, %04d] = 0x%06x", $time, p, l, this.lines[l].pixel[p]);
 
endtask: debug_print
 
// --------------------------------------------------------------------
//
task automatic
avf_rx
(
input avf_direction_t direction
);
frame_coordinate_t start;
frame_coordinate_t inc;
int x_end;
int y_end;
int x_eol;
int pixel_count = 0;
int l;
int p;
 
avf_calculate
(
.start(start),
.direction(direction),
.inc(inc),
.x_end(x_end),
.y_end(y_end),
.x_eol(x_eol)
);
 
fork
begin
 
$display("^^^ %16.t | %m | %s_%s |", $time, avf_name, avf_type);
 
wait(avf_axis_if.cb_s.tuser & avf_axis_if.cb_s.tvalid);
 
for(l = start.y; y_end != l; l = l + inc.y)
for(p = start.x; x_end != p; p = p + inc.x)
begin
 
wait(avf_axis_if.cb_s.tvalid);
 
for(int i = 0; i < AVF_OUTPUTS; i++)
this.lines[l].pixel[p + i] = avf_axis_if.cb_s.tdata[i*AVF_B +: AVF_B];
 
if(p == x_eol)
if(~avf_axis_if.cb_s.tlast)
$display("^^^ %16.t | %m | [%04d, %04d] | %s_%s | ERROR! x_eol without tlast | x_eol = %04d | 0x%06x", $time, p, l, avf_name, avf_type, x_eol, this.lines[l].pixel[p]);
 
if(avf_axis_if.cb_s.tlast)
if(p != x_eol)
$display("^^^ %16.t | %m | [%04d, %04d] | %s_%s | ERROR! tlast without x_eol | x_eol = %04d | 0x%06x", $time, p, l, avf_name, avf_type, x_eol, this.lines[l].pixel[p]);
 
@(avf_axis_if.cb_s);
 
end
end
join_none
 
#0;
 
endtask: avf_rx
 
// --------------------------------------------------------------------
//
task automatic
output_pixels
(
input int l,
input int p
);
for(int i = 0; i < AVF_OUTPUTS; i++)
avf_axis_if.cb_m.tdata[i*AVF_B +: AVF_B] <= this.lines[l].pixel[p + i];
endtask: output_pixels
 
// --------------------------------------------------------------------
//
task automatic
avf_tx
(
input avf_direction_t direction,
input int unsigned avf_delay
);
frame_coordinate_t start;
frame_coordinate_t inc;
int x_end;
int y_end;
int x_eol;
int pixel_count = 0;
int l;
int p;
avf_calculate
(
.start(start),
.direction(direction),
.inc(inc),
.x_end(x_end),
.y_end(y_end),
.x_eol(x_eol)
);
 
fork
begin
@(avf_axis_if.cb_m);
repeat(avf_delay) @(avf_axis_if.cb_m);
 
$display("^^^ %16.t | %m | %s_%s |", $time, avf_name, avf_type);
 
avf_axis_if.cb_m.tvalid <= 1; // assert first pixel
avf_axis_if.cb_m.tuser <= 1;
output_pixels(start.y, start.x);
for(l = start.y; y_end != l; l = l + inc.y)
for(p = start.x; x_end != p; p = p + inc.x)
begin
if((l == start.y) & (p == start.x)) // first pixel already asserted
continue;
@(avf_axis_if.cb_m iff avf_axis_if.cb_m.tready)
begin
avf_axis_if.cb_m.tvalid <= 1;
output_pixels(l, p);
// if((l == start.y) & (p == start.x))
// debug_print(l, p);
avf_axis_if.cb_m.tuser <= 0;
if(p == x_eol)
avf_axis_if.cb_m.tlast <= 1;
else
avf_axis_if.cb_m.tlast <= 0;
 
end
end
@(avf_axis_if.cb_m)
begin
avf_axis_if.cb_m.tlast <= 0;
avf_axis_if.cb_m.tvalid <= 0;
end
 
end
join_none
 
endtask: avf_tx
 
 
// --------------------------------------------------------------------
//
 
endclass: axis_video_frame_class
 
endpackage: axis_video_frame_pkg
 
/trunk/axis_video_frame_class/src/avf_rx.sv
0,0 → 1,195
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
avf_rx
#(
BYTES_PER_PIXEL = 2,
AVF_OUTPUTS = 4,
AVF_TILES = 1
)
(
input aclk,
input aresetn
);
 
// --------------------------------------------------------------------
//
import axis_video_frame_pkg::*;
localparam AVF_N = BYTES_PER_PIXEL * AVF_OUTPUTS; // data bus width in bytes
localparam AVF_U = 1; // TUSER width
localparam AVF_B = BYTES_PER_PIXEL * 8; // bits per pixel on TDATA
 
axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis[AVF_TILES](.*);
 
for(genvar j = 0; j < AVF_TILES; j++)
assign avf_axis[j].tready = 1;
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_tx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_tx_h[j] = new(avf_axis[j]);
 
f_tx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("tx")
);
 
f_tx_h[j].make_counting();
end
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_rx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_rx_h[j] = new(avf_axis[j]);
 
f_rx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("rx")
);
end
 
 
// --------------------------------------------------------------------
//
logic put_frame_active = 0;
 
task automatic
put_frame;
 
if(put_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already put a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | Putting a frame.", $time);
put_frame_active = 1;
 
fork
begin
 
foreach(f_tx_h[i])
f_tx_h[i].avf_tx(RIGHT_DOWN, 0);
 
wait fork;
put_frame_active = 0;
$display("^^^ %16.t | %m | Put a frame.", $time);
 
end
join_none
 
 
endtask: put_frame
 
 
// --------------------------------------------------------------------
//
logic get_frame_active = 0;
 
task automatic
get_frame;
 
if(get_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already getting a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | getting a frame.", $time);
get_frame_active = 1;
 
fork
begin
 
foreach(f_rx_h[i])
f_rx_h[i].avf_rx(RIGHT_DOWN);
 
wait fork;
get_frame_active = 0;
$display("^^^ %16.t | %m | Got a frame.", $time);
 
end
join_none
 
 
endtask: get_frame
 
 
// --------------------------------------------------------------------
//
import video_frame_pkg::*;
video_frame_class f_h;
 
function automatic
int compare_frame;
 
int mismatch_count[AVF_TILES];
 
foreach(f_rx_h[i])
begin
 
$display("^^^ %16.t | %m | Got a frame.", $time);
 
f_h = f_tx_h[i];
 
mismatch_count[i] = f_rx_h[i].compare(8, f_h);
end
 
 
endfunction: compare_frame
 
 
// --------------------------------------------------------------------
//
for(genvar j = 0; j < AVF_TILES; j++)
axis_video_debug #(BYTES_PER_PIXEL, AVF_OUTPUTS) avf_debug(avf_axis[j]);
 
 
endmodule
 
 
 
/trunk/axis_video_frame_class/src/avf_tx.sv
0,0 → 1,195
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
avf_tx
#(
BYTES_PER_PIXEL = 2,
AVF_OUTPUTS = 4,
AVF_TILES = 1
)
(
input aclk,
input aresetn
);
 
// --------------------------------------------------------------------
//
import axis_video_frame_pkg::*;
localparam AVF_N = BYTES_PER_PIXEL * AVF_OUTPUTS; // data bus width in bytes
localparam AVF_U = 1; // TUSER width
localparam AVF_B = BYTES_PER_PIXEL * 8; // bits per pixel on TDATA
 
axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis[AVF_TILES](.*);
 
for(genvar j = 0; j < AVF_TILES; j++)
assign avf_axis[j].tready = 1;
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_tx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_tx_h[j] = new(avf_axis[j]);
 
f_tx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("tx")
);
 
f_tx_h[j].make_counting();
end
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_rx_h[AVF_TILES];
 
for(genvar j = 0; j < AVF_TILES; j++)
initial
begin
f_rx_h[j] = new(avf_axis[j]);
 
f_rx_h[j].init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("rx")
);
end
 
 
// --------------------------------------------------------------------
//
logic put_frame_active = 0;
 
task automatic
put_frame;
 
if(put_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already put a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | Putting a frame.", $time);
put_frame_active = 1;
 
fork
begin
 
foreach(f_tx_h[i])
f_tx_h[i].avf_tx(RIGHT_DOWN, 0);
 
wait fork;
put_frame_active = 0;
$display("^^^ %16.t | %m | Put a frame.", $time);
 
end
join_none
 
 
endtask: put_frame
 
 
// --------------------------------------------------------------------
//
logic get_frame_active = 0;
 
task automatic
get_frame;
 
if(get_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already getting a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | getting a frame.", $time);
get_frame_active = 1;
 
fork
begin
 
foreach(f_rx_h[i])
f_rx_h[i].avf_rx(RIGHT_DOWN);
 
wait fork;
get_frame_active = 0;
$display("^^^ %16.t | %m | Got a frame.", $time);
 
end
join_none
 
 
endtask: get_frame
 
 
// --------------------------------------------------------------------
//
import video_frame_pkg::*;
video_frame_class f_h;
 
function automatic
int compare_frame;
 
int mismatch_count[AVF_TILES];
 
foreach(f_rx_h[i])
begin
 
$display("^^^ %16.t | %m | Got a frame.", $time);
 
f_h = f_tx_h[i];
 
mismatch_count[i] = f_rx_h[i].compare(8, f_h);
end
 
 
endfunction: compare_frame
 
 
// --------------------------------------------------------------------
//
for(genvar j = 0; j < AVF_TILES; j++)
axis_video_debug #(BYTES_PER_PIXEL, AVF_OUTPUTS) avf_debug(avf_axis[j]);
 
 
endmodule
 
 
 
/trunk/axis_video_frame_class/sim/tests/tb_1_tile_4_outputs/wip.do
0,0 → 1,12
#
 
 
vlog -f ../../libs/sim_verilog/avf.f
 
# simulation $root
vlog ../../src/tb_1_tile_4_outputs.sv
 
# compile test last
vlog ./the_test.sv
 
/trunk/axis_video_frame_class/sim/tests/tb_1_tile_4_outputs/init_test.do
0,0 → 1,33
# ------------------------------------
#
# ------------------------------------
 
global env
 
set env(ROOT_DIR) ../../../../..
set env(PROJECT_DIR) ../../..
set env(SIM_TARGET) fpga
 
# load sim procedures
do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
 
radix -hexadecimal
 
make_lib work 1
 
# sim_compile_all FPGA
sim_compile_all sim
 
# simulation $root
vlog $env(PROJECT_DIR)/sim/src/tb_1_tile_4_outputs.sv
 
# compile test last
vlog ./the_test.sv
 
# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
 
# run the sim
sim_run_test
 
 
 
/trunk/axis_video_frame_class/sim/tests/tb_1_tile_4_outputs/the_test.sv
0,0 → 1,79
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
the_test(
input tb_clk,
input tb_rst
);
// --------------------------------------------------------------------
//
int mismatch_count = 0;
// --------------------------------------------------------------------
//
task run_the_test;
 
// --------------------------------------------------------------------
// insert test below
// --------------------------------------------------------------------
$display("^^^---------------------------------");
$display("^^^ %16.t | Testbench begun.\n", $time);
$display("^^^---------------------------------");
 
tb_top.tb.timeout_stop(500us);
 
wait(~tb_rst);
 
repeat(100) @(posedge tb_clk);
tb_top.avf_bfm.get_frame();
tb_top.avf_bfm.put_frame();
 
wait(~tb_top.avf_bfm.put_frame_active);
wait(~tb_top.avf_bfm.get_frame_active);
mismatch_count = tb_top.avf_bfm.compare_frame();
tb_top.avf_bfm.f_rx_h[0].lines[1].pixel[1] = 0;
mismatch_count = tb_top.avf_bfm.compare_frame();
repeat(100) @(posedge tb_clk);
 
// --------------------------------------------------------------------
// insert test above
// --------------------------------------------------------------------
 
endtask
 
 
endmodule
 
/trunk/axis_video_frame_class/sim/tests/tb_1_tile_4_outputs/sim.do
0,0 → 1,21
#
#
 
 
quit -sim
 
# vsim opt_tb_top
 
vsim -novopt work.tb_top
# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
 
# vsim -voptargs="+acc=rn+/tb_top/dut" -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
# vsim -pli "C:/Xilinx/Vivado/2015.4/lib/win64.o/libxil_vsim.dll" -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
 
 
# # log all signals
# log -r *
 
# run -all
 
 
/trunk/axis_video_frame_class/sim/tests/tb_4_tile_1_outputs/wip.do
0,0 → 1,12
#
 
 
vlog -f ../../libs/sim_verilog/avf.f
 
# simulation $root
vlog ../../src/tb_4_tile_1_outputs.sv
 
# compile test last
vlog ./the_test.sv
 
/trunk/axis_video_frame_class/sim/tests/tb_4_tile_1_outputs/init_test.do
0,0 → 1,33
# ------------------------------------
#
# ------------------------------------
 
global env
 
set env(ROOT_DIR) ../../../../..
set env(PROJECT_DIR) ../../..
set env(SIM_TARGET) fpga
 
# load sim procedures
do $env(ROOT_DIR)/qaz_libs/scripts/sim_procs.do
 
radix -hexadecimal
 
make_lib work 1
 
# sim_compile_all FPGA
sim_compile_all sim
 
# simulation $root
vlog $env(PROJECT_DIR)/sim/src/tb_4_tile_1_outputs.sv
 
# compile test last
vlog ./the_test.sv
 
# vopt work.glbl tb_top -L secureip -L simprims_ver -L unisims_ver -f opt_tb_top.f -o opt_tb_top
 
# run the sim
sim_run_test
 
 
 
/trunk/axis_video_frame_class/sim/tests/tb_4_tile_1_outputs/the_test.sv
0,0 → 1,79
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
the_test(
input tb_clk,
input tb_rst
);
// --------------------------------------------------------------------
//
int mismatch_count = 0;
// --------------------------------------------------------------------
//
task run_the_test;
 
// --------------------------------------------------------------------
// insert test below
// --------------------------------------------------------------------
$display("^^^---------------------------------");
$display("^^^ %16.t | Testbench begun.\n", $time);
$display("^^^---------------------------------");
 
tb_top.tb.timeout_stop(500us);
 
wait(~tb_rst);
 
repeat(100) @(posedge tb_clk);
tb_top.avf_bfm.get_frame();
tb_top.avf_bfm.put_frame();
 
wait(~tb_top.avf_bfm.put_frame_active);
wait(~tb_top.avf_bfm.get_frame_active);
mismatch_count = tb_top.avf_bfm.compare_frame();
tb_top.avf_bfm.f_rx_h[0].lines[1].pixel[1] = 0;
mismatch_count = tb_top.avf_bfm.compare_frame();
repeat(100) @(posedge tb_clk);
 
// --------------------------------------------------------------------
// insert test above
// --------------------------------------------------------------------
 
endtask
 
 
endmodule
 
/trunk/axis_video_frame_class/sim/tests/tb_4_tile_1_outputs/sim.do
0,0 → 1,21
#
#
 
 
quit -sim
 
# vsim opt_tb_top
 
vsim -novopt work.tb_top
# vsim -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
 
# vsim -voptargs="+acc=rn+/tb_top/dut" -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
# vsim -pli "C:/Xilinx/Vivado/2015.4/lib/win64.o/libxil_vsim.dll" -novopt -L secureip -L simprims_ver -L unisims_ver work.glbl work.tb_top
 
 
# # log all signals
# log -r *
 
# run -all
 
 
/trunk/axis_video_frame_class/sim/src/tb_4_tile_1_outputs.sv
0,0 → 1,94
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module tb_top();
 
// --------------------------------------------------------------------
// test bench clock & reset
wire clk_200mhz;
wire tb_clk = clk_200mhz;
wire tb_rst;
 
tb_base #( .PERIOD(5_000) ) tb( clk_200mhz, tb_rst );
 
 
// --------------------------------------------------------------------
//
wire aclk = tb_clk;
wire aresetn = ~tb_rst;
 
axis_video_frame #(.BYTES_PER_PIXEL(2), .AVF_OUTPUTS(1), .AVF_TILES(4))
avf_bfm(.*);
 
// --------------------------------------------------------------------
// sim models
// | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
 
// --------------------------------------------------------------------
//
 
 
 
 
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
// | | | | | | | | | | | | | | | | |
// sim models
// --------------------------------------------------------------------
 
 
// --------------------------------------------------------------------
// debug wires
 
 
// --------------------------------------------------------------------
// test
the_test test( tb_clk, tb_rst );
 
initial
begin
 
test.run_the_test();
 
$display("^^^---------------------------------");
$display("^^^ %16.t | Testbench done.", $time);
$display("^^^---------------------------------");
 
$display("^^^---------------------------------");
 
$stop();
 
end
 
endmodule
 
 
 
/trunk/axis_video_frame_class/sim/src/tb_1_tile_4_outputs.sv
0,0 → 1,94
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module tb_top();
 
// --------------------------------------------------------------------
// test bench clock & reset
wire clk_200mhz;
wire tb_clk = clk_200mhz;
wire tb_rst;
 
tb_base #( .PERIOD(5_000) ) tb( clk_200mhz, tb_rst );
 
 
// --------------------------------------------------------------------
//
wire aclk = tb_clk;
wire aresetn = ~tb_rst;
 
axis_video_frame #(.BYTES_PER_PIXEL(2), .AVF_OUTPUTS(4), .AVF_TILES(1))
avf_bfm(.*);
 
// --------------------------------------------------------------------
// sim models
// | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
 
// --------------------------------------------------------------------
//
 
 
 
 
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
// | | | | | | | | | | | | | | | | |
// sim models
// --------------------------------------------------------------------
 
 
// --------------------------------------------------------------------
// debug wires
 
 
// --------------------------------------------------------------------
// test
the_test test( tb_clk, tb_rst );
 
initial
begin
 
test.run_the_test();
 
$display("^^^---------------------------------");
$display("^^^ %16.t | Testbench done.", $time);
$display("^^^---------------------------------");
 
$display("^^^---------------------------------");
 
$stop();
 
end
 
endmodule
 
 
 
/trunk/axis_video_frame_class/sim/src/tb_top.sv
0,0 → 1,229
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module tb_top();
 
// --------------------------------------------------------------------
// test bench clock & reset
wire clk_200mhz;
wire tb_clk = clk_200mhz;
wire tb_rst;
 
tb_base #( .PERIOD(5_000) ) tb( clk_200mhz, tb_rst );
 
 
// --------------------------------------------------------------------
//
import axis_video_frame_pkg::*;
localparam BYTES_PER_PIXEL = 2;
localparam AVF_OUTPUTS = 4;
localparam AVF_TILES = 1;
localparam AVF_N = BYTES_PER_PIXEL * AVF_OUTPUTS; // data bus width in bytes
localparam AVF_U = 1; // TUSER width
localparam AVF_B = BYTES_PER_PIXEL * 8; // bits per pixel on TDATA
 
axis_if #(.N(AVF_N), .U(AVF_U)) avf_axis(.*);
 
assign avf_axis.tready = 1;
 
 
// --------------------------------------------------------------------
//
wire aclk = tb_clk;
wire aresetn = ~tb_rst;
 
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_tx_h;
 
initial
begin
f_tx_h = new(avf_axis);
 
f_tx_h.init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("tx")
);
 
f_tx_h.make_counting();
end
 
 
// --------------------------------------------------------------------
//
axis_video_frame_class #(BYTES_PER_PIXEL, AVF_OUTPUTS) f_rx_h;
 
initial
begin
f_rx_h = new(avf_axis);
 
f_rx_h.init
(
.avf_width(32),
.avf_height(16),
.avf_bits_per_pixel(16),
.avf_name("AVF"),
.avf_type("rx")
);
end
 
// --------------------------------------------------------------------
// sim models
// | | | | | | | | | | | | | | | | |
// \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
 
// --------------------------------------------------------------------
//
logic put_frame_active = 0;
 
task automatic
put_frame;
 
if(put_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already put a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | Putting a frame.", $time);
put_frame_active = 1;
 
fork
begin
 
// foreach(f_tx_h[i])
f_tx_h.avf_tx(RIGHT_DOWN, 0);
 
wait fork;
put_frame_active = 0;
$display("^^^ %16.t | %m | Put a frame.", $time);
 
end
join_none
 
 
endtask: put_frame
 
 
// --------------------------------------------------------------------
//
logic get_frame_active = 0;
 
task automatic
get_frame;
 
if(get_frame_active)
begin
$display("^^^ %16.t | %m | ERROR! Already getting a frame.", $time);
return;
end
 
$display("^^^ %16.t | %m | getting a frame.", $time);
get_frame_active = 1;
 
fork
begin
 
// foreach(f_rx_h[i])
f_rx_h.avf_rx(RIGHT_DOWN);
 
wait fork;
get_frame_active = 0;
$display("^^^ %16.t | %m | Got a frame.", $time);
 
end
join_none
 
 
endtask: get_frame
 
 
// --------------------------------------------------------------------
//
import video_frame_pkg::*;
video_frame_class f_h;
function automatic
int compare_frame;
 
int mismatch_count = 0;
 
$display("^^^ %16.t | %m | Got a frame.", $time);
f_h = f_tx_h;
 
mismatch_count = f_rx_h.compare(8, f_h);
 
 
endfunction: compare_frame
 
 
// --------------------------------------------------------------------
//
axis_video_debug #(BYTES_PER_PIXEL, AVF_OUTPUTS) avf_debug(avf_axis);
 
 
 
 
// ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' '
// /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
// | | | | | | | | | | | | | | | | |
// sim models
// --------------------------------------------------------------------
 
 
// --------------------------------------------------------------------
// debug wires
 
 
// --------------------------------------------------------------------
// test
the_test test( tb_clk, tb_rst );
 
initial
begin
 
test.run_the_test();
 
$display("^^^---------------------------------");
$display("^^^ %16.t | Testbench done.", $time);
$display("^^^---------------------------------");
 
$display("^^^---------------------------------");
 
$stop();
 
end
 
endmodule
 
 
 
/trunk/axis_video_frame_class/sim/libs/sim_verilog/tb_lib.f
0,0 → 1,16
#
 
-mfcu
 
${ROOT_DIR}/qaz_libs/tb_class/src/tb_clk_class.sv
 
${ROOT_DIR}/qaz_libs/tb_class/src/tb_clk.sv
${ROOT_DIR}/qaz_libs/tb_class/src/tb_base.sv
 
 
 
 
 
 
 
 
/trunk/axis_video_frame_class/sim/libs/sim_verilog/avf.f
0,0 → 1,8
#
 
-mfcu
 
${ROOT_DIR}/qaz_libs/video_frame_class/src/video_frame_pkg.sv
${ROOT_DIR}/qaz_libs/axis_video_frame_class/src/axis_video_frame_pkg.sv
${ROOT_DIR}/qaz_libs/axis_video_frame_class/src/axis_video_frame.sv
 
/trunk/axis_video_frame_class/sim/libs/sim_verilog/axis.f
0,0 → 1,8
#
 
-mfcu
 
${ROOT_DIR}/qaz_libs/axi4_stream_lib/src/axis_if.sv
${ROOT_DIR}/qaz_libs/axi4_stream_lib/src/axis_video_debug.sv
${ROOT_DIR}/qaz_libs/axi4_stream_lib/src/data_to_axis_fsm.sv
 
/trunk/tb_class/src/tb_base.sv
36,6 → 36,22
 
// --------------------------------------------------------------------
//
task timeout_stop
(
input time timeout
);
$display("-#- %16.t | %m | timeout_stop at %t", $time, timeout);
fork
#(timeout) $stop;
join_none
endtask
 
 
// --------------------------------------------------------------------
//
tb_clk_class tb_clk_c;
tb_clk_if tb_clk_driver();
assign clock = tb_clk_driver.clk;
/trunk/axi4_lib/src/axi4_if.sv
0,0 → 1,174
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
interface
axi4_if
#(
DATA_WIDTH = 64
)
(
input aresetn,
input aclk
);
 
wire arready;
wire arregion;
wire awready;
wire awregion;
wire bvalid;
wire rlast;
wire rvalid;
wire wready;
wire [1:0] bresp;
wire [1:0] rresp;
wire [5:0] bid;
wire [5:0] rid;
wire [DATA_WIDTH-1:0] rdata;
wire [7:0] rcount;
wire [7:0] wcount;
wire [2:0] racount;
wire [5:0] wacount;
wire arvalid;
wire awvalid;
wire bready;
wire rready;
wire wlast;
wire wvalid;
wire [1:0] arburst;
wire [1:0] arlock;
wire [2:0] arsize;
wire [1:0] awburst;
wire [1:0] awlock;
wire [2:0] awsize;
wire [2:0] arprot;
wire [2:0] awprot;
wire [31:0] araddr;
wire [31:0] awaddr;
wire [3:0] arcache;
wire [7:0] arlen;
wire [3:0] arqos;
wire [3:0] awcache;
wire [3:0] awlen;
wire [3:0] awqos;
wire [5:0] arid;
wire [5:0] awid;
wire [5:0] wid;
wire [DATA_WIDTH-1:0] wdata;
wire [DATA_WIDTH/8-1:0] wstrb;
// --------------------------------------------------------------------
//
modport
master
(
output arid,
output araddr,
output arburst,
output arcache,
output arlen,
output arlock,
output arprot,
output arqos,
input arready,
output arregion,
output arsize,
output arvalid,
output awaddr,
output awburst,
output awcache,
output awlen,
output awlock,
output awprot,
output awqos,
input awready,
output awregion,
output awsize,
output awvalid,
output bready,
input bresp,
input bvalid,
input rdata,
input rlast,
output rready,
input rresp,
input rvalid,
output wdata,
output wlast,
input wready,
output wstrb,
output wvalid,
input aresetn,
input aclk
);
modport
slave
(
input arid,
input araddr,
input arburst,
input arcache,
input arlen,
input arlock,
input arprot,
input arqos,
output arready,
input arregion,
input arsize,
input arvalid,
input awaddr,
input awburst,
input awcache,
input awlen,
input awlock,
input awprot,
input awqos,
output awready,
input awregion,
input awsize,
input awvalid,
input bready,
output bresp,
output bvalid,
output rdata,
output rlast,
input rready,
output rresp,
output rvalid,
input wdata,
input wlast,
output wready,
input wstrb,
input wvalid,
input aresetn,
input aclk
);
endinterface: axi4_if
 
 
/trunk/video_frame_class/src/video_frame_pkg.sv
1,14 → 1,42
// --------------------------------------------------------------------
//
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
package video_frame_pkg;
 
 
typedef struct
{
int pixel[];
} line_s;
 
typedef struct
{
int x;
int y;
} frame_coordinate_t;
 
class video_frame_class;
rand int frame_id;
/trunk/video_frame_class/sim/tests/debug/the_test.sv
1,6 → 1,29
// --------------------------------------------------------------------
//
// --------------------------------------------------------------------
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
`include "../../../src/video_frame_class.sv"
 
/trunk/video_frame_class/sim/src/tb_top.v
1,6 → 1,29
// --------------------------------------------------------------------
//
// --------------------------------------------------------------------
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module tb_top();
/trunk/axi4_stream_lib/src/axis_video_debug.sv
0,0 → 1,63
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
axis_video_debug
#(
BYTES_PER_PIXEL = 2,
PIXEL_OUTPUTS = 4
)
(
axis_if axis_in
);
 
// --------------------------------------------------------------------
//
// localparam PIXEL_OUTPUTS = axis_in.N / BYTES_PER_PIXEL;
localparam B = BYTES_PER_PIXEL * 8;
 
(* MARK_DEBUG = "TRUE" *) wire [(BYTES_PER_PIXEL * 8) - 1:0] dbg_pixel[PIXEL_OUTPUTS];
 
generate
begin: axis_video_debug_gen
for(genvar j = 0; j < PIXEL_OUTPUTS; j++)
assign dbg_pixel[j] = axis_in.tdata[j*B +: B];
end
endgenerate
 
 
// --------------------------------------------------------------------
//
(* MARK_DEBUG = "TRUE" *) wire dbg_tvalid = axis_in.tvalid;
(* MARK_DEBUG = "TRUE" *) wire dbg_tready = axis_in.tready;
(* MARK_DEBUG = "TRUE" *) wire dbg_eol = axis_in.tlast;
(* MARK_DEBUG = "TRUE" *) wire dbg_sof = axis_in.tuser;
 
 
endmodule
 
/trunk/axi4_stream_lib/src/axis_if.sv
0,0 → 1,128
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
interface
axis_if
#(
N = 8, // data bus width in bytes
I = 1, // TID width
D = 1, // TDEST width
U = 1 // TUSER width
)
(
input aclk,
input aresetn
);
wire tvalid;
wire tready;
wire [(8*N)-1:0] tdata;
wire [N-1:0] tstrb;
wire [N-1:0] tkeep;
wire tlast;
wire [I-1:0] tid;
wire [D-1:0] tdest;
wire [U-1:0] tuser;
 
 
// --------------------------------------------------------------------
//
default clocking cb_m @(posedge aclk iff aresetn);
input aresetn;
input aclk;
output tvalid;
input tready;
output tdata;
output tstrb;
output tkeep;
output tlast;
output tid;
output tdest;
output tuser;
endclocking
 
 
// --------------------------------------------------------------------
//
clocking cb_s @(posedge aclk iff aresetn);
input aresetn;
input aclk;
input tvalid;
output tready;
input tdata;
input tstrb;
input tkeep;
input tlast;
input tid;
input tdest;
input tuser;
endclocking
 
 
// --------------------------------------------------------------------
//
modport
master
(
input aresetn,
input aclk,
output tvalid,
input tready,
output tdata,
output tstrb,
output tkeep,
output tlast,
output tid,
output tdest,
output tuser,
clocking cb_m
);
 
 
// --------------------------------------------------------------------
//
modport
slave
(
input aresetn,
input aclk,
input tvalid,
output tready,
input tdata,
input tstrb,
input tkeep,
input tlast,
input tid,
input tdest,
input tuser,
clocking cb_s
);
 
 
endinterface: axis_if
 
 
/trunk/axi4_stream_lib/src/data_to_axis_fsm.sv
0,0 → 1,106
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
 
 
module
data_to_axis_fsm
(
input axis_en,
output axis_tvalid,
input axis_tready,
 
input fifo_watermark, // OK to use fifo_almost_full if FIFO is synchronous, assert to flush also
input fifo_empty,
output fifo_rd_en,
 
output data_to_axis_fsm_error,
 
input aclk,
input aresetn
);
 
//---------------------------------------------------
// state machine binary definitions
enum reg [3:0] {
IDLE_STATE = 4'b0001,
TVALID = 4'b0010,
TREADY = 4'b0100,
ERROR_STATE = 4'b1000
} state, next_state;
 
 
//---------------------------------------------------
// state machine flop
always_ff @(posedge aclk)
if(~aresetn)
state <= IDLE_STATE;
else
state <= next_state;
 
 
//---------------------------------------------------
// state machine
always_comb
case(state)
IDLE_STATE: if(axis_en & fifo_watermark)
if(axis_tready)
next_state <= TREADY;
else
next_state <= TVALID;
else
next_state <= IDLE_STATE;
 
TVALID: if(axis_tready) // wait for slave to be ready
next_state <= TREADY;
else
next_state <= TVALID;
 
TREADY: if(fifo_empty) // slave can accept data
next_state <= IDLE_STATE;
else if(axis_tready)
next_state <= TREADY;
else
next_state <= TVALID;
 
ERROR_STATE: next_state <= IDLE_STATE;
 
default: next_state <= ERROR_STATE;
 
endcase
 
 
//---------------------------------------------------
// outputs
assign axis_tvalid = (next_state == TVALID) | (next_state == TREADY);
assign fifo_rd_en = axis_tvalid & axis_tready;
assign data_to_axis_fsm_error = (state == ERROR_STATE);
 
 
endmodule
 
 
 

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