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URL https://opencores.org/ocsvn/rf6809/rf6809/trunk

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    /rf6809/trunk
    from Rev 20 to Rev 21
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Rev 20 → Rev 21

/rtl/cpu/rf6809.sv
51,9 → 51,10
parameter LOAD1 = 6'd7;
parameter LOAD2 = 6'd8;
parameter STORE1 = 6'd9;
parameter STORE2 = 6'd10;
parameter OUTER_INDEXING = 6'd11;
parameter OUTER_INDEXING2 = 6'd12;
parameter STORE1a = 6'd10;
parameter STORE2 = 6'd11;
parameter OUTER_INDEXING = 6'd12;
parameter OUTER_INDEXING2 = 6'd13;
parameter ICACHE1 = 6'd31;
parameter ICACHE2 = 6'd32;
parameter ICACHE3 = 6'd33;
130,7 → 131,13
reg sync_state,wait_state;
wire [`LOBYTE] ccr = {ef,firqim,hf,im,nf,zf,vf,cf};
reg [`LOBYTE] acca,accb;
`ifdef SUPPORT_6309
reg [`LOBYTE] acce,accf;
`endif
reg [`DBLBYTE] accd;
`ifdef SUPPORT_6309
reg [`DBLBYTE] accw;
`endif
reg [`DBLBYTE] xr,yr,usp,ssp;
wire [`DBLBYTE] prod = acca * accb;
reg [`DBLBYTE] vect;
167,6 → 174,24
reg isLEA;
reg isRMW;
 
function fnAddOverflow;
input a;
input b;
input r;
begin
fnAddOverflow = (r ^ b) & (1'b1 ^ a ^ b);
end
endfunction
 
function fnSubOverflow;
input a;
input b;
input r;
begin
fnSubOverflow = (1'b1 ^ r ^ b) & (a ^ b);
end
endfunction
 
// Data input path multiplexing
reg [bitsPerByte-1:0] dati;
always_comb
209,6 → 234,10
(ir[bitsPerByte+5] ? 5'd2 : 5'd0) +
(ir[bitsPerByte+6] ? 5'd2 : 5'd0) +
(ir[bitsPerByte+7] ? (isFar ? 5'd3 : 5'd2) : 5'd0)
`ifdef SUPPORT_6309
+ (ir[bitsPerByte+8] ? 5'd1 : 5'd0) +
+ (ir[bitsPerByte+9] ? 5'd1 : 5'd0)
`endif
;
// cnt = 0;
// if (ir[8]) cnt = cnt + 5'd1; // CC
221,10 → 250,25
// if (ir[bitsPerByte+3]) cnt = cnt + 5'd4; // PC
end
 
`ifdef SUPPORT_6309
wire isInMem = ir12==`AIM_DP || ir12==`EIM_DP || ir12==`OIM_DP || ir12==`TIM_DP ||
ir12==`AIM_NDX || ir12==`EIM_NDX || ir12==`OIM_NDX || ir12==`TIM_NDX ||
ir12==`AIM_EXT || ir12==`EIM_EXT || ir12==`OIM_EXT || ir12==`TIM_EXT
;
wire isRMW1 = ir12==`AIM_DP || ir12==`EIM_DP || ir12==`OIM_DP ||
ir12==`NEG_DP || ir12==`COM_DP || ir12==`LSR_DP || ir12==`ROR_DP || ir12==`ASR_DP || ir12==`ASL_DP || ir12==`ROL_DP || ir12==`DEC_DP || ir12==`INC_DP ||
ir12==`AIM_NDX || ir12==`EIM_NDX || ir12==`OIM_NDX ||
ir12==`NEG_NDX || ir12==`COM_NDX || ir12==`LSR_NDX || ir12==`ROR_NDX || ir12==`ASR_NDX || ir12==`ASL_NDX || ir12==`ROL_NDX || ir12==`DEC_NDX || ir12==`INC_NDX ||
ir12==`AIM_EXT || ir12==`EIM_EXT || ir12==`OIM_EXT ||
ir12==`NEG_EXT || ir12==`COM_EXT || ir12==`LSR_EXT || ir12==`ROR_EXT || ir12==`ASR_EXT || ir12==`ASL_EXT || ir12==`ROL_EXT || ir12==`DEC_EXT || ir12==`INC_EXT
;
`else
wire isInMem = 1'b0;
wire isRMW1 = ir12==`NEG_DP || ir12==`COM_DP || ir12==`LSR_DP || ir12==`ROR_DP || ir12==`ASR_DP || ir12==`ASL_DP || ir12==`ROL_DP || ir12==`DEC_DP || ir12==`INC_DP ||
ir12==`NEG_NDX || ir12==`COM_NDX || ir12==`LSR_NDX || ir12==`ROR_NDX || ir12==`ASR_NDX || ir12==`ASL_NDX || ir12==`ROL_NDX || ir12==`DEC_NDX || ir12==`INC_NDX ||
ir12==`NEG_EXT || ir12==`COM_EXT || ir12==`LSR_EXT || ir12==`ROR_EXT || ir12==`ASR_EXT || ir12==`ASL_EXT || ir12==`ROL_EXT || ir12==`DEC_EXT || ir12==`INC_EXT
;
`endif
 
wire isIndexed =
ir12[7:4]==4'h6 || ir12[7:4]==4'hA || ir12[7:4]==4'hE ||
434,8 → 478,14
4'b1011: src1 <= dpr;
4'b1100: src1 <= usppg;
4'b1101: src1 <= 24'h0000;
`ifdef SUPPORT_6309
4'b0110: src1 <= {acce[`LOBYTE],accf[`LOBYTE]};
4'b1110: src1 <= acce;
4'b1111: src1 <= accf;
`else
4'b1110: src1 <= 24'h0000;
4'b1111: src1 <= 24'h0000;
`endif
default: src1 <= 24'h0000;
endcase
always_comb
452,11 → 502,25
4'b1011: src2 <= dpr;
4'b1100: src2 <= usppg;
4'b1101: src2 <= 24'h0000;
`ifdef SUPPORT_6309
4'b0110: src2 <= {acce[`LOBYTE],accf[`LOBYTE]};
4'b1110: src2 <= acce;
4'b1111: src2 <= accf;
`else
4'b1110: src2 <= 24'h0000;
4'b1111: src2 <= 24'h0000;
`endif
default: src2 <= 24'h0000;
endcase
 
wire [bitsPerByte*2:0] sum12 = src1 + src2;
wire [bitsPerByte*2:0] sum12c = src1 + src2 + cf;
wire [bitsPerByte*2-1:0] and12 = src1 & src2;
wire [bitsPerByte*2-1:0] eor12 = src1 ^ src2;
wire [bitsPerByte*2-1:0] or12 = src1 | src2;
wire [bitsPerByte*2:0] dif12 = src1 - src2;
wire [bitsPerByte*2:0] dif12c = src1 - src2 - cf;
 
wire isAcca = ir12==`NEGA || ir12==`COMA || ir12==`LSRA || ir12==`RORA || ir12==`ASRA || ir12==`ASLA ||
ir12==`ROLA || ir12==`DECA || ir12==`INCA || ir12==`TSTA || ir12==`CLRA ||
ir12==`SUBA_IMM || ir12==`CMPA_IMM || ir12==`SBCA_IMM || ir12==`ANDA_IMM || ir12==`BITA_IMM ||
469,15 → 533,31
ir12==`LDA_EXT || ir12==`EORA_EXT || ir12==`ADCA_EXT || ir12==`ORA_EXT || ir12==`ADDA_EXT
;
 
`ifdef SUPPORT_6309
wire isAcce = ir12 == `ADDE_IMM || ir12==`ADDE_DP || ir12==`ADDE_NDX || ir12==`ADDE_EXT || ir12==`CLRE || ir12==`COME ||
ir12 == `SUBE_IMM || ir12==`SUBE_DP || ir12==`SUBE_NDX || ir12==`SUBE_EXT ||
ir12 == `LDE_IMM || ir12==`LDE_DP || ir12==`LDE_NDX || ir12==`LDE_EXT ||
ir12 == `DECE || ir12==`INCE ||
ir12 == `CMPE_IMM || ir12==`CMPE_DP || ir12==`CMPE_NDX || ir12==`CMPE_EXT
;
wire isAccf = ir12 == `ADDF_IMM || ir12==`ADDF_DP || ir12==`ADDF_NDX || ir12==`ADDF_EXT || ir12==`CLRF || ir12==`COMF ||
ir12 == `SUBF_IMM || ir12==`SUBF_DP || ir12==`SUBF_NDX || ir12==`SUBF_EXT ||
ir12 == `LDF_IMM || ir12==`LDF_DP || ir12==`LDF_NDX || ir12==`LDF_EXT ||
ir12 == `DECF || ir12==`INCF ||
ir12 == `CMPF_IMM || ir12==`CMPF_DP || ir12==`CMPF_NDX || ir12==`CMPF_EXT
;
wire [`DBLBYTE] acc = isAcce ? acce : isAccf ? accf : isAcca ? acca : accb;
`else
wire [`DBLBYTE] acc = isAcca ? acca : accb;
`endif
 
wire [`DBLBYTE] sum12 = src1 + src2;
 
always_ff @(posedge clk_i)
if (state==DECODE) begin
isStore <= ir12==`STA_DP || ir12==`STB_DP || ir12==`STD_DP || ir12==`STX_DP || ir12==`STY_DP || ir12==`STU_DP || ir12==`STS_DP ||
ir12==`STA_NDX || ir12==`STB_NDX || ir12==`STD_NDX || ir12==`STX_NDX || ir12==`STY_NDX || ir12==`STU_NDX || ir12==`STS_NDX ||
ir12==`STA_EXT || ir12==`STB_EXT || ir12==`STD_EXT || ir12==`STX_EXT || ir12==`STY_EXT || ir12==`STU_EXT || ir12==`STS_EXT
ir12==`STA_EXT || ir12==`STB_EXT || ir12==`STD_EXT || ir12==`STX_EXT || ir12==`STY_EXT || ir12==`STU_EXT || ir12==`STS_EXT ||
ir12==`STE_DP || ir12==`STE_NDX || ir12==`STE_EXT || ir12==`STF_DP || ir12==`STF_NDX || ir12==`STF_EXT ||
ir12==`STW_DP || ir12==`STW_NDX || ir12==`STW_EXT
;
isPULU <= ir12==`PULU;
isPULS <= ir12==`PULS;
498,12 → 578,18
(state==DECODE && (
ir12==`NOP || ir12==`ORCC || ir12==`ANDCC || ir12==`DAA || ir12==`LDMD || ir12==`TFR || ir12==`EXG ||
ir12==`NEGA || ir12==`COMA || ir12==`LSRA || ir12==`RORA || ir12==`ASRA || ir12==`ROLA || ir12==`DECA || ir12==`INCA || ir12==`TSTA || ir12==`CLRA ||
ir12==`DECE || ir12==`DECF || ir12==`DECD || ir12==`DECW || ir12==`INCE || ir12==`INCF || ir12==`INCD || ir12==`INCW ||
ir12==`NEGB || ir12==`COMB || ir12==`LSRB || ir12==`RORB || ir12==`ASRB || ir12==`ROLB || ir12==`DECB || ir12==`INCB || ir12==`TSTB || ir12==`CLRB ||
ir12==`ASLD || ir12==`TSTD || //ir12==`ADDR ||
ir12==`COME || ir12==`COMF || ir12==`COMD || ir12==`COMW ||
ir12==`ASLD || ir12==`ASRD || ir12==`TSTD || ir12==`ADDR || ir12==`ADCR || ir12==`ANDR ||
ir12==`TSTE || ir12==`TSTF || ir12==`TSTW ||
ir12==`LSRD || ir12==`LSRW || ir12==`NEGD || ir12==`ROLD || ir12==`ROLW || ir12==`RORD || ir12==`RORW ||
ir12==`SUBA_IMM || ir12==`CMPA_IMM || ir12==`SBCA_IMM || ir12==`ANDA_IMM || ir12==`BITA_IMM || ir12==`LDA_IMM || ir12==`EORA_IMM || ir12==`ADCA_IMM || ir12==`ORA_IMM || ir12==`ADDA_IMM ||
ir12==`SUBB_IMM || ir12==`CMPB_IMM || ir12==`SBCB_IMM || ir12==`ANDB_IMM || ir12==`BITB_IMM || ir12==`LDB_IMM || ir12==`EORB_IMM || ir12==`ADCB_IMM || ir12==`ORB_IMM || ir12==`ADDB_IMM ||
ir12==`ANDD_IMM || ir12==`ADDD_IMM || ir12==`ADCD_IMM || ir12==`SUBD_IMM || ir12==`SBCD_IMM || ir12==`LDD_IMM ||
ir12==`LDQ_IMM || ir12==`CMPD_IMM || ir12==`CMPX_IMM || ir12==`CMPY_IMM || ir12==`CMPU_IMM || ir12==`CMPS_IMM ||
ir12==`EORD_IMM || ir12==`ANDD_IMM || ir12==`ORD_IMM || ir12==`BITD_IMM || ir12==`ADDD_IMM || ir12==`ADCD_IMM || ir12==`SUBD_IMM || ir12==`SBCD_IMM || ir12==`LDD_IMM || ir12==`LDW_IMM ||
ir12==`LDQ_IMM || ir12==`CMPD_IMM || ir12==`CMPX_IMM || ir12==`CMPY_IMM || ir12==`CMPU_IMM || ir12==`CMPS_IMM || ir12==`CMPW_IMM ||
ir12==`LDE_IMM || ir12==`LDF_IMM ||
ir12==`SUBE_IMM || ir12==`SUBF_IMM || ir12==`SUBW_IMM ||
ir12==`BEQ || ir12==`BNE || ir12==`BMI || ir12==`BPL || ir12==`BVS || ir12==`BVC || ir12==`BRA || ir12==`BRN ||
ir12==`BHI || ir12==`BLS || ir12==`BHS || ir12==`BLO ||
ir12==`BGT || ir12==`BGE || ir12==`BLT || ir12==`BLE ||
546,13 → 632,13
;
 
wire lock_bus = load_what==`LW_XH || load_what==`LW_YH || load_what==`LW_USPH || load_what==`LW_SSPH ||
load_what==`LW_PCH || load_what==`LW_BH || load_what==`LW_IAH || load_what==`LW_PC3124 ||
load_what==`LW_IA3124 || load_what==`LW_B3124 ||
load_what==`LW_X3124 || load_what==`LW_Y3124 || load_what==`LW_USP3124 || load_what==`LW_SSP3124 ||
load_what==`LW_PCH || load_what==`LW_BH || load_what==`LW_IAH || load_what==`LW_PC2316 ||
load_what==`LW_IA2316 || load_what==`LW_B2316 ||
load_what==`LW_X2316 || load_what==`LW_Y2316 || load_what==`LW_USP2316 || load_what==`LW_SSP2316 ||
isRMW ||
store_what==`SW_ACCDH || store_what==`SW_XH || store_what==`SW_YH || store_what==`SW_USPH || store_what==`SW_SSPH ||
store_what==`SW_PCH || store_what==`SW_PC3124 || store_what==`SW_ACCQ3124 ||
store_what==`SW_X3124 || store_what==`SW_Y3124 || store_what==`SW_USP3124 || store_what==`SW_SSP3124
store_what==`SW_PCH || store_what==`SW_PC2316 || store_what==`SW_ACCQ2316 ||
store_what==`SW_X2316 || store_what==`SW_Y2316 || store_what==`SW_USP2316 || store_what==`SW_SSP2316
;
 
wire isPrefix = ir12==`PG2 || ir12==`PG3 || ir12==`OUTER;
592,6 → 678,17
.hit1(hit1)
);
 
/* Need to account for signed division
reg [35:0] divtbl [0:4095];
genvar g;
generate begin: gDivtbl
for (g = 0; g < 4096; g = g + 1)
divtbl[g] = 36'h800000000 / g;
endgenerate
wire [`DBLBYTE] divres = ({acca,accb} * divtbl[b12]) >> 36;
wire [11:0] divrem = {acca,accb} - divres * b12;
*/
 
// For asynchronous reads,
// The read response might come back in any order (the packets could loop
// around in the network.
691,7 → 788,7
else if (state==DECODE && ir12==`INT)
nmi_edge <= 1'b0;
 
reg [9:0] rst_cnt;
reg [11:0] rst_cnt;
 
always @(posedge clk_i)
if (rst_i) begin
767,6 → 864,7
LOAD2: tLoad2();
CALC: tExecute();
STORE1: tStore1();
STORE1a: tStore1a();
STORE2: tStore2();
 
// ============================================================================
798,6 → 896,16
store_what <= `SW_ACCB;
ir[bitsPerByte+2] <= 1'b0;
end
`ifdef SUPPORT_6309
else if (ir[bitsPerByte+8]) begin
store_what <= `SW_ACCE;
ir[bitsPerByte+8] <= 1'b0;
end
else if (ir[bitsPerByte+9]) begin
store_what <= `SW_ACCF;
ir[bitsPerByte+9] <= 1'b0;
end
`endif
else if (ir[bitsPerByte+3]) begin
store_what <= `SW_DPR;
ir[bitsPerByte+3] <= 1'b0;
854,6 → 962,16
load_what <= `LW_ACCB;
ir[bitsPerByte+2] <= 1'b0;
end
`ifdef SUPPORT_6309
else if (ir[bitsPerByte+8]) begin
load_what <= `LW_ACCE;
ir[bitsPerByte+8] <= 1'b0;
end
else if (ir[bitsPerByte+9]) begin
load_what <= `LW_ACCF;
ir[bitsPerByte+9] <= 1'b0;
end
`endif
else if (ir[bitsPerByte+3]) begin
load_what <= `LW_DPR;
ir[bitsPerByte+3] <= 1'b0;
1420,7 → 1538,238
`INCA,`INCB: begin res12 <= acc[`LOBYTE] + 2'd1; end
`TSTA,`TSTB: begin res12 <= acc[`LOBYTE]; end
`CLRA,`CLRB: begin res12 <= 13'h000; end
 
`ifdef SUPPORT_6309
`TSTD: res <= {acca,accb};
`TSTW: res <= {acce,accf};
`TSTE: res12 <= acce;
`TSTF: res12 <= accf;
`NEGD: begin res <= -{acca,accb}; a <= 'd0; b <= {acca,accb}; end
`INCE,`INCF: begin res12 <= acc[`LOBYTE] + 2'd1; end
`INCD: res <= {acca,accb} + 2'd1;
`INCW: res <= {acce,accf} + 2'd1;
`DECE,`DECF: begin res12 <= acc[`LOBYTE] - 2'd1; end
`DECD: res <= {acca,accb} - 2'd1;
`DECW: res <= {acce,accf} - 2'd1;
`COMD: res <= ~{acca,accb};
`COME,`COMF: res <= ~acc[`LOBYTE];
`COMW: res <= ~{acce,accf};
`CLRD: res <= 'b0;
`CLRW: res <= 'b0;
`CLRE: res12 <= 'b0;
`CLRF: res12 <= 'b0;
`ASLD:
res <= {acca,accb,1'b0};
`ASRD:
res <= {accb[0],acca[bitsPerByte-1],acca,accb[bitsPerByte-1:1]};
`LSRD:
res <= {accb[0],acca,accb[bitsPerByte-1:1]};
`LSRW:
res <= {accf[0],accw,accf[bitsPerByte-1:1]};
`ROLD:
res <= {acca,accb,cf};
`ROLW:
res <= {acce,accf,cf};
`RORD:
res <= {accb[0],cf,acca,accb[bitsPerByte-1:1]};
`RORW:
res <= {accf[0],cf,acce,accf[bitsPerByte-1:1]};
`ADDR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b0001: begin xr <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b0010: begin yr <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b0011: begin usp <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b0100: begin ssp <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b0101: begin pc <= sum12; nf <= sum12[bitsPerByte*2-1]; zf <= sum12[`DBLBYTE]=='b0; cf <= sum12[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12[bitsPerByte*2-1]); end
4'b1000: begin acca <= sum12; nf <= sum12[bitsPerByte-1]; zf <= sum12[`LOBYTE]=='b0; cf <= sum12[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12[bitsPerByte-1]); end
4'b1001: begin accb <= sum12; nf <= sum12[bitsPerByte-1]; zf <= sum12[`LOBYTE]=='b0; cf <= sum12[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12[bitsPerByte-1]); end
4'b1010:
begin
cf <= sum12[0];
vf <= sum12[1];
zf <= sum12[2];
nf <= sum12[3];
im <= sum12[4];
hf <= sum12[5];
firqim <= sum12[6];
ef <= sum12[7];
end
4'b1011: begin dpr <= sum12; nf <= sum12[bitsPerByte-1]; zf <= sum12[`LOBYTE]=='b0; cf <= sum12[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12[bitsPerByte-1]); end
endcase
end
`ADCR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b0001: begin xr <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b0010: begin yr <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b0011: begin usp <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b0100: begin ssp <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b0101: begin pc <= sum12c; nf <= sum12c[bitsPerByte*2-1]; zf <= sum12c[`DBLBYTE]=='b0; cf <= sum12c[bitsPerByte*2]; vf <= fnAddOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],sum12c[bitsPerByte*2-1]); end
4'b1000: begin acca <= sum12c; nf <= sum12c[bitsPerByte-1]; zf <= sum12c[`LOBYTE]=='b0; cf <= sum12c[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12c[bitsPerByte-1]); end
4'b1001: begin accb <= sum12c; nf <= sum12c[bitsPerByte-1]; zf <= sum12c[`LOBYTE]=='b0; cf <= sum12c[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12c[bitsPerByte-1]); end
4'b1010:
begin
cf <= sum12c[0];
vf <= sum12c[1];
zf <= sum12c[2];
nf <= sum12c[3];
im <= sum12c[4];
hf <= sum12c[5];
firqim <= sum12c[6];
ef <= sum12c[7];
end
4'b1011: begin dpr <= sum12c; nf <= sum12c[bitsPerByte-1]; zf <= sum12c[`LOBYTE]=='b0; cf <= sum12c[bitsPerByte]; vf <= fnAddOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],sum12c[bitsPerByte-1]); end
endcase
end
`ANDR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0001: begin xr <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0010: begin yr <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0011: begin usp <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0100: begin ssp <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0101: begin pc <= and12; nf <= and12[bitsPerByte*2-1]; zf <= and12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b1000: begin acca <= and12; nf <= and12[bitsPerByte-1]; zf <= and12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1001: begin accb <= and12; nf <= and12[bitsPerByte-1]; zf <= and12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1010:
begin
cf <= and12[0];
vf <= and12[1];
zf <= and12[2];
nf <= and12[3];
im <= and12[4];
hf <= and12[5];
firqim <= and12[6];
ef <= and12[7];
end
4'b1011: begin dpr <= and12; nf <= and12[bitsPerByte-1]; zf <= and12[`LOBYTE]=='b0; vf <= 1'b0; end
endcase
end
`EORR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0001: begin xr <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0010: begin yr <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0011: begin usp <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0100: begin ssp <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0101: begin pc <= eor12; nf <= eor12[bitsPerByte*2-1]; zf <= eor12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b1000: begin acca <= eor12; nf <= eor12[bitsPerByte-1]; zf <= eor12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1001: begin accb <= eor12; nf <= eor12[bitsPerByte-1]; zf <= eor12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1010:
begin
cf <= eor12[0];
vf <= eor12[1];
zf <= eor12[2];
nf <= eor12[3];
im <= eor12[4];
hf <= eor12[5];
firqim <= eor12[6];
ef <= eor12[7];
end
4'b1011: begin dpr <= eor12; nf <= eor12[bitsPerByte-1]; zf <= eor12[`LOBYTE]=='b0; vf <= 1'b0; end
endcase
end
`ORR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0001: begin xr <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0010: begin yr <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0011: begin usp <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0100: begin ssp <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b0101: begin pc <= or12; nf <= or12[bitsPerByte*2-1]; zf <= or12[`DBLBYTE]=='b0; vf <= 1'b0; end
4'b1000: begin acca <= or12; nf <= or12[bitsPerByte-1]; zf <= or12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1001: begin accb <= or12; nf <= or12[bitsPerByte-1]; zf <= or12[`LOBYTE]=='b0; vf <= 1'b0; end
4'b1010:
begin
cf <= or12[0];
vf <= or12[1];
zf <= or12[2];
nf <= or12[3];
im <= or12[4];
hf <= or12[5];
firqim <= or12[6];
ef <= or12[7];
end
4'b1011: begin dpr <= or12; nf <= or12[bitsPerByte-1]; zf <= or12[`LOBYTE]=='b0; vf <= 1'b0; end
endcase
end
`CMPR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0001: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0010: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0011: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0100: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0101: begin nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b1000: begin nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
4'b1001: begin nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
4'b1010: ;
4'b1011: begin nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
endcase
end
`SBCR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b0001: begin xr <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b0010: begin yr <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b0011: begin usp <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b0100: begin ssp <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b0101: begin pc <= dif12c; nf <= dif12c[bitsPerByte*2-1]; zf <= dif12c[`DBLBYTE]=='b0; cf <= dif12c[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12c[bitsPerByte*2-1]); end
4'b1000: begin acca <= dif12c; nf <= dif12c[bitsPerByte-1]; zf <= dif12c[`LOBYTE]=='b0; cf <= dif12c[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12c[bitsPerByte-1]); end
4'b1001: begin accb <= dif12c; nf <= dif12c[bitsPerByte-1]; zf <= dif12c[`LOBYTE]=='b0; cf <= dif12c[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12c[bitsPerByte-1]); end
4'b1010:
begin
cf <= dif12c[0];
vf <= dif12c[1];
zf <= dif12c[2];
nf <= dif12c[3];
im <= dif12c[4];
hf <= dif12c[5];
firqim <= dif12c[6];
ef <= dif12c[7];
end
4'b1011: begin dpr <= dif12c; nf <= dif12c[bitsPerByte-1]; zf <= dif12c[`LOBYTE]=='b0; cf <= dif12c[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12c[bitsPerByte-1]); end
endcase
end
`SUBR:
begin
case(ir[bitsPerByte+3:bitsPerByte])
4'b0000: begin {acca,accb} <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0001: begin xr <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0010: begin yr <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0011: begin usp <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0100: begin ssp <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b0101: begin pc <= dif12; nf <= dif12[bitsPerByte*2-1]; zf <= dif12[`DBLBYTE]=='b0; cf <= dif12[bitsPerByte*2]; vf <= fnSubOverflow(src1[bitsPerByte*2-1],src2[bitsPerByte*2-1],dif12[bitsPerByte*2-1]); end
4'b1000: begin acca <= dif12; nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
4'b1001: begin accb <= dif12; nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
4'b1010:
begin
cf <= dif12[0];
vf <= dif12[1];
zf <= dif12[2];
nf <= dif12[3];
im <= dif12[4];
hf <= dif12[5];
firqim <= dif12[6];
ef <= dif12[7];
end
4'b1011: begin dpr <= dif12; nf <= dif12[bitsPerByte-1]; zf <= dif12[`LOBYTE]=='b0; cf <= dif12[bitsPerByte]; vf <= fnSubOverflow(src1[bitsPerByte-1],src2[bitsPerByte-1],dif12[bitsPerByte-1]); end
endcase
end
`endif
`ifdef SUPPORT_6309
`CMPE_IMM,`CMPF_IMM,`SUBE_IMM,`SUBF_IMM:
begin res12 <= acc[`LOBYTE] - ir[`HIBYTE]; pc <= pc + 4'd2; a <= acc[`LOBYTE]; b <= ir[`HIBYTE]; end
`LDE_IMM,`LDF_IMM:
begin res12 <= ir[`HIBYTE]; pc <= pc + 2'd2; end
`endif
// Immediate mode instructions
`SUBA_IMM,`SUBB_IMM,`CMPA_IMM,`CMPB_IMM:
begin res12 <= acc[`LOBYTE] - ir[`HIBYTE]; pc <= pc + 4'd2; a <= acc[`LOBYTE]; b <= ir[`HIBYTE]; end
1438,16 → 1787,63
begin res12 <= acc[`LOBYTE] | ir[`HIBYTE]; pc <= pc + 2'd2; a <= acc[`LOBYTE]; b <= ir[`HIBYTE]; end
`ADDA_IMM,`ADDB_IMM:
begin res12 <= acc[`LOBYTE] + ir[`HIBYTE]; pc <= pc + 2'd2; a <= acc[`LOBYTE]; b <= ir[`HIBYTE]; end
`ifdef SUPPORT_6309
`BITD_IMM,
`ANDD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} & {ir[`BYTE2],ir[`BYTE3]};
pc <= pc + 32'd3;
end
`EORD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} ^ {ir[`BYTE2],ir[`BYTE3]};
pc <= pc + 32'd3;
end
`ORD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} | {ir[`BYTE2],ir[`BYTE3]};
pc <= pc + 32'd3;
end
`endif
`ADDD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} + {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
end
`ifdef SUPPORT_6309
`ADDW_IMM:
begin
res <= {acce[`LOBYTE],accf[`LOBYTE]} + {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
end
`ADCD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} + {ir[`BYTE2],ir[`BYTE3]} + {23'b0,cf};
pc <= pc + 32'd3;
end
`endif
`SUBD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} + {ir[`HIBYTE],ir[`BYTE3]};
res <= {acca[`LOBYTE],accb[`LOBYTE]} - {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
end
`SUBD_IMM:
`ifdef SUPPORT_6309
`SUBW_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} - {ir[`HIBYTE],ir[`BYTE3]};
res <= {acce[`LOBYTE],accf[`LOBYTE]} - {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
end
`SBCD_IMM:
begin
res <= {acca[`LOBYTE],accb[`LOBYTE]} - {ir[`BYTE2],ir[`BYTE3]} - {23'b0,cf};
pc <= pc + 32'd3;
end
`LDW_IMM:
begin
res <= {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
end
`endif
`LDD_IMM:
begin
res <= {ir[`HIBYTE],ir[`BYTE3]};
1466,6 → 1862,15
a <= {acca[`LOBYTE],accb[`LOBYTE]};
b <= {ir[`HIBYTE],ir[`BYTE3]};
end
`ifdef SUPPORT_6309
`CMPW_IMM:
begin
res <= {acce[`LOBYTE],accf[`LOBYTE]} - {ir[`HIBYTE],ir[`BYTE3]};
pc <= pc + 2'd3;
a <= {acce[`LOBYTE],accf[`LOBYTE]};
b <= {ir[`HIBYTE],ir[`BYTE3]};
end
`endif
`CMPX_IMM:
begin
res <= xr[`DBLBYTE] - {ir[`HIBYTE],ir[`BYTE3]};
1503,6 → 1908,11
pc <= pc + 2'd2;
next_state(LOAD1);
end
`ifdef SUPPORT_6309
`CMPE_DP,`CMPF_DP,
`LDE_DP,`LDF_DP,
`SUBE_DP,`SUBF_DP,
`endif
`SUBA_DP,`CMPA_DP,`SBCA_DP,`ANDA_DP,`BITA_DP,`LDA_DP,`EORA_DP,`ADCA_DP,`ORA_DP,`ADDA_DP,
`SUBB_DP,`CMPB_DP,`SBCB_DP,`ANDB_DP,`BITB_DP,`LDB_DP,`EORB_DP,`ADCB_DP,`ORB_DP,`ADDB_DP:
begin
1511,6 → 1921,21
pc <= pc + 2'd2;
next_state(LOAD1);
end
`ifdef SUPPORT_6309
`BITD_DP,
`ANDD_DP,
`ORD_DP,
`EORD_DP:
begin
load_what <= `LW_BL;
radr <= dp_address;
pc <= pc + 2'd2;
next_state(LOAD1);
end
`endif
`ifdef SUPPORT_6309
`ADDW_DP,`CMPW_DP,`LDW_DP,`SUBW_DP,
`endif
`SUBD_DP,`ADDD_DP,`LDD_DP,`CMPD_DP,`ADCD_DP,`SBCD_DP:
begin
load_what <= `LW_BH;
1538,6 → 1963,11
`STS_DP: dp_store(`SW_SSPH);
`STX_DP: dp_store(`SW_XH);
`STY_DP: dp_store(`SW_YH);
`ifdef SUPPORT_6309
`STW_DP: dp_store(`SW_ACCWH);
`STE_DP: dp_store(`SW_ACCE);
`STF_DP: dp_store(`SW_ACCF);
`endif
// Indexed mode instructions
`NEG_NDX,`COM_NDX,`LSR_NDX,`ROR_NDX,`ASR_NDX,`ASL_NDX,`ROL_NDX,`DEC_NDX,`INC_NDX,`TST_NDX:
begin
1555,6 → 1985,11
next_state(LOAD1);
end
end
`ifdef SUPPORT_6309
`CMPE_NDX,`CMPF_NDX,
`LDE_NDX,`LDF_NDX,
`SUBE_NDX,`SUBF_NDX,
`endif
`SUBA_NDX,`CMPA_NDX,`SBCA_NDX,`ANDA_NDX,`BITA_NDX,`LDA_NDX,`EORA_NDX,`ADCA_NDX,`ORA_NDX,`ADDA_NDX,
`SUBB_NDX,`CMPB_NDX,`SBCB_NDX,`ANDB_NDX,`BITB_NDX,`LDB_NDX,`EORB_NDX,`ADCB_NDX,`ORB_NDX,`ADDB_NDX:
begin
1572,6 → 2007,30
next_state(LOAD1);
end
end
`ifdef SUPPORT_6309
`BITD_NDX,
`ANDD_NDX,
`ORD_NDX,
`EORD_NDX:
begin
pc <= pc + insnsz;
if (isIndirect) begin
load_what <= isFar ? `LW_IA2316 : `LW_IAH;
load_what2 <= `LW_BL;
radr <= NdxAddr;
next_state(LOAD1);
end
else begin
b <= 24'd0;
load_what <= `LW_BL;
radr <= NdxAddr;
next_state(LOAD1);
end
end
`endif
`ifdef SUPPORT_6309
`ADDW_NDX,`CMPW_NDX,`LDW_NDX,`SUBW_NDX,
`endif
`SUBD_NDX,`ADDD_NDX,`LDD_NDX,`CMPD_NDX,`ADCD_NDX,`SBCD_NDX:
begin
pc <= pc + insnsz;
1615,7 → 2074,37
`STS_NDX: indexed_store(`SW_SSPH);
`STX_NDX: indexed_store(`SW_XH);
`STY_NDX: indexed_store(`SW_YH);
 
`ifdef SUPPORT_6309
`STW_NDX: indexed_store(`SW_ACCWH);
`STE_NDX: indexed_store(`SW_ACCE);
`STF_NDX: indexed_store(`SW_ACCF);
`AIM_DP,`EIM_DP,`OIM_DP,`TIM_DP:
begin
load_what <= `LW_BL;
pc <= pc + 4'd3;
radr <= dp_address;
next_state(LOAD1);
end
`AIM_NDX,`EIM_NDX,`OIM_NDX,`TIM_NDX:
begin
pc <= pc + insnsz + 4'd1;
if (isIndirect) begin
load_what <= isFar ? `LW_IA2316 : `LW_IAH;
load_what2 <= `LW_BL;
radr <= NdxAddr;
next_state(LOAD1);
end
else begin
b <= 'd0;
load_what <= `LW_BL;
radr <= NdxAddr;
next_state(LOAD1);
end
end
`endif
`ifdef SUPPORT_6309
`AIM_EXT,`OIM_EXT,`EIM_EXT,`TIM_EXT,
`endif
// Extended mode instructions
`NEG_EXT,`COM_EXT,`LSR_EXT,`ROR_EXT,`ASR_EXT,`ASL_EXT,`ROL_EXT,`DEC_EXT,`INC_EXT,`TST_EXT:
begin
1624,6 → 2113,11
pc <= pc + (isFar ? 32'd4 : 32'd3);
next_state(LOAD1);
end
`ifdef SUPPORT_6309
`CMPE_EXT,`CMPF_EXT,
`LDE_EXT,`LDF_EXT,
`SUBE_EXT,`SUBF_EXT,
`endif
`SUBA_EXT,`CMPA_EXT,`SBCA_EXT,`ANDA_EXT,`BITA_EXT,`LDA_EXT,`EORA_EXT,`ADCA_EXT,`ORA_EXT,`ADDA_EXT,
`SUBB_EXT,`CMPB_EXT,`SBCB_EXT,`ANDB_EXT,`BITB_EXT,`LDB_EXT,`EORB_EXT,`ADCB_EXT,`ORB_EXT,`ADDB_EXT:
begin
1632,6 → 2126,21
pc <= pc + (isFar ? 32'd4 : 32'd3);
next_state(LOAD1);
end
`ifdef SUPPORT_6309
`BITD_EXT,
`ANDD_EXT,
`ORD_EXT,
`EORD_EXT:
begin
load_what <= `LW_BL;
radr <= ex_address;
pc <= pc + (isFar ? 32'd4 : 32'd3);
next_state(LOAD1);
end
`endif
`ifdef SUPPORT_6309
`ADDW_EXT,`CMPW_EXT,`LDW_EXT,`SUBW_EXT,
`endif
`SUBD_EXT,`ADDD_EXT,`LDD_EXT,`CMPD_EXT,`ADCD_EXT,`SBCD_EXT:
begin
load_what <= `LW_BH;
1659,7 → 2168,11
`STS_EXT: ex_store(`SW_SSPH);
`STX_EXT: ex_store(`SW_XH);
`STY_EXT: ex_store(`SW_YH);
 
`ifdef SUPPORT_6309
`STW_EXT: ex_store(`SW_ACCWH);
`STE_EXT: ex_store(`SW_ACCE);
`STF_EXT: ex_store(`SW_ACCF);
`endif
`BSR:
begin
store_what <= `SW_PCH;
1940,6 → 2453,21
a <= {acca[`LOBYTE],accb[`LOBYTE]};
res <= {acca[`LOBYTE],accb[`LOBYTE]} + b[`DBLBYTE];
end
`ifdef SUPPORT_6309
`SUBW_DP,`SUBW_NDX,`SUBW_EXT,
`CMPW_DP,`CMPW_NDX,`CMPW_EXT:
begin
a <= {acce[`LOBYTE],accf[`LOBYTE]};
res <= {acce[`LOBYTE],accf[`LOBYTE]} - b[`DBLBYTE];
end
`ADDW_DP,`ADDW_NDX,`ADDW_EXT:
begin
a <= {acce[`LOBYTE],accf[`LOBYTE]};
res <= {acce[`LOBYTE],accf[`LOBYTE]} + b[`DBLBYTE];
end
`LDW_DP,`LDW_NDX,`LDW_EXT:
res <= b[`DBLBYTE];
`endif
`ADCD_DP,`ADCD_NDX,`ADCD_EXT:
begin
a <= {acca[`LOBYTE],accb[`LOBYTE]};
1947,7 → 2475,12
end
`LDD_DP,`LDD_NDX,`LDD_EXT:
res <= b[`DBLBYTE];
 
`ifdef SUPPORT_6309
`CMPE_DP,`CMPE_NDX,`CMPE_EXT,
`CMPF_DP,`CMPF_NDX,`CMPF_EXT,
`SUBE_DP,`SUBE_NDX,`SUBE_EXT,
`SUBF_DP,`SUBF_NDX,`SUBF_EXT,
`endif
`CMPA_DP,`CMPA_NDX,`CMPA_EXT,
`SUBA_DP,`SUBA_NDX,`SUBA_EXT,
`CMPB_DP,`CMPB_NDX,`CMPB_EXT,
1968,6 → 2501,18
`BITB_DP,`BITB_NDX,`BITB_EXT,
`ANDB_DP,`ANDB_NDX,`ANDB_EXT:
res12 <= acc[`LOBYTE] & b12;
`ifdef SUPPORT_6309
`BITD_DP,`BITD_NDX,`BITD_EXT,
`ANDD_DP,`ANDD_NDX,`ANDD_EXT:
res <= {acca[`LOBYTE],accb[`LOBYTE]} & b[`DBLBYTE];
`EORD_DP,`EORD_NDX,`EORD_EXT:
res <= {acca[`LOBYTE],accb[`LOBYTE]} ^ b[`DBLBYTE];
`ORD_DP,`ORD_NDX,`ORD_EXT:
res <= {acca[`LOBYTE],accb[`LOBYTE]} | b[`DBLBYTE];
`LDE_DP,`LDE_NDX,`LDE_EXT,
`LDF_DP,`LDF_NDX,`LDF_EXT:
res12 <= b12;
`endif
`LDA_DP,`LDA_NDX,`LDA_EXT,
`LDB_DP,`LDB_NDX,`LDB_EXT:
res12 <= b12;
1983,6 → 2528,10
`ORA_DP,`ORA_NDX,`ORA_EXT,
`ORB_DP,`ORB_NDX,`ORB_EXT:
res12 <= acc[`LOBYTE] | b12;
`ifdef SUPPORT_6309
`ADDE_DP,`ADDE_NDX,`ADDE_EXT,
`ADDF_DP,`ADDF_NDX,`ADDF_EXT,
`endif
`ADDA_DP,`ADDA_NDX,`ADDA_EXT,
`ADDB_DP,`ADDB_NDX,`ADDB_EXT:
begin
2008,12 → 2557,12
`DEC_DP,`DEC_NDX,`DEC_EXT: begin res12 <= b12 - 2'd1; wadr <= radr; store_what <= `SW_RES8; next_state(STORE1); end
`INC_DP,`INC_NDX,`INC_EXT: begin res12 <= b12 + 2'd1; wadr <= radr; store_what <= `SW_RES8; next_state(STORE1); end
`TST_DP,`TST_NDX,`TST_EXT: res12 <= b12;
/*
`ifdef SUPPORT_6309
`AIM_DP,`AIM_NDX,`AIM_EXT: begin res12 <= ir[`HIBYTE] & b12; wadr <= radr; store_what <= `SW_RES8; next_state(STORE1); end
`OIM_DP,`OIM_NDX,`OIM_EXT: begin res12 <= ir[`HIBYTE] | b12; wadr <= radr; store_what <= `SW_RES8; next_state(STORE1); end
`EIM_DP,`EIM_NDX,`OIM_EXT: begin res12 <= ir[`HIBYTE] ^ b12; wadr <= radr; store_what <= `SW_RES8; next_state(STORE1); end
`TIM_DP,`TIM_NDX,`TIM_EXT: begin res12 <= ir[`HIBYTE] & b12; end
*/
`endif
default: ;
endcase
end
2038,6 → 2587,12
`SW_ACCDL: wb_write(wadr,accb[`LOBYTE]);
`SW_ACCA: wb_write(wadr,acca[`LOBYTE]);
`SW_ACCB: wb_write(wadr,accb[`LOBYTE]);
`ifdef SUPPORT_6309
`SW_ACCWH: wb_write(wadr,acce[`LOBYTE]);
`SW_ACCWL: wb_write(wadr,accf[`LOBYTE]);
`SW_ACCE: wb_write(wadr,acce[`LOBYTE]);
`SW_ACCF: wb_write(wadr,accf[`LOBYTE]);
`endif
`SW_DPR: wb_write(wadr,dpr);
`SW_XL: wb_write(wadr,xr[`LOBYTE]);
`SW_XH: wb_write(wadr,xr[`HIBYTE]);
2061,12 → 2616,22
radr <= wadr; // Do a cache read to test the hit
`endif
if (!tsc)
next_state(STORE2);
next_state(STORE1a);
end
end
end
endtask
 
task tStore1a;
begin
if (!tsc) begin
cyc_o <= 1'b1;
stb_o <= 1'b1;
next_state(STORE2);
end
end
endtask
 
// Terminal state for stores. Update the data cache if there was a cache hit.
// Clear any previously set lock status
task tStore2;
2100,6 → 2665,24
next_state(PUSH2);
else // STB
next_state(IFETCH);
`ifdef SUPPORT_6309
`SW_ACCE:
if (isINT | isPSHS | isPSHU)
next_state(PUSH2);
else // STE
next_state(IFETCH);
`SW_ACCF:
if (isINT | isPSHS | isPSHU)
next_state(PUSH2);
else // STF
next_state(IFETCH);
`SW_ACCWH:
begin
store_what <= `SW_ACCWL;
next_state(STORE1);
end
`SW_ACCWL: next_state(IFETCH);
`endif
`SW_ACCDH:
begin
store_what <= `SW_ACCDL;
2234,6 → 2817,26
zf <= res12[`LOBYTE]==12'h000;
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`ADDE_IMM,`ADDE_DP,`ADDE_NDX,`ADDE_EXT:
begin
cf <= (a[BPBM1]&b[BPBM1])|(a[BPBM1]&~res12[BPBM1])|(b[BPBM1]&~res12[BPBM1]);
hf <= (a[`HCBIT]&b[`HCBIT])|(a[`HCBIT]&~res12[`HCBIT])|(b[`HCBIT]&~res12[`HCBIT]);
vf <= (res12[BPBM1] ^ b[BPBM1]) & (1'b1 ^ a[BPBM1] ^ b[BPBM1]);
nf <= res12[BPBM1];
zf <= res12[`LOBYTE]==12'h000;
accf <= res12[`LOBYTE];
end
`ADDF_IMM,`ADDF_DP,`ADDF_NDX,`ADDF_EXT:
begin
cf <= (a[BPBM1]&b[BPBM1])|(a[BPBM1]&~res12[BPBM1])|(b[BPBM1]&~res12[BPBM1]);
hf <= (a[`HCBIT]&b[`HCBIT])|(a[`HCBIT]&~res12[`HCBIT])|(b[`HCBIT]&~res12[`HCBIT]);
vf <= (res12[BPBM1] ^ b[BPBM1]) & (1'b1 ^ a[BPBM1] ^ b[BPBM1]);
nf <= res12[BPBM1];
zf <= res12[`LOBYTE]==12'h000;
acce <= res12[`LOBYTE];
end
`endif
`ADDD_IMM,`ADDD_DP,`ADDD_NDX,`ADDD_EXT:
begin
cf <= (a[BPBX2M1]&b[BPBX2M1])|(a[BPBX2M1]&~res[BPBX2M1])|(b[BPBX2M1]&~res[BPBX2M1]);
2243,6 → 2846,35
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`ifdef SUPPORT_6309
`ADDW_IMM,`ADDW_DP,`ADDW_NDX,`ADDW_EXT:
begin
cf <= (a[BPBX2M1]&b[BPBX2M1])|(a[BPBX2M1]&~res[BPBX2M1])|(b[BPBX2M1]&~res[BPBX2M1]);
vf <= (res[BPBX2M1] ^ b[BPBX2M1]) & (1'b1 ^ a[BPBX2M1] ^ b[BPBX2M1]);
nf <= res[BPBX2M1];
zf <= res[`DBLBYTE]==24'h000000;
acce <= res[`HIBYTE];
accf <= res[`LOBYTE];
end
`ADCD_IMM,`ADCD_DP,`ADCD_NDX,`ADCD_EXT:
begin
cf <= (a[BPBX2M1]&b[BPBX2M1])|(a[BPBX2M1]&~res[BPBX2M1])|(b[BPBX2M1]&~res[BPBX2M1]);
vf <= (res[BPBX2M1] ^ b[BPBX2M1]) & (1'b1 ^ a[BPBX2M1] ^ b[BPBX2M1]);
nf <= res[BPBX2M1];
zf <= res[`DBLBYTE]==24'h0000;
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`OIM_DP,`OIM_NDX,`OIM_EXT,
`EIM_DP,`EIM_NDX,`EIM_EXT,
`TIM_DP,`TIM_NDX,`TIM_EXT,
`AIM_DP,`AIM_NDX,`AIM_EXT:
begin
vf <= 1'b0;
nf <= res12n;
zf <= res12z;
end
`endif
`ANDA_IMM,`ANDA_DP,`ANDA_NDX,`ANDA_EXT:
begin
nf <= res12n;
2257,6 → 2889,24
vf <= 1'b0;
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`ORD_IMM,`ORD_DP,`ORD_NDX,`ORD_EXT,
`EORD_IMM,`EORD_DP,`EORD_NDX,`EORD_EXT,
`ANDD_IMM,`ANDD_DP,`ANDD_NDX,`ANDD_EXT:
begin
nf <= res24n;
zf <= res24z;
vf <= 1'b0;
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`BITD_IMM,`BITD_DP,`BITD_NDX,`BITD_EXT:
begin
nf <= res24n;
zf <= res24z;
vf <= 1'b0;
end
`endif
`ASLA:
begin
cf <= res12c;
2275,6 → 2925,53
zf <= res12[`LOBYTE]==12'h000;
accb <= res12[`LOBYTE];
end
`ifdef H6309
`ASLD,`ROLD:
begin
cf <= resc;
nf <= resn;
zf <= resz;
vf <= acca[bitsPerByte-1]^acca[bitsPerByte-2];
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`ASRD:
begin
cf <= resc;
nf <= resn;
zf <= resz;
vf <= acca[bitsPerByte-1]^acca[bitsPerByte-2];
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`LSRD,`RORD:
begin
cf <= resc;
nf <= resn;
zf <= resz;
vf <= acca[bitsPerByte-1]^acca[bitsPerByte-2];
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`LSRW:
begin
cf <= resc;
nf <= resn;
zf <= resz;
vf <= acce[bitsPerByte-1]^acce[bitsPerByte-2];
acce <= res[`HIBYTE];
accf <= res[`LOBYTE];
end
`ROLW,`RORW:
begin
cf <= resc;
nf <= resn;
zf <= resz;
vf <= acce[bitsPerByte-1]^acce[bitsPerByte-2];
acce <= res[`HIBYTE];
accf <= res[`LOBYTE];
end
`endif
`ASL_DP,`ASL_NDX,`ASL_EXT:
begin
cf <= res12c;
2329,6 → 3026,42
zf <= 1'b1;
accb <= 12'h000;
end
`ifdef SUPPORT_6309
`CLRD:
begin
vf <= 1'b0;
cf <= 1'b0;
nf <= 1'b0;
zf <= 1'b1;
acca <= 12'h000;
accb <= 12'h000;
end
`CLRW:
begin
vf <= 1'b0;
cf <= 1'b0;
nf <= 1'b0;
zf <= 1'b1;
acce <= 12'h000;
accf <= 12'h000;
end
`CLRE:
begin
vf <= 1'b0;
cf <= 1'b0;
nf <= 1'b0;
zf <= 1'b1;
acce <= 12'h000;
end
`CLRF:
begin
vf <= 1'b0;
cf <= 1'b0;
nf <= 1'b0;
zf <= 1'b1;
accf <= 12'h000;
end
`endif
`CLR_DP,`CLR_NDX,`CLR_EXT:
begin
vf <= 1'b0;
2336,6 → 3069,10
nf <= 1'b0;
zf <= 1'b1;
end
`ifdef SUPPORT_6309
`CMPE_IMM,`CMPE_DP,`CMPE_NDX,`CMPE_EXT,
`CMPF_IMM,`CMPF_DP,`CMPF_NDX,`CMPF_EXT,
`endif
`CMPA_IMM,`CMPA_DP,`CMPA_NDX,`CMPA_EXT,
`CMPB_IMM,`CMPB_DP,`CMPB_NDX,`CMPB_EXT:
begin
2345,6 → 3082,9
nf <= res12[BPBM1];
zf <= res12[`LOBYTE]==12'h000;
end
`ifdef SUPPORT_6309
`CMPW_IMM,`CMPW_DP,`CMPW_NDX,`CMPW_EXT,
`endif
`CMPD_IMM,`CMPD_DP,`CMPD_NDX,`CMPD_EXT:
begin
cf <= (~a[BPBX2M1]&b[BPBX2M1])|(res[BPBX2M1]&~a[BPBX2M1])|(res[BPBX2M1]&b[BPBX2M1]);
2378,6 → 3118,40
zf <= res12z;
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`COME:
begin
cf <= 1'b1;
vf <= 1'b0;
nf <= res12n;
zf <= res12z;
acce <= res12[`LOBYTE];
end
`COMF:
begin
cf <= 1'b1;
vf <= 1'b0;
nf <= res12n;
zf <= res12z;
accf <= res12[`LOBYTE];
end
`COMD:
begin
cf <= 1'b1;
vf <= 1'b0;
nf <= res24n;
zf <= res24z;
{acca,accb} <= res;
end
`COMW:
begin
cf <= 1'b1;
vf <= 1'b0;
nf <= res24n;
zf <= res24z;
{acce,accf} <= res;
end
`endif
`COM_DP,`COM_NDX,`COM_EXT:
begin
cf <= 1'b1;
2407,6 → 3181,36
vf <= res12[BPBM1] != accb[BPBM1];
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`DECE:
begin
nf <= res12n;
zf <= res12z;
vf <= res12[BPBM1] != acce[BPBM1];
acce <= res12[`LOBYTE];
end
`DECF:
begin
nf <= res12n;
zf <= res12z;
vf <= res12[BPBM1] != accf[BPBM1];
accf <= res12[`LOBYTE];
end
`DECD:
begin
nf <= res24n;
zf <= res24z;
vf <= res[bitsPerByte*2-1] != acca[bitsPerByte-1];
{acca,accb} <= res;
end
`DECW:
begin
nf <= res24n;
zf <= res24z;
vf <= res[bitsPerByte*2-1] != acce[bitsPerByte-1];
{acce,accf} <= res;
end
`endif
`DEC_DP,`DEC_NDX,`DEC_EXT:
begin
nf <= res12n;
2456,8 → 3260,15
ef <= src1[7];
end
4'b1011: dpr <= src1[`LOBYTE];
4'b1110: usppg <= src1[`DBLBYTE];
4'b1100: usppg <= src1[`DBLBYTE];
`ifdef SUPPORT_6309
4'b0110: {acce,accf} <= src1[`DBLBYTE];
4'b1110: acce <= src1[`LOBYTE];
4'b1111: accf <= src1[`LOBYTE];
`else
4'b1110: ;
4'b1111: ;
`endif
default: ;
endcase
case(ir[bitsPerByte+7:bitsPerByte+4])
2485,8 → 3296,14
ef <= src2[7];
end
4'b1011: dpr <= src2[`LOBYTE];
4'b1110: usppg <= src2[`DBLBYTE];
4'b1100: usppg <= src2[`DBLBYTE];
`ifdef SUPPORT_6309
4'b1110: acce <= src2[`LOBYTE];
4'b1111: accf <= src2[`LOBYTE];
`else
4'b1110: ;
4'b1111: ;
`endif
default: ;
endcase
end
2504,6 → 3321,50
vf <= res12[BPBM1] != accb[BPBM1];
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`INCE:
begin
nf <= res12n;
zf <= res12z;
vf <= res12[BPBM1] != acce[BPBM1];
acce <= res12[`LOBYTE];
end
`INCF:
begin
nf <= res12n;
zf <= res12z;
vf <= res12[BPBM1] != accf[BPBM1];
accf <= res12[`LOBYTE];
end
`INCD:
begin
nf <= res24n;
zf <= res24z;
vf <= res[bitsPerByte*2-1] != acca[bitsPerByte-1];
{acca,accb} <= res[`LOBYTE];
end
`INCW:
begin
nf <= res24n;
zf <= res24z;
vf <= res[bitsPerByte*2-1] != acce[bitsPerByte-1];
{acce,accf} <= res[`LOBYTE];
end
`LDE_IMM,`LDE_DP,`LDE_NDX,`LDE_EXT:
begin
vf <= 1'b0;
zf <= res12z;
nf <= res12n;
acce <= res12[`LOBYTE];
end
`LDF_IMM,`LDF_DP,`LDF_NDX,`LDF_EXT:
begin
vf <= 1'b0;
zf <= res12z;
nf <= res12n;
accf <= res12[`LOBYTE];
end
`endif
`INC_DP,`INC_NDX,`INC_EXT:
begin
nf <= res12n;
2532,6 → 3393,16
acca <= res[`HIBYTE];
accb <= res[`LOBYTE];
end
`ifdef SUPPORT_6309
`LDW_IMM,`LDW_DP,`LDW_NDX,`LDW_EXT:
begin
vf <= 1'b0;
zf <= res24z;
nf <= res24n;
acce <= res[`HIBYTE];
accf <= res[`LOBYTE];
end
`endif
`LDU_IMM,`LDU_DP,`LDU_NDX,`LDU_EXT:
begin
vf <= 1'b0;
2620,6 → 3491,17
zf <= res12[`LOBYTE]==12'h000;
accb <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`NEGD:
begin
cf <= (~a[bitsPerByte*2-1]&b[bitsPerByte*2-1])|(res[bitsPerByte*2-1]&~a[bitsPerByte*2-1])|(res[bitsPerByte*2-1]&b[bitsPerByte*2-1]);
hf <= (~a[`HCBIT]&b[`HCBIT])|(res[`HCBIT]&~a[`HCBIT])|(res[`HCBIT]&b[`HCBIT]);
vf <= (1'b1 ^ res[bitsPerByte*2-1] ^ b[bitsPerByte*2-1]) & (a[bitsPerByte*2-1] ^ b[bitsPerByte*2-1]);
nf <= res[bitsPerByte*2-1];
zf <= res[`DBLBYTE]=='h0;
{acca,accb} <= res;
end
`endif
`NEG_DP,`NEG_NDX,`NEG_EXT:
begin
cf <= (~a[BPBM1]&b[BPBM1])|(res12[BPBM1]&~a[BPBM1])|(res12[BPBM1]&b[BPBM1]);
2699,6 → 3581,10
zf <= res12z;
acca <= res12[`LOBYTE];
end
`ifdef SUPPORT_6309
`STE_DP,`STE_NDX,`STE_EXT,
`STF_DP,`STF_NDX,`STF_EXT,
`endif
`STA_DP,`STA_NDX,`STA_EXT,
`STB_DP,`STB_NDX,`STB_EXT:
begin
2706,6 → 3592,9
zf <= res12z;
nf <= res12n;
end
`ifdef SUPPORT_6309
`STW_DP,`STW_NDX,`STW_EXT,
`endif
`STD_DP,`STD_NDX,`STD_EXT,
`STU_DP,`STU_NDX,`STU_EXT,
`STX_DP,`STX_NDX,`STX_EXT,
2742,11 → 3631,19
ef <= src1[7];
end
4'b1011: dpr <= src1[`LOBYTE];
4'b1110: usppg <= src1[`DBLBYTE];
4'b1100: usppg <= src1[`DBLBYTE];
`ifdef SUPPORT_6309
4'b0110: {acce,accf} <= src1[`DBLBYTE];
4'b1110: acce <= src1[`LOBYTE];
4'b1111: accf <= src1[`LOBYTE];
`else
4'b1110: ;
4'b1111: ;
`endif
default: ;
endcase
end
`TSTE,`TSTF,
`TSTA,`TSTB:
begin
vf <= 1'b0;
2759,6 → 3656,14
nf <= res24n;
zf <= res24z;
end
`ifdef SUPPORT_6309
`TSTW:
begin
vf <= 1'b0;
nf <= res24n;
zf <= res24z;
end
`endif
`TST_DP,`TST_NDX,`TST_EXT:
begin
vf <= 1'b0;
2783,6 → 3688,36
cf <= res12c;
hf <= (~a[`HCBIT]&b[`HCBIT])|(res12[`HCBIT]&~a[`HCBIT])|(res12[`HCBIT]&b[`HCBIT]);
end
`ifdef SUPPORT_6309
`SUBE_IMM,`SUBE_DP,`SUBE_NDX,`SUBE_EXT:
begin
acce <= res12[`LOBYTE];
nf <= res12n;
zf <= res12z;
vf <= (1'b1 ^ res12[BPBM1] ^ b[BPBM1]) & (a[BPBM1] ^ b[BPBM1]);
cf <= res12c;
hf <= (~a[`HCBIT]&b[`HCBIT])|(res12[`HCBIT]&~a[`HCBIT])|(res12[`HCBIT]&b[`HCBIT]);
end
`SUBF_IMM,`SUBF_DP,`SUBF_NDX,`SUBF_EXT:
begin
accf <= res12[`LOBYTE];
nf <= res12n;
zf <= res12z;
vf <= (1'b1 ^ res12[BPBM1] ^ b[BPBM1]) & (a[BPBM1] ^ b[BPBM1]);
cf <= res12c;
hf <= (~a[`HCBIT]&b[`HCBIT])|(res12[`HCBIT]&~a[`HCBIT])|(res12[`HCBIT]&b[`HCBIT]);
end
`SUBW_IMM,`SUBW_DP,`SUBW_NDX,`SUBW_EXT:
begin
cf <= res24c;
vf <= (1'b1 ^ res[BPBX2M1] ^ b[BPBX2M1]) & (a[BPBX2M1] ^ b[BPBX2M1]);
nf <= res[BPBX2M1];
zf <= res[`DBLBYTE]==24'h000000;
acce <= res[`HIBYTE];
accf <= res[`LOBYTE];
end
`SBCD_IMM,`SBCD_DP,`SBCD_NDX,`SBCD_EXT,
`endif
`SUBD_IMM,`SUBD_DP,`SUBD_NDX,`SUBD_EXT:
begin
cf <= res24c;
2874,8 → 3809,6
input [`LOBYTE] dat;
begin
if (!tsc) begin
cyc_o <= 1'b1;
stb_o <= 1'b1;
we_o <= 1'b1;
adr_o <= adr;
dat_o <= dat;
2972,6 → 3905,46
else
next_state(IFETCH);
end
`ifdef SUPPORT_6309
`LW_ACCE: begin
acce <= dat;
radr <= radr + 2'd1;
if (isRTI) begin
$display("loaded acce=%h from %h", dat, radr);
ssp <= ssp + 2'd1;
next_state(PULL1);
end
else if (isPULU) begin
usp <= usp + 2'd1;
next_state(PULL1);
end
else if (isPULS) begin
ssp <= ssp + 2'd1;
next_state(PULL1);
end
else
next_state(IFETCH);
end
`LW_ACCF: begin
accf <= dat;
radr <= radr + 2'd1;
if (isRTI) begin
$display("loaded accf=%h from %h", dat, radr);
ssp <= ssp + 2'd1;
next_state(PULL1);
end
else if (isPULU) begin
usp <= usp + 2'd1;
next_state(PULL1);
end
else if (isPULS) begin
ssp <= ssp + 2'd1;
next_state(PULL1);
end
else
next_state(IFETCH);
end
`endif
`LW_DPR: begin
dpr <= dat;
radr <= radr + 2'd1;
/rtl/cpu/rf6809_pic.sv
117,6 → 117,7
reg [31:0] iedge;
reg [31:0] rste;
reg [31:0] es;
reg [31:0] irq_active;
reg [3:0] irq [0:31];
reg [BPB:0] cause [0:31];
reg [5:0] server [0:31];
198,6 → 199,7
8'b1?????00: dat_o <= cause[adr_i[6:2]];
8'b1?????01: dat_o <= {es[adr_i[6:2]],ie[adr_i[6:2]],2'b0,irq[adr_i[6:2]]};
8'b1?????10: dat_o <= {2'b0,server[adr_i[6:2]]};
8'b1?????11: dat_o <= irq_active[adr_i[6:2]];
default: dat_o <= 12'h00;
endcase
else
229,10 → 231,16
// misreads
// nmi is not encoded
always @(posedge clk)
begin
if (rst_i)
irq_active <= 32'd0;
else begin
irqenc <= 5'd0;
for (n = 31; n > 0; n = n - 1)
for (n = 31; n > 0; n = n - 1) begin
if ((es[n] ? iedge[n] : i[n])) irqenc <= n;
if ((es[n] ? iedge[n] : i[n])) irq_active[n] <= 1'b1;
end
if (cs && wr_i && adr_i[7] && &adr_i[1:0])
irq_active[adr_i[6:2]] <= dat_i[0];
end
 
endmodule
/rtl/cpu/rf6809_pkg.sv
9,6 → 9,9
parameter BPBM1 = BPB-1;
parameter BPBX2M1 = BPB*2-1;
 
// The following adds support for many 6309 instructions.
//`define SUPPORT_6309
 
// The following allows asynchronous reads for icache updating.
// It increases the size of the core.
//`define SUPPORT_AREAD 1
346,33 → 349,89
`define LBGT 12'h12E
`define LBLE 12'h12F
 
`define ADDR 12'h130
`define ADCR 12'h131
`define SUBR 12'h132
`define SBCR 12'h133
`define ANDR 12'h134
`define ORR 12'h135
`define EORR 12'h136
`define CMPR 12'h137
`define SWI2 12'h13F
`define NEGD 12'h140
`define COMD 12'h143
`define LSRD 12'h144
`define RORD 12'h146
`define ASRD 12'h147
`define ASLD 12'h148
`define ROLD 12'h149
`define DECD 12'h14A
`define INCD 12'h14C
`define TSTD 12'h14D
`define CLRD 12'h14F
`define COMW 12'h153
`define LSRW 12'h154
`define RORW 12'h156
`define ROLW 12'h159
`define DECW 12'h15A
`define INCW 12'h15C
`define TSTW 12'h15D
`define CLRW 12'h15F
`define SUBW_IMM 12'h180
`define CMPW_IMM 12'h181
`define SBCD_IMM 12'h182
`define CMPD_IMM 12'h183
`define ANDD_IMM 12'h184
`define BITD_IMM 12'h185
`define LDW_IMM 12'h186
`define EORD_IMM 12'h188
`define ADCD_IMM 12'h189
`define ORD_IMM 12'h18A
`define ADDW_IMM 12'h18B
`define CMPY_IMM 12'h18C
`define LDY_IMM 12'h18E
`define SUBW_DP 12'h190
`define CMPW_DP 12'h191
`define SBCD_DP 12'h192
`define CMPD_DP 12'h193
`define ANDD_DP 12'h194
`define BITD_DP 12'h195
`define LDW_DP 12'h196
`define STW_DP 12'h197
`define EORD_DP 12'h198
`define ADCD_DP 12'h199
`define ORD_DP 12'h19A
`define ADDW_DP 12'h19B
`define CMPY_DP 12'h19C
`define LDY_DP 12'h19E
`define STY_DP 12'h19F
`define SUBW_NDX 12'h1A0
`define CMPW_NDX 12'h1A1
`define SBCD_NDX 12'h1A2
`define CMPD_NDX 12'h1A3
`define ANDD_NDX 12'h1A4
`define BITD_NDX 12'h1A5
`define LDW_NDX 12'h1A6
`define STW_NDX 12'h1A7
`define EORD_NDX 12'h1A8
`define ADCD_NDX 12'h1A9
`define ORD_NDX 12'h1AA
`define ADDW_NDX 12'h1AB
`define CMPY_NDX 12'h1AC
`define LDY_NDX 12'h1AE
`define STY_NDX 12'h1AF
`define SUBW_EXT 12'h1B0
`define CMPW_EXT 12'h1B1
`define SBCD_EXT 12'h1B2
`define CMPD_EXT 12'h1B3
`define ANDD_EXT 12'h1B4
`define BITD_EXT 12'h1B5
`define LDW_EXT 12'h1B6
`define STW_EXT 12'h1B7
`define EORD_EXT 12'h1B8
`define ADCD_EXT 12'h1B9
`define ORD_EXT 12'h1BA
`define ADDW_EXT 12'h1BB
`define CMPY_EXT 12'h1BC
`define LDY_EXT 12'h1BE
`define STY_EXT 12'h1BF
391,7 → 450,59
`define STS_EXT 12'h1FF
`define LDMD 12'h23D
`define SWI3 12'h23F
`define COME 12'h243
`define DECE 12'h24A
`define INCE 12'h24C
`define TSTE 12'h24D
`define CLRE 12'h24F
`define COMF 12'h253
`define DECF 12'h25A
`define INCF 12'h25C
`define TSTF 12'h25D
`define CLRF 12'h25F
`define SUBE_IMM 12'h280
`define CMPU_IMM 12'h283
`define LDE_IMM 12'h286
`define ADDE_IMM 12'h28B
`define DIVD_IMM 12'h28D
`define SUBE_DP 12'h290
`define LDE_DP 12'h296
`define ADDE_DP 12'h29B
`define DIVD_DP 12'h29D
`define SUBE_NDX 12'h2A0
`define LDE_NDX 12'h2A6
`define ADDE_NDX 12'h2AB
`define DIVD_NDX 12'h2AD
`define SUBE_EXT 12'h2B0
`define LDE_EXT 12'h2B6
`define ADDE_EXT 12'h2BB
`define DIVD_EXT 12'h2BD
`define SUBF_IMM 12'h2C0
`define LDF_IMM 12'h2C6
`define ADDF_IMM 12'h2CB
`define SUBF_DP 12'h2D0
`define LDF_DP 12'h2D6
`define ADDF_DP 12'h2DB
`define SUBF_NDX 12'h2E0
`define LDF_NDX 12'h2E6
`define ADDF_NDX 12'h2EB
`define SUBF_EXT 12'h2F0
`define LDF_EXT 12'h2F6
`define ADDF_EXT 12'h2FB
`define CMPE_IMM 12'h281
`define CMPE_DP 12'h291
`define STE_DP 12'h297
`define STE_NDX 12'h2A7
`define STE_EXT 12'h2B7
`define STF_DP 12'h2D7
`define STF_NDX 12'h2E7
`define STF_EXT 12'h2F7
`define CMPE_NDX 12'h2A1
`define CMPE_EXT 12'h2B1
`define CMPF_IMM 12'h2C1
`define CMPF_DP 12'h2D1
`define CMPF_NDX 12'h2E1
`define CMPF_EXT 12'h2F1
`define CMPS_IMM 12'h28C
`define CMPU_DP 12'h293
`define CMPS_DP 12'h29C
435,6 → 546,8
`define LW_USP2316 6'd29
`define LW_SSP3124 6'd30
`define LW_SSP2316 6'd31
`define LW_ACCE 6'd32
`define LW_ACCF 6'd33
`define LW_NOTHING 6'd63
 
`define SW_ACCDH 6'd0
479,6 → 592,10
`define SW_ACCB2316 6'd39
`define SW_ACCB158 6'd40
`define SW_ACCB70 6'd41
`define SW_ACCE 6'd42
`define SW_ACCF 6'd43
`define SW_ACCWH 6'd44
`define SW_ACCWL 6'd45
`define SW_NOTHING 6'd63
 
endpackage
/software/boot/boot_rom.asm
92,6 → 92,18
IrqSource EQU $FFC011
IRQFlag EQU $FFC012
RunningID EQU $FFC013
milliseconds EQU $FFC014
 
; One copy of serial buffer management
; 1 serial buffer for system.
SerHeadRcv EQU $FFC015
SerTailRcv EQU $FFC016
SerHeadXmit EQU $FFC017
SerTailXmit EQU $FFC018
SerRcvXon EQU $FFC019
SerRcvXoff EQU $FFC01A
SerRcvBuf EQU $FFB000 ; 4kB serial recieve buffer
 
; Top of boot stack is at $FFC0FF
 
; These variables use direct page access
110,15 → 122,9
kbdFifo EQU $40 ; in local RAM
kbdFifoAlias EQU $C00040 ; to $C0007F ; alias for $40 to $7F
SerhZero EQU $130
SerHeadRcv EQU $131
SertZero EQU $132
SerTailRcv EQU $133
SerHeadXmit EQU $136
SerTailXmit EQU $138
SerRcvXon EQU $139
SerRcvXoff EQU $140
SerRcvBuf EQU $BFF000 ; 4kB serial recieve buffer
 
 
farflag EQU $15F
asmbuf EQU $160 ; to $17F
 
140,7 → 146,7
CmdPromptJI EQU $808
MonErrVec EQU $80C
BreakpointFlag EQU $810
NumSetBreakpoints EQU $811
NumSetBreakpoints EQU $811 ; to 812
Breakpoints EQU $820 ; to $82F
BreakpointBytes EQU $830 ; to $83F
mon_vectb EQU $880
361,17 → 367,18
clr ,x+
decb
bne init1
ldx #128 ; register to start at
st1:
clr PIC,x ; cause code
sta PIC+1,x
stb PIC+2,x
leax 4,x
cmpx #256
cmpx #256 ; max reg
blo st1
lda #$81 ; make irq edge sensitive
lda #$C1 ; make irq edge sensitive (bit 7), enable interupt (bit 6), irq (bit 0)
sta PIC+$FD
lda #31 ; enable timer interrupt
sta PIC+9
lda #$41 ; level sensitive, enabled, irq
sta PIC+$D1 ; serial irq is #20
lda #COLS
sta TEXTREG+TEXT_COLS
lda #ROWS
809,6 → 816,7
;
DisplayChar:
lbsr SerialPutChar
ScreenDisplayChar:
pshs d,x
cmpb #CR ; carriage return ?
bne dccr
1095,6 → 1103,7
 
OPT INCLUDE "d:\cores2022\rf6809\software\boot\serial.asm"
OPT INCLUDE "d:\cores2022\rf6809\software\boot\S19Loader.asm"
OPT INCLUDE "d:\cores2022\rf6809\software\boot\xmodem.asm"
 
;------------------------------------------------------------------------------
; Check if there is a keyboard character available. If so return true (<0)
1116,10 → 1125,11
; bra GetKey
; jsr [CharInVec] ; vector is being overwritten somehow
lbsr SerialPeekCharDirect
; lbsr SerialGetChar
tsta
bmi INCH1 ; block if no key available
leas 1,s ; get rid of blocking status
rts
rts ; return character
INCH1:
puls b ; check blocking status
tstb
1293,8 → 1303,8
 
cmdTable1:
fcb '<','>'+$800
fcb 'b','s'+$800
fcb 'b','c'+$800
fcb 'B','+'+$800
fcb 'B','-'+$800
fcb 'D','R'+$800
fcb 'D'+$800
fcb ':'+$800
1309,8 → 1319,21
fcb "exi",'t'+$800
fcb '?'+$800
fcb "CL",'S'+$800
fcb "S1",'9'+$800
fcb "C1",'9'+$800
fcb "JD",'4'+$800
fcb "XM",'R'+$800
fcb "XM",'S'+$800
fcb 'R','A'+$800
fcb 'R','B'+$800
fcb "RDP",'R'+$800
fcb 'R','D'+$800
fcb 'R','X'+$800
fcb 'R','Y'+$800
fcb 'R','U'+$800
fcb 'R','S'+$800
fcb "RCC",'R'+$800
fcb "RP",'C'+$800
fcb 'L','B'+$800
fcw 0
 
cmdTable2:
1333,6 → 1356,19
fcw PromptClearscreen
fcw S19Loader
fcw $FFD400
fcw xm_ReceiveStart
fcw xm_SendStart
fcw SetRegA
fcw SetRegB
fcw SetRegDPR
fcw SetRegD
fcw SetRegX
fcw SetRegY
fcw SetRegU
fcw SetRegS
fcw SetRegCCR
fcw SetRegPC
fcw ListBreakpoints
 
CmdPrompt:
lbsr CRLF
1344,6 → 1380,9
fcb "Femtiki F09 Multi-core OS Starting",CR,LF,0
 
Monitor:
andcc #$EF ; SWI disables interrupts, re-enable them
lda #31 ; Timer is IRQ #31
sta PIC+16 ; register 16 is edge sense reset reg
ldd mon_init ; check special code to see if monitor has been initialized
cmpd #1234567
beq mon1
1393,6 → 1432,8
Prompt3:
ldd #-1 ; block until key present
lbsr INCH
tsta ; should not get this with blocking
bmi Prompt3
cmpb #CR ; carriage return?
beq Prompt1
lbsr OUTCH ; spit out the character
1756,8 → 1797,9
HelpMsg:
fcb "? = Display help",CR,LF
fcb "CLS = clear screen",CR,LF
fcb "bs = set breakpoint",CR,LF
fcb "bc = clear breakpoint",CR,LF
fcb "b+ = set breakpoint",CR,LF
fcb "b- = clear breakpoint",CR,LF
fcb "C19 = run C19 loader",CR,LF
; db "S = Boot from SD Card",CR,LF
fcb ": = Edit memory bytes",CR,LF
; db "L = Load sector",CR,LF
1772,12 → 1814,10
; db "b = start EhBasic 6502",CR,LF
fcb "J = Jump to code",CR,LF
fcb "JD4 = Jump to $FFD400",CR,LF
fcb "RAMTEST = test RAM",CR,LF
; db "R[n] = Set register value",CR,LF
fcb "R[n] = Set register value",CR,LF
; db "r = random lines - test bitmap",CR,LF
; db "e = ethernet test",CR,LF
fcb "s = serial output test",CR,LF
fcb "S19 = run S19 loader",CR,LF
fcb "SP = sprite demo",CR,LF
; db "T = Dump task list",CR,LF
; db "TO = Dump timeout list",CR,LF
1785,6 → 1825,7
; db "TEMP = display temperature",CR,LF
fcb "U = unassemble",CR,LF
; db "P = Piano",CR,LF
fcb "XM = xmodem transfer",CR,LF
fcb "x = exit monitor",CR,LF
fcb 0
 
1875,6 → 1916,7
 
EditMemory:
ldu #8 ; set max byte count
lbsr ignBlanks
lbsr GetHexNumber ; get the start address
ldx mon_numwka+2
EditMem2:
1978,6 → 2020,75
lbra Monitor
 
;------------------------------------------------------------------------------
; SetRegXXX
;
; Set the value to be loaded into a register.
;------------------------------------------------------------------------------
 
SetRegA:
lbsr ignBlanks
lbsr GetNumber
lda mon_numwka+3
sta mon_DSAVE
lbra Monitor
SetRegB:
lbsr ignBlanks
lbsr GetNumber
lda mon_numwka+3
sta mon_DSAVE+1
lbra Monitor
SetRegD:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_DSAVE
lbra Monitor
SetRegX:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_XSAVE
lbra Monitor
SetRegY:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_YSAVE
lbra Monitor
SetRegU:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_USAVE
lbra Monitor
SetRegS:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_SSAVE
lbra Monitor
SetRegDPR:
lbsr ignBlanks
lbsr GetNumber
lda mon_numwka+3
sta mon_DPRSAVE
lbra Monitor
SetRegCCR:
lbsr ignBlanks
lbsr GetNumber
lda mon_numwka+3
sta mon_CCRSAVE
lbra Monitor
SetRegPC:
lbsr ignBlanks
lbsr GetNumber
ldd mon_numwka+2
std mon_PCSAVE+2
ldb mon_numwka+1
stb mon_PCSAVE+1
lbra Monitor
 
;------------------------------------------------------------------------------
; Jump to code
;
; Registers are loaded with values from the monitor register save area before
1987,17 → 2098,14
;------------------------------------------------------------------------------
 
jump_to_code:
bsr GetNumber
lbsr ignBlanks
lbsr GetNumber
sei
lds mon_SSAVE
ldd #jtc_exit ; setup stack for RTS back to monitor
ldd #jtc_exit ; setup stack for RTS back to monitor
pshs d
ldb #0
pshs b
ldd mon_numwka+2 ; get the address parameter
pshs d
ldb mon_numwka+1
pshs b
ldd mon_USAVE
pshs d
ldd mon_YSAVE
2010,7 → 2118,8
pshs d
lda mon_CCRSAVE
pshs a
puls far ccr,d,dpr,x,y,u,pc
puls far ccr,d,dpr,x,y,u
jmp far [mon_numwka+1]
jtc_exit:
sts >mon_SSAVE ; need to use extended addressing, no direct page setting
leas $6FFF ; reset stack to system area, dont modify flags register!
2062,7 → 2171,7
boot_stack:
fcw $FFC0FF
numBreakpoints:
fcb 8
fcw 8
mon_rom_vectab:
fcw mon_rom_vecs
mon_rom_vecs:
2079,6 → 2188,7
fcw 0 ; operating system call
fcw GetRange
fcw GetNumber
fcw SerialPutChar
 
NumFuncs EQU (*-mon_rom_vectab)/2
 
2099,6 → 2209,7
fcb $C00 ; OS call
fcb 0 ; GetRange
fcb $800 ; GetNumber
fcb 0 ; SerialPutChar
;------------------------------------------------------------------------------
; SWI routine.
2117,7 → 2228,7
leau -1,u ; backup a byte
tst BreakpointFlag ; are we in breakpoint mode?
beq swiNotBkpt
ldu #Breakpoints
ldy #Breakpoints
ldb NumSetBreakpoints
beq swiNotBkpt
swi_rout2:
2161,6 → 2272,10
swi_rout4:
rti
 
;------------------------------------------------------------------------------
; A breakpoint was struck during program execution, process accordingly.
;------------------------------------------------------------------------------
 
processBreakpoint:
lda ,s
sta mon_CCRSAVE
2175,8 → 2290,10
ldd 8,s
std mon_USAVE
sts mon_SSAVE
ldb 10,s
stb mon_PCSAVE
ldd 11,s
std mon_PCSAVE
std mon_PCSAVE+1
lds boot_stack,pcr
ldd #swi_rout3 ; setup so monitor can return
pshs d
2186,6 → 2303,9
xitMonitor:
bra ArmAllBreakpoints
 
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
 
swiCallOS:
leau 1,u ; next byte is func number
ldb ,u+
2204,6 → 2324,10
clr OSSEMA+1
bra swi_rout3
 
;------------------------------------------------------------------------------
; DisarmAllBreakpoints, used when entering the monitor.
;------------------------------------------------------------------------------
 
DisarmAllBreakpoints:
pshs d,x,y
ldy #0
2222,6 → 2346,9
disarm1:
puls d,x,y,pc
 
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
 
ArmAllBreakpoints:
pshs d,x,y
ldy #0
2240,12 → 2367,18
arm1:
puls d,x,y,pc
 
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
 
ArmBreakpoint:
pshs d,x,y
lda NumSetBreakpoints ; check if too many breakpoints set
cmpa numBreakpoints
lbhs DisplayErr
lbsr ignBlanks
lbsr GetHexNumber ; get address parameter
tstb
lbmi DisplayErr
ldb NumSetBreakpoints ; bv= number of set breakpoints
ldy mon_numwka+2 ; get address
lda ,y ; get byte at address
2259,11 → 2392,18
lsrb ; size back to single byte
incb
stb NumSetBreakpoints
puls d,x,y,pc
puls d,x,y
lbra Monitor
 
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
 
DisarmBreakpoint:
pshs d,x,y,u
lbsr ignBlanks
lbsr GetHexNumber
tstb
lbmi Monitor
clrb
clrb
tfr d,x ; x = zero too
2307,10 → 2447,39
incb
bra disarm6
disarm4:
puls d,x,y,u,pc
puls d,x,y,u
lbra Monitor
 
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
 
ListBreakpoints:
pshs d,x
swi
fcb MF_CRLF
ldx #0
ldb #0
lbrk1:
cmpb numBreakpoints
bhs lbrk2
cmpb NumSetBreakpoints
bhs lbrk2
ldd Breakpoints,x
leax 2,x
incb
pshs b
swi
fcb MF_DisplayWordAsHex
swi
fcb MF_CRLF
puls b
bra lbrk1
lbrk2:
puls d,x
lbra Monitor
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
swi3_rout:
sei
lda ,s
2344,22 → 2513,12
rti
 
irq_rout:
clra
tfr a,dpr
setdp $000
; lbsr SerialIRQ ; check for recieved character
lbsr TimerIRQ
 
; Reset the edge sense circuit in the PIC
; lda #31 ; Timer is IRQ #31
; sta IrqSource ; stuff a byte indicating the IRQ source for PEEK()
; sta PIC+16 ; register 16 is edge sense reset reg
; lda VIA+VIA_IFR
; bpl notTimerIRQ2
; bita #$800
; beq notTimerIRQ2
; clr VIA+VIA_T3LL
; clr VIA+VIA_T3LH
; inc $E00037 ; update timer IRQ screen flag
;notTimerIRQ2:
 
lda IrqBase ; get the IRQ flag byte
lsra
ora IrqBase
2367,32 → 2526,18
sta IrqBase
 
; inc TEXTSCR+54 ; update IRQ live indicator on screen
; inc TEXTSCR+$2000+54
; flash the cursor
; only bother to flash the cursor for the task with the IO focus.
; lda COREID
; cmpa IOFocusID
; bne tr1a
; lda CursorFlash ; test if we want a flashing cursor
; beq tr1a
; lbsr CalcScreenLoc ; compute cursor location in memory
; tfr d,y
; lda $2000,y ; get color code $2000 higher in memory
; ldb IRQFlag ; get counter
; lsrb
; lsra
; lsra
; lsra
; lsra
; lsrb
; rola
; lsrb
; rola
; lsrb
; rola
; lsrb
; rola
; sta $E00000,y ; store the color code back to memory
lda COREID
cmpa IOFocusID
bne tr1a
lda CursorFlash ; test if we want a flashing cursor
beq tr1a
lbsr CalcScreenLoc ; compute cursor location in memory
tfr d,y
inc $2000,y ; get color code $2000 higher in memory
tr1a:
rti
 
/software/boot/boot_rom.lst
1,4 → 1,4
3 error(s), 526 warning(s) unlisted in pass 1
3 error(s), 894 warning(s) unlisted in pass 1
; ============================================================================
; __
; \\__/ o\ (C) 2013-2022 Robert Finch, Waterloo
71,6 → 71,16
;
; ============================================================================
;
; ASCII control characters.
SOH equ 1
EOT equ 4
ACK equ 6
BS equ 8
NAK equ 21
ETB equ $17
CAN equ 24
DEL equ 127
CR EQU $0D ;ASCII equates
LF EQU $0A
TAB EQU $09
106,6 → 116,7
MF_OSCALL EQU 10
MF_GetRange EQU 11 ; gets a pair of numbers last>first
MF_GetNumber EQU 12
MF_SerialPutchar EQU 13
mon_numwka EQU $910
mon_r1 EQU $920
172,6 → 183,7
ACIA_STAT EQU 1
ACIA_CMD EQU 2
ACIA_CTRL EQU 3
ACIA_IRQS EQU 4
ACIA_CTRL2 EQU 11
RTC EQU $FFFE30500 ; I2C
RTCBuf EQU $7FC0
241,6 → 253,18
IrqSource EQU $FFC011
IRQFlag EQU $FFC012
RunningID EQU $FFC013
milliseconds EQU $FFC014
; One copy of serial buffer management
; 1 serial buffer for system.
SerHeadRcv EQU $FFC015
SerTailRcv EQU $FFC016
SerHeadXmit EQU $FFC017
SerTailXmit EQU $FFC018
SerRcvXon EQU $FFC019
SerRcvXoff EQU $FFC01A
SerRcvBuf EQU $FFB000 ; 4kB serial recieve buffer
; Top of boot stack is at $FFC0FF
; These variables use direct page access
259,15 → 283,9
kbdFifo EQU $40 ; in local RAM
kbdFifoAlias EQU $C00040 ; to $C0007F ; alias for $40 to $7F
SerhZero EQU $130
SerHeadRcv EQU $131
SertZero EQU $132
SerTailRcv EQU $133
SerHeadXmit EQU $136
SerTailXmit EQU $138
SerRcvXon EQU $139
SerRcvXoff EQU $140
SerRcvBuf EQU $BFF000 ; 4kB serial recieve buffer
farflag EQU $15F
asmbuf EQU $160 ; to $17F
289,7 → 307,7
CmdPromptJI EQU $808
MonErrVec EQU $80C
BreakpointFlag EQU $810
NumSetBreakpoints EQU $811
NumSetBreakpoints EQU $811 ; to 812
Breakpoints EQU $820 ; to $82F
BreakpointBytes EQU $830 ; to $83F
mon_vectb EQU $880
320,7 → 338,7
00FFD0AE 012 nop
XBLANK
00FFD0AF 0C6020 ldb #' '
00FFD0B1 017001E2D lbsr OUTCH
00FFD0B1 017002115 lbsr OUTCH
00FFD0B4 039 rts
org $FFD0D0
329,9 → 347,9
CRLF
CRLF1:
00FFD0D2 0C600D ldb #CR
00FFD0D4 017001E0A lbsr OUTCH
00FFD0D4 0170020F2 lbsr OUTCH
00FFD0D7 0C600A ldb #LF
00FFD0D9 017001E05 lbsr OUTCH
00FFD0D9 0170020ED lbsr OUTCH
00FFD0DC 039 rts
org $FFD0F0
345,7 → 363,7
org $FFD2C0
00FFD2C0 012 nop
LETTER
00FFD2C1 017001C1D lbsr OUTCH
00FFD2C1 017001F05 lbsr OUTCH
00FFD2C4 039 rts
org $FFD2CC
352,18 → 370,18
00FFD2CC 012 nop
00FFD2CD 012 nop
HEX2
00FFD2CE 017001166 lbsr DispByteAsHex
00FFD2CE 017001169 lbsr DispByteAsHex
00FFD2D1 039 rts
HEX4
00FFD2D2 017001159 lbsr DispWordAsHex
00FFD2D2 01700115C lbsr DispWordAsHex
00FFD2D5 039 rts
org $FFD300
ClearScreenJmp
00FFD300 016000F36 lbra ClearScreen
00FFD300 016000F39 lbra ClearScreen
org $FFD308
HomeCursorJmp
00FFD308 016000FA5 lbra HomeCursor
00FFD308 016000FA8 lbra HomeCursor
org $FFD400
408,21 → 426,21
org $FFE000
00FFE000 FFF039 FDB Monitor
00FFE000 FFF35C FDB Monitor
00FFE002 FFE022 FDB DumRts ; NEXTCMD
00FFE004 FFEEA9 FDB INCH
00FFE006 FFEEC7 FDB INCHE
00FFE008 FFEECB FDB INCHEK
00FFE00A FFEEE1 FDB OUTCH
00FFE00C FFE41B FDB PDATA
00FFE00E FFE40E FDB PCRLF
00FFE010 FFE40A FDB PSTRNG
00FFE004 FFF191 FDB INCH
00FFE006 FFF1AF FDB INCHE
00FFE008 FFF1B3 FDB INCHEK
00FFE00A FFF1C9 FDB OUTCH
00FFE00C FFE41E FDB PDATA
00FFE00E FFE411 FDB PCRLF
00FFE010 FFE40D FDB PSTRNG
00FFE012 FFE022 FDB DumRts ; LRA
00FFE014 FFE022 FDB DumRts
00FFE016 FFE022 FDB DumRts
00FFE018 FFE022 FDB DumRts
00FFE01A FFE022 FDB DumRts ; VINIZ
00FFE01C FFE319 FDB DisplayChar ; VOUTCH
00FFE01C FFE31C FDB DisplayChar ; VOUTCH
00FFE01E FFE022 FDB DumRts ; ACINIZ
00FFE020 FFE022 FDB DumRts ; AOUTCH
455,7 → 473,7
; tfr d,x
; jmp ,x ; jump to the BIOS now in local RAM
st7:
00FFE046 08D16D bsr Delay3s ; give some time for devices to reset
00FFE046 08D170 bsr Delay3s ; give some time for devices to reset
00FFE048 07F000810 clr BreakpointFlag
00FFE04B 07F000811 clr NumSetBreakpoints
00FFE04E 0860AA lda #$AA
480,10 → 498,10
00FFE07A 0860CE lda #$0CE
00FFE07C 097113 sta ScreenColor
00FFE07E 097112 sta CharColor
00FFE080 08D1B7 bsr ClearScreen
00FFE082 0CCFFE319 ldd #DisplayChar
00FFE080 08D1BA bsr ClearScreen
00FFE082 0CCFFE31C ldd #DisplayChar
00FFE085 0FD000800 std CharOutVec
00FFE088 0CCFFEC64 ldd #SerialPeekCharDirect
00FFE088 0CCFFEC73 ldd #SerialPeekCharDirect
00FFE08B 0FD000804 std CharInVec
; swi
; fcb MF_OSCALL
492,9 → 510,9
00FFE093 0C1001 cmpb #FIRST_CORE
00FFE095 027011 beq init
00FFE097 0C1020 cmpb #$20 ; CmodA709 core?
00FFE099 02705D beq init2
00FFE09B 02006D bra skip_init
00FFE09D 0200B4 bra multi_sieve
00FFE099 027060 beq init2
00FFE09B 020070 bra skip_init
00FFE09D 0200B7 bra multi_sieve
st3:
00FFE09F 0860FF lda #$FF
00FFE0A1 0150B7FFFE60001 sta LEDS
503,7 → 521,7
; initialize interrupt controller
; first, zero out all the vectors
init:
00FFE0A8 017000449 lbsr rtc_read ; get clock values
00FFE0A8 017000479 lbsr rtc_read ; get clock values
00FFE0AB 08E000127 ldx #kbdHeadRcv
00FFE0AE 0C6020 ldb #32 ; number of bytes to zero out
init1:
510,57 → 528,58
00FFE0B0 06F800 clr ,x+
00FFE0B2 05A decb
00FFE0B3 026FFB bne init1
00FFE0B5 08E000080 ldx #128 ; register to start at
st1:
00FFE0B5 06F809E3F000 clr PIC,x ; cause code
00FFE0B9 0A7809E3F001 sta PIC+1,x
00FFE0BD 0E7809E3F002 stb PIC+2,x
00FFE0C1 030004 leax 4,x
00FFE0C3 08C000100 cmpx #256
00FFE0C6 025FED blo st1
00FFE0C8 086081 lda #$81 ; make irq edge sensitive
00FFE0CA 0150B7FFFE3F0FD sta PIC+$FD
00FFE0CF 08601F lda #31 ; enable timer interrupt
00FFE0D1 0150B7FFFE3F009 sta PIC+9
00FFE0D6 086040 lda #COLS
00FFE0D8 0150B7FFFE07F00 sta TEXTREG+TEXT_COLS
00FFE0DD 086020 lda #ROWS
00FFE0DF 0150B7FFFE07F01 sta TEXTREG+TEXT_ROWS
00FFE0E4 08D153 bsr ClearScreen
00FFE0E6 08D1C8 bsr HomeCursor
00FFE0E8 08E000000 ldx #0
00FFE0EB 0CC000000 ldd #0
00FFE0EE 017000DFA lbsr ShowSprites
00FFE0F1 0170008CC lbsr KeybdInit
00FFE0F4 0DC124 ldd KeybdID
00FFE0F6 08D336 bsr DispWordAsHex
00FFE0B8 06F809E3F000 clr PIC,x ; cause code
00FFE0BC 0A7809E3F001 sta PIC+1,x
00FFE0C0 0E7809E3F002 stb PIC+2,x
00FFE0C4 030004 leax 4,x
00FFE0C6 08C000100 cmpx #256 ; max reg
00FFE0C9 025FED blo st1
00FFE0CB 0860C1 lda #$C1 ; make irq edge sensitive (bit 7), enable interupt (bit 6), irq (bit 0)
00FFE0CD 0150B7FFFE3F0FD sta PIC+$FD
00FFE0D2 086041 lda #$41 ; level sensitive, enabled, irq
00FFE0D4 0150B7FFFE3F0D1 sta PIC+$D1 ; serial irq is #20
00FFE0D9 086040 lda #COLS
00FFE0DB 0150B7FFFE07F00 sta TEXTREG+TEXT_COLS
00FFE0E0 086020 lda #ROWS
00FFE0E2 0150B7FFFE07F01 sta TEXTREG+TEXT_ROWS
00FFE0E7 08D153 bsr ClearScreen
00FFE0E9 08D1C8 bsr HomeCursor
00FFE0EB 08E000000 ldx #0
00FFE0EE 0CC000000 ldd #0
00FFE0F1 0170010DF lbsr ShowSprites
00FFE0F4 0170008C9 lbsr KeybdInit
00FFE0F7 0DC124 ldd KeybdID
00FFE0F9 08D336 bsr DispWordAsHex
init2:
00FFE0F8 01700036A lbsr TimerInit
00FFE0FB 017000AF1 lbsr InitSerial
00FFE0FE 08E000080 ldx #128
00FFE101 086001 lda #1 ; set irq(bit0), clear firq (bit1), disable int (bit 6), clear edge sense(bit 7)
00FFE103 0C6001 ldb #FIRST_CORE ; serving core id
00FFE0FB 01700036A lbsr TimerInit
00FFE0FE 017000AEE lbsr InitSerial
00FFE101 08E000080 ldx #128
00FFE104 086001 lda #1 ; set irq(bit0), clear firq (bit1), disable int (bit 6), clear edge sense(bit 7)
00FFE106 0C6001 ldb #FIRST_CORE ; serving core id
; lda #4 ; make the timer interrupt edge sensitive
; sta PIC+4 ; reg #4 is the edge sensitivity setting
; sta PIC ; reg #0 is interrupt enable
00FFE105 0C6001 ldb #1
00FFE107 0F7EF1000 stb OUTSEMA+SEMAABS ; set semaphore to 1 available slot
00FFE108 0C6001 ldb #1
00FFE10A 0F7EF1000 stb OUTSEMA+SEMAABS ; set semaphore to 1 available slot
skip_init:
00FFE10A 01C0EF andcc #$EF ; unmask irq
00FFE10C 086005 lda #5
00FFE10E 0150B7FFFE60001 sta LEDS
00FFE113 0CCFFE11C ldd #msgStartup
00FFE116 08D2C2 bsr DisplayString
00FFE10D 01C0EF andcc #$EF ; unmask irq
00FFE10F 086005 lda #5
00FFE111 0150B7FFFE60001 sta LEDS
00FFE116 0CCFFE11F ldd #msgStartup
00FFE119 08D2C2 bsr DisplayString
st10:
00FFE118 03F swi
00FFE119 000 fcb MF_Monitor
00FFE11A 020FFC bra st10
00FFE11B 03F swi
00FFE11C 000 fcb MF_Monitor
00FFE11D 020FFC bra st10
msgStartup
00FFE11C 072066036038030039020 fcb "rf6809 12-bit System Starting.",CR,LF,0
00FFE123 03103202D062069074020
00FFE12A 05307907307406506D020
00FFE131 05307406107207406906E
00FFE138 06702E00D00A000
00FFE11F 072066036038030039020 fcb "rf6809 12-bit System Starting.",CR,LF,0
00FFE126 03103202D062069074020
00FFE12D 05307907307406506D020
00FFE134 05307406107207406906E
00FFE13B 06702E00D00A000
;------------------------------------------------------------------------------
; The checkpoint register must be cleared within 1 second or a NMI interrupt
572,8 → 591,8
;------------------------------------------------------------------------------
checkpoint:
00FFE13D 01507FFFFFFFFE1 clr $FFFFFFFE1 ; writing any value will do
00FFE142 039 rts
00FFE140 01507FFFFFFFFE1 clr $FFFFFFFE1 ; writing any value will do
00FFE145 039 rts
;------------------------------------------------------------------------------
; Copy the system ROM to local RAM
586,14 → 605,14
;------------------------------------------------------------------------------
romToRam:
00FFE143 08EFFC000 ldx #$FFC000
00FFE146 18E00C000 ldy #$00C000
00FFE146 08EFFC000 ldx #$FFC000
00FFE149 18E00C000 ldy #$00C000
romToRam1:
00FFE149 0EC801 ldd ,x++
00FFE14B 0EDA01 std ,y++
00FFE14D 08C000000 cmpx #0
00FFE150 026FF7 bne romToRam1
00FFE152 039 rts
00FFE14C 0EC801 ldd ,x++
00FFE14E 0EDA01 std ,y++
00FFE150 08C000000 cmpx #0
00FFE153 026FF7 bne romToRam1
00FFE155 039 rts
;------------------------------------------------------------------------------
; Multi-core sieve program.
604,36 → 623,36
; core number minus two.
;
multi_sieve:
00FFE153 086050 lda #'P' ; indicate prime
00FFE155 0150F6FFFFFFFE0 ldb COREID ; find out which core we are
00FFE15A 0C0001 subb #FIRST_CORE
00FFE15C 08E000000 ldx #0 ; start at first char of screen
00FFE15F 03A abx
00FFE156 086050 lda #'P' ; indicate prime
00FFE158 0150F6FFFFFFFE0 ldb COREID ; find out which core we are
00FFE15D 0C0001 subb #FIRST_CORE
00FFE15F 08E000000 ldx #0 ; start at first char of screen
00FFE162 03A abx
multi_sieve3:
00FFE160 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE164 030008 leax 8,x ; advance to next position
00FFE166 08C000FFF cmpx #4095
00FFE169 025FF5 blo multi_sieve3
00FFE16B 0BDFFE13D jsr checkpoint
00FFE163 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE167 030008 leax 8,x ; advance to next position
00FFE169 08C000FFF cmpx #4095
00FFE16C 025FF5 blo multi_sieve3
00FFE16E 0BDFFE140 jsr checkpoint
*** warning 1: Long branch within short branch range could be optimized
00FFE16E 0CB002 addb #2 ; start sieve at 2 (core id)
00FFE170 08604E lda #'N' ; flag position value of 'N' for non-prime
00FFE171 0CB002 addb #2 ; start sieve at 2 (core id)
00FFE173 08604E lda #'N' ; flag position value of 'N' for non-prime
multi_sieve2:
00FFE172 08E000000 ldx #0
00FFE175 03A abx ; skip the first position - might be prime
00FFE175 08E000000 ldx #0
00FFE178 03A abx ; skip the first position - might be prime
multi_sieve1:
00FFE176 03A abx ; increment
00FFE177 0A7809E00000 sta TEXTSCR,x
00FFE17B 08C000FFF cmpx #4095
00FFE17E 025FF6 blo multi_sieve1
00FFE180 0BDFFE13D jsr checkpoint
00FFE179 03A abx ; increment
00FFE17A 0A7809E00000 sta TEXTSCR,x
00FFE17E 08C000FFF cmpx #4095
00FFE181 025FF6 blo multi_sieve1
00FFE183 0BDFFE140 jsr checkpoint
*** warning 1: Long branch within short branch range could be optimized
00FFE183 0CB008 addb #8 ; number of cores working on it
00FFE185 0C1FF0 cmpb #4080
00FFE187 025FE9 blo multi_sieve2
00FFE186 0CB008 addb #8 ; number of cores working on it
00FFE188 0C1FF0 cmpb #4080
00FFE18A 025FE9 blo multi_sieve2
multi_sieve4: ; hang machine
00FFE189 013 sync
00FFE18A 016000EAC lbra Monitor
00FFE18C 013 sync
00FFE18D 0160011CC lbra Monitor
;------------------------------------------------------------------------------
; Single core sieve.
640,28 → 659,28
;------------------------------------------------------------------------------
sieve:
00FFE18D 086050 lda #'P' ; indicate prime
00FFE18F 08E000000 ldx #0 ; start at first char of screen
00FFE190 086050 lda #'P' ; indicate prime
00FFE192 08E000000 ldx #0 ; start at first char of screen
sieve3:
00FFE192 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE196 030001 inx ; advance to next position
00FFE198 08C000FFF cmpx #4095
00FFE19B 025FF5 blo sieve3
00FFE19D 0C6002 ldb #2 ; start sieve at 2
00FFE19F 08604E lda #'N' ; flag position value of 'N' for non-prime
00FFE195 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE199 030001 inx ; advance to next position
00FFE19B 08C000FFF cmpx #4095
00FFE19E 025FF5 blo sieve3
00FFE1A0 0C6002 ldb #2 ; start sieve at 2
00FFE1A2 08604E lda #'N' ; flag position value of 'N' for non-prime
sieve2:
00FFE1A1 08E000000 ldx #0
00FFE1A4 03A abx ; skip the first position - might be prime
00FFE1A4 08E000000 ldx #0
00FFE1A7 03A abx ; skip the first position - might be prime
sieve1:
00FFE1A5 03A abx ; increment
00FFE1A6 0A7809E00000 sta TEXTSCR,x
00FFE1AA 08C000FFF cmpx #4095
00FFE1AD 025FC7 blo multi_sieve1
00FFE1AF 05C incb ; number of cores working on it
00FFE1B0 0C1FF0 cmpb #4080
00FFE1B2 025FED blo sieve2
00FFE1A8 03A abx ; increment
00FFE1A9 0A7809E00000 sta TEXTSCR,x
00FFE1AD 08C000FFF cmpx #4095
00FFE1B0 025FC7 blo multi_sieve1
00FFE1B2 05C incb ; number of cores working on it
00FFE1B3 0C1FF0 cmpb #4080
00FFE1B5 025FED blo sieve2
sieve4: ; hang machine
00FFE1B4 039 rts
00FFE1B7 039 rts
;------------------------------------------------------------------------------
; Three second delay for user convenience and to allow some devices time to
669,30 → 688,30
;------------------------------------------------------------------------------
Delay3s:
00FFE1B5 0CC895440 ldd #9000000
00FFE1B8 0CC895440 ldd #9000000
dly3s1:
00FFE1B8 0C10FF cmpb #$FF
00FFE1BA 026000 bne dly3s2
00FFE1BB 0C10FF cmpb #$FF
00FFE1BD 026000 bne dly3s2
dly3s2:
00FFE1BC 0150B7FFFE60001 sta LEDS
00FFE1C1 083000001 subd #1
00FFE1C4 026FF2 bne dly3s1
00FFE1C6 039 rts
00FFE1BF 0150B7FFFE60001 sta LEDS
00FFE1C4 083000001 subd #1
00FFE1C7 026FF2 bne dly3s1
00FFE1C9 039 rts
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
ShiftLeft5:
00FFE1C7 058 aslb
00FFE1C8 049 rola
00FFE1C9 058 aslb
00FFE1CA 049 rola
00FFE1CB 058 aslb
00FFE1CC 049 rola
00FFE1CD 058 aslb
00FFE1CE 049 rola
00FFE1CF 058 aslb
00FFE1D0 049 rola
00FFE1D1 039 rts
00FFE1CA 058 aslb
00FFE1CB 049 rola
00FFE1CC 058 aslb
00FFE1CD 049 rola
00FFE1CE 058 aslb
00FFE1CF 049 rola
00FFE1D0 058 aslb
00FFE1D1 049 rola
00FFE1D2 058 aslb
00FFE1D3 049 rola
00FFE1D4 039 rts
;------------------------------------------------------------------------------
; Parameters:
700,74 → 719,74
;------------------------------------------------------------------------------
;
CopyVirtualScreenToScreen:
00FFE1D2 034076 pshs d,x,y,u
00FFE1D5 034076 pshs d,x,y,u
; Compute virtual screen location for core passed in accb.
00FFE1D4 01F098 tfr b,a
00FFE1D6 048 asla
00FFE1D7 048 asla
00FFE1D8 048 asla
00FFE1D7 01F098 tfr b,a
00FFE1D9 048 asla
00FFE1DA 08AC00 ora #$C00
00FFE1DC 05F clrb
00FFE1DD 01F001 tfr d,x
00FFE1DF 034006 pshs d
00FFE1E1 18EE00000 ldy #TEXTSCR
00FFE1E4 0CE000400 ldu #COLS*ROWS/2
00FFE1DA 048 asla
00FFE1DB 048 asla
00FFE1DC 048 asla
00FFE1DD 08AC00 ora #$C00
00FFE1DF 05F clrb
00FFE1E0 01F001 tfr d,x
00FFE1E2 034006 pshs d
00FFE1E4 18EE00000 ldy #TEXTSCR
00FFE1E7 0CE000400 ldu #COLS*ROWS/2
cv2s1:
00FFE1E7 0EC801 ldd ,x++
00FFE1E9 0EDA01 std ,y++
00FFE1EB 0335FF leau -1,u
00FFE1ED 283000000 cmpu #0
00FFE1F0 026FF5 bne cv2s1
00FFE1EA 0EC801 ldd ,x++
00FFE1EC 0EDA01 std ,y++
00FFE1EE 0335FF leau -1,u
00FFE1F0 283000000 cmpu #0
00FFE1F3 026FF5 bne cv2s1
; reset the cursor position in the text controller
00FFE1F2 035010 puls x
00FFE1F4 0E6808110 ldb CursorRow,x
00FFE1F7 086040 lda #COLS
00FFE1F9 03D mul
00FFE1FA 01F002 tfr d,y
00FFE1FC 0E6808111 ldb CursorCol,x
00FFE1FF 01F021 tfr y,x
00FFE201 03A abx
00FFE202 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
00FFE207 0350F6 puls d,x,y,u,pc
00FFE1F5 035010 puls x
00FFE1F7 0E6808110 ldb CursorRow,x
00FFE1FA 086040 lda #COLS
00FFE1FC 03D mul
00FFE1FD 01F002 tfr d,y
00FFE1FF 0E6808111 ldb CursorCol,x
00FFE202 01F021 tfr y,x
00FFE204 03A abx
00FFE205 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
00FFE20A 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
;
CopyScreenToVirtualScreen:
00FFE209 034076 pshs d,x,y,u
00FFE20B 08D08D bsr GetScreenLocation
00FFE20D 01F002 tfr d,y
00FFE20F 08EE00000 ldx #TEXTSCR
00FFE212 0CE000400 ldu #COLS*ROWS/2
00FFE20C 034076 pshs d,x,y,u
00FFE20E 08D08D bsr GetScreenLocation
00FFE210 01F002 tfr d,y
00FFE212 08EE00000 ldx #TEXTSCR
00FFE215 0CE000400 ldu #COLS*ROWS/2
cs2v1:
00FFE215 0EC801 ldd ,x++
00FFE217 0EDA01 std ,y++
00FFE219 0335FF leau -1,u
00FFE21B 283000000 cmpu #0
00FFE21E 026FF5 bne cs2v1
00FFE220 0350F6 puls d,x,y,u,pc
00FFE218 0EC801 ldd ,x++
00FFE21A 0EDA01 std ,y++
00FFE21C 0335FF leau -1,u
00FFE21E 283000000 cmpu #0
00FFE221 026FF5 bne cs2v1
00FFE223 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
00FFE222 054045058054053043052 fcb "TEXTSCR "
00FFE229 020
00FFE22A FFE234 fcw TextOpen
00FFE22C FFE235 fcw TextClose
00FFE22E FFE236 fcw TextRead
00FFE230 FFE237 fcw TextWrite
00FFE232 FFE238 fcw TextSeek
00FFE225 054045058054053043052 fcb "TEXTSCR "
00FFE22C 020
00FFE22D FFE237 fcw TextOpen
00FFE22F FFE238 fcw TextClose
00FFE231 FFE239 fcw TextRead
00FFE233 FFE23A fcw TextWrite
00FFE235 FFE23B fcw TextSeek
TextOpen:
00FFE234 039 rts
00FFE237 039 rts
TextClose:
00FFE235 039 rts
00FFE238 039 rts
TextRead:
00FFE236 039 rts
00FFE239 039 rts
TextWrite:
00FFE237 039 rts
00FFE23A 039 rts
TextSeek:
00FFE238 039 rts
00FFE23B 039 rts
;------------------------------------------------------------------------------
; Clear the screen and the screen color memory
779,29 → 798,29
;------------------------------------------------------------------------------
ClearScreen:
00FFE239 034076 pshs d,x,y,u
00FFE23B 08E000800 ldx #COLS*ROWS
00FFE23E 01F013 tfr x,u
00FFE240 08D058 bsr GetScreenLocation
00FFE242 01F002 tfr d,y
00FFE244 0C6020 ldb #' ' ; space char
00FFE23C 034076 pshs d,x,y,u
00FFE23E 08E000800 ldx #COLS*ROWS
00FFE241 01F013 tfr x,u
00FFE243 08D058 bsr GetScreenLocation
00FFE245 01F002 tfr d,y
00FFE247 0C6020 ldb #' ' ; space char
cs1:
00FFE246 0E7A00 stb ,y+ ; set text to space
00FFE248 0301FF leax -1,x ; decrement x
00FFE24A 026FFA bne cs1
00FFE24C 0150F6FFFFFFFE0 ldb COREID ; update colors only if we have focus
00FFE251 0F1FFC010 cmpb IOFocusID
00FFE254 02000D bra cs3
00FFE256 18EE02000 ldy #TEXTSCR+$2000
00FFE249 0E7A00 stb ,y+ ; set text to space
00FFE24B 0301FF leax -1,x ; decrement x
00FFE24D 026FFA bne cs1
00FFE24F 0150F6FFFFFFFE0 ldb COREID ; update colors only if we have focus
00FFE254 0F1FFC010 cmpb IOFocusID
00FFE257 02000D bra cs3
00FFE259 18EE02000 ldy #TEXTSCR+$2000
; lda CharColor
00FFE259 0860CE lda #$0CE
00FFE25B 01F031 tfr u,x ; get back count
00FFE25C 0860CE lda #$0CE
00FFE25E 01F031 tfr u,x ; get back count
cs2:
00FFE25D 0A7A00 sta ,y+
00FFE25F 0301FF dex ; decrement x
00FFE261 026FFA bne cs2
00FFE260 0A7A00 sta ,y+
00FFE262 0301FF dex ; decrement x
00FFE264 026FFA bne cs2
cs3:
00FFE263 0350F6 puls d,x,y,u,pc
00FFE266 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
; Scroll text on the screen upwards
811,20 → 830,20
;------------------------------------------------------------------------------
ScrollUp:
00FFE265 034076 pshs d,x,y,u
00FFE267 18E0003FF ldy #(COLS*ROWS-1)/2 ; y = num chars/2 to move
00FFE26A 08D02E bsr GetScreenLocation
00FFE26C 01F001 tfr d,x
00FFE26E 01F003 tfr d,u
00FFE270 030040 leax COLS,x ; x = index to source row
00FFE268 034076 pshs d,x,y,u
00FFE26A 18E0003FF ldy #(COLS*ROWS-1)/2 ; y = num chars/2 to move
00FFE26D 08D02E bsr GetScreenLocation
00FFE26F 01F001 tfr d,x
00FFE271 01F003 tfr d,u
00FFE273 030040 leax COLS,x ; x = index to source row
scrup1:
00FFE272 0EC801 ldd ,x++ ; move 2 characters
00FFE274 0EDC01 std ,u++
00FFE276 0313FF dey
00FFE278 026FF8 bne scrup1
00FFE27A 08601F lda #ROWS-1
00FFE27C 08D002 bsr BlankLine
00FFE27E 0350F6 puls d,x,y,u,pc
00FFE275 0EC801 ldd ,x++ ; move 2 characters
00FFE277 0EDC01 std ,u++
00FFE279 0313FF dey
00FFE27B 026FF8 bne scrup1
00FFE27D 08601F lda #ROWS-1
00FFE27F 08D002 bsr BlankLine
00FFE281 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
; Blank out a line on the display
836,21 → 855,21
;------------------------------------------------------------------------------
BlankLine:
00FFE280 034016 pshs d,x
00FFE282 034002 pshs a
00FFE284 08D014 bsr GetScreenLocation
00FFE286 01F001 tfr d,x
00FFE288 035002 puls a
00FFE28A 0C6040 ldb #COLS ; b = # chars to blank out from video controller
00FFE28C 03D mul ; d = screen index (row# * #cols)
00FFE28D 03080B leax d,x
00FFE28F 086020 lda #' '
00FFE291 0C6040 ldb #COLS ; b = # chars to blank out from video controller
00FFE283 034016 pshs d,x
00FFE285 034002 pshs a
00FFE287 08D014 bsr GetScreenLocation
00FFE289 01F001 tfr d,x
00FFE28B 035002 puls a
00FFE28D 0C6040 ldb #COLS ; b = # chars to blank out from video controller
00FFE28F 03D mul ; d = screen index (row# * #cols)
00FFE290 03080B leax d,x
00FFE292 086020 lda #' '
00FFE294 0C6040 ldb #COLS ; b = # chars to blank out from video controller
blnkln1:
00FFE293 0A7800 sta ,x+
00FFE295 05A decb
00FFE296 026FFB bne blnkln1
00FFE298 035096 puls d,x,pc
00FFE296 0A7800 sta ,x+
00FFE298 05A decb
00FFE299 026FFB bne blnkln1
00FFE29B 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Get the location of the screen memory. The location
863,16 → 882,16
;------------------------------------------------------------------------------
GetScreenLocation:
00FFE29A 0150B6FFFFFFFE0 lda COREID ; which core are we?
00FFE29F 0B1FFC010 cmpa IOFocusID ; do we have the IO focus
00FFE2A2 026008 bne gsl1 ; no, go pick virtual screen address
00FFE2A4 081020 cmpa #$20 ; CmodA709?
00FFE2A6 027004 beq gsl1
00FFE2A8 0CCE00000 ldd #TEXTSCR ; yes, we update the real screen
00FFE2AB 039 rts
00FFE29D 0150B6FFFFFFFE0 lda COREID ; which core are we?
00FFE2A2 0B1FFC010 cmpa IOFocusID ; do we have the IO focus
00FFE2A5 026008 bne gsl1 ; no, go pick virtual screen address
00FFE2A7 081020 cmpa #$20 ; CmodA709?
00FFE2A9 027004 beq gsl1
00FFE2AB 0CCE00000 ldd #TEXTSCR ; yes, we update the real screen
00FFE2AE 039 rts
gsl1:
00FFE2AC 0CC007800 ldd #$7800
00FFE2AF 039 rts
00FFE2AF 0CC007800 ldd #$7800
00FFE2B2 039 rts
;------------------------------------------------------------------------------
; HomeCursor
883,18 → 902,18
;------------------------------------------------------------------------------
HomeCursor:
00FFE2B0 034016 pshs d,x
00FFE2B2 00F110 clr CursorRow
00FFE2B4 00F111 clr CursorCol
00FFE2B6 0150F6FFFFFFFE0 ldb COREID
00FFE2BB 0F1FFC010 cmpb IOFocusID
00FFE2BE 02600A bne hc1
00FFE2C0 0C1020 cmpb #$20
00FFE2C2 027006 beq hc1
00FFE2C4 04F clra
00FFE2C5 0150B7FFFE07F22 sta TEXTREG+TEXT_CURPOS
00FFE2B3 034016 pshs d,x
00FFE2B5 00F110 clr CursorRow
00FFE2B7 00F111 clr CursorCol
00FFE2B9 0150F6FFFFFFFE0 ldb COREID
00FFE2BE 0F1FFC010 cmpb IOFocusID
00FFE2C1 02600A bne hc1
00FFE2C3 0C1020 cmpb #$20
00FFE2C5 027006 beq hc1
00FFE2C7 04F clra
00FFE2C8 0150B7FFFE07F22 sta TEXTREG+TEXT_CURPOS
hc1:
00FFE2CA 035096 puls d,x,pc
00FFE2CD 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Update the cursor position in the text controller based on the
905,22 → 924,22
;------------------------------------------------------------------------------
;
UpdateCursorPos:
00FFE2CC 034016 pshs d,x
00FFE2CE 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE2D3 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE2D6 026018 bne ucp1
00FFE2D8 0C1020 cmpb #$20 ; and not for CmodA709
00FFE2DA 027014 beq ucp1
00FFE2DC 096110 lda CursorRow
00FFE2DE 08403F anda #$3F ; limit of 63 rows
00FFE2E0 0150F6FFFE07F00 ldb TEXTREG+TEXT_COLS
00FFE2E5 03D mul
00FFE2E6 01F001 tfr d,x
00FFE2E8 0D6111 ldb CursorCol
00FFE2EA 03A abx
00FFE2EB 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
00FFE2CF 034016 pshs d,x
00FFE2D1 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE2D6 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE2D9 026018 bne ucp1
00FFE2DB 0C1020 cmpb #$20 ; and not for CmodA709
00FFE2DD 027014 beq ucp1
00FFE2DF 096110 lda CursorRow
00FFE2E1 08403F anda #$3F ; limit of 63 rows
00FFE2E3 0150F6FFFE07F00 ldb TEXTREG+TEXT_COLS
00FFE2E8 03D mul
00FFE2E9 01F001 tfr d,x
00FFE2EB 0D6111 ldb CursorCol
00FFE2ED 03A abx
00FFE2EE 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
ucp1:
00FFE2F0 035096 puls d,x,pc
00FFE2F3 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Calculate screen memory location from CursorRow,CursorCol.
933,24 → 952,24
;------------------------------------------------------------------------------
;
CalcScreenLoc:
00FFE2F2 034010 pshs x
00FFE2F4 096110 lda CursorRow
00FFE2F6 0C6040 ldb #COLS
00FFE2F8 03D mul
00FFE2F9 01F001 tfr d,x
00FFE2FB 0D6111 ldb CursorCol
00FFE2FD 03A abx
00FFE2FE 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE303 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE306 026009 bne csl1
00FFE308 0C1020 cmpb #$20
00FFE30A 027005 beq csl1
00FFE30C 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
00FFE2F5 034010 pshs x
00FFE2F7 096110 lda CursorRow
00FFE2F9 0C6040 ldb #COLS
00FFE2FB 03D mul
00FFE2FC 01F001 tfr d,x
00FFE2FE 0D6111 ldb CursorCol
00FFE300 03A abx
00FFE301 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE306 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE309 026009 bne csl1
00FFE30B 0C1020 cmpb #$20
00FFE30D 027005 beq csl1
00FFE30F 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
csl1:
00FFE311 08DF87 bsr GetScreenLocation
00FFE313 03080B leax d,x
00FFE315 01F010 tfr x,d
00FFE317 035090 puls x,pc
00FFE314 08DF87 bsr GetScreenLocation
00FFE316 03080B leax d,x
00FFE318 01F010 tfr x,d
00FFE31A 035090 puls x,pc
;------------------------------------------------------------------------------
; Display a character on the screen.
964,104 → 983,105
;------------------------------------------------------------------------------
;
DisplayChar:
00FFE319 01700096C lbsr SerialPutChar
00FFE31C 034016 pshs d,x
00FFE31E 0C100D cmpb #CR ; carriage return ?
00FFE320 026007 bne dccr
00FFE322 00F111 clr CursorCol ; just set cursor column to zero on a CR
00FFE324 08DFA6 bsr UpdateCursorPos
00FFE31C 01700097B lbsr SerialPutChar
ScreenDisplayChar:
00FFE31F 034016 pshs d,x
00FFE321 0C100D cmpb #CR ; carriage return ?
00FFE323 026007 bne dccr
00FFE325 00F111 clr CursorCol ; just set cursor column to zero on a CR
00FFE327 08DFA6 bsr UpdateCursorPos
dcx14:
00FFE326 01600008C lbra dcx4
00FFE329 01600008C lbra dcx4
dccr:
00FFE329 0C1091 cmpb #$91 ; cursor right ?
00FFE32B 02600D bne dcx6
00FFE32D 096111 lda CursorCol
00FFE32F 081040 cmpa #COLS
00FFE331 024003 bhs dcx7
00FFE333 04C inca
00FFE334 097111 sta CursorCol
00FFE32C 0C1091 cmpb #$91 ; cursor right ?
00FFE32E 02600D bne dcx6
00FFE330 096111 lda CursorCol
00FFE332 081040 cmpa #COLS
00FFE334 024003 bhs dcx7
00FFE336 04C inca
00FFE337 097111 sta CursorCol
dcx7:
00FFE336 08DF94 bsr UpdateCursorPos
00FFE338 035096 puls d,x,pc
00FFE339 08DF94 bsr UpdateCursorPos
00FFE33B 035096 puls d,x,pc
dcx6:
00FFE33A 0C1090 cmpb #$90 ; cursor up ?
00FFE33C 026009 bne dcx8
00FFE33E 096110 lda CursorRow
00FFE340 027FF4 beq dcx7
00FFE342 04A deca
00FFE343 097110 sta CursorRow
00FFE345 020FEF bra dcx7
00FFE33D 0C1090 cmpb #$90 ; cursor up ?
00FFE33F 026009 bne dcx8
00FFE341 096110 lda CursorRow
00FFE343 027FF4 beq dcx7
00FFE345 04A deca
00FFE346 097110 sta CursorRow
00FFE348 020FEF bra dcx7
dcx8:
00FFE347 0C1093 cmpb #$93 ; cursor left ?
00FFE349 026009 bne dcx9
00FFE34B 096111 lda CursorCol
00FFE34D 027FE7 beq dcx7
00FFE34F 04A deca
00FFE350 097111 sta CursorCol
00FFE352 020FE2 bra dcx7
00FFE34A 0C1093 cmpb #$93 ; cursor left ?
00FFE34C 026009 bne dcx9
00FFE34E 096111 lda CursorCol
00FFE350 027FE7 beq dcx7
00FFE352 04A deca
00FFE353 097111 sta CursorCol
00FFE355 020FE2 bra dcx7
dcx9:
00FFE354 0C1092 cmpb #$92 ; cursor down ?
00FFE356 02600B bne dcx10
00FFE358 096110 lda CursorRow
00FFE35A 081020 cmpa #ROWS
00FFE35C 027FD8 beq dcx7
00FFE35E 04C inca
00FFE35F 097110 sta CursorRow
00FFE361 020FD3 bra dcx7
00FFE357 0C1092 cmpb #$92 ; cursor down ?
00FFE359 02600B bne dcx10
00FFE35B 096110 lda CursorRow
00FFE35D 081020 cmpa #ROWS
00FFE35F 027FD8 beq dcx7
00FFE361 04C inca
00FFE362 097110 sta CursorRow
00FFE364 020FD3 bra dcx7
dcx10:
00FFE363 0C1094 cmpb #$94 ; cursor home ?
00FFE365 02600C bne dcx11
00FFE367 096111 lda CursorCol
00FFE369 027004 beq dcx12
00FFE36B 00F111 clr CursorCol
00FFE36D 020FC7 bra dcx7
00FFE366 0C1094 cmpb #$94 ; cursor home ?
00FFE368 02600C bne dcx11
00FFE36A 096111 lda CursorCol
00FFE36C 027004 beq dcx12
00FFE36E 00F111 clr CursorCol
00FFE370 020FC7 bra dcx7
dcx12:
00FFE36F 00F110 clr CursorRow
00FFE371 020FC3 bra dcx7
00FFE372 00F110 clr CursorRow
00FFE374 020FC3 bra dcx7
dcx11:
00FFE373 0C1099 cmpb #$99 ; delete ?
00FFE375 026008 bne dcx13
00FFE377 08DF79 bsr CalcScreenLoc
00FFE379 01F001 tfr d,x
00FFE37B 096111 lda CursorCol ; acc = cursor column
00FFE37D 020011 bra dcx5
00FFE376 0C1099 cmpb #$99 ; delete ?
00FFE378 026008 bne dcx13
00FFE37A 08DF79 bsr CalcScreenLoc
00FFE37C 01F001 tfr d,x
00FFE37E 096111 lda CursorCol ; acc = cursor column
00FFE380 020011 bra dcx5
dcx13
00FFE37F 0C1008 cmpb #CTRLH ; backspace ?
00FFE381 02601E bne dcx3
00FFE383 096111 lda CursorCol
00FFE385 02702E beq dcx4
00FFE387 04A deca
00FFE388 097111 sta CursorCol
00FFE38A 08DF66 bsr CalcScreenLoc
00FFE38C 01F001 tfr d,x
00FFE38E 096111 lda CursorCol
00FFE382 0C1008 cmpb #CTRLH ; backspace ?
00FFE384 02601E bne dcx3
00FFE386 096111 lda CursorCol
00FFE388 02702E beq dcx4
00FFE38A 04A deca
00FFE38B 097111 sta CursorCol
00FFE38D 08DF66 bsr CalcScreenLoc
00FFE38F 01F001 tfr d,x
00FFE391 096111 lda CursorCol
dcx5:
00FFE390 0E6001 ldb 1,x
00FFE392 0E7801 stb ,x++
00FFE394 04C inca
00FFE395 081040 cmpa #COLS
00FFE397 025FF7 blo dcx5
00FFE399 0C6020 ldb #' '
00FFE39B 0301FF dex
00FFE39D 0E7804 stb ,x
00FFE39F 020014 bra dcx4
00FFE393 0E6001 ldb 1,x
00FFE395 0E7801 stb ,x++
00FFE397 04C inca
00FFE398 081040 cmpa #COLS
00FFE39A 025FF7 blo dcx5
00FFE39C 0C6020 ldb #' '
00FFE39E 0301FF dex
00FFE3A0 0E7804 stb ,x
00FFE3A2 020014 bra dcx4
dcx3:
00FFE3A1 0C100A cmpb #LF ; linefeed ?
00FFE3A3 02700E beq dclf
00FFE3A5 034004 pshs b
00FFE3A7 08DF49 bsr CalcScreenLoc
00FFE3A9 01F001 tfr d,x
00FFE3AB 035004 puls b
00FFE3AD 0E7804 stb ,x
00FFE3A4 0C100A cmpb #LF ; linefeed ?
00FFE3A6 02700E beq dclf
00FFE3A8 034004 pshs b
00FFE3AA 08DF49 bsr CalcScreenLoc
00FFE3AC 01F001 tfr d,x
00FFE3AE 035004 puls b
00FFE3B0 0E7804 stb ,x
; ToDo character color
; lda CharColor
; sta $2000,x
00FFE3AF 08D006 bsr IncCursorPos
00FFE3B1 020002 bra dcx4
00FFE3B2 08D006 bsr IncCursorPos
00FFE3B4 020002 bra dcx4
dclf:
00FFE3B3 08D011 bsr IncCursorRow
00FFE3B6 08D011 bsr IncCursorRow
dcx4:
00FFE3B5 035096 puls d,x,pc
00FFE3B8 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Increment the cursor position, scroll the screen if needed.
1071,29 → 1091,29
;------------------------------------------------------------------------------
IncCursorPos:
00FFE3B7 034016 pshs d,x
00FFE3B9 096111 lda CursorCol
00FFE3BB 04C inca
00FFE3BC 097111 sta CursorCol
00FFE3BE 081040 cmpa #COLS
00FFE3C0 025014 blo icc1
00FFE3C2 00F111 clr CursorCol ; column = 0
00FFE3C4 020002 bra icr1
00FFE3BA 034016 pshs d,x
00FFE3BC 096111 lda CursorCol
00FFE3BE 04C inca
00FFE3BF 097111 sta CursorCol
00FFE3C1 081040 cmpa #COLS
00FFE3C3 025014 blo icc1
00FFE3C5 00F111 clr CursorCol ; column = 0
00FFE3C7 020002 bra icr1
IncCursorRow:
00FFE3C6 034016 pshs d,x
00FFE3C9 034016 pshs d,x
icr1:
00FFE3C8 096110 lda CursorRow
00FFE3CA 04C inca
00FFE3CB 097110 sta CursorRow
00FFE3CD 081020 cmpa #ROWS
00FFE3CF 025005 blo icc1
00FFE3D1 04A deca ; backup the cursor row, we are scrolling up
00FFE3D2 097110 sta CursorRow
00FFE3D4 08DE8F bsr ScrollUp
00FFE3CB 096110 lda CursorRow
00FFE3CD 04C inca
00FFE3CE 097110 sta CursorRow
00FFE3D0 081020 cmpa #ROWS
00FFE3D2 025005 blo icc1
00FFE3D4 04A deca ; backup the cursor row, we are scrolling up
00FFE3D5 097110 sta CursorRow
00FFE3D7 08DE8F bsr ScrollUp
icc1:
00FFE3D6 08DEF4 bsr UpdateCursorPos
00FFE3D9 08DEF4 bsr UpdateCursorPos
icc2:
00FFE3D8 035096 puls d,x,pc
00FFE3DB 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Display a string on the screen.
1105,102 → 1125,102
;------------------------------------------------------------------------------
;
DisplayString:
00FFE3DA 034016 pshs d,x
00FFE3DC 01F001 tfr d,x
00FFE3DE 0150B6FFFFFFFE0 lda COREID
00FFE3E3 081020 cmpa #$20
00FFE3E5 027005 beq dspj1B
00FFE3DD 034016 pshs d,x
00FFE3DF 01F001 tfr d,x
00FFE3E1 0150B6FFFFFFFE0 lda COREID
00FFE3E6 081020 cmpa #$20
00FFE3E8 027005 beq dspj1B
dspj2: ; lock semaphore for access
00FFE3E7 0B6EF0001 lda OUTSEMA+1
00FFE3EA 027FFB beq dspj2
00FFE3EA 0B6EF0001 lda OUTSEMA+1
00FFE3ED 027FFB beq dspj2
dspj1B:
00FFE3EC 0E6800 ldb ,x+ ; move string char into acc
00FFE3EE 027005 beq dsretB ; is it end of string ?
00FFE3F0 017000AEE lbsr OUTCH ; display character
00FFE3F3 020FF7 bra dspj1B
00FFE3EF 0E6800 ldb ,x+ ; move string char into acc
00FFE3F1 027005 beq dsretB ; is it end of string ?
00FFE3F3 017000DD3 lbsr OUTCH ; display character
00FFE3F6 020FF7 bra dspj1B
dsretB:
00FFE3F5 07FEF0001 clr OUTSEMA+1 ; unlock semaphore
00FFE3F8 035096 puls d,x,pc
00FFE3F8 07FEF0001 clr OUTSEMA+1 ; unlock semaphore
00FFE3FB 035096 puls d,x,pc
DisplayStringCRLF:
00FFE3FA 034006 pshs d
00FFE3FC 08DFDC bsr DisplayString
00FFE3FE 0C600D ldb #CR
00FFE400 017000ADE lbsr OUTCH
00FFE403 0C600A ldb #LF
00FFE405 017000AD9 lbsr OUTCH
00FFE408 035086 puls d,pc
00FFE3FD 034006 pshs d
00FFE3FF 08DFDC bsr DisplayString
00FFE401 0C600D ldb #CR
00FFE403 017000DC3 lbsr OUTCH
00FFE406 0C600A ldb #LF
00FFE408 017000DBE lbsr OUTCH
00FFE40B 035086 puls d,pc
;
; PRINT CR, LF, STRING
;
PSTRNG
00FFE40A 08D002 BSR PCRLF
00FFE40C 02000D BRA PDATA
00FFE40D 08D002 BSR PCRLF
00FFE40F 02000D BRA PDATA
PCRLF
00FFE40E 034010 PSHS X
00FFE410 08EFFE422 LDX #CRLFST
00FFE413 08D006 BSR PDATA
00FFE415 035010 PULS X
00FFE417 039 RTS
00FFE411 034010 PSHS X
00FFE413 08EFFE425 LDX #CRLFST
00FFE416 08D006 BSR PDATA
00FFE418 035010 PULS X
00FFE41A 039 RTS
PRINT
00FFE418 0BDFFEEE1 JSR OUTCH
00FFE41B 0BDFFF1C9 JSR OUTCH
PDATA
00FFE41B 0E6800 LDB ,X+
00FFE41D 0C1004 CMPB #$04
00FFE41F 026FF7 BNE PRINT
00FFE421 039 RTS
00FFE41E 0E6800 LDB ,X+
00FFE420 0C1004 CMPB #$04
00FFE422 026FF7 BNE PRINT
00FFE424 039 RTS
CRLFST
00FFE422 00D00A004 fcb CR,LF,4
00FFE425 00D00A004 fcb CR,LF,4
DispDWordAsHex:
00FFE425 08D007 bsr DispWordAsHex
00FFE427 01E001 exg d,x
00FFE429 08D003 bsr DispWordAsHex
00FFE42B 01E001 exg d,x
00FFE42D 039 rts
00FFE428 08D007 bsr DispWordAsHex
00FFE42A 01E001 exg d,x
00FFE42C 08D003 bsr DispWordAsHex
00FFE42E 01E001 exg d,x
00FFE430 039 rts
DispWordAsHex:
00FFE42E 01E089 exg a,b
00FFE430 08D005 bsr DispByteAsHex
00FFE432 01E089 exg a,b
00FFE434 08D001 bsr DispByteAsHex
00FFE436 039 rts
00FFE431 01E089 exg a,b
00FFE433 08D005 bsr DispByteAsHex
00FFE435 01E089 exg a,b
00FFE437 08D001 bsr DispByteAsHex
00FFE439 039 rts
DispByteAsHex:
00FFE437 034004 pshs b
00FFE439 054 lsrb
00FFE43A 054 lsrb
00FFE43B 054 lsrb
00FFE43A 034004 pshs b
00FFE43C 054 lsrb
00FFE43D 054 lsrb
00FFE43E 054 lsrb
00FFE43F 054 lsrb
00FFE440 054 lsrb
00FFE441 08D00C bsr DispNyb
00FFE443 035004 puls b
00FFE445 034004 pshs b
00FFE447 054 lsrb
00FFE448 054 lsrb
00FFE449 054 lsrb
00FFE441 054 lsrb
00FFE442 054 lsrb
00FFE443 054 lsrb
00FFE444 08D00C bsr DispNyb
00FFE446 035004 puls b
00FFE448 034004 pshs b
00FFE44A 054 lsrb
00FFE44B 08D002 bsr DispNyb
00FFE44D 035004 puls b
00FFE44B 054 lsrb
00FFE44C 054 lsrb
00FFE44D 054 lsrb
00FFE44E 08D002 bsr DispNyb
00FFE450 035004 puls b
DispNyb
00FFE44F 034004 pshs b
00FFE451 0C400F andb #$0F
00FFE453 0C100A cmpb #10
00FFE455 025007 blo DispNyb1
00FFE457 0CB037 addb #'A'-10
00FFE459 017000A85 lbsr OUTCH
00FFE45C 035084 puls b,pc
00FFE452 034004 pshs b
00FFE454 0C400F andb #$0F
00FFE456 0C100A cmpb #10
00FFE458 025007 blo DispNyb1
00FFE45A 0CB037 addb #'A'-10
00FFE45C 017000D6A lbsr OUTCH
00FFE45F 035084 puls b,pc
DispNyb1
00FFE45E 0CB030 addb #'0'
00FFE460 017000A7E lbsr OUTCH
00FFE463 035084 puls b,pc
00FFE461 0CB030 addb #'0'
00FFE463 017000D63 lbsr OUTCH
00FFE466 035084 puls b,pc
;==============================================================================
; Timer
1232,34 → 1252,50
; ============================================================================
;
TimerInit:
00FFE465 0CC061A80 ldd #$61A80 ; compare to 400000 (100 Hz assuming 40MHz clock)
00FFE468 0150F7FFFE60014 stb VIA+VIA_T3CMPL
00FFE46D 0150B7FFFE60015 sta VIA+VIA_T3CMPH
00FFE472 01507FFFFE60012 clr VIA+VIA_T3LL
00FFE477 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE47C 0150B6FFFE6000B lda VIA+VIA_ACR ; set continuous mode for timer
00FFE481 08A100 ora #$100
00FFE483 0150B7FFFE6000B sta VIA+VIA_ACR ; enable timer #3 interrupts
00FFE488 086810 lda #$810
00FFE48A 0150B7FFFE6000E sta VIA+VIA_IER
00FFE48F 039 rts
00FFE468 0CC061A80 ldd #$61A80 ; compare to 400000 (100 Hz assuming 40MHz clock)
00FFE46B 0150F7FFFE60014 stb VIA+VIA_T3CMPL
00FFE470 0150B7FFFE60015 sta VIA+VIA_T3CMPH
00FFE475 01507FFFFE60012 clr VIA+VIA_T3LL
00FFE47A 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE47F 0150B6FFFE6000B lda VIA+VIA_ACR ; set continuous mode for timer
00FFE484 08A100 ora #$100
00FFE486 0150B7FFFE6000B sta VIA+VIA_ACR
00FFE48B 086880 lda #$880 ; enable timer #3 interrupts
00FFE48D 0150B7FFFE6000E sta VIA+VIA_IER
00FFE492 039 rts
TimerIRQ:
; Reset the edge sense circuit in the PIC
00FFE490 08601F lda #31 ; Timer is IRQ #31
00FFE492 0B7FFC011 sta IrqSource ; stuff a byte indicating the IRQ source for PEEK()
00FFE493 08601F lda #31 ; Timer is IRQ #31
00FFE495 0150B7FFFE3F010 sta PIC+16 ; register 16 is edge sense reset reg
00FFE49A 0150B6FFFE6000D lda VIA+VIA_IFR
00FFE49F 02A011 bpl notTimerIRQ
00FFE4A1 085080 bita #$80 ; timer3 irq is bit 7
00FFE4A3 02700D beq notTimerIRQ
00FFE4A5 01507FFFFE60012 clr VIA+VIA_T3LL
00FFE4AA 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE4AF 07CE00037 inc $E00037 ; update timer IRQ screen flag
00FFE49A 0150B6FFFE3F0FF lda PIC+$FF ; Timer active interrupt flag
00FFE49F 027041 beq notTimerIRQ
00FFE4A1 01507FFFFE3F0FF clr PIC+$FF ; clear the flag
00FFE4A6 08601F lda #31 ; Timer is IRQ #31
00FFE4A8 0B7FFC011 sta IrqSource ; stuff a byte indicating the IRQ source for PEEK()
00FFE4AB 01507FFFFE60012 clr VIA+VIA_T3LL ; should clear the interrupt
00FFE4B0 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE4B5 08601F lda #31 ; Timer is IRQ #31
00FFE4B7 0150B7FFFE3F010 sta PIC+16 ; register 16 is edge sense reset reg
00FFE4BC 01507FFFFE3F0FF clr PIC+$FF ; clear the flag
00FFE4C1 07CE0003F inc $E0003F ; update timer IRQ screen flag
00FFE4C4 0FCFFC016 ldd milliseconds+2
00FFE4C7 0C300000A addd #10
00FFE4CA 0FDFFC016 std milliseconds+2
00FFE4CD 0FCFFC014 ldd milliseconds
00FFE4D0 0C9000 adcb #0
00FFE4D2 0F7FFC015 stb milliseconds+1
00FFE4D5 089000 adca #0
00FFE4D7 0B7FFC014 sta milliseconds
; Update XModem timer, we just always do it rather than testing if XModem
; is active. The increment is set to give approximately 3s before the MSB
; gets set.
00FFE4DA 0F6FFC020 ldb xm_timer
00FFE4DD 0CB004 addb #4
00FFE4DF 0F7FFC020 stb xm_timer
notTimerIRQ:
00FFE4B2 039 rts
00FFE4E2 039 rts
; ============================================================================
; __
1321,11 → 1357,11
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_init:
00FFE4B3 034004 pshs b
00FFE4B5 0C6004 ldb #4 ; setup prescale for 400kHz clock
00FFE4B7 0E7804 stb I2C_PREL,x
00FFE4B9 06F001 clr I2C_PREH,x
00FFE4BB 035084 puls b,pc
00FFE4E3 034004 pshs b
00FFE4E5 0C6004 ldb #4 ; setup prescale for 400kHz clock
00FFE4E7 0E7804 stb I2C_PREL,x
00FFE4E9 06F001 clr I2C_PREH,x
00FFE4EB 035084 puls b,pc
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; Wait for I2C transfer to complete
1335,12 → 1371,12
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_wait_tip:
00FFE4BD 034004 pshs b
00FFE4ED 034004 pshs b
i2cw1:
00FFE4BF 0E6004 ldb I2C_STAT,x ; would use lvb, but lb is okay since its the I/O area
00FFE4C1 0C5001 bitb #1 ; wait for tip to clear
00FFE4C3 026FFA bne i2cw1
00FFE4C5 035084 puls b,pc
00FFE4EF 0E6004 ldb I2C_STAT,x ; would use lvb, but lb is okay since its the I/O area
00FFE4F1 0C5001 bitb #1 ; wait for tip to clear
00FFE4F3 026FFA bne i2cw1
00FFE4F5 035084 puls b,pc
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; Write command to i2c
1352,11 → 1388,11
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_wr_cmd:
00FFE4C7 0E7003 stb I2C_TXR,x
00FFE4C9 0A7004 sta I2C_CMD,x
00FFE4CB 08DFF0 bsr i2c_wait_tip
00FFE4CD 0E6004 ldb I2C_STAT,x
00FFE4CF 039 rts
00FFE4F7 0E7003 stb I2C_TXR,x
00FFE4F9 0A7004 sta I2C_CMD,x
00FFE4FB 08DFF0 bsr i2c_wait_tip
00FFE4FD 0E6004 ldb I2C_STAT,x
00FFE4FF 039 rts
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; Parameters
1367,30 → 1403,30
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_xmit1:
00FFE4D0 034006 pshs d ; save data value
00FFE4D2 034006 pshs d ; and save it again
00FFE4D4 0C6001 ldb #1
00FFE4D6 0E7002 stb I2C_CTRL,x ; enable the core
00FFE4D8 0C6076 ldb #$76 ; set slave address = %0111011
00FFE4DA 086090 lda #$90 ; set STA, WR
00FFE4DC 08DFE9 bsr i2c_wr_cmd
00FFE4DE 08D00A bsr i2c_wait_rx_nack
00FFE4E0 035006 puls d ; get back data value
00FFE4E2 086050 lda #$50 ; set STO, WR
00FFE4E4 08DFE1 bsr i2c_wr_cmd
00FFE4E6 08D002 bsr i2c_wait_rx_nack
00FFE4E8 035086 puls d,pc
00FFE500 034006 pshs d ; save data value
00FFE502 034006 pshs d ; and save it again
00FFE504 0C6001 ldb #1
00FFE506 0E7002 stb I2C_CTRL,x ; enable the core
00FFE508 0C6076 ldb #$76 ; set slave address = %0111011
00FFE50A 086090 lda #$90 ; set STA, WR
00FFE50C 08DFE9 bsr i2c_wr_cmd
00FFE50E 08D00A bsr i2c_wait_rx_nack
00FFE510 035006 puls d ; get back data value
00FFE512 086050 lda #$50 ; set STO, WR
00FFE514 08DFE1 bsr i2c_wr_cmd
00FFE516 08D002 bsr i2c_wait_rx_nack
00FFE518 035086 puls d,pc
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_wait_rx_nack:
00FFE4EA 034004 pshs b ; save off accb
00FFE51A 034004 pshs b ; save off accb
i2cwr1:
00FFE4EC 0E6004 ldb I2C_STAT,x ; wait for RXack = 0
00FFE4EE 0C5080 bitb #$80 ; test for nack
00FFE4F0 026FFA bne i2cwr1
00FFE4F2 035084 puls b,pc
00FFE51C 0E6004 ldb I2C_STAT,x ; wait for RXack = 0
00FFE51E 0C5080 bitb #$80 ; test for nack
00FFE520 026FFA bne i2cwr1
00FFE522 035084 puls b,pc
; ============================================================================
; __
1445,50 → 1481,50
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
rtc_read:
00FFE4F4 08EE30500 ldx #RTC
00FFE4F7 18E007FC0 ldy #RTCBuf
00FFE4FA 0C6080 ldb #$80
00FFE4FC 0E7002 stb I2C_CTRL,x ; enable I2C
00FFE4FE 0CC0900DE ldd #$900DE ; read address, write op, STA + wr bit
00FFE501 08DFC4 bsr i2c_wr_cmd
00FFE503 0C5080 bitb #$80
00FFE505 02603C bne rtc_rxerr
00FFE507 0CC010000 ldd #$10000 ; address zero, wr bit
00FFE50A 08DFBB bsr i2c_wr_cmd
00FFE50C 0C5080 bitb #$80
00FFE50E 026033 bne rtc_rxerr
00FFE510 0CC0900DF ldd #$900DF ; read address, read op, STA + wr bit
00FFE513 08DFB2 bsr i2c_wr_cmd
00FFE515 0C5080 bitb #$80
00FFE517 02602A bne rtc_rxerr
00FFE524 08EE30500 ldx #RTC
00FFE527 18E007FC0 ldy #RTCBuf
00FFE52A 0C6080 ldb #$80
00FFE52C 0E7002 stb I2C_CTRL,x ; enable I2C
00FFE52E 0CC0900DE ldd #$900DE ; read address, write op, STA + wr bit
00FFE531 08DFC4 bsr i2c_wr_cmd
00FFE533 0C5080 bitb #$80
00FFE535 02603C bne rtc_rxerr
00FFE537 0CC010000 ldd #$10000 ; address zero, wr bit
00FFE53A 08DFBB bsr i2c_wr_cmd
00FFE53C 0C5080 bitb #$80
00FFE53E 026033 bne rtc_rxerr
00FFE540 0CC0900DF ldd #$900DF ; read address, read op, STA + wr bit
00FFE543 08DFB2 bsr i2c_wr_cmd
00FFE545 0C5080 bitb #$80
00FFE547 02602A bne rtc_rxerr
00FFE519 05F clrb
00FFE549 05F clrb
rtcr0001:
00FFE51A 086020 lda #$20
00FFE51C 0A7004 sta I2C_CMD,x ; rd bit
00FFE51E 08DF9D bsr i2c_wait_tip
00FFE520 08DFC8 bsr i2c_wait_rx_nack
00FFE522 0A6004 lda I2C_STAT,x
00FFE524 085080 bita #$80
00FFE526 02601B bne rtc_rxerr
00FFE528 0A6003 lda I2C_RXR,x
00FFE52A 0A7A07 sta b,y
00FFE52C 05C incb
00FFE52D 0C105F cmpb #$5F
00FFE52F 025FE9 blo rtcr0001
00FFE531 086068 lda #$68
00FFE533 0A7004 sta I2C_CMD,x ; STO, rd bit + nack
00FFE535 08DF86 bsr i2c_wait_tip
00FFE537 0A6004 lda I2C_STAT,x
00FFE539 085080 bita #$80
00FFE53B 026006 bne rtc_rxerr
00FFE53D 0A6003 lda I2C_RXR,x
00FFE53F 0A7A07 sta b,y
00FFE541 04F05F clrd ; return 0
00FFE54A 086020 lda #$20
00FFE54C 0A7004 sta I2C_CMD,x ; rd bit
00FFE54E 08DF9D bsr i2c_wait_tip
00FFE550 08DFC8 bsr i2c_wait_rx_nack
00FFE552 0A6004 lda I2C_STAT,x
00FFE554 085080 bita #$80
00FFE556 02601B bne rtc_rxerr
00FFE558 0A6003 lda I2C_RXR,x
00FFE55A 0A7A07 sta b,y
00FFE55C 05C incb
00FFE55D 0C105F cmpb #$5F
00FFE55F 025FE9 blo rtcr0001
00FFE561 086068 lda #$68
00FFE563 0A7004 sta I2C_CMD,x ; STO, rd bit + nack
00FFE565 08DF86 bsr i2c_wait_tip
00FFE567 0A6004 lda I2C_STAT,x
00FFE569 085080 bita #$80
00FFE56B 026006 bne rtc_rxerr
00FFE56D 0A6003 lda I2C_RXR,x
00FFE56F 0A7A07 sta b,y
00FFE571 04F05F clrd ; return 0
rtc_rxerr:
00FFE543 06F002 clr I2C_CTRL,x ; disable I2C and return status
00FFE545 04F clra
00FFE546 039 rts
00FFE573 06F002 clr I2C_CTRL,x ; disable I2C and return status
00FFE575 04F clra
00FFE576 039 rts
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; Write the real-time-clock chip.
1503,40 → 1539,40
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
rtc_write:
00FFE547 08EE30500 ldx #RTC
00FFE54A 18E007FC0 ldy #RTCBuf
00FFE577 08EE30500 ldx #RTC
00FFE57A 18E007FC0 ldy #RTCBuf
00FFE54D 0C6080 ldb #$80
00FFE54F 0E7002 stb I2C_CTRL,x ; enable I2C
00FFE551 0CC0900DE ldd #$900DE ; read address, write op, STA + wr bit
00FFE554 08DF71 bsr i2c_wr_cmd
00FFE556 0C5080 bitb #$80
00FFE558 026FE9 bne rtc_rxerr
00FFE55A 0CC010000 ldd #$10000 ; address zero, wr bit
00FFE55D 08DF68 bsr i2c_wr_cmd
00FFE55F 0C5080 bitb #$80
00FFE561 026FE0 bne rtc_rxerr
00FFE57D 0C6080 ldb #$80
00FFE57F 0E7002 stb I2C_CTRL,x ; enable I2C
00FFE581 0CC0900DE ldd #$900DE ; read address, write op, STA + wr bit
00FFE584 08DF71 bsr i2c_wr_cmd
00FFE586 0C5080 bitb #$80
00FFE588 026FE9 bne rtc_rxerr
00FFE58A 0CC010000 ldd #$10000 ; address zero, wr bit
00FFE58D 08DF68 bsr i2c_wr_cmd
00FFE58F 0C5080 bitb #$80
00FFE591 026FE0 bne rtc_rxerr
00FFE563 0C6000 ldb #0
00FFE593 0C6000 ldb #0
rtcw0001:
00FFE565 034004 pshs b
00FFE567 0E6A05 ldb b,y
00FFE569 086010 lda #$10
00FFE56B 08DF5A bsr i2c_wr_cmd
00FFE56D 0C5080 bitb #$80
00FFE56F 035004 puls b
00FFE571 026FD0 bne rtc_rxerr
00FFE573 05C incb
00FFE574 0C105F cmpb #$5F
00FFE576 025FED blo rtcw0001
00FFE578 0E6A05 ldb b,y
00FFE57A 086050 lda #$50 ; STO, wr bit
00FFE57C 08DF49 bsr i2c_wr_cmd
00FFE57E 0C5080 bitb #$80
00FFE580 026FC1 bne rtc_rxerr
00FFE582 04F05F clrd ; return 0
00FFE584 06F002 clr I2C_CTRL,x ; disable I2C and return status
00FFE586 039 rts
00FFE595 034004 pshs b
00FFE597 0E6A05 ldb b,y
00FFE599 086010 lda #$10
00FFE59B 08DF5A bsr i2c_wr_cmd
00FFE59D 0C5080 bitb #$80
00FFE59F 035004 puls b
00FFE5A1 026FD0 bne rtc_rxerr
00FFE5A3 05C incb
00FFE5A4 0C105F cmpb #$5F
00FFE5A6 025FED blo rtcw0001
00FFE5A8 0E6A05 ldb b,y
00FFE5AA 086050 lda #$50 ; STO, wr bit
00FFE5AC 08DF49 bsr i2c_wr_cmd
00FFE5AE 0C5080 bitb #$80
00FFE5B0 026FC1 bne rtc_rxerr
00FFE5B2 04F05F clrd ; return 0
00FFE5B4 06F002 clr I2C_CTRL,x ; disable I2C and return status
00FFE5B6 039 rts
;==============================================================================
; Keyboard I/O
2042,7 → 2078,7
00FFEA04 026FC3 bne kbdi0002
.keybdErr:
00FFEA06 0CCFFEA2E ldd #msgBadKeybd
00FFEA09 017FFF9EE lbsr DisplayStringCRLF
00FFEA09 017FFF9F1 lbsr DisplayStringCRLF
*** warning 1: Long branch within short branch range could be optimized
00FFEA0C 020014 bra ledxit
kbdi0004:
2432,27 → 2468,32
; none
;------------------------------------------------------------------------------
setdp $FFC
InitSerial:
SerialInit:
00FFEBEF 04F clra
00FFEBF0 05F clrb
00FFEBF1 0DD130 std SerHeadRcv-1
00FFEBF3 0DD132 std SerTailRcv-1
00FFEBF5 0DD135 std SerHeadXmit-1
00FFEBF7 0DD137 std SerTailXmit-1
00FFEBF9 00F139 clr SerRcvXon
00FFEBFB 00F140 clr SerRcvXoff
00FFEBFD 0150B6FFFFFFFE0 lda COREID
00FFEBEF 034008 pshs dpr
00FFEBF1 086FFC lda #$FFC
00FFEBF3 01F08B tfr a,dpr
00FFEBF5 04F clra
00FFEBF6 05F clrb
00FFEBF7 00F015 clr SerHeadRcv
00FFEBF9 00F016 clr SerTailRcv
00FFEBFB 00F017 clr SerHeadXmit
00FFEBFD 00F018 clr SerTailXmit
00FFEBFF 00F019 clr SerRcvXon
00FFEC01 00F01A clr SerRcvXoff
00FFEC03 0150B6FFFFFFFE0 lda COREID
sini1:
00FFEC02 0B1FFC010 cmpa IOFocusID
00FFEC05 026FFB bne sini1
00FFEC07 0C6009 ldb #$09 ; dtr,rts active, rxint enabled, no parity
00FFEC09 0150F7FFFE30102 stb ACIA+ACIA_CMD
00FFEC0E 0C601E ldb #$1E ; baud 9600, 1 stop bit, 8 bit, internal baud gen
00FFEC10 0150F7FFFE30103 stb ACIA+ACIA_CTRL
00FFEC15 0C60A6 ldb #$0A6 ; diable fifos, reset fifos
00FFEC17 0150F7FFFE3010B stb ACIA+ACIA_CTRL2
00FFEC1C 039 rts
00FFEC08 091010 cmpa IOFocusID
00FFEC0A 026FFC bne sini1
00FFEC0C 0C600B ldb #$0B ; dtr,rts active, rxint enabled (bit 1=0), no parity
00FFEC0E 0150F7FFFE30102 stb ACIA+ACIA_CMD
00FFEC13 0C601E ldb #$1E ; baud 9600, 1 stop bit, 8 bit, internal baud gen
00FFEC15 0150F7FFFE30103 stb ACIA+ACIA_CTRL
00FFEC1A 0C60AC ldb #$0AC ; disable fifos (bit zero, one), reset fifos
00FFEC1C 0150F7FFFE3010B stb ACIA+ACIA_CTRL2
00FFEC21 035088 puls dpr,pc
;------------------------------------------------------------------------------
; SerialGetChar
2462,7 → 2503,7
; XON.
;
; Stack Space:
; 2 words
; 3 words
; Parameters:
; none
; Modifies:
2472,32 → 2513,32
;------------------------------------------------------------------------------
SerialGetChar:
00FFEC1D 034030 pshs x,y
00FFEC1F 18E000000 ldy #0
00FFEC22 01A010 sei ; disable interrupts
00FFEC24 08D082 bsr SerialRcvCount ; check number of chars in receive buffer
00FFEC26 0C1008 cmpb #8 ; less than 8?
00FFEC28 02200C bhi sgc2
00FFEC2A 0D6139 ldb SerRcvXon ; skip sending XON if already sent
00FFEC2C 026008 bne sgc2 ; XON already sent?
00FFEC2E 0C6011 ldb #XON ; if <8 send an XON
00FFEC30 00F140 clr SerRcvXoff ; clear XOFF status
00FFEC32 0D7139 stb SerRcvXon ; flag so we don't send it multiple times
00FFEC34 08D052 bsr SerialPutChar
00FFEC23 034039 pshs ccr,x,y,dpr
00FFEC25 086FFC lda #$FFC
00FFEC27 01F08B tfr a,dpr
00FFEC29 01A010 sei ; disable interrupts
00FFEC2B 08D090 bsr SerialRcvCount ; check number of chars in receive buffer
00FFEC2D 0C1008 cmpb #8 ; less than 8?
00FFEC2F 02200C bhi sgc2
00FFEC31 0D6019 ldb SerRcvXon ; skip sending XON if already sent
00FFEC33 026008 bne sgc2 ; XON already sent?
00FFEC35 0C6011 ldb #XON ; if <8 send an XON
00FFEC37 00F01A clr SerRcvXoff ; clear XOFF status
00FFEC39 0D7019 stb SerRcvXon ; flag so we don't send it multiple times
00FFEC3B 08D05D bsr SerialPutChar
sgc2:
00FFEC36 0D6131 ldb SerHeadRcv ; check if anything is in buffer
00FFEC38 0D1133 cmpb SerTailRcv
00FFEC3A 02700A beq sgcNoChars ; no?
00FFEC3C 08EBFF000 ldx #SerRcvBuf
00FFEC3F 04F clra
00FFEC40 0E6835 ldb b,x ; get byte from buffer
00FFEC42 00C131 inc SerHeadRcv ; 4k wrap around
00FFEC44 020003 bra sgcXit
00FFEC3D 0D6015 ldb SerHeadRcv ; check if anything is in buffer
00FFEC3F 0D1016 cmpb SerTailRcv
00FFEC41 02700D beq sgcNoChars ; no?
00FFEC43 03080FFFB000 leax SerRcvBuf ; x = buffer address
00FFEC47 04F clra
00FFEC48 0E680FFFB000 ldb b,x ; get byte from buffer
00FFEC4C 00C015 inc SerHeadRcv ; 4k wrap around
00FFEC4E 020003 bra sgcXit
sgcNoChars:
00FFEC46 0CCFFFFFF ldd #-1
00FFEC50 0CCFFFFFF ldd #-1
sgcXit:
00FFEC49 01C0EF cli
00FFEC4B 0350B0 puls x,y,pc
00FFEC53 0350B9 puls ccr,x,y,dpr,pc
;------------------------------------------------------------------------------
; SerialPeekChar
2507,7 → 2548,7
; to send an XON here.
;
; Stack Space:
; 0 words
; 2 words
; Parameters:
; none
; Modifies:
2517,19 → 2558,21
;------------------------------------------------------------------------------
SerialPeekChar:
00FFEC4D 034011 pshs x,ccr
00FFEC4F 01A010 sei
00FFEC51 0D6131 ldb SerHeadRcv ; check if anything is in buffer
00FFEC53 0D1133 cmpb SerTailRcv
00FFEC55 027008 beq spcNoChars ; no?
00FFEC57 08EBFF000 ldx #SerRcvBuf
00FFEC5A 04F clra
00FFEC5B 0E6815 ldb b,x ; get byte from buffer
00FFEC5D 020003 bra spcXit
00FFEC55 034019 pshs x,ccr,dpr
00FFEC57 086FFC lda #$FFC
00FFEC59 01F08B tfr a,dpr
00FFEC5B 01A010 sei
00FFEC5D 0D6015 ldb SerHeadRcv ; check if anything is in buffer
00FFEC5F 0D1016 cmpb SerTailRcv
00FFEC61 02700B beq spcNoChars ; no?
00FFEC63 03080FFFB000 leax SerRcvBuf
00FFEC67 04F clra
00FFEC68 0E680FFFB000 ldb b,x ; get byte from buffer
00FFEC6C 020003 bra spcXit
spcNoChars:
00FFEC5F 0CCFFFFFF ldd #-1
00FFEC6E 0CCFFFFFF ldd #-1
spcXit:
00FFEC62 035091 puls x,ccr,pc
00FFEC71 035099 puls x,ccr,dpr,pc
;------------------------------------------------------------------------------
; SerialPeekChar
2547,22 → 2590,23
;------------------------------------------------------------------------------
SerialPeekCharDirect:
00FFEC64 0150B6FFFFFFFE0 lda COREID ; Ensure we have the IO Focus
00FFEC69 0B1FFC010 cmpa IOFocusID
00FFEC6C 026014 bne spcd0001
00FFEC73 034009 pshs ccr,dpr
00FFEC75 086FFC lda #$FFC
00FFEC77 01F08B tfr a,dpr
00FFEC79 0150B6FFFFFFFE0 lda COREID ; Ensure we have the IO Focus
00FFEC7E 091010 cmpa IOFocusID
00FFEC80 026013 bne spcd0001
; Disallow interrupts between status read and rx read.
00FFEC6E 01A010 sei
00FFEC70 0150F6FFFE30101 ldb ACIA+ACIA_STAT
00FFEC75 0C5008 bitb #8 ; look for Rx not empty
00FFEC77 027009 beq spcd0001
00FFEC79 04F clra
00FFEC7A 0150F6FFFE30100 ldb ACIA+ACIA_RX
00FFEC7F 01C0EF cli
00FFEC81 039 rts
00FFEC82 01A010 sei
00FFEC84 0150F6FFFE30101 ldb ACIA+ACIA_STAT
00FFEC89 0C5008 bitb #8 ; look for Rx not empty
00FFEC8B 027008 beq spcd0001
00FFEC8D 04F clra
00FFEC8E 0150F6FFFE30100 ldb ACIA+ACIA_RX
00FFEC93 035089 puls ccr,dpr,pc
spcd0001:
00FFEC82 0CCFFFFFF ldd #-1
00FFEC85 01C0EF cli
00FFEC87 039 rts
00FFEC95 0CCFFFFFF ldd #-1
00FFEC98 035089 puls ccr,dpr,pc
;------------------------------------------------------------------------------
; SerialPutChar
2578,40 → 2622,43
;------------------------------------------------------------------------------
SerialPutChar:
00FFEC88 034003 pshs a,ccr
00FFEC9A 03400B pshs a,ccr,dpr
00FFEC9C 086FFC lda #$FFC
00FFEC9E 01F08B tfr a,dpr
spc0001:
00FFEC8A 0150B6FFFFFFFE0 lda COREID ; Ensure we have the IO Focus
00FFEC8F 0B1FFC010 cmpa IOFocusID
00FFEC92 026FF6 bne spc0001
00FFEC94 01C0EF cli ; provide a window for an interrupt to occur
00FFEC96 01A010 sei
00FFECA0 0150B6FFFFFFFE0 lda COREID ; Ensure we have the IO Focus
00FFECA5 091010 cmpa IOFocusID
00FFECA7 026FF7 bne spc0001
00FFECA9 01C0EF cli ; provide a window for an interrupt to occur
00FFECAB 01A010 sei
; Between the status read and the transmit do not allow an
; intervening interrupt.
00FFEC98 0150B6FFFE30101 lda ACIA+ACIA_STAT ; wait until the uart indicates tx empty
00FFEC9D 085010 bita #16 ; bit #4 of the status reg
00FFEC9F 027FE9 beq spc0001 ; branch if transmitter is not empty
00FFECA1 0150F7FFFE30100 stb ACIA+ACIA_TX ; send the byte
00FFECA6 035083 puls a,ccr,pc
00FFECAD 0150B6FFFE30101 lda ACIA+ACIA_STAT ; wait until the uart indicates tx empty
00FFECB2 085010 bita #16 ; bit #4 of the status reg
00FFECB4 027FEA beq spc0001 ; branch if transmitter is not empty
00FFECB6 0150F7FFFE30100 stb ACIA+ACIA_TX ; send the byte
00FFECBB 03508B puls a,ccr,dpr,pc
;------------------------------------------------------------------------------
; Calculate number of character in input buffer
; Calculate number of character in input buffer. Direct page must be set
; already.
;
; Parameters:
; y = 0 if current core, otherwise reference to core memory area $Cyxxxx
; none
; Returns:
; d = number of bytes in buffer.
;------------------------------------------------------------------------------
SerialRcvCount:
00FFECA8 04F clra
00FFECA9 0E6A08133 ldb SerTailRcv,y
00FFECAC 0E0A08131 subb SerHeadRcv,y
00FFECAF 02C009 bge srcXit
00FFECB1 0CC001000 ldd #$1000
00FFECB4 0A3A08131 subd SerHeadRcv,y
00FFECB7 0E3A08133 addd SerTailRcv,y
00FFECBD 04F clra
00FFECBE 0D6016 ldb SerTailRcv
00FFECC0 0D0015 subb SerHeadRcv
00FFECC2 02C007 bge srcXit
00FFECC4 0CC001000 ldd #$1000
00FFECC7 093015 subd SerHeadRcv
00FFECC9 0D3016 addd SerTailRcv
srcXit:
00FFECBA 039 rts
00FFECCB 039 rts
;------------------------------------------------------------------------------
; Serial IRQ routine
2629,51 → 2676,47
;------------------------------------------------------------------------------
SerialIRQ:
00FFECCC 034008 pshs dpr ; set direct page register to boot variables
00FFECCE 086FFC lda #$FFC
00FFECD0 01F08B tfr a,dpr
00FFECD2 0150B6FFFE3F0D3 lda PIC+$D3 ; Serial active interrupt flag
00FFECD7 027042 beq notSerInt
sirqNxtByte:
00FFECBB 0150F6FFFE30101 ldb ACIA+ACIA_STAT ; check the status
00FFECC0 0C5008 bitb #$08 ; bit 3 = rx full
00FFECC2 027049 beq notRxInt
00FFECC4 0150F6FFFE30100 ldb ACIA+ACIA_RX ; get data from Rx buffer to clear interrupt
00FFECC9 0C1014 cmpb #CTRLT ; detect special keystroke
00FFECCB 026000 bne sirq0001
; bsr DumpTraceQueue
sirq0001:
00FFECCD 034004 pshs b
; Compute receive buffer address
00FFECCF 0B6FFC010 lda IOFocusID
00FFECD2 048 asla
00FFECD3 048 asla
00FFECD4 048 asla
00FFECD5 048 asla
00FFECD6 08AC00 ora #$C00
00FFECD8 05F clrb
00FFECD9 01F002 tfr d,y
00FFECDB 035004 puls b
00FFECDD 0A6A08133 lda SerTailRcv,y ; check if recieve buffer full
00FFECE0 04C inca
00FFECE1 0A1A08131 cmpa SerHeadRcv,y
00FFECE4 027027 beq sirqRxFull
00FFECE6 0A7A08133 sta SerTailRcv,y ; update tail pointer
00FFECE9 04A deca ; backup
00FFECEA 01E089 exg a,b
00FFECEC 030A0A000BFF000 leax SerRcvBuf,y ; x = buffer address
00FFECF1 0A7A0F sta b,x ; store recieved byte in buffer
00FFECF3 06DA08140 tst SerRcvXoff,y ; check if xoff already sent
00FFECF6 026FC3 bne sirqNxtByte
00FFECF8 08DFAE bsr SerialRcvCount ; if more than 4080 chars in buffer
00FFECFA 0C1FF0 cmpb #4080
00FFECFC 025FBD blo sirqNxtByte
00FFECFE 0C6013 ldb #XOFF ; send an XOFF
00FFED00 06FA08139 clr SerRcvXon,y ; clear XON status
00FFED03 0E7A08140 stb SerRcvXoff,y ; set XOFF status
00FFED06 0150F7FFFE30100 stb ACIA+ACIA_TX
00FFED0B 020FAE bra sirqNxtByte ; check the status for another byte
00FFECD9 0150F6FFFE30104 ldb ACIA+ACIA_IRQS ; look for IRQs
00FFECDE 02A03B bpl notSerInt ; quick test for any irqs
00FFECE0 0150F6FFFE30101 ldb ACIA+ACIA_STAT ; check the status
00FFECE5 0C5008 bitb #$08 ; bit 3 = rx full (not empty)
00FFECE7 027030 beq notRxInt1
00FFECE9 0150F6FFFE30100 ldb ACIA+ACIA_RX ; get data from Rx buffer to clear interrupt
00FFECEE 096016 lda SerTailRcv ; check if recieve buffer full
00FFECF0 04C inca
00FFECF1 091015 cmpa SerHeadRcv
00FFECF3 027026 beq sirqRxFull
00FFECF5 097016 sta SerTailRcv ; update tail pointer
00FFECF7 04A deca ; backup
00FFECF8 01E089 exg a,b
00FFECFA 03080FFFB000 leax SerRcvBuf ; x = buffer address
00FFECFE 0A780FFFB000 sta b,x ; store recieved byte in buffer
00FFED02 00D01A tst SerRcvXoff ; check if xoff already sent
00FFED04 026FD3 bne sirqNxtByte
00FFED06 08DFB5 bsr SerialRcvCount ; if more than 4070 chars in buffer
00FFED08 0C1FE6 cmpb #4070
00FFED0A 025FCD blo sirqNxtByte
00FFED0C 0C6013 ldb #XOFF ; send an XOFF
00FFED0E 00F019 clr SerRcvXon ; clear XON status
00FFED10 0D701A stb SerRcvXoff ; set XOFF status
00FFED12 0150F7FFFE30100 stb ACIA+ACIA_TX
00FFED17 020FC0 bra sirqNxtByte ; check the status for another byte
; Process other serial IRQs
notRxInt1:
00FFED19 035088 puls dpr,pc
sirqRxFull:
notRxInt:
00FFED0D 039 rts
notSerInt:
00FFED1B 035088 puls dpr,pc
nmeSerial:
00FFED0E 05306507206906106C000 fcb "Serial",0
00FFED1D 05306507206906106C000 fcb "Serial",0
;------------------------------------------------------------------------------
; Put a string to the serial port.
2687,16 → 2730,16
;------------------------------------------------------------------------------
SerialPutString:
00FFED15 034016 pshs d,x
00FFED17 01F001 tfr d,x
00FFED24 034016 pshs d,x
00FFED26 01F001 tfr d,x
sps2:
00FFED19 0E6804 ldb ,x
00FFED1B 027006 beq spsXit
00FFED1D 030001 inx
00FFED1F 08DF67 bsr SerialPutChar
00FFED21 020FF6 bra sps2
00FFED28 0E6804 ldb ,x
00FFED2A 027006 beq spsXit
00FFED2C 030001 inx
00FFED2E 08DF6A bsr SerialPutChar
00FFED30 020FF6 bra sps2
spsXit:
00FFED23 035096 puls d,x,pc
00FFED32 035096 puls d,x,pc
;------------------------------------------------------------------------------
; A little routine to test serial output.
2710,28 → 2753,29
;------------------------------------------------------------------------------
SerialOutputTest:
00FFED25 034006 pshs d
00FFED27 0CCFFED45 ldd #msgSerialTest
00FFED2A 017FFF6AD lbsr DisplayString
00FFED34 034006 pshs d
00FFED36 0CCFFED54 ldd #msgSerialTest
00FFED39 017FFF6A1 lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFED2D 08DEC0 bsr SerialInit
00FFED3C 08DEB1 bsr SerialInit
sotst1:
00FFED2F 0C6011 ldb #XON
00FFED31 08DF55 bsr SerialPutChar
00FFED33 08DF53 bsr SerialPutChar
00FFED35 08DF51 bsr SerialPutChar
00FFED37 0CCFFED45 ldd #msgSerialTest
00FFED3A 08DFD9 bsr SerialPutString
00FFED3C 01700016A lbsr INCH
00FFED3F 0C1003 cmpb #CTRLC
00FFED41 026FEC bne sotst1
00FFED43 035086 puls d,pc
00FFED3E 0C6011 ldb #XON
00FFED40 08DF58 bsr SerialPutChar
00FFED42 08DF56 bsr SerialPutChar
00FFED44 08DF54 bsr SerialPutChar
00FFED46 0CCFFED54 ldd #msgSerialTest
00FFED49 08DFD9 bsr SerialPutString
00FFED4B 017000443 lbsr INCH
00FFED4E 0C1003 cmpb #CTRLC
00FFED50 026FEC bne sotst1
00FFED52 035086 puls d,pc
msgSerialTest:
00FFED45 05306507206906106C020 fcb "Serial port test",CR,LF,0
00FFED4C 07006F072074020074065
00FFED53 07307400D00A000
00FFED54 05306507206906106C020 fcb "Serial port test",CR,LF,0
00FFED5B 07006F072074020074065
00FFED62 07307400D00A000
setdp $000
; ============================================================================
; __
; \\__/ o\ (C) 2022 Robert Finch, Waterloo
2768,36 → 2812,74
;
; ============================================================================
;
; S19 variables
;
s19Address EQU $940 ; to $943
s19StartAddress EQU $944 ; to $947
s19Rectype EQU $948
s19Reclen EQU $949
s19Abort EQU $94A
s19Checksum EQU $94B
s19SummaryChecksum EQU $94C
s19Source EQU $94E
s19XferAddress EQU $950 ; to $951
; ------------------------------------------------------------------------------
; Input a character either from a file in memory or from the serial port.
;
; Parameters:
; none
; Returns:
; accb = character input
; ------------------------------------------------------------------------------
s19InputChar:
00FFED67 07D00094E tst s19Source
00FFED6A 02700D beq s19ic1
00FFED6C 0E690F000950 ldb [s19XferAddress]
00FFED70 07C000951 inc s19XferAddress+1 ; increment low byte of address pointer
00FFED73 026003 bne s19ic2
00FFED75 07C000950 inc s19XferAddress ; increment high byte of address pointer
s19ic2:
00FFED78 039 rts
s19ic1:
00FFED79 0CCFFFFFF ldd #-1 ; block until input is available
00FFED7C 03F swi
00FFED7D 001 fcb MF_INCH ; monitor input rout
00FFED7E 039 rts
; ------------------------------------------------------------------------------
; Skip over input to the next record.
; ------------------------------------------------------------------------------
s19NextRecord:
00FFED58 0CCFFFFFF ldd #-1 ; block until input is available
00FFED5B 03F swi
00FFED5C 001 fcb MF_INCH ; monitor input rout
00FFED5D 0C100A cmpb #LF ; line feed marks end of record
00FFED5F 027013 beq s19nr1
00FFED61 0C1003 cmpb #CTRLC ; should not get this in a file transfer
00FFED63 026003 bne s19nr2
00FFED65 0F700094A stb s19Abort
00FFED7F 08DFE6 bsr s19InputChar
00FFED81 0C100A cmpb #LF ; line feed marks end of record
00FFED83 027013 beq s19nr1
00FFED85 0C1003 cmpb #CTRLC ; should not get this in a file transfer
00FFED87 026003 bne s19nr2
00FFED89 0F700094A stb s19Abort
s19nr2:
00FFED68 0C101A cmpb #CTRLZ ; end of file marker?
00FFED6A 026003 bne s19nr3
00FFED6C 0F700094A stb s19Abort
00FFED8C 0C101A cmpb #CTRLZ ; end of file marker?
00FFED8E 026003 bne s19nr3
00FFED90 0F700094A stb s19Abort
s19nr3:
00FFED6F 07D00094A tst s19Abort
00FFED72 027FE4 beq s19NextRecord
00FFED93 07D00094A tst s19Abort
00FFED96 027FE7 beq s19NextRecord
s19nr1:
00FFED74 039 rts
00FFED98 039 rts
; ------------------------------------------------------------------------------
; Update the checksum.
; ------------------------------------------------------------------------------
s19AddCheck:
00FFED99 034004 pshs b
00FFED9B 0FB00094B addb s19Checksum
00FFED9E 0F700094B stb s19Checksum
00FFEDA1 035084 puls b,pc
; ------------------------------------------------------------------------------
; Input a byte. There are three characters per byte since things are 12-bit.
;
; Parameters:
2807,40 → 2889,37
; ------------------------------------------------------------------------------
s19GetByte:
00FFED75 03F swi
00FFED76 001 fcb MF_INCH ; get the first character
00FFED77 0170004F6 lbsr AsciiToHexNybble ; convert to nybble
00FFED7A 07D00094A tst s19Abort ; check for abort
00FFED7D 027002 beq s19gb1
00FFED7F 04F clra
00FFED80 039 rts
00FFEDA3 08DFC2 bsr s19InputChar ; get the first character
00FFEDA5 0170007F7 lbsr AsciiToHexNybble ; convert to nybble
00FFEDA8 07D00094A tst s19Abort ; check for abort
00FFEDAB 027002 beq s19gb1
00FFEDAD 04F clra
00FFEDAE 039 rts
s19gb1: ; shift the value four bits
00FFED81 058 aslb
00FFED82 058 aslb
00FFED83 058 aslb
00FFED84 058 aslb
00FFED85 034004 pshs b ; save off value
00FFED87 03F swi
00FFED88 001 fcb MF_INCH ; get the second character
00FFED89 0170004E4 lbsr AsciiToHexNybble ; convert to nybble
00FFED8C 07D00094A tst s19Abort ; check for abort
00FFED8F 026011 bne s19gb2
00FFED91 0EAE00 orb ,s+ ; merge new nybble into value
00FFED93 058 aslb ; shift the value four more bits
00FFED94 058 aslb
00FFED95 058 aslb
00FFED96 058 aslb
00FFED97 034004 pshs b ; save off value
00FFED99 03F swi
00FFED9A 001 fcb MF_INCH ; get third character
00FFED9B 0170004D2 lbsr AsciiToHexNybble ; convert to nybble
00FFED9E 0EAE00 orb ,s+ ; merge in value
00FFEDA0 04F clra ; make byte 000 to FFF in D
00FFEDA1 039 rts
00FFEDAF 058 aslb
00FFEDB0 058 aslb
00FFEDB1 058 aslb
00FFEDB2 058 aslb
00FFEDB3 034004 pshs b ; save off value
00FFEDB5 08DFB0 bsr s19InputChar ; get the second character
00FFEDB7 0170007E5 lbsr AsciiToHexNybble ; convert to nybble
00FFEDBA 07D00094A tst s19Abort ; check for abort
00FFEDBD 026011 bne s19gb2
00FFEDBF 0EAE00 orb ,s+ ; merge new nybble into value
00FFEDC1 058 aslb ; shift the value four more bits
00FFEDC2 058 aslb
00FFEDC3 058 aslb
00FFEDC4 058 aslb
00FFEDC5 034004 pshs b ; save off value
00FFEDC7 08DF9E bsr s19InputChar ; get the third character
00FFEDC9 0170007D3 lbsr AsciiToHexNybble ; convert to nybble
00FFEDCC 0EAE00 orb ,s+ ; merge in value
00FFEDCE 04F clra ; make byte 000 to FFF in D
00FFEDCF 039 rts
s19gb2:
00FFEDA2 032601 leas 1,s ; discard saved byte
00FFEDA4 04F clra
00FFEDA5 039 rts
00FFEDD0 032601 leas 1,s ; discard saved byte
00FFEDD2 04F clra
00FFEDD3 039 rts
; ------------------------------------------------------------------------------
; Zero out address
2847,11 → 2926,11
; ------------------------------------------------------------------------------
s19ClearAddress:
00FFEDA6 07F000940 clr s19Address
00FFEDA9 07F000941 clr s19Address+1
00FFEDAC 07F000942 clr s19Address+2
00FFEDAF 07F000943 clr s19Address+3
00FFEDB2 039 rts
00FFEDD4 07F000940 clr s19Address
00FFEDD7 07F000941 clr s19Address+1
00FFEDDA 07F000942 clr s19Address+2
00FFEDDD 07F000943 clr s19Address+3
00FFEDE0 039 rts
; ------------------------------------------------------------------------------
; Get an address composed of two bytes (24 bit)
2863,15 → 2942,17
; ------------------------------------------------------------------------------
s19GetAddress2:
00FFEDB3 08DFF1 bsr s19ClearAddress
00FFEDB5 08DFBE bsr s19GetByte
00FFEDB7 0F7000942 stb s19Address+2
00FFEDBA 07D00094A tst s19Abort
00FFEDBD 026005 bne s19ga1
00FFEDBF 08DFB4 bsr s19GetByte
00FFEDC1 0F7000943 stb s19Address+3
00FFEDE1 08DFF1 bsr s19ClearAddress
00FFEDE3 08DFBE bsr s19GetByte
00FFEDE5 08DFB2 bsr s19AddCheck
00FFEDE7 0F7000942 stb s19Address+2
00FFEDEA 07D00094A tst s19Abort
00FFEDED 026007 bne s19ga1
00FFEDEF 08DFB2 bsr s19GetByte
00FFEDF1 08DFA6 bsr s19AddCheck
00FFEDF3 0F7000943 stb s19Address+3
s19ga1:
00FFEDC4 039 rts
00FFEDF6 039 rts
; ------------------------------------------------------------------------------
; Get an address composed of three bytes (36 bit)
2883,19 → 2964,22
; ------------------------------------------------------------------------------
s19GetAddress3:
00FFEDC5 08DFDF bsr s19ClearAddress
00FFEDC7 08DFAC bsr s19GetByte
00FFEDC9 0F7000941 stb s19Address+1
00FFEDCC 07D00094A tst s19Abort
00FFEDCF 02600F bne s19ga2
00FFEDD1 08DFA2 bsr s19GetByte
00FFEDD3 0F7000942 stb s19Address+2
00FFEDD6 07D00094A tst s19Abort
00FFEDD9 026005 bne s19ga2
00FFEDDB 08DF98 bsr s19GetByte
00FFEDDD 0F7000943 stb s19Address+3
00FFEDF7 08DFDB bsr s19ClearAddress
00FFEDF9 08DFA8 bsr s19GetByte
00FFEDFB 08DF9C bsr s19AddCheck
00FFEDFD 0F7000941 stb s19Address+1
00FFEE00 07D00094A tst s19Abort
00FFEE03 026013 bne s19ga2
00FFEE05 08DF9C bsr s19GetByte
00FFEE07 08DF90 bsr s19AddCheck
00FFEE09 0F7000942 stb s19Address+2
00FFEE0C 07D00094A tst s19Abort
00FFEE0F 026007 bne s19ga2
00FFEE11 08DF90 bsr s19GetByte
00FFEE13 08DF84 bsr s19AddCheck
00FFEE15 0F7000943 stb s19Address+3
s19ga2:
00FFEDE0 039 rts
00FFEE18 039 rts
; ------------------------------------------------------------------------------
; Put a byte to memory.
2902,27 → 2986,30
; ------------------------------------------------------------------------------
s19PutMem:
00FFEDE1 05F clrb ; accb = current byte count
00FFEE19 05F clrb ; accb = current byte count
s19pm3:
00FFEDE2 034004 pshs b ; save byte count
00FFEDE4 08DF8F bsr s19GetByte
00FFEDE6 07D00094A tst s19Abort
00FFEDE9 02601C bne s19pm1
00FFEDEB 0150E790F000941 stb far [s19Address+1] ; store the byte using far addressing
00FFEDF0 07C000943 inc s19Address+3
00FFEDF3 026008 bne s19pm2
00FFEDF5 07C000942 inc s19Address+2
00FFEDF8 026003 bne s19pm2
00FFEDFA 07C000941 inc s19Address+1
00FFEE1A 034004 pshs b ; save byte count
00FFEE1C 08DF85 bsr s19GetByte
00FFEE1E 08DF79 bsr s19AddCheck
00FFEE20 07D00094A tst s19Abort
00FFEE23 02601E bne s19pm1
00FFEE25 0150E790F000941 stb far [s19Address+1] ; store the byte using far addressing
00FFEE2A 07C000943 inc s19Address+3
00FFEE2D 026008 bne s19pm2
00FFEE2F 07C000942 inc s19Address+2
00FFEE32 026003 bne s19pm2
00FFEE34 07C000941 inc s19Address+1
s19pm2:
00FFEDFD 035004 puls b ; get back byte count
00FFEDFF 05C incb ; increment and
00FFEE00 0F1000949 cmpb s19Reclen ; compare to record length
00FFEE03 025FDD blo s19pm3
00FFEE05 020F6E bra s19GetByte ; get the checksum byte
00FFEE37 035004 puls b ; get back byte count
00FFEE39 05C incb ; increment and
00FFEE3A 0F1000949 cmpb s19Reclen ; compare to record length
00FFEE3D 025FDB blo s19pm3
00FFEE3F 08DF62 bsr s19GetByte ; get the checksum byte
00FFEE41 020F56 bra s19AddCheck
s19pm1:
00FFEE07 032601 leas 1,s ; faster than actual pull
00FFEE09 020F6A bra s19GetByte ; get the checksum byte
00FFEE43 032601 leas 1,s ; faster than actual pull
00FFEE45 08DF5C bsr s19GetByte ; get the checksum byte
00FFEE47 020F50 bra s19AddCheck
; ------------------------------------------------------------------------------
; Processing for S1 record type.
2929,9 → 3016,16
; ------------------------------------------------------------------------------
s19ProcessS1:
00FFEE0B 08DFA6 bsr s19GetAddress2
00FFEE0D 08DFD2 bsr s19PutMem
00FFEE0F 020072 bra s19lnr
00FFEE49 08DF96 bsr s19GetAddress2
00FFEE4B 08DFCC bsr s19PutMem
00FFEE4D 07D00094B tst s19Checksum
00FFEE50 027008 beq s19p11
00FFEE52 07C00094C inc s19SummaryChecksum
00FFEE55 0CCFFEF19 ldd #msgChecksumErr
00FFEE58 03F swi
00FFEE59 004 fcb MF_DisplayString
s19p11:
00FFEE5A 020099 bra s19lnr
; ------------------------------------------------------------------------------
; Processing for S2 record type.
2938,9 → 3032,16
; ------------------------------------------------------------------------------
s19ProcessS2:
00FFEE11 08DFB2 bsr s19GetAddress3
00FFEE13 08DFCC bsr s19PutMem
00FFEE15 02006C bra s19lnr
00FFEE5C 08DF99 bsr s19GetAddress3
00FFEE5E 08DFB9 bsr s19PutMem
00FFEE60 07D00094B tst s19Checksum
00FFEE63 027008 beq s19p21
00FFEE65 07C00094C inc s19SummaryChecksum
00FFEE68 0CCFFEF19 ldd #msgChecksumErr
00FFEE6B 03F swi
00FFEE6C 004 fcb MF_DisplayString
s19p21:
00FFEE6D 020086 bra s19lnr
; S3,4,5,6 not processed
2949,12 → 3050,12
; ------------------------------------------------------------------------------
s19ProcessS9:
00FFEE17 08DF9A bsr s19GetAddress2
00FFEE19 0FC000942 ldd s19Address+2
00FFEE1C 0FD000946 std s19StartAddress+2
00FFEE1F 0FC000940 ldd s19Address+0
00FFEE22 0FD000944 std s19StartAddress+0
00FFEE25 020069 bra s19l2
00FFEE6F 08DF70 bsr s19GetAddress2
00FFEE71 0FC000942 ldd s19Address+2
00FFEE74 0FD000946 std s19StartAddress+2
00FFEE77 0FC000940 ldd s19Address+0
00FFEE7A 0FD000944 std s19StartAddress+0
00FFEE7D 020083 bra s19l2
; ------------------------------------------------------------------------------
; Processing for S8 record type. Gets a three byte (36 bit) start address.
2961,12 → 3062,12
; ------------------------------------------------------------------------------
s19ProcessS8:
00FFEE27 08DF9C bsr s19GetAddress3
00FFEE29 0FC000942 ldd s19Address+2
00FFEE2C 0FD000946 std s19StartAddress+2
00FFEE2F 0FC000940 ldd s19Address+0
00FFEE32 0FD000944 std s19StartAddress+0
00FFEE35 020059 bra s19l2
00FFEE7F 08DF76 bsr s19GetAddress3
00FFEE81 0FC000942 ldd s19Address+2
00FFEE84 0FD000946 std s19StartAddress+2
00FFEE87 0FC000940 ldd s19Address+0
00FFEE8A 0FD000944 std s19StartAddress+0
00FFEE8D 020073 bra s19l2
; ------------------------------------------------------------------------------
; S19 Loader
2975,63 → 3076,525
; ------------------------------------------------------------------------------
S19Loader:
00FFEE37 07F00094A clr s19Abort ; clear the abort flag
00FFEE3A 0CCFFEE93 ldd #msgS19Loader ; signon banner
00FFEE3D 03F swi
00FFEE3E 004 fcb MF_DisplayString
00FFEE8F 07F00094E clr s19Source
00FFEE92 0170006FC lbsr GetNumber ; check for a file storage address
00FFEE95 05D tstb
00FFEE96 027009 beq s19l4 ; if not a memory file
00FFEE98 07C00094E inc s19Source ; set flag indicating a memory file
00FFEE9B 0FC000912 ldd mon_numwka+2 ; set transfer address variable
00FFEE9E 0FD000950 std s19XferAddress
s19l4:
00FFEEA1 07F00094A clr s19Abort ; clear the abort flag
00FFEEA4 0CCFFEF05 ldd #msgS19Loader ; signon banner
00FFEEA7 03F swi
00FFEEA8 004 fcb MF_DisplayString
00FFEEA9 07F00094C clr s19SummaryChecksum
s19l3:
00FFEE3F 03F swi ; get a character from input
00FFEE40 001 fcb MF_INCH
00FFEE41 0C101A cmpb #CTRLZ ; is it CTRL-Z?
00FFEE43 02704B beq s19l2
00FFEE45 0C1053 cmpb #'S' ; records must start with the letter S
00FFEE47 02603A bne s19lnr
00FFEE49 03F swi ; get the next character
00FFEE4A 001 fcb MF_INCH
00FFEE4B 0C1030 cmpb #'0' ; must be a numeric digit
00FFEE4D 025034 blo s19lnr
00FFEE4F 0C1039 cmpb #'9'
00FFEE51 022030 bhi s19lnr
00FFEE53 0F7000948 stb s19Rectype ; save off in record type
00FFEE56 08DF1D bsr s19GetByte ; get a byte indicating record length
00FFEE58 0F7000949 stb s19Reclen
00FFEE5B 07D00094A tst s19Abort ; check for abort
00FFEE5E 026030 bne s19l2
00FFEE60 0F6000948 ldb s19Rectype ; process according to record type
00FFEE63 0C1030 cmpb #'0'
00FFEE65 02701C beq s19lnr
00FFEE67 0C1031 cmpb #'1'
00FFEE69 027FA0 beq s19ProcessS1 ; data record with a two byte address
00FFEE6B 0C1032 cmpb #'2'
00FFEE6D 027FA2 beq s19ProcessS2 ; data record with a three byte address
00FFEE6F 0C1033 cmpb #'3'
00FFEE71 027010 beq s19lnr
00FFEE73 0C1035 cmpb #'5' ; record count? ignore
00FFEE75 02700C beq s19lnr
00FFEE77 0C1037 cmpb #'7' ; ignore record with 48 bit address
00FFEE79 027015 beq s19l2
00FFEE7B 0C1038 cmpb #'8'
00FFEE7D 027FA8 beq s19ProcessS8 ; two byte start address
00FFEE7F 0C1039 cmpb #'9'
00FFEE81 027F94 beq s19ProcessS9 ; three byte start address
00FFEEAC 08DEB9 bsr s19InputChar ; get a character from input
00FFEEAE 0C101A cmpb #CTRLZ ; is it CTRL-Z?
00FFEEB0 027050 beq s19l2
00FFEEB2 07F00094B clr s19Checksum
00FFEEB5 0C1043 cmpb #'C' ; records must start with the letter C
00FFEEB7 02603C bne s19lnr
00FFEEB9 08DEAC bsr s19InputChar ; get the next character
00FFEEBB 0C1030 cmpb #'0' ; must be a numeric digit
00FFEEBD 025036 blo s19lnr
00FFEEBF 0C1039 cmpb #'9'
00FFEEC1 022032 bhi s19lnr
00FFEEC3 0F7000948 stb s19Rectype ; save off in record type
00FFEEC6 08DEDB bsr s19GetByte ; get a byte indicating record length
00FFEEC8 08DECF bsr s19AddCheck
00FFEECA 0F7000949 stb s19Reclen
00FFEECD 07D00094A tst s19Abort ; check for abort
00FFEED0 026030 bne s19l2
00FFEED2 0F6000948 ldb s19Rectype ; process according to record type
00FFEED5 0C1030 cmpb #'0'
00FFEED7 02701C beq s19lnr
00FFEED9 0C1031 cmpb #'1'
00FFEEDB 027F6C beq s19ProcessS1 ; data record with a two byte address
00FFEEDD 0C1032 cmpb #'2'
00FFEEDF 027F7B beq s19ProcessS2 ; data record with a three byte address
00FFEEE1 0C1033 cmpb #'3'
00FFEEE3 027010 beq s19lnr
00FFEEE5 0C1035 cmpb #'5' ; record count? ignore
00FFEEE7 02700C beq s19lnr
00FFEEE9 0C1037 cmpb #'7' ; ignore record with 48 bit address
00FFEEEB 027015 beq s19l2
00FFEEED 0C1038 cmpb #'8'
00FFEEEF 027F8E beq s19ProcessS8 ; two byte start address
00FFEEF1 0C1039 cmpb #'9'
00FFEEF3 027F7A beq s19ProcessS9 ; three byte start address
s19lnr:
00FFEE83 0C602E ldb #'.' ; output a progress indicator
00FFEE85 03F swi
00FFEE86 002 fcb MF_OUTCH
00FFEE87 08DECF bsr s19NextRecord ; skip to the next record
00FFEE89 07D00094A tst S19Abort ; check for abort
00FFEE8C 026002 bne s19l2
00FFEE8E 020FAF bra s19l3 ; loop back to process more records
00FFEEF5 0C602E ldb #'.' ; output a progress indicator
00FFEEF7 03F swi
00FFEEF8 002 fcb MF_OUTCH
00FFEEF9 08DE84 bsr s19NextRecord ; skip to the next record
00FFEEFB 07D00094A tst S19Abort ; check for abort
00FFEEFE 026002 bne s19l2
00FFEF00 020FAA bra s19l3 ; loop back to process more records
s19l2:
00FFEE90 0160001A6 lbra Monitor
00FFEF02 016000457 lbra Monitor
msgS19Loader:
00FFEE93 05303103902004C06F061 fcb "S19 Loader Active",CR,LF,0
00FFEE9A 064065072020041063074
00FFEEA1 06907606500D00A000
00FFEF05 05303103902004C06F061 fcb "S19 Loader Active",CR,LF,0
00FFEF0C 064065072020041063074
00FFEF13 06907606500D00A000
msgChecksumErr:
00FFEF19 053031039020043068065 fcb "S19 Checksum Err",CR,LF,0
00FFEF20 06306B07307506D020045
00FFEF27 07207200D00A000
; ============================================================================
; __
; \\__/ o\ (C) 2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; BSD 3-Clause License
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ============================================================================
;
; Xmodem variables
;
xm_timer EQU $FFC020
xm_protocol EQU $9F5
xm_flag EQU $9F6
xm_checksum EQU $9F7
xm_tmp2 EQU $9F8
xm_packetnum EQU $9FA
xm_tmp EQU $9FC
xm_crc EQU $9FE
xm_ibuf EQU $A00 ; to $A7F
xm_obuf EQU $A80 ; to $AFF
; ------------------------------------------------------------------------------
; Send data using XModem.
; ------------------------------------------------------------------------------
xm_SendStart:
00FFEF2C 0170005A3 lbsr GetRange
00FFEF2F 0BE000922 ldx mon_r1+2 ; x = buffer address
00FFEF32 01F013 tfr x,u
00FFEF34 0C6001 ldb #1 ; packet numbers start at one
00FFEF36 0F70009FB stb xm_packetnum+1
; Wait for receiver to send a NAK
xm_send:
00FFEF39 0CCFFFFFF ldd #-1 ; select blocking input
00FFEF3C 03F swi
00FFEF3D 001 fcb MF_INCH
00FFEF3E 0C1015 cmpb #NAK ; should have got a NAK
00FFEF40 027004 beq xm_send5
00FFEF42 0C1043 cmpb #'C' ; or a 'C'
00FFEF44 026FF3 bne xm_send
xm_send5:
00FFEF46 0F70009F5 stb xm_protocol
xm_send4:
00FFEF49 0C6001 ldb #SOH ; send start
00FFEF4B 03F swi
00FFEF4C 1C9 fcb OUTCH
00FFEF4D 0F60009FB ldb xm_packetnum+1 ; send packet number
00FFEF50 03F swi
00FFEF51 002 fcb MF_OUTCH
00FFEF52 053 comb ; one's complement
00FFEF53 03F swi
00FFEF54 002 fcb MF_OUTCH ; send packet number complement
00FFEF55 04F clra ; acca = byte count
00FFEF56 01F013 tfr x,u ; u = buffer address
xm_send1:
00FFEF58 0E6C00 ldb ,u+ ; grab a byte from the buffer
00FFEF5A 03F swi
00FFEF5B 002 fcb MF_OUTCH ; send it out
00FFEF5C 04C inca
00FFEF5D 081080 cmpa #128 ; number of bytes in payload
00FFEF5F 025FF7 blo xm_send1
00FFEF61 0F60009F5 ldb xm_protocol
00FFEF64 0C1043 cmpb #'C' ; CRC protocol?
00FFEF66 02601E bne xm_send2
00FFEF68 08D17F bsr xm_calc_crc ; compute CRC
00FFEF6A 0FC0009FE ldd xm_crc ; get crc
00FFEF6D 044 lsra ; transfer high eight bits first, so
00FFEF6E 056 rorb ; right shift D by eight
00FFEF6F 044 lsra
00FFEF70 056 rorb
00FFEF71 044 lsra
00FFEF72 056 rorb
00FFEF73 044 lsra
00FFEF74 056 rorb
00FFEF75 044 lsra
00FFEF76 056 rorb
00FFEF77 044 lsra
00FFEF78 056 rorb
00FFEF79 044 lsra
00FFEF7A 056 rorb
00FFEF7B 044 lsra
00FFEF7C 056 rorb
00FFEF7D 03F swi
00FFEF7E 002 fcb MF_OUTCH ; send out the byte
00FFEF7F 0FC0009FE ldd xm_crc ; get back CRC
00FFEF82 03F swi
00FFEF83 002 fcb MF_OUTCH ; and send out low byte
00FFEF84 020007 bra xm_send3
xm_send2:
00FFEF86 08D14F bsr xm_calc_checksum
00FFEF88 0F60009F7 ldb xm_checksum
00FFEF8B 03F swi
00FFEF8C 002 fcb MF_OUTCH
xm_send3:
00FFEF8D 03F swi
00FFEF8E 0CCFFFFFF ldd #-1 ; block until input is present
00FFEF91 001 fcb MF_INCH
00FFEF92 0C1006 cmpb #ACK
00FFEF94 026FB3 bne xm_send4 ; not an ACK then resend the record
00FFEF96 07C0009FA inc xm_packetnum ; increment packet number
00FFEF99 030080 leax 128,x ; advance buffer pointer
00FFEF9B 0BC000926 cmpx mon_r2+2
00FFEF9E 025FA9 blo xm_send4 ; go send next record
00FFEFA0 0C6004 ldb #EOT ; send end of transmission
00FFEFA2 03F swi
00FFEFA3 002 fcb MF_OUTCH
00FFEFA4 03F swi
00FFEFA5 002 fcb MF_OUTCH
00FFEFA6 03F swi
00FFEFA7 002 fcb MF_OUTCH
00FFEFA8 039 rts
; ------------------------------------------------------------------------------
; Get a byte, checking for a receive timeout.
;
; Returns:
; accb = byte (0 to 255) or -1 if timed out
; ------------------------------------------------------------------------------
xm_getbyte:
xm_gb1:
00FFEFA9 07DFFC020 tst xm_timer ; check the timeout - 2048 ticks (3 seconds approx.)
00FFEFAC 02B009 bmi xm_gb2
00FFEFAE 04F clra ; non-blocking
00FFEFAF 05F clrb
00FFEFB0 03F swi
00FFEFB1 001 fcb MF_INCH ; try and get a character
00FFEFB2 02BFF5 bmi xm_gb1 ; if no character, try again
00FFEFB4 08D1BA bsr xm_outbyteAsHex
00FFEFB6 039 rts
xm_gb2:
00FFEFB7 0C6FFF ldb #-1
00FFEFB9 039 rts
; ------------------------------------------------------------------------------
; XModem Receive
;
; Parameters:
; none
; Modifies:
; All
; Returns:
; none
; ------------------------------------------------------------------------------
xm_ReceiveStart:
00FFEFBA 017FFF1FB lbsr Delay3s ; give a little bit of time for sender
*** warning 1: Long branch within short branch range could be optimized
00FFEFBD 017FFF1F8 lbsr Delay3s
*** warning 1: Long branch within short branch range could be optimized
00FFEFC0 017FFF1F5 lbsr Delay3s
*** warning 1: Long branch within short branch range could be optimized
00FFEFC3 0170005CB lbsr GetNumber ; Get the transfer address
00FFEFC6 05D tstb ; Make sure we got a value
00FFEFC7 127000392 lbeq Monitor
00FFEFCA 0BE000912 ldx mon_numwka+2 ; X = transfer address
00FFEFCD 07F0009FA clr xm_packetnum ; initialize
00FFEFD0 086043 lda #'C' ; try for CRC first
00FFEFD2 0B70009F5 sta xm_protocol
xm_receive:
00FFEFD5 086002 lda #2 ; number of times to retry -1
xm_rcv5:
00FFEFD7 0F60009F5 ldb xm_protocol ; indicate we want a transfer (send protocol byte)
00FFEFDA 03F swi
00FFEFDB 00D fcb MF_SerialPutchar
xm_rcv4:
00FFEFDC 07FFFC020 clr xm_timer ; clear the timeout
xm_rcv1:
00FFEFDF 08DFC8 bsr xm_getbyte
00FFEFE1 05D tstb
00FFEFE2 02B0A1 bmi xm_retry1 ; timeout on protocol id?
00FFEFE4 0C1001 cmpb #SOH ; it should be start of a transfer
00FFEFE6 027012 beq xm_SOH
00FFEFE8 0C1004 cmpb #EOT
00FFEFEA 027092 beq xm_EOT ; or end of transfer (EOT)
00FFEFEC 0C1018 cmpb #CAN
00FFEFEE 027FE5 beq xm_receive ; might be a cancel
00FFEFF0 0C1017 cmpb #ETB
00FFEFF2 02708A beq xm_EOT
xm_rcv_nak: ; wasn't a valid start so
00FFEFF4 0C6015 ldb #NAK ; send a NAK
00FFEFF6 03F swi
00FFEFF7 00D fcb MF_SerialPutchar ; and try again
00FFEFF8 020FE2 bra xm_rcv4
xm_SOH:
00FFEFFA 08DFAD bsr xm_getbyte ; get packet number
00FFEFFC 02B078 bmi xm_rcv_to1
00FFEFFE 0F70009FB stb xm_packetnum+1
00FFF001 034004 pshs b ; save it
00FFF003 08DFA4 bsr xm_getbyte ; get complement of packet number
00FFF005 02B06D bmi xm_rcv_to2
00FFF007 0EBE04 addb ,s ; add the two values
00FFF009 0C40FF andb #$FF ; the sum should be $FF
00FFF00B 0C00FF subb #$FF
00FFF00D 0F70009F6 stb xm_flag ; should be storing a zero if there is no error
00FFF010 18E000000 ldy #0 ; y = payload byte counter
00FFF013 01F013 tfr x,u
xm_rcv2:
00FFF015 08DF92 bsr xm_getbyte
00FFF017 02B05D bmi xm_rcv_to1
00FFF019 0E7C00 stb ,u+ ; store the byte to memory
00FFF01B 031201 iny
00FFF01D 18C000080 cmpy #128 ; 128 bytes per payload
00FFF020 025FF3 blo xm_rcv2
00FFF022 08DF85 bsr xm_getbyte ; get checksum or CRC byte
00FFF024 02B050 bmi xm_rcv_to1
00FFF026 0F70009FC stb xm_tmp ; stuff checksum/CRC byte
00FFF029 0F60009F5 ldb xm_protocol
00FFF02C 0C1043 cmpb #'C'
00FFF02E 026022 bne xm_rcv_chksum
00FFF030 08DF77 bsr xm_getbyte ; get low order CRC byte
00FFF032 02B042 bmi xm_rcv_to1
00FFF034 0B60009FC lda xm_tmp ; get the high byte
00FFF037 058 aslb ; prepare to combine high and low order
00FFF038 058 aslb
00FFF039 058 aslb
00FFF03A 058 aslb
00FFF03B 044 lsra ; shift low nybble of acca into accb
00FFF03C 056 rorb
00FFF03D 044 lsra
00FFF03E 056 rorb
00FFF03F 044 lsra
00FFF040 056 rorb
00FFF041 044 lsra
00FFF042 056 rorb
00FFF043 08400F anda #$00F ; mask off any extra bits
00FFF045 0FD0009F8 std xm_tmp2
00FFF048 08D09F bsr xm_calc_crc ; compute the CRC-16 for the received data
00FFF04A 0FC0009FE ldd xm_crc ; and compare to received value
00FFF04D 1B30009F8 cmpd xm_tmp2
00FFF050 020008 bra xm_rcv3
xm_rcv_chksum:
00FFF052 08D083 bsr xm_calc_checksum
00FFF054 0F60009F7 ldb xm_checksum
00FFF057 0F10009FC cmpb xm_tmp ; where we stuffed the byte
xm_rcv3:
00FFF05A 026F98 bne xm_rcv_nak ; if not the same, NAK
00FFF05C 07D0009F6 tst xm_flag
00FFF05F 026F93 bne xm_rcv_nak ; bad packet number?
00FFF061 0C6006 ldb #ACK ; packet recieved okay, send back an ACK
00FFF063 03F swi
00FFF064 00D fcb MF_SerialPutchar
00FFF065 0F60009FB ldb xm_packetnum+1 ; did we receive the same packet
00FFF068 0F10009FA cmpb xm_packetnum
00FFF06B 027F6F beq xm_rcv4 ; same packet received, dont update buffer pointer
00FFF06D 0F70009FA stb xm_packetnum ; update last seen packet number
00FFF070 030080 leax 128,x ; increment buffer pointer
00FFF072 020F68 bra xm_rcv4 ; and go back for next packet
xm_rcv_to2:
00FFF074 032601 leas 1,s ; get rid of stacked byte
xm_rcv_to1:
00FFF076 0CCFFF09E ldd #msgXmTimeout
00FFF079 03F swi
00FFF07A 004 fcb MF_DisplayString
00FFF07B 0160002DE lbra Monitor
xm_EOT: ; end of transmission received, return
00FFF07E 0C6006 ldb #ACK ; ACK the EOT
00FFF080 03F swi
00FFF081 00D fcb MF_SerialPutchar
00FFF082 0160002D7 lbra Monitor
xm_retry1:
00FFF085 04A deca
00FFF086 02AF4F bpl xm_rcv5
00FFF088 0B60009F5 lda xm_protocol
00FFF08B 081015 cmpa #NAK ; are we already lowered down to checksum protocol?
00FFF08D 027007 beq xm_noTransmitter ; did we try both checksum and CRC?
00FFF08F 086015 lda #NAK
00FFF091 0B70009F5 sta xm_protocol
00FFF094 020F3F bra xm_receive
xm_noTransmitter:
00FFF096 0CCFFF0B2 ldd #msgXmNoTransmitter
00FFF099 03F swi
00FFF09A 004 fcb MF_DisplayString
00FFF09B 0160002BE lbra Monitor
msgXmTimeout:
00FFF09E 05806D06F06406506D03A fcb "Xmodem: timed out",CR,LF,0
00FFF0A5 02007406906D065064020
00FFF0AC 06F07507400D00A000
msgXmNoTransmitter:
00FFF0B2 05804D06F06406506D03A fcb "XModem: transmitter not responding",CR,LF,0
00FFF0B9 02007407206106E07306D
00FFF0C0 06907407406507202006E
00FFF0C7 06F074020072065073070
00FFF0CE 06F06E06406906E06700D
00FFF0D5 00A000
; ------------------------------------------------------------------------------
; Calculate checksum value. The checksum is simply the low order eight bits of
; the sum of all the bytes in the payload area.
;
; Stack space:
; two words
; Modifies:
; xm_checksum contains the checksum value for the record
; Parameters:
; X = buffer address
; Returns:
; none
; ------------------------------------------------------------------------------
xm_calc_checksum:
00FFF0D7 034016 pshs d,x
00FFF0D9 04F clra
00FFF0DA 05F clrb
xm_cs1:
00FFF0DB 0EB800 addb ,x+
00FFF0DD 04C inca
00FFF0DE 081080 cmpa #128
00FFF0E0 025FF9 blo xm_cs1
00FFF0E2 0C40FF andb #$FF
00FFF0E4 0F70009F7 stb xm_checksum
00FFF0E7 035096 puls d,x,pc
; ------------------------------------------------------------------------------
; Compute CRC-16 of buffer.
;
;int calcrc(char *ptr, int count)
;{
; int crc;
; char i;
; crc = 0;
; while (--count >= 0)
; {
; crc = crc ^ (int) (*ptr++ << 8);
; i = 8;
; do
; {
; if (crc & 0x8000)
; crc = crc << 1 ^ 0x1021;
; else
; crc = crc << 1;
; } while(--i);
; }
; return (crc);
;}
;
; Modifies:
; xm_crc variable
; Parameters:
; u = buffer address
; Returns:
; none
; ------------------------------------------------------------------------------
xm_calc_crc:
00FFF0E9 034076 pshs d,x,y,u
00FFF0EB 07F0009FE clr xm_crc
00FFF0EE 07F0009FF clr xm_crc+1
00FFF0F1 0CE000000 ldu #0 ; u = byte count
xm_crc1:
00FFF0F4 0E6800 ldb ,x+ ; get byte
00FFF0F6 07F0009FC clr xm_tmp ; save in temp
00FFF0F9 0F70009FD stb xm_tmp+1
00FFF0FC 0780009FD asl xm_tmp+1 ; shift temp eight bits to left
00FFF0FF 0790009FC rol xm_tmp
00FFF102 0780009FD asl xm_tmp+1
00FFF105 0790009FC rol xm_tmp
00FFF108 0780009FD asl xm_tmp+1
00FFF10B 0790009FC rol xm_tmp
00FFF10E 0780009FD asl xm_tmp+1
00FFF111 0790009FC rol xm_tmp
00FFF114 0780009FD asl xm_tmp+1
00FFF117 0790009FC rol xm_tmp
00FFF11A 0780009FD asl xm_tmp+1
00FFF11D 0790009FC rol xm_tmp
00FFF120 0780009FD asl xm_tmp+1
00FFF123 0790009FC rol xm_tmp
00FFF126 0780009FD asl xm_tmp+1
00FFF129 0790009FC rol xm_tmp
00FFF12C 0FC0009FE ldd xm_crc ; crc = crc ^ tmp
00FFF12F 0B80009FC eora xm_tmp
00FFF132 0F80009FD eorb xm_tmp+1
00FFF135 0FD0009FE std xm_crc
00FFF138 18E000000 ldy #0
xm_crc4:
00FFF13B 0F60009FE ldb xm_crc ; get high byte
00FFF13E 0C5008 bitb #$8 ; check for $8000
00FFF140 02700E beq xm_crc2 ; no? then just go shift
00FFF142 0FC0009FE ldd xm_crc ; load
00FFF145 058 aslb ; shift
00FFF146 049 rola
00FFF147 0C8021 eorb #$021 ; and xor
00FFF149 088001 eora #$001
00FFF14B 0FD0009FE std xm_crc ; store it back
00FFF14E 020008 bra xm_crc3
xm_crc2:
00FFF150 0FC0009FE ldd xm_crc ; load
00FFF153 058 aslb ; shift
00FFF154 049 rola
00FFF155 0FD0009FE std xm_crc ; and store
xm_crc3:
00FFF158 031201 iny
00FFF15A 18C000008 cmpy #8 ; repeat eight times
00FFF15D 025FDC blo xm_crc4
00FFF15F 033401 leau 1,u ; increment byte count
00FFF161 283000080 cmpu #128
00FFF164 0FC0009FE ldd xm_crc ; we want only a 16-bit CRC
00FFF167 08400F anda #$0F
00FFF169 0FD0009FE std xm_crc
00FFF16C 025F86 blo xm_crc1
00FFF16E 0350F6 puls d,x,y,u,pc
xm_outbyteAsHex:
00FFF170 034006 pshs d
00FFF172 0FC000800 ldd CharOutVec ; get current char out vector
00FFF175 034006 pshs d ; save it
00FFF177 0CCFFE31F ldd #ScreenDisplayChar ; set output vector to screen display
00FFF17A 0FD000800 std CharOUtVec
00FFF17D 0EC602 ldd 2,s ; get passed data
00FFF17F 017FFF2B8 lbsr DispByteAsHex ; and display on-screen
*** warning 1: Long branch within short branch range could be optimized
00FFF182 0C6020 ldb #' '
00FFF184 017FFF198 lbsr ScreenDisplayChar
*** warning 1: Long branch within short branch range could be optimized
00FFF187 035006 puls d ; get back old char out vector
00FFF189 0FD000800 std CharOutVec ; and restore it
00FFF18C 035006 puls d ; restore input arguments
00FFF18E 039 rts
;------------------------------------------------------------------------------
; Check if there is a keyboard character available. If so return true (<0)
; otherwise return false (0) in accb.
3038,54 → 3601,55
;------------------------------------------------------------------------------
;
KeybdCheckForKeyDirect:
00FFEEA7 020BE7 bra DBGCheckForKey
00FFF18F 0208FF bra DBGCheckForKey
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
INCH:
00FFEEA9 034004 pshs b
00FFF191 034004 pshs b
INCH2:
00FFEEAB 0150F6FFFFFFFE0 ldb COREID
00FFEEB0 0F1FFC010 cmpb IOFocusID ; if we do not have focus, block
00FFEEB3 026FF6 bne INCH2
00FFF193 0150F6FFFFFFFE0 ldb COREID
00FFF198 0F1FFC010 cmpb IOFocusID ; if we do not have focus, block
00FFF19B 026FF6 bne INCH2
; ldb #$800 ; block if no key available, get scancode directly
; bra GetKey
; jsr [CharInVec] ; vector is being overwritten somehow
00FFEEB5 017FFFDAC lbsr SerialPeekCharDirect
00FFF19D 017FFFAD3 lbsr SerialPeekCharDirect
*** warning 1: Long branch within short branch range could be optimized
00FFEEB8 04D tsta
00FFEEB9 02B003 bmi INCH1 ; block if no key available
00FFEEBB 032601 leas 1,s ; get rid of blocking status
00FFEEBD 039 rts
; lbsr SerialGetChar
00FFF1A0 04D tsta
00FFF1A1 02B003 bmi INCH1 ; block if no key available
00FFF1A3 032601 leas 1,s ; get rid of blocking status
00FFF1A5 039 rts ; return character
INCH1:
00FFEEBE 035004 puls b ; check blocking status
00FFEEC0 05D tstb
00FFEEC1 02BFE6 bmi INCH ; if blocking, loop
00FFEEC3 0CCFFFFFF ldd #-1 ; return -1 if no char available
00FFEEC6 039 rts
00FFF1A6 035004 puls b ; check blocking status
00FFF1A8 05D tstb
00FFF1A9 02BFE6 bmi INCH ; if blocking, loop
00FFF1AB 0CCFFFFFF ldd #-1 ; return -1 if no char available
00FFF1AE 039 rts
INCHE:
00FFEEC7 08DFE0 bsr INCH
00FFEEC9 020009 bra INCHEK3
00FFF1AF 08DFE0 bsr INCH
00FFF1B1 020009 bra INCHEK3
INCHEK:
00FFEECB 08DFDC bsr INCH
00FFEECD 01507DFFFFFCA00 tst KeybdEcho
00FFEED2 02700C beq INCHEK1
00FFF1B3 08DFDC bsr INCH
00FFF1B5 01507DFFFFFCA00 tst KeybdEcho
00FFF1BA 02700C beq INCHEK1
INCHEK3:
00FFEED4 08100D cmpa #CR
00FFEED6 026005 bne INCHEK2
00FFEED8 017FFE1F7 lbsr CRLF
00FFF1BC 08100D cmpa #CR
00FFF1BE 026005 bne INCHEK2
00FFF1C0 017FFDF0F lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
00FFEEDB 020003 bra INCHEK1
00FFF1C3 020003 bra INCHEK1
INCHEK2:
00FFEEDD 017FFF439 lbsr DisplayChar
00FFF1C5 017FFF154 lbsr DisplayChar
*** warning 1: Long branch within short branch range could be optimized
INCHEK1:
00FFEEE0 039 rts
00FFF1C8 039 rts
OUTCH:
00FFEEE1 06E90F000800 jmp [CharOutVec]
00FFF1C9 06E90F000800 jmp [CharOutVec]
;------------------------------------------------------------------------------
; r1 0=echo off, non-zero = echo on
3092,8 → 3656,8
;------------------------------------------------------------------------------
;
SetKeyboardEcho:
00FFEEE5 0150F7FFFFFCA00 stb KeybdEcho
00FFEEEA 039 rts
00FFF1CD 0150F7FFFFFCA00 stb KeybdEcho
00FFF1D2 039 rts
;------------------------------------------------------------------------------
3102,9 → 3666,9
;------------------------------------------------------------------------------
ShowSprites:
00FFEEEB 0150BFFFFE103C0 stx SPRITE_CTRL+SPRITE_EN
00FFEEF0 0150FDFFFE103C2 std SPRITE_CTRL+SPRITE_EN+2
00FFEEF5 039 rts
00FFF1D3 0150BFFFFE103C0 stx SPRITE_CTRL+SPRITE_EN
00FFF1D8 0150FDFFFE103C2 std SPRITE_CTRL+SPRITE_EN+2
00FFF1DD 039 rts
;==============================================================================
; Femtiki Operating System.
3111,74 → 3675,74
;==============================================================================
OSCallTbl:
00FFEEF6 000000 fcw 0
00FFEEF8 000000 fcw 0
00FFEEFA 000000 fcw 0
00FFEEFC 000000 fcw 0
00FFEEFE 000000 fcw 0
00FFEF00 000000 fcw 0
00FFEF02 000000 fcw 0
00FFEF04 000000 fcw 0
00FFEF06 000000 fcw 0
00FFEF08 000000 fcw 0
00FFEF0A 000000 fcw 0
00FFEF0C 000000 fcw 0
00FFEF0E 000000 fcw 0
00FFEF10 000000 fcw 0
00FFEF12 000000 fcw 0
00FFEF14 000000 fcw 0
00FFEF16 000000 fcw 0
00FFEF18 000000 fcw 0
00FFEF1A 000000 fcw 0
00FFEF1C 000000 fcw 0
00FFEF1E 000000 fcw 0
00FFEF20 000000 fcw 0
00FFEF22 FFEF3F fcw ReleaseIOFocus
00FFEF24 000000 fcw 0
00FFEF26 FFEF28 fcw RequestIOFocus
00FFF1DE 000000 fcw 0
00FFF1E0 000000 fcw 0
00FFF1E2 000000 fcw 0
00FFF1E4 000000 fcw 0
00FFF1E6 000000 fcw 0
00FFF1E8 000000 fcw 0
00FFF1EA 000000 fcw 0
00FFF1EC 000000 fcw 0
00FFF1EE 000000 fcw 0
00FFF1F0 000000 fcw 0
00FFF1F2 000000 fcw 0
00FFF1F4 000000 fcw 0
00FFF1F6 000000 fcw 0
00FFF1F8 000000 fcw 0
00FFF1FA 000000 fcw 0
00FFF1FC 000000 fcw 0
00FFF1FE 000000 fcw 0
00FFF200 000000 fcw 0
00FFF202 000000 fcw 0
00FFF204 000000 fcw 0
00FFF206 000000 fcw 0
00FFF208 000000 fcw 0
00FFF20A FFF227 fcw ReleaseIOFocus
00FFF20C 000000 fcw 0
00FFF20E FFF210 fcw RequestIOFocus
NumOSFuncs EQU (*-OSCallTbl)/2
RequestIOFocus:
00FFEF28 0150F6FFFFFFFE0 ldb COREID
00FFEF2D 08EFFC000 ldx #IOFocusList
00FFEF30 03A abx
00FFEF31 0A7804 sta ,x
00FFEF33 07DFFC010 tst IOFocusID
00FFEF36 1260007D1 lbne oscx
00FFEF39 0F7FFC010 stb IOFocusID
00FFEF3C 0160007CB lbra oscx
00FFF210 0150F6FFFFFFFE0 ldb COREID
00FFF215 08EFFC000 ldx #IOFocusList
00FFF218 03A abx
00FFF219 0A7804 sta ,x
00FFF21B 07DFFC010 tst IOFocusID
00FFF21E 1260008DC lbne oscx
00FFF221 0F7FFC010 stb IOFocusID
00FFF224 0160008D6 lbra oscx
ReleaseIOFocus:
00FFEF3F 0150F6FFFFFFFE0 ldb COREID
00FFEF44 08EFFC000 ldx #IOFocusList
00FFEF47 03A abx
00FFEF48 06F804 clr ,x ; clear the request indicator
00FFEF4A 017FFF2BC lbsr CopyScreenToVirtualScreen
00FFF227 0150F6FFFFFFFE0 ldb COREID
00FFF22C 08EFFC000 ldx #IOFocusList
00FFF22F 03A abx
00FFF230 06F804 clr ,x ; clear the request indicator
00FFF232 017FFEFD7 lbsr CopyScreenToVirtualScreen
*** warning 1: Long branch within short branch range could be optimized
00FFEF4D 0F1FFC010 cmpb IOFocusID ; are we the one with the focus?
00FFEF50 1260007B7 lbne oscx
00FFF235 0F1FFC010 cmpb IOFocusID ; are we the one with the focus?
00FFF238 1260008C2 lbne oscx
; We had the focus, so now a new core needs the focus.
; Search the focus list for a requestor. If no requester
; is found, give focus to core #1.
00FFEF53 08600F lda #15
00FFF23B 08600F lda #15
riof2:
00FFEF55 05C incb
00FFEF56 0C400F andb #15
00FFEF58 03A abx
00FFEF59 06D804 tst ,x
00FFEF5B 026009 bne riof1
00FFEF5D 04A deca
00FFEF5E 026FF5 bne riof2
00FFF23D 05C incb
00FFF23E 0C400F andb #15
00FFF240 03A abx
00FFF241 06D804 tst ,x
00FFF243 026009 bne riof1
00FFF245 04A deca
00FFF246 026FF5 bne riof2
; If no focus is requested by anyone, give to core #1
00FFEF60 0C6001 ldb #1
00FFEF62 086018 lda #24
00FFEF64 0A7804 sta ,x
00FFF248 0C6001 ldb #1
00FFF24A 086018 lda #24
00FFF24C 0A7804 sta ,x
riof1:
00FFEF66 0F7FFC010 stb IOFocusID
00FFEF69 017FFF266 lbsr CopyVirtualScreenToScreen
00FFF24E 0F7FFC010 stb IOFocusID
00FFF251 017FFEF81 lbsr CopyVirtualScreenToScreen
*** warning 1: Long branch within short branch range could be optimized
00FFEF6C 01600079B lbra oscx
00FFF254 0160008A6 lbra oscx
;==============================================================================
3196,19 → 3760,19
;------------------------------------------------------------------------------
mon_srand:
00FFEF6F 18E000000 ldy #0
00FFF257 18E000000 ldy #0
mon_srand1:
00FFEF72 0151BFFFFE30604 sty PRNG+4 ; select channel
00FFEF77 01507FFFFE30608 clr PRNG+8
00FFEF7C 01507FFFFE30609 clr PRNG+9
00FFEF81 0150FDFFFE3060A std PRNG+10 ; update low half of value
00FFEF86 01507FFFFE3060C clr PRNG+12
00FFEF8B 01507FFFFE3060D clr PRNG+13
00FFEF90 0150BFFFFE3060E stx PRNG+14 ; update low half of value
00FFEF95 031201 iny
00FFEF97 18C000400 cmpy #$400 ; 1k channels
00FFEF9A 025FD6 blo mon_srand1
00FFEF9C 039 rts
00FFF25A 0151BFFFFE30604 sty PRNG+4 ; select channel
00FFF25F 01507FFFFE30608 clr PRNG+8
00FFF264 01507FFFFE30609 clr PRNG+9
00FFF269 0150FDFFFE3060A std PRNG+10 ; update low half of value
00FFF26E 01507FFFFE3060C clr PRNG+12
00FFF273 01507FFFFE3060D clr PRNG+13
00FFF278 0150BFFFFE3060E stx PRNG+14 ; update low half of value
00FFF27D 031201 iny
00FFF27F 18C000400 cmpy #$400 ; 1k channels
00FFF282 025FD6 blo mon_srand1
00FFF284 039 rts
;------------------------------------------------------------------------------
; Get a random number and generate the next one.
3220,11 → 3784,11
;------------------------------------------------------------------------------
mon_rand:
00FFEF9D 0150FDFFFE30604 std PRNG+4 ; select channel
00FFEFA2 0150BEFFFE30600 ldx PRNG+0
00FFEFA7 0150FCFFFE30602 ldd PRNG+2
00FFEFAC 0150F7FFFE30603 stb PRNG+3 ; trigger calc of next number
00FFEFB1 039 rts
00FFF285 0150FDFFFE30604 std PRNG+4 ; select channel
00FFF28A 0150BEFFFE30600 ldx PRNG+0
00FFF28F 0150FCFFFE30602 ldd PRNG+2
00FFF294 0150F7FFFE30603 stb PRNG+3 ; trigger calc of next number
00FFF299 039 rts
;==============================================================================
; System Monitor
3233,222 → 3797,253
; Command Tables
cmdTable1:
00FFEFB2 03C83E fcb '<','>'+$800
00FFEFB4 062873 fcb 'b','s'+$800
00FFEFB6 062863 fcb 'b','c'+$800
00FFEFB8 044852 fcb 'D','R'+$800
00FFEFBA 844 fcb 'D'+$800
00FFEFBB 83A fcb ':'+$800
00FFEFBC 046049847 fcb "FI",'G'+$800
00FFEFBF 04604984C fcb "FI",'L'+$800
00FFEFC2 04684C fcb 'F','L'+$800
00FFEFC4 84A fcb 'J'+$800
00FFEFC5 05204104D054045053854 fcb "RAMTES",'T'+$800
00FFEFCC 053050844 fcb "SP",'D'+$800
00FFEFCF 054049852 fcb "TI",'R'+$800
00FFEFD2 855 fcb 'U'+$800
00FFEFD3 065078069874 fcb "exi",'t'+$800
00FFEFD7 83F fcb '?'+$800
00FFEFD8 04304C853 fcb "CL",'S'+$800
00FFEFDB 053031839 fcb "S1",'9'+$800
00FFEFDE 04A044834 fcb "JD",'4'+$800
00FFEFE1 000000 fcw 0
00FFF29A 03C83E fcb '<','>'+$800
00FFF29C 04282B fcb 'B','+'+$800
00FFF29E 04282D fcb 'B','-'+$800
00FFF2A0 044852 fcb 'D','R'+$800
00FFF2A2 844 fcb 'D'+$800
00FFF2A3 83A fcb ':'+$800
00FFF2A4 046049847 fcb "FI",'G'+$800
00FFF2A7 04604984C fcb "FI",'L'+$800
00FFF2AA 04684C fcb 'F','L'+$800
00FFF2AC 84A fcb 'J'+$800
00FFF2AD 05204104D054045053854 fcb "RAMTES",'T'+$800
00FFF2B4 053050844 fcb "SP",'D'+$800
00FFF2B7 054049852 fcb "TI",'R'+$800
00FFF2BA 855 fcb 'U'+$800
00FFF2BB 065078069874 fcb "exi",'t'+$800
00FFF2BF 83F fcb '?'+$800
00FFF2C0 04304C853 fcb "CL",'S'+$800
00FFF2C3 053031839 fcb "S1",'9'+$800
00FFF2C6 04A044834 fcb "JD",'4'+$800
00FFF2C9 05804D852 fcb "XM",'R'+$800
00FFF2CC 05804D853 fcb "XM",'S'+$800
00FFF2CF 052841 fcb 'R','A'+$800
00FFF2D1 052842 fcb 'R','B'+$800
00FFF2D3 052044050852 fcb "RDP",'R'+$800
00FFF2D7 052844 fcb 'R','D'+$800
00FFF2D9 052858 fcb 'R','X'+$800
00FFF2DB 052859 fcb 'R','Y'+$800
00FFF2DD 052855 fcb 'R','U'+$800
00FFF2DF 052853 fcb 'R','S'+$800
00FFF2E1 052043043852 fcb "RCC",'R'+$800
00FFF2E5 052050843 fcb "RP",'C'+$800
00FFF2E8 04C842 fcb 'L','B'+$800
00FFF2EA 000000 fcw 0
cmdTable2:
00FFEFE3 FFF0F8 fcw Redirect
00FFEFE5 FFF13A fcw MonArmBreakpoint
00FFEFE7 FFF145 fcw MonDisarmBreakpoint
00FFEFE9 FFF54A fcw DumpRegs
00FFEFEB FFF484 fcw DumpMemory
00FFEFED FFF4E0 fcw EditMemory
00FFEFEF FE0000 fcw $FE0000 ; FIG forth
00FFEFF1 FFF520 fcw FillMemory
00FFEFF3 FFF60B fcw DumpIOFocusList
00FFEFF5 FFF595 fcw jump_to_code
00FFEFF7 FFD400 fcw $FFD400
00FFEFF9 FF8000 fcw $FF8000 ; sprite demo
00FFEFFB FFE4F4 fcw rtc_read
00FFEFFD FF8003 fcw $FF8003 ; unassembler
00FFEFFF FFF6F3 fcw xitMonitor
00FFF001 FFF11E fcw PromptHelp
00FFF003 FFF126 fcw PromptClearscreen
00FFF005 FFEE37 fcw S19Loader
00FFF007 FFD400 fcw $FFD400
00FFF2EC FFF427 fcw Redirect
00FFF2EE FFF469 fcw MonArmBreakpoint
00FFF2F0 FFF474 fcw MonDisarmBreakpoint
00FFF2F2 FFF899 fcw DumpRegs
00FFF2F4 FFF7D0 fcw DumpMemory
00FFF2F6 FFF82C fcw EditMemory
00FFF2F8 FE0000 fcw $FE0000 ; FIG forth
00FFF2FA FFF86F fcw FillMemory
00FFF2FC FFF9F5 fcw DumpIOFocusList
00FFF2FE FFF980 fcw jump_to_code
00FFF300 FFD400 fcw $FFD400
00FFF302 FF8000 fcw $FF8000 ; sprite demo
00FFF304 FFE524 fcw rtc_read
00FFF306 FF8003 fcw $FF8003 ; unassembler
00FFF308 FFFAE6 fcw xitMonitor
00FFF30A FFF44D fcw PromptHelp
00FFF30C FFF455 fcw PromptClearscreen
00FFF30E FFEE8F fcw S19Loader
00FFF310 FFD400 fcw $FFD400
00FFF312 FFEFBA fcw xm_ReceiveStart
00FFF314 FFEF2C fcw xm_SendStart
00FFF316 FFF8E4 fcw SetRegA
00FFF318 FFF8F3 fcw SetRegB
00FFF31A FFF94D fcw SetRegDPR
00FFF31C FFF902 fcw SetRegD
00FFF31E FFF911 fcw SetRegX
00FFF320 FFF920 fcw SetRegY
00FFF322 FFF92F fcw SetRegU
00FFF324 FFF93E fcw SetRegS
00FFF326 FFF95C fcw SetRegCCR
00FFF328 FFF96B fcw SetRegPC
00FFF32A FFFBD2 fcw ListBreakpoints
CmdPrompt:
00FFF009 017FFE0C6 lbsr CRLF
00FFF32C 017FFDDA3 lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
00FFF00C 0C6024 ldb #'$'
00FFF00E 017FFFED0 lbsr OUTCH
00FFF32F 0C6024 ldb #'$'
00FFF331 017FFFE95 lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF011 016FFFECD lbra OUTCH
00FFF334 016FFFE92 lbra OUTCH
*** warning 1: Long branch within short branch range could be optimized
msgF09Starting:
00FFF014 04606506D07406906B069 fcb "Femtiki F09 Multi-core OS Starting",CR,LF,0
00FFF01B 02004603003902004D075
00FFF022 06C07406902D06306F072
00FFF029 06502004F053020053074
00FFF030 06107207406906E06700D
00FFF037 00A000
00FFF337 04606506D07406906B069 fcb "Femtiki F09 Multi-core OS Starting",CR,LF,0
00FFF33E 02004603003902004D075
00FFF345 06C07406902D06306F072
00FFF34C 06502004F053020053074
00FFF353 06107207406906E06700D
00FFF35A 00A000
Monitor:
00FFF039 0FC00092C ldd mon_init ; check special code to see if monitor has been initialized
00FFF03C 18312D687 cmpd #1234567
00FFF03F 02704D beq mon1
00FFF041 07F000810 clr BreakpointFlag
00FFF044 07F000811 clr NumSetBreakpoints
00FFF047 0CC00007B ldd #123
00FFF04A 08E00028E ldx #654
00FFF04D 017FFFF1F lbsr mon_srand
00FFF35C 01C0EF andcc #$EF ; SWI disables interrupts, re-enable them
00FFF35E 08601F lda #31 ; Timer is IRQ #31
00FFF360 0150B7FFFE3F010 sta PIC+16 ; register 16 is edge sense reset reg
00FFF365 0FC00092C ldd mon_init ; check special code to see if monitor has been initialized
00FFF368 18312D687 cmpd #1234567
00FFF36B 02704D beq mon1
00FFF36D 07F000810 clr BreakpointFlag
00FFF370 07F000811 clr NumSetBreakpoints
00FFF373 0CC00007B ldd #123
00FFF376 08E00028E ldx #654
00FFF379 017FFFEDB lbsr mon_srand
*** warning 1: Long branch within short branch range could be optimized
00FFF050 0CCFFF014 ldd #msgF09Starting
00FFF053 017FFF384 lbsr DisplayString
00FFF37C 0CCFFF337 ldd #msgF09Starting
00FFF37F 017FFF05B lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFF056 0CCFFF2CF ldd #HelpMsg
00FFF059 017FFF37E lbsr DisplayString
00FFF382 0CCFFF5FE ldd #HelpMsg
00FFF385 017FFF055 lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFF05C 0CCFFF009 ldd #CmdPrompt
00FFF05F 0FD000808 std CmdPromptJI
00FFF062 0CCFFF2B6 ldd #DisplayErr
00FFF065 0FD00080C std MonErrVec
00FFF068 0CC0063FF ldd #$63FF ; default app stack
00FFF06B 0FD000908 std mon_SSAVE
00FFF06E 07F00090E clr mon_DPRSAVE ;
00FFF071 01F0A8 tfr ccr,a
00FFF073 0B700090F sta mon_CCRSAVE
00FFF076 07F00090A clr mon_PCSAVE
00FFF079 0CCFFF039 ldd #Monitor
00FFF07C 0FD00090B std mon_PCSAVE+1
00FFF07F 07F000902 clr mon_XSAVE
00FFF082 07F000904 clr mon_YSAVE
00FFF085 07F000906 clr mon_USAVE
00FFF088 0CC12D687 ldd #1234567
00FFF08B 0FD00092C std mon_init
00FFF388 0CCFFF32C ldd #CmdPrompt
00FFF38B 0FD000808 std CmdPromptJI
00FFF38E 0CCFFF5E5 ldd #DisplayErr
00FFF391 0FD00080C std MonErrVec
00FFF394 0CC0063FF ldd #$63FF ; default app stack
00FFF397 0FD000908 std mon_SSAVE
00FFF39A 07F00090E clr mon_DPRSAVE ;
00FFF39D 01F0A8 tfr ccr,a
00FFF39F 0B700090F sta mon_CCRSAVE
00FFF3A2 07F00090A clr mon_PCSAVE
00FFF3A5 0CCFFF35C ldd #Monitor
00FFF3A8 0FD00090B std mon_PCSAVE+1
00FFF3AB 07F000902 clr mon_XSAVE
00FFF3AE 07F000904 clr mon_YSAVE
00FFF3B1 07F000906 clr mon_USAVE
00FFF3B4 0CC12D687 ldd #1234567
00FFF3B7 0FD00092C std mon_init
mon1:
00FFF08E 03280F006FFF leas $6FFF ; reset stack pointer
00FFF092 05F clrb ; turn off keyboard echo
00FFF093 017FFFE4F lbsr SetKeyboardEcho
00FFF3BA 03280F006FFF leas $6FFF ; reset stack pointer
00FFF3BE 05F clrb ; turn off keyboard echo
00FFF3BF 017FFFE0B lbsr SetKeyboardEcho
*** warning 1: Long branch within short branch range could be optimized
; Reset IO vectors
00FFF096 0CCFFEC64 ldd #SerialPeekCharDirect
00FFF099 0FD000804 std CharInVec
00FFF09C 0CCFFE319 ldd #DisplayChar
00FFF09F 0FD000800 std CharOutVec
00FFF0A2 0CCFFF009 ldd #CmdPrompt
00FFF0A5 0FD000808 std CmdPromptJI
00FFF3C2 0CCFFEC73 ldd #SerialPeekCharDirect
00FFF3C5 0FD000804 std CharInVec
00FFF3C8 0CCFFE31C ldd #DisplayChar
00FFF3CB 0FD000800 std CharOutVec
00FFF3CE 0CCFFF32C ldd #CmdPrompt
00FFF3D1 0FD000808 std CmdPromptJI
; jsr RequestIOFocus
PromptLn:
00FFF0A8 0AD90F000808 jsr [CmdPromptJI]
00FFF3D4 0AD90F000808 jsr [CmdPromptJI]
; Get characters until a CR is keyed
Prompt3:
00FFF0AC 0CCFFFFFF ldd #-1 ; block until key present
00FFF0AF 017FFFDF7 lbsr INCH
00FFF3D8 0CCFFFFFF ldd #-1 ; block until key present
00FFF3DB 017FFFDB3 lbsr INCH
*** warning 1: Long branch within short branch range could be optimized
00FFF0B2 0C100D cmpb #CR ; carriage return?
00FFF0B4 027005 beq Prompt1
00FFF0B6 017FFFE28 lbsr OUTCH ; spit out the character
00FFF3DE 04D tsta ; should not get this with blocking
00FFF3DF 02BFF7 bmi Prompt3
00FFF3E1 0C100D cmpb #CR ; carriage return?
00FFF3E3 027005 beq Prompt1
00FFF3E5 017FFFDE1 lbsr OUTCH ; spit out the character
*** warning 1: Long branch within short branch range could be optimized
00FFF0B9 020FF1 bra Prompt3 ; and keep going
00FFF3E8 020FEE bra Prompt3 ; and keep going
; Process the screen line that the CR was keyed on
;
Prompt1:
00FFF0BB 0CC005050 ldd #$5050
00FFF0BE 0150FDFFFE60001 std LEDS
00FFF3EA 0CC005050 ldd #$5050
00FFF3ED 0150FDFFFE60001 std LEDS
; ldb RunningID
; cmpb #61
; bhi Prompt3
00FFF0C3 00F111 clr CursorCol ; go back to the start of the line
00FFF0C5 017FFF22A lbsr CalcScreenLoc ; calc screen memory location
00FFF3F2 00F111 clr CursorCol ; go back to the start of the line
00FFF3F4 017FFEEFE lbsr CalcScreenLoc ; calc screen memory location
*** warning 1: Long branch within short branch range could be optimized
00FFF0C8 01F002 tfr d,y
00FFF3F7 01F002 tfr d,y
skipDollar:
00FFF0CA 08D067 bsr MonGetNonSpace
00FFF0CC 0C1024 cmpb #'$'
00FFF0CE 027FFA beq skipDollar ; skip over '$' prompt character
00FFF3F9 08D067 bsr MonGetNonSpace
00FFF3FB 0C1024 cmpb #'$'
00FFF3FD 027FFA beq skipDollar ; skip over '$' prompt character
; Dispatch based on command
;
00FFF0D0 0313FF dey
00FFF0D2 01F023 tfr y,u ; save off input position
00FFF0D4 05F clrb
00FFF0D5 08EFFEFB2 ldx #cmdTable1
00FFF3FF 0313FF dey
00FFF401 01F023 tfr y,u ; save off input position
00FFF403 05F clrb
00FFF404 08EFFF29A ldx #cmdTable1
parseCmd1:
00FFF0D8 0A6A00 lda ,y+ ; get input character
00FFF0DA 06D804 tst ,x ; test for end of command
00FFF0DC 02B00F bmi endOfWord ;
00FFF0DE 0A1800 cmpa ,x+ ; does input match command?
00FFF0E0 027FF6 beq parseCmd1
00FFF407 0A6A00 lda ,y+ ; get input character
00FFF409 06D804 tst ,x ; test for end of command
00FFF40B 02B00F bmi endOfWord ;
00FFF40D 0A1800 cmpa ,x+ ; does input match command?
00FFF40F 027FF6 beq parseCmd1
scanNextWord:
00FFF0E2 06D800 tst ,x+
00FFF0E4 027F53 beq Monitor ; if end of table reached, not a command
00FFF0E6 02AFFA bpl scanNextWord
00FFF0E8 05C incb
00FFF0E9 01F032 tfr u,y ; reset input pointer
00FFF0EB 020FEB bra parseCmd1 ; try again
00FFF411 06D800 tst ,x+
00FFF413 027F47 beq Monitor ; if end of table reached, not a command
00FFF415 02AFFA bpl scanNextWord
00FFF417 05C incb
00FFF418 01F032 tfr u,y ; reset input pointer
00FFF41A 020FEB bra parseCmd1 ; try again
endOfWord:
00FFF0ED 0A8804 eora ,x
00FFF0EF 048 asla
00FFF0F0 026FF0 bne scanNextWord
00FFF41C 0A8804 eora ,x
00FFF41E 048 asla
00FFF41F 026FF0 bne scanNextWord
; we found the command in the table
00FFF0F2 058 aslb ; b = word index
00FFF0F3 08EFFEFE3 ldx #cmdTable2
00FFF0F6 06E905 jmp [b,x] ; execute command
00FFF421 058 aslb ; b = word index
00FFF422 08EFFF2EC ldx #cmdTable2
00FFF425 06E905 jmp [b,x] ; execute command
Redirect:
00FFF0F8 08D034 bsr MonGetch
00FFF0FA 0C1073 cmpb #'s'
00FFF0FC 02600E bne Prompt2a
00FFF0FE 0CCFFEC64 ldd #SerialPeekCharDirect
00FFF101 0FD000804 std CharInVec
00FFF104 0CCFFEC88 ldd #SerialPutChar
00FFF107 0FD000800 std CharOutVec
00FFF10A 020F2D bra Monitor
00FFF427 08D034 bsr MonGetch
00FFF429 0C1073 cmpb #'s'
00FFF42B 02600E bne Prompt2a
00FFF42D 0CCFFEC73 ldd #SerialPeekCharDirect
00FFF430 0FD000804 std CharInVec
00FFF433 0CCFFEC9A ldd #SerialPutChar
00FFF436 0FD000800 std CharOutVec
00FFF439 020F21 bra Monitor
Prompt2a:
00FFF10C 0C1063 cmpb #'c'
00FFF10E 026F29 bne Monitor
00FFF110 0CCFFEA92 ldd #GetKey
00FFF113 0FD000804 std CharInVec
00FFF116 0CCFFE319 ldd #DisplayChar
00FFF119 0FD000800 std CharOutVec
00FFF11C 020F1B bra Monitor
00FFF43B 0C1063 cmpb #'c'
00FFF43D 026F1D bne Monitor
00FFF43F 0CCFFEA92 ldd #GetKey
00FFF442 0FD000804 std CharInVec
00FFF445 0CCFFE31C ldd #DisplayChar
00FFF448 0FD000800 std CharOutVec
00FFF44B 020F0F bra Monitor
PromptHelp:
00FFF11E 0CCFFF2CF ldd #HelpMsg
00FFF121 017FFF2B6 lbsr DisplayString
00FFF44D 0CCFFF5FE ldd #HelpMsg
00FFF450 017FFEF8A lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFF124 020F13 bra Monitor
00FFF453 020F07 bra Monitor
PromptClearscreen:
00FFF126 017FFF110 lbsr ClearScreen
00FFF455 017FFEDE4 lbsr ClearScreen
*** warning 1: Long branch within short branch range could be optimized
00FFF129 017FFF184 lbsr HomeCursor
00FFF458 017FFEE58 lbsr HomeCursor
*** warning 1: Long branch within short branch range could be optimized
00FFF12C 020F0B bra Monitor
00FFF45B 020EFF bra Monitor
MonGetch:
00FFF12E 0E6A04 ldb ,y
00FFF130 031201 iny
00FFF132 039 rts
00FFF45D 0E6A04 ldb ,y
00FFF45F 031201 iny
00FFF461 039 rts
MonGetNonSpace:
00FFF133 08DFF9 bsr MonGetCh
00FFF135 0C1020 cmpb #' '
00FFF137 027FFA beq MonGetNonSpace
00FFF139 039 rts
00FFF462 08DFF9 bsr MonGetCh
00FFF464 0C1020 cmpb #' '
00FFF466 027FFA beq MonGetNonSpace
00FFF468 039 rts
MonArmBreakpoint:
00FFF13A 017000611 lbsr ArmBreakpoint
00FFF13D 0C6FFF ldb #$FFF
00FFF13F 0F7000810 stb BreakpointFlag
00FFF142 016FFFEF4 lbra Monitor
00FFF469 0170006D5 lbsr ArmBreakpoint
00FFF46C 0C6FFF ldb #$FFF
00FFF46E 0F7000810 stb BreakpointFlag
00FFF471 016FFFEE8 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
MonDisarmBreakpoint:
00FFF145 017000632 lbsr DisarmBreakpoint
00FFF148 016FFFEEE lbra Monitor
00FFF474 017000700 lbsr DisarmBreakpoint
00FFF477 016FFFEE2 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
3459,74 → 4054,74
;
ignBlanks:
ignBlanks1:
00FFF14B 08DFE1 bsr MonGetch
00FFF14D 0C1020 cmpb #' '
00FFF14F 027FFA beq ignBlanks1
00FFF151 0313FF dey
00FFF153 039 rts
00FFF47A 08DFE1 bsr MonGetch
00FFF47C 0C1020 cmpb #' '
00FFF47E 027FFA beq ignBlanks1
00FFF480 0313FF dey
00FFF482 039 rts
;------------------------------------------------------------------------------
; Multiply number in work area by 10.
;------------------------------------------------------------------------------
Times10:
00FFF154 034006 pshs d
00FFF156 0FC000910 ldd mon_numwka ; make a copy of the number
00FFF159 0FD000918 std mon_numwka+8
00FFF15C 0FC000912 ldd mon_numwka+2
00FFF15F 0FD00091A std mon_numwka+10
00FFF162 08D05B bsr shl_numwka ; shift left = *2
00FFF164 08D059 bsr shl_numwka ; shift left = *4
00FFF166 0FC000912 ldd mon_numwka+2 ; add in original value
00FFF169 0F300091A addd mon_numwka+10 ; = *5
00FFF16C 0F6000911 ldb mon_numwka+1
00FFF16F 0F9000919 adcb mon_numwka+9
00FFF172 0F7000911 stb mon_numwka+1
00FFF175 0B6000910 lda mon_numwka+0
00FFF178 0B9000918 adca mon_numwka+8
00FFF17B 0B7000910 sta mon_numwka+0
00FFF17E 08D03F bsr shl_numwka ; shift left = * 10
00FFF180 035086 puls d,pc
00FFF483 034006 pshs d
00FFF485 0FC000910 ldd mon_numwka ; make a copy of the number
00FFF488 0FD000918 std mon_numwka+8
00FFF48B 0FC000912 ldd mon_numwka+2
00FFF48E 0FD00091A std mon_numwka+10
00FFF491 08D05B bsr shl_numwka ; shift left = *2
00FFF493 08D059 bsr shl_numwka ; shift left = *4
00FFF495 0FC000912 ldd mon_numwka+2 ; add in original value
00FFF498 0F300091A addd mon_numwka+10 ; = *5
00FFF49B 0F6000911 ldb mon_numwka+1
00FFF49E 0F9000919 adcb mon_numwka+9
00FFF4A1 0F7000911 stb mon_numwka+1
00FFF4A4 0B6000910 lda mon_numwka+0
00FFF4A7 0B9000918 adca mon_numwka+8
00FFF4AA 0B7000910 sta mon_numwka+0
00FFF4AD 08D03F bsr shl_numwka ; shift left = * 10
00FFF4AF 035086 puls d,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
GetTwoParams:
00FFF182 08DFC7 bsr ignBlanks
00FFF184 08D0DC bsr GetNumber ; get start address of dump
00FFF186 0FC000910 ldd mon_numwka
00FFF189 0FD000920 std mon_r1
00FFF18C 0FC000912 ldd mon_numwka+2
00FFF18F 0FD000922 std mon_r1+2
00FFF192 08DFB7 bsr ignBlanks
00FFF194 08D0CC bsr GetNumber ; get end address of dump
00FFF196 0FC000910 ldd mon_numwka
00FFF199 0FD000924 std mon_r2
00FFF19C 0FC000912 ldd mon_numwka+2
00FFF19F 0FD000926 std mon_r2+2
00FFF1A2 039 rts
00FFF4B1 08DFC7 bsr ignBlanks
00FFF4B3 08D0DC bsr GetNumber ; get start address of dump
00FFF4B5 0FC000910 ldd mon_numwka
00FFF4B8 0FD000920 std mon_r1
00FFF4BB 0FC000912 ldd mon_numwka+2
00FFF4BE 0FD000922 std mon_r1+2
00FFF4C1 08DFB7 bsr ignBlanks
00FFF4C3 08D0CC bsr GetNumber ; get end address of dump
00FFF4C5 0FC000910 ldd mon_numwka
00FFF4C8 0FD000924 std mon_r2
00FFF4CB 0FC000912 ldd mon_numwka+2
00FFF4CE 0FD000926 std mon_r2+2
00FFF4D1 039 rts
;------------------------------------------------------------------------------
; Get a range, the end must be greater or equal to the start.
;------------------------------------------------------------------------------
GetRange:
00FFF1A3 08DFDD bsr GetTwoParams
00FFF1A5 0FC000926 ldd mon_r2+2
00FFF1A8 0B3000922 subd mon_r1+2
00FFF1AB 0FC000924 ldd mon_r2
00FFF1AE 0F2000921 sbcb mon_r1+1
00FFF1B1 0B2000920 sbca mon_r1
00FFF1B4 124000007 lbcc grng1
00FFF1B7 0AD90F00080C jsr [MonErrVec]
00FFF1BB 016FFFE7B lbra Monitor
00FFF4D2 08DFDD bsr GetTwoParams
00FFF4D4 0FC000926 ldd mon_r2+2
00FFF4D7 0B3000922 subd mon_r1+2
00FFF4DA 0FC000924 ldd mon_r2
00FFF4DD 0F2000921 sbcb mon_r1+1
00FFF4E0 0B2000920 sbca mon_r1
00FFF4E3 124000007 lbcc grng1
00FFF4E6 0AD90F00080C jsr [MonErrVec]
00FFF4EA 016FFFE6F lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
grng1:
00FFF1BE 039 rts
00FFF4ED 039 rts
shl_numwka:
00FFF1BF 078000913 asl mon_numwka+3
00FFF1C2 079000912 rol mon_numwka+2
00FFF1C5 079000911 rol mon_numwka+1
00FFF1C8 079000910 rol mon_numwka
00FFF1CB 039 rts
00FFF4EE 078000913 asl mon_numwka+3
00FFF4F1 079000912 rol mon_numwka+2
00FFF4F4 079000911 rol mon_numwka+1
00FFF4F7 079000910 rol mon_numwka
00FFF4FA 039 rts
;------------------------------------------------------------------------------
; Get a hexidecimal number. Maximum of twelve digits.
3538,89 → 4133,89
;------------------------------------------------------------------------------
;
GetHexNumber:
00FFF1CC 04F05F clrd
00FFF1CE 0FD000910 std mon_numwka ; zero out work area
00FFF1D1 0FD000912 std mon_numwka+2
00FFF1D4 034010 pshs x
00FFF1D6 08E000000 ldx #0 ; max 12 eight digits
00FFF4FB 04F05F clrd
00FFF4FD 0FD000910 std mon_numwka ; zero out work area
00FFF500 0FD000912 std mon_numwka+2
00FFF503 034010 pshs x
00FFF505 08E000000 ldx #0 ; max 12 eight digits
gthxn2:
00FFF1D9 08DF53 bsr MonGetch
00FFF1DB 08D093 bsr AsciiToHexNybble
00FFF1DD 0C1FFF cmpb #-1
00FFF1DF 027017 beq gthxn1
00FFF1E1 08DFDC bsr shl_numwka
00FFF1E3 08DFDA bsr shl_numwka
00FFF1E5 08DFD8 bsr shl_numwka
00FFF1E7 08DFD6 bsr shl_numwka
00FFF1E9 0C400F andb #$0f
00FFF1EB 0FA000913 orb mon_numwka+3
00FFF1EE 0F7000913 stb mon_numwka+3
00FFF1F1 030001 inx
00FFF1F3 08C00000C cmpx #12
00FFF1F6 025FE1 blo gthxn2
00FFF508 08DF53 bsr MonGetch
00FFF50A 08D093 bsr AsciiToHexNybble
00FFF50C 0C1FFF cmpb #-1
00FFF50E 027017 beq gthxn1
00FFF510 08DFDC bsr shl_numwka
00FFF512 08DFDA bsr shl_numwka
00FFF514 08DFD8 bsr shl_numwka
00FFF516 08DFD6 bsr shl_numwka
00FFF518 0C400F andb #$0f
00FFF51A 0FA000913 orb mon_numwka+3
00FFF51D 0F7000913 stb mon_numwka+3
00FFF520 030001 inx
00FFF522 08C00000C cmpx #12
00FFF525 025FE1 blo gthxn2
gthxn1:
00FFF1F8 01F010 tfr x,d
00FFF1FA 035090 puls x,pc
00FFF527 01F010 tfr x,d
00FFF529 035090 puls x,pc
GetBinNumber:
00FFF1FC 04F05F clrd
00FFF1FE 0FD000910 std mon_numwka
00FFF201 0FD000912 std mon_numwka+2
00FFF204 034010 pshs x
00FFF206 08E000000 ldx #0
00FFF52B 04F05F clrd
00FFF52D 0FD000910 std mon_numwka
00FFF530 0FD000912 std mon_numwka+2
00FFF533 034010 pshs x
00FFF535 08E000000 ldx #0
gtbin2:
00FFF209 08DF23 bsr MonGetch
00FFF20B 08D099 bsr AsciiToBinDigit
00FFF20D 05D tstb
00FFF20E 02B00F bmi gtbin1
00FFF210 08DFAD bsr shl_numwka
00FFF212 0FA000913 orb mon_numwka+3
00FFF215 0F7000913 stb mon_numwka+3
00FFF218 030001 inx
00FFF21A 08C000030 cpx #48
00FFF21D 025FEA blo gtbin2
00FFF538 08DF23 bsr MonGetch
00FFF53A 08D099 bsr AsciiToBinDigit
00FFF53C 05D tstb
00FFF53D 02B00F bmi gtbin1
00FFF53F 08DFAD bsr shl_numwka
00FFF541 0FA000913 orb mon_numwka+3
00FFF544 0F7000913 stb mon_numwka+3
00FFF547 030001 inx
00FFF549 08C000030 cpx #48
00FFF54C 025FEA blo gtbin2
gtbin1:
00FFF21F 01F010 tfr x,d
00FFF221 035090 puls x,pc
00FFF54E 01F010 tfr x,d
00FFF550 035090 puls x,pc
GetDecNumber:
00FFF223 04F05F clrd
00FFF225 0FD000910 std mon_numwka
00FFF228 0FD000912 std mon_numwka+2
00FFF22B 034010 pshs x
00FFF22D 08E000000 ldx #0
00FFF552 04F05F clrd
00FFF554 0FD000910 std mon_numwka
00FFF557 0FD000912 std mon_numwka+2
00FFF55A 034010 pshs x
00FFF55C 08E000000 ldx #0
gtdec2:
00FFF230 08DEFC bsr MonGetch
00FFF232 08D064 bsr AsciiToDecDigit
00FFF234 05D tstb
00FFF235 02B027 bmi gtdec1
00FFF237 08DF1B bsr Times10
00FFF239 0FB000913 addb mon_numwka+3
00FFF23C 0F7000913 stb mon_numwka+3
00FFF23F 0F6000912 ldb mon_numwka+2
00FFF242 0C9000 adcb #0
00FFF244 0F7000912 stb mon_numwka+2
00FFF247 0F6000911 ldb mon_numwka+1
00FFF24A 0C9000 adcb #0
00FFF24C 0F7000911 stb mon_numwka+1
00FFF24F 0F6000910 ldb mon_numwka+0
00FFF252 0C9000 adcb #0
00FFF254 0F7000910 stb mon_numwka+0
00FFF257 030001 inx
00FFF259 08C00000F cpx #15
00FFF25C 025FD2 blo gtdec2
00FFF55F 08DEFC bsr MonGetch
00FFF561 08D064 bsr AsciiToDecDigit
00FFF563 05D tstb
00FFF564 02B027 bmi gtdec1
00FFF566 08DF1B bsr Times10
00FFF568 0FB000913 addb mon_numwka+3
00FFF56B 0F7000913 stb mon_numwka+3
00FFF56E 0F6000912 ldb mon_numwka+2
00FFF571 0C9000 adcb #0
00FFF573 0F7000912 stb mon_numwka+2
00FFF576 0F6000911 ldb mon_numwka+1
00FFF579 0C9000 adcb #0
00FFF57B 0F7000911 stb mon_numwka+1
00FFF57E 0F6000910 ldb mon_numwka+0
00FFF581 0C9000 adcb #0
00FFF583 0F7000910 stb mon_numwka+0
00FFF586 030001 inx
00FFF588 08C00000F cpx #15
00FFF58B 025FD2 blo gtdec2
gtdec1:
00FFF25E 01F010 tfr x,d
00FFF260 035090 puls x,pc
00FFF58D 01F010 tfr x,d
00FFF58F 035090 puls x,pc
GetNumber:
00FFF262 08DECA bsr MonGetch
00FFF264 0C102B cmpb #'+'
00FFF266 027FBB beq GetDecNumber
00FFF268 0C1025 cmpb #'%'
00FFF26A 027F90 beq GetBinNumber
00FFF26C 0313FF dey
00FFF26E 020F5C bra GetHexNumber
00FFF591 08DECA bsr MonGetch
00FFF593 0C102B cmpb #'+'
00FFF595 027FBB beq GetDecNumber
00FFF597 0C1025 cmpb #'%'
00FFF599 027F90 beq GetBinNumber
00FFF59B 0313FF dey
00FFF59D 020F5C bra GetHexNumber
; phx
; push r4
3650,169 → 4245,173
;------------------------------------------------------------------------------
;
AsciiToHexNybble:
00FFF270 0C1030 cmpb #'0'
00FFF272 025021 blo gthx3
00FFF274 0C1039 cmpb #'9'
00FFF276 022003 bhi gthx5
00FFF278 0C0030 subb #'0'
00FFF27A 039 rts
00FFF59F 0C1030 cmpb #'0'
00FFF5A1 025021 blo gthx3
00FFF5A3 0C1039 cmpb #'9'
00FFF5A5 022003 bhi gthx5
00FFF5A7 0C0030 subb #'0'
00FFF5A9 039 rts
gthx5:
00FFF27B 0C1041 cmpb #'A'
00FFF27D 025016 blo gthx3
00FFF27F 0C1046 cmpb #'F'
00FFF281 022005 bhi gthx6
00FFF283 0C0041 subb #'A'
00FFF285 0CB00A addb #10
00FFF287 039 rts
00FFF5AA 0C1041 cmpb #'A'
00FFF5AC 025016 blo gthx3
00FFF5AE 0C1046 cmpb #'F'
00FFF5B0 022005 bhi gthx6
00FFF5B2 0C0041 subb #'A'
00FFF5B4 0CB00A addb #10
00FFF5B6 039 rts
gthx6:
00FFF288 0C1061 cmpb #'a'
00FFF28A 025009 blo gthx3
00FFF28C 0C107A cmpb #'z'
00FFF28E 022005 bhi gthx3
00FFF290 0C0061 subb #'a'
00FFF292 0CB00A addb #10
00FFF294 039 rts
00FFF5B7 0C1061 cmpb #'a'
00FFF5B9 025009 blo gthx3
00FFF5BB 0C107A cmpb #'z'
00FFF5BD 022005 bhi gthx3
00FFF5BF 0C0061 subb #'a'
00FFF5C1 0CB00A addb #10
00FFF5C3 039 rts
gthx3:
00FFF295 0C6FFF ldb #-1 ; not a hex number
00FFF297 039 rts
00FFF5C4 0C6FFF ldb #-1 ; not a hex number
00FFF5C6 039 rts
AsciiToDecDigit:
00FFF298 0C1030 cmpb #'0'
00FFF29A 025007 blo gtdc3
00FFF29C 0C1039 cmpb #'9'
00FFF29E 022003 bhi gtdc3
00FFF2A0 0C0030 subb #'0'
00FFF2A2 039 rts
00FFF5C7 0C1030 cmpb #'0'
00FFF5C9 025007 blo gtdc3
00FFF5CB 0C1039 cmpb #'9'
00FFF5CD 022003 bhi gtdc3
00FFF5CF 0C0030 subb #'0'
00FFF5D1 039 rts
gtdc3:
00FFF2A3 0C6FFF ldb #-1
00FFF2A5 039 rts
00FFF5D2 0C6FFF ldb #-1
00FFF5D4 039 rts
AsciiToBinDigit:
00FFF2A6 0C1030 cmpb #'0'
00FFF2A8 026002 bne abd1
00FFF2AA 05F clrb
00FFF2AB 039 rts
00FFF5D5 0C1030 cmpb #'0'
00FFF5D7 026002 bne abd1
00FFF5D9 05F clrb
00FFF5DA 039 rts
abd1:
00FFF2AC 0C1031 cmpb #'1'
00FFF2AE 026003 bne abd2
00FFF2B0 0C6001 ldb #1
00FFF2B2 039 rts
00FFF5DB 0C1031 cmpb #'1'
00FFF5DD 026003 bne abd2
00FFF5DF 0C6001 ldb #1
00FFF5E1 039 rts
abd2:
00FFF2B3 0C6FFF ldb #-1
00FFF2B5 039 rts
00FFF5E2 0C6FFF ldb #-1
00FFF5E4 039 rts
DisplayErr:
00FFF2B6 0CCFFF2C7 ldd #msgErr
00FFF2B9 017FFF11E lbsr DisplayString
00FFF5E5 0CCFFF5F6 ldd #msgErr
00FFF5E8 017FFEDF2 lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFF2BC 07EFFF039 jmp Monitor
00FFF5EB 07EFFF35C jmp Monitor
DisplayStringDX
00FFF2BF 0DD024 std Strptr
00FFF2C1 09F026 stx Strptr+2
00FFF2C3 0BDFFE3DA jsr DisplayString
00FFF2C6 039 rts
00FFF5EE 0DD024 std Strptr
00FFF5F0 09F026 stx Strptr+2
00FFF5F2 0BDFFE3DD jsr DisplayString
00FFF5F5 039 rts
msgErr:
00FFF2C7 02A02A04507207200D00A fcb "**Err",CR,LF,0
00FFF2CE 000
00FFF5F6 02A02A04507207200D00A fcb "**Err",CR,LF,0
00FFF5FD 000
HelpMsg:
00FFF2CF 03F02003D020044069073 fcb "? = Display help",CR,LF
00FFF2D6 07006C061079020068065
00FFF2DD 06C07000D00A
00FFF2E1 04304C05302003D020063 fcb "CLS = clear screen",CR,LF
00FFF2E8 06C065061072020073063
00FFF2EF 07206506506E00D00A
00FFF2F5 06207302003D020073065 fcb "bs = set breakpoint",CR,LF
00FFF2FC 07402006207206506106B
00FFF303 07006F06906E07400D00A
00FFF30A 06206302003D02006306C fcb "bc = clear breakpoint",CR,LF
00FFF311 065061072020062072065
00FFF318 06106B07006F06906E074
00FFF31F 00D00A
00FFF5FE 03F02003D020044069073 fcb "? = Display help",CR,LF
00FFF605 07006C061079020068065
00FFF60C 06C07000D00A
00FFF610 04304C05302003D020063 fcb "CLS = clear screen",CR,LF
00FFF617 06C065061072020073063
00FFF61E 07206506506E00D00A
00FFF624 06202B02003D020073065 fcb "b+ = set breakpoint",CR,LF
00FFF62B 07402006207206506106B
00FFF632 07006F06906E07400D00A
00FFF639 06202D02003D02006306C fcb "b- = clear breakpoint",CR,LF
00FFF640 065061072020062072065
00FFF647 06106B07006F06906E074
00FFF64E 00D00A
; db "S = Boot from SD Card",CR,LF
00FFF321 03A02003D020045064069 fcb ": = Edit memory bytes",CR,LF
00FFF328 07402006D06506D06F072
00FFF32F 079020062079074065073
00FFF336 00D00A
00FFF650 03A02003D020045064069 fcb ": = Edit memory bytes",CR,LF
00FFF657 07402006D06506D06F072
00FFF65E 079020062079074065073
00FFF665 00D00A
; db "L = Load sector",CR,LF
; db "W = Write sector",CR,LF
00FFF338 04405202003D020044075 fcb "DR = Dump registers",CR,LF
00FFF33F 06D070020072065067069
00FFF346 07307406507207300D00A
00FFF34D 04402003D02004407506D fcb "D = Dump memory",CR,LF
00FFF354 07002006D06506D06F072
00FFF35B 07900D00A
00FFF35E 04602003D02004606906C fcb "F = Fill memory",CR,LF
00FFF365 06C02006D06506D06F072
00FFF36C 07900D00A
00FFF36F 04604C02003D020044075 fcb "FL = Dump I/O Focus List",CR,LF
00FFF376 06D07002004902F04F020
00FFF37D 04606F06307507302004C
00FFF384 06907307400D00A
00FFF667 04405202003D020044075 fcb "DR = Dump registers",CR,LF
00FFF66E 06D070020072065067069
00FFF675 07307406507207300D00A
00FFF67C 04402003D02004407506D fcb "D = Dump memory",CR,LF
00FFF683 07002006D06506D06F072
00FFF68A 07900D00A
00FFF68D 04602003D02004606906C fcb "F = Fill memory",CR,LF
00FFF694 06C02006D06506D06F072
00FFF69B 07900D00A
00FFF69E 04604C02003D020044075 fcb "FL = Dump I/O Focus List",CR,LF
00FFF6A5 06D07002004902F04F020
00FFF6AC 04606F06307507302004C
00FFF6B3 06907307400D00A
; fcb "FIG = start FIG Forth",CR,LF
; db "KILL n = kill task #n",CR,LF
; db "B = start tiny basic",CR,LF
; db "b = start EhBasic 6502",CR,LF
00FFF389 04A02003D02004A07506D fcb "J = Jump to code",CR,LF
00FFF390 07002007406F02006306F
00FFF397 06406500D00A
00FFF39B 04A04403402003D02004A fcb "JD4 = Jump to $FFD400",CR,LF
00FFF3A2 07506D07002007406F020
00FFF3A9 024046046044034030030
00FFF3B0 00D00A
00FFF3B2 05204104D054045053054 fcb "RAMTEST = test RAM",CR,LF
00FFF3B9 02003D020074065073074
00FFF3C0 02005204104D00D00A
; db "R[n] = Set register value",CR,LF
00FFF6B8 04A02003D02004A07506D fcb "J = Jump to code",CR,LF
00FFF6BF 07002007406F02006306F
00FFF6C6 06406500D00A
00FFF6CA 04A04403402003D02004A fcb "JD4 = Jump to $FFD400",CR,LF
00FFF6D1 07506D07002007406F020
00FFF6D8 024046046044034030030
00FFF6DF 00D00A
00FFF6E1 05205B06E05D02003D020 fcb "R[n] = Set register value",CR,LF
00FFF6E8 053065074020072065067
00FFF6EF 069073074065072020076
00FFF6F6 06106C07506500D00A
; db "r = random lines - test bitmap",CR,LF
; db "e = ethernet test",CR,LF
00FFF3C6 07302003D020073065072 fcb "s = serial output test",CR,LF
00FFF3CD 06906106C02006F075074
00FFF3D4 070075074020074065073
00FFF3DB 07400D00A
00FFF3DE 05303103902003D020072 fcb "S19 = run S19 loader",CR,LF
00FFF3E5 07506E020053031039020
00FFF3EC 06C06F06106406507200D
00FFF3F3 00A
00FFF3F4 05305002003D020073070 fcb "SP = sprite demo",CR,LF
00FFF3FB 072069074065020064065
00FFF402 06D06F00D00A
00FFF6FC 07302003D020073065072 fcb "s = serial output test",CR,LF
00FFF703 06906106C02006F075074
00FFF70A 070075074020074065073
00FFF711 07400D00A
00FFF714 05303103902003D020072 fcb "S19 = run S19 loader",CR,LF
00FFF71B 07506E020053031039020
00FFF722 06C06F06106406507200D
00FFF729 00A
00FFF72A 05305002003D020073070 fcb "SP = sprite demo",CR,LF
00FFF731 072069074065020064065
00FFF738 06D06F00D00A
; db "T = Dump task list",CR,LF
; db "TO = Dump timeout list",CR,LF
00FFF406 05404902003D020064069 fcb "TI = display date/time",CR,LF
00FFF40D 07307006C061079020064
00FFF414 06107406502F07406906D
00FFF41B 06500D00A
00FFF73C 05404902003D020064069 fcb "TI = display date/time",CR,LF
00FFF743 07307006C061079020064
00FFF74A 06107406502F07406906D
00FFF751 06500D00A
; db "TEMP = display temperature",CR,LF
00FFF41E 05502003D02007506E061 fcb "U = unassemble",CR,LF
00FFF425 07307306506D06206C065
00FFF42C 00D00A
00FFF754 05502003D02007506E061 fcb "U = unassemble",CR,LF
00FFF75B 07307306506D06206C065
00FFF762 00D00A
; db "P = Piano",CR,LF
00FFF42E 07802003D020065078069 fcb "x = exit monitor",CR,LF
00FFF435 07402006D06F06E069074
00FFF43C 06F07200D00A
00FFF440 000 fcb 0
00FFF764 05804D02003D02007806D fcb "XM = xmodem transfer",CR,LF
00FFF76B 06F06406506D020074072
00FFF772 06106E07306606507200D
00FFF779 00A
00FFF77A 07802003D020065078069 fcb "x = exit monitor",CR,LF
00FFF781 07402006D06F06E069074
00FFF788 06F07200D00A
00FFF78C 000 fcb 0
msgRegHeadings
00FFF441 00D00A02002004402F041 fcb CR,LF," D/AB X Y U S PC DP CCR",CR,LF,0
00FFF448 042020020020020020058
00FFF44F 020020020020020020059
00FFF456 020020020020020020055
00FFF45D 020020020020020020053
00FFF464 020020020020020020020
00FFF46B 050043020020020020044
00FFF472 05002002004304305200D
00FFF479 00A000
00FFF78D 00D00A02002004402F041 fcb CR,LF," D/AB X Y U S PC DP CCR",CR,LF,0
00FFF794 042020020020020020058
00FFF79B 020020020020020020059
00FFF7A2 020020020020020020055
00FFF7A9 020020020020020020053
00FFF7B0 020020020020020020020
00FFF7B7 050043020020020020044
00FFF7BE 05002002004304305200D
00FFF7C5 00A000
nHEX4:
00FFF47B 0BDFFD2D2 jsr HEX4
00FFF47E 039 rts
00FFF7C7 0BDFFD2D2 jsr HEX4
00FFF7CA 039 rts
nXBLANK:
00FFF47F 0C6020 ldb #' '
00FFF481 016FFFA5D lbra OUTCH
00FFF7CB 0C6020 ldb #' '
00FFF7CD 016FFF9F9 lbra OUTCH
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
3827,66 → 4426,66
;------------------------------------------------------------------------------
DumpMemory:
00FFF484 08DD1D bsr GetRange
00FFF486 18E000000 ldy #0
00FFF489 1BE000922 ldy mon_r1+2
00FFF7D0 08DD00 bsr GetRange
00FFF7D2 18E000000 ldy #0
00FFF7D5 1BE000922 ldy mon_r1+2
dmpm2:
00FFF48C 017FFDC43 lbsr CRLF
00FFF7D8 017FFD8F7 lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
00FFF48F 0C603A ldb #':'
00FFF491 017FFFA4D lbsr OUTCH
00FFF7DB 0C603A ldb #':'
00FFF7DD 017FFF9E9 lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF494 01F020 tfr y,d
00FFF7E0 01F020 tfr y,d
;addd mon_r1+2 ; output the address
00FFF496 017FFEF95 lbsr DispWordAsHex
00FFF7E2 017FFEC4C lbsr DispWordAsHex
*** warning 1: Long branch within short branch range could be optimized
00FFF499 0C6020 ldb #' '
00FFF49B 017FFFA43 lbsr OUTCH
00FFF7E5 0C6020 ldb #' '
00FFF7E7 017FFF9DF lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF49E 08E000008 ldx #8 ; number of bytes to display
00FFF7EA 08E000008 ldx #8 ; number of bytes to display
dmpm1:
; ldb far [mon_r1+1],y
;ldb [mon_r1+2],y
00FFF4A1 0E6A04 ldb ,y
00FFF4A3 031201 iny
00FFF4A5 017FFEF8F lbsr DispByteAsHex ; display byte
00FFF7ED 0E6A04 ldb ,y
00FFF7EF 031201 iny
00FFF7F1 017FFEC46 lbsr DispByteAsHex ; display byte
*** warning 1: Long branch within short branch range could be optimized
00FFF4A8 0C6020 ldb #' ' ; followed by a space
00FFF4AA 017FFFA34 lbsr OUTCH
00FFF7F4 0C6020 ldb #' ' ; followed by a space
00FFF7F6 017FFF9D0 lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF4AD 05F clrb
00FFF4AE 04F clra
00FFF4AF 017FFF9F7 lbsr INCH
00FFF7F9 05F clrb
00FFF7FA 04F clra
00FFF7FB 017FFF993 lbsr INCH
*** warning 1: Long branch within short branch range could be optimized
00FFF4B2 0C1003 cmpb #CTRLC
00FFF4B4 027024 beq dmpm3
00FFF4B6 0301FF dex
00FFF4B8 026FE7 bne dmpm1
00FFF7FE 0C1003 cmpb #CTRLC
00FFF800 027024 beq dmpm3
00FFF802 0301FF dex
00FFF804 026FE7 bne dmpm1
; Now output ascii
00FFF4BA 0C6020 ldb #' '
00FFF4BC 017FFFA22 lbsr OUTCH
00FFF806 0C6020 ldb #' '
00FFF808 017FFF9BE lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF4BF 08E000008 ldx #8 ; 8 chars to output
00FFF4C2 0313F8 leay -8,y ; backup pointer
00FFF80B 08E000008 ldx #8 ; 8 chars to output
00FFF80E 0313F8 leay -8,y ; backup pointer
dmpm5:
; ldb far [mon_r1+1],y ; get the char
; ldb [mon_r1+2],y ; get the char
00FFF4C4 0E6A04 ldb ,y
00FFF4C6 0C1020 cmpb #$20 ; is it a control char?
00FFF4C8 024002 bhs dmpm4
00FFF4CA 0C602E ldb #'.'
00FFF810 0E6A04 ldb ,y
00FFF812 0C1020 cmpb #$20 ; is it a control char?
00FFF814 024002 bhs dmpm4
00FFF816 0C602E ldb #'.'
dmpm4:
00FFF4CC 017FFFA12 lbsr OUTCH
00FFF818 017FFF9AE lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
00FFF4CF 031201 iny
00FFF4D1 0301FF dex
00FFF4D3 026FEF bne dmpm5
00FFF4D5 1BC000926 cmpy mon_r2+2
00FFF4D8 025FB2 blo dmpm2
00FFF81B 031201 iny
00FFF81D 0301FF dex
00FFF81F 026FEF bne dmpm5
00FFF821 1BC000926 cmpy mon_r2+2
00FFF824 025FB2 blo dmpm2
dmpm3:
00FFF4DA 017FFDBF5 lbsr CRLF
00FFF826 017FFD8A9 lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
00FFF4DD 016FFFB59 lbra Monitor
00FFF829 016FFFB30 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
3901,42 → 4500,44
;------------------------------------------------------------------------------
EditMemory:
00FFF4E0 0CE000008 ldu #8 ; set max byte count
00FFF4E3 017FFFCE6 lbsr GetHexNumber ; get the start address
00FFF82C 0CE000008 ldu #8 ; set max byte count
00FFF82F 017FFFC48 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF4E6 0BE000912 ldx mon_numwka+2
00FFF832 017FFFCC6 lbsr GetHexNumber ; get the start address
*** warning 1: Long branch within short branch range could be optimized
00FFF835 0BE000912 ldx mon_numwka+2
EditMem2:
00FFF4E9 017FFFC5F lbsr ignBlanks ; skip over blanks
00FFF838 017FFFC3F lbsr ignBlanks ; skip over blanks
*** warning 1: Long branch within short branch range could be optimized
00FFF4EC 017FFFCDD lbsr GetHexNumber ; get the byte value
00FFF83B 017FFFCBD lbsr GetHexNumber ; get the byte value
*** warning 1: Long branch within short branch range could be optimized
00FFF4EF 05D tstb ; check for valid value
00FFF4F0 02700C beq EditMem1 ; if invalid, quit
00FFF4F2 0F6000913 ldb mon_numwka+3 ; get value
00FFF4F5 0E7800 stb ,x+ ; update memory at address
00FFF4F7 0335FF leau -1,u ; decremeent byte count
00FFF4F9 283000000 cmpu #0
00FFF4FC 026FEB bne EditMem2 ; go back for annother byte
00FFF83E 05D tstb ; check for valid value
00FFF83F 02700C beq EditMem1 ; if invalid, quit
00FFF841 0F6000913 ldb mon_numwka+3 ; get value
00FFF844 0E7800 stb ,x+ ; update memory at address
00FFF846 0335FF leau -1,u ; decremeent byte count
00FFF848 283000000 cmpu #0
00FFF84B 026FEB bne EditMem2 ; go back for annother byte
EditMem1:
00FFF4FE 017FFFC2D lbsr MonGetch ; see if a string is being entered
00FFF84D 017FFFC0D lbsr MonGetch ; see if a string is being entered
*** warning 1: Long branch within short branch range could be optimized
00FFF501 0C1022 cmpb #'"'
00FFF503 026018 bne EditMem3 ; no string, we're done
00FFF505 0CE000028 ldu #40 ; string must be less than 40 chars
00FFF850 0C1022 cmpb #'"'
00FFF852 026018 bne EditMem3 ; no string, we're done
00FFF854 0CE000028 ldu #40 ; string must be less than 40 chars
EditMem4:
00FFF508 017FFFC23 lbsr MonGetch ; look for close quote
00FFF857 017FFFC03 lbsr MonGetch ; look for close quote
*** warning 1: Long branch within short branch range could be optimized
00FFF50B 0C1022 cmpb #'"'
00FFF50D 026005 bne EditMem6 ; end of string?
00FFF50F 0CE000008 ldu #8 ; reset the byte count
00FFF512 020FD5 bra EditMem2
00FFF85A 0C1022 cmpb #'"'
00FFF85C 026005 bne EditMem6 ; end of string?
00FFF85E 0CE000008 ldu #8 ; reset the byte count
00FFF861 020FD5 bra EditMem2
EditMem6:
00FFF514 0E7800 stb ,x+ ; store the character in memory
00FFF516 0335FF leau -1,u ; decrement byte count
00FFF518 283000000 cmpu #0
00FFF51B 022FEB bhi EditMem4 ; max 40 chars
00FFF863 0E7800 stb ,x+ ; store the character in memory
00FFF865 0335FF leau -1,u ; decrement byte count
00FFF867 283000000 cmpu #0
00FFF86A 022FEB bhi EditMem4 ; max 40 chars
EditMem3:
00FFF51D 016FFFB19 lbra Monitor
00FFF86C 016FFFAED lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
3949,32 → 4550,32
;------------------------------------------------------------------------------
FillMemory:
00FFF520 017FFFC80 lbsr GetRange ; get address range to fill
00FFF86F 017FFFC60 lbsr GetRange ; get address range to fill
*** warning 1: Long branch within short branch range could be optimized
00FFF523 017FFFC25 lbsr ignBlanks
00FFF872 017FFFC05 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF526 017FFFCA3 lbsr GetHexNumber ; get target byte to write
00FFF875 017FFFC83 lbsr GetHexNumber ; get target byte to write
*** warning 1: Long branch within short branch range could be optimized
00FFF529 0F6000913 ldb mon_numwka+3
00FFF52C 0BE000922 ldx mon_r1+2
00FFF52F 04F clra
00FFF878 0F6000913 ldb mon_numwka+3
00FFF87B 0BE000922 ldx mon_r1+2
00FFF87E 04F clra
fillm1: ; Check for a CTRL-C every page of memory
00FFF530 04D tsta
00FFF531 02600D bne fillm2
00FFF533 05F clrb ; we want a non-blocking check
00FFF534 04F clra
00FFF535 017FFF971 lbsr INCH
00FFF87F 04D tsta
00FFF880 02600D bne fillm2
00FFF882 05F clrb ; we want a non-blocking check
00FFF883 04F clra
00FFF884 017FFF90A lbsr INCH
*** warning 1: Long branch within short branch range could be optimized
00FFF538 0C1003 cmpb #CTRLC
00FFF53A 127FFFAFC lbeq Monitor
00FFF887 0C1003 cmpb #CTRLC
00FFF889 127FFFAD0 lbeq Monitor
*** warning 1: Long branch within short branch range could be optimized
00FFF53D 0F6000913 ldb mon_numwka+3 ; reset target byte
00FFF88C 0F6000913 ldb mon_numwka+3 ; reset target byte
fillm2:
00FFF540 0E7800 stb ,x+
00FFF542 0BC000926 cmpx mon_r2+2
00FFF545 023FE9 bls fillm1
00FFF88F 0E7800 stb ,x+
00FFF891 0BC000926 cmpx mon_r2+2
00FFF894 023FE9 bls fillm1
fillm3:
00FFF547 016FFFAEF lbra Monitor
00FFF896 016FFFAC3 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
3985,42 → 4586,141
;------------------------------------------------------------------------------
DumpRegs:
00FFF54A 0CCFFF441 ldd #msgRegHeadings
00FFF54D 017FFEE8A lbsr DisplayString
00FFF899 0CCFFF78D ldd #msgRegHeadings
00FFF89C 017FFEB3E lbsr DisplayString
*** warning 1: Long branch within short branch range could be optimized
00FFF550 08DF2D bsr nXBLANK
00FFF552 0FC000900 ldd mon_DSAVE
00FFF555 08DF24 bsr nHEX4
00FFF557 08DF26 bsr nXBLANK
00FFF559 0FC000902 ldd mon_XSAVE
00FFF55C 08DF1D bsr nHEX4
00FFF55E 08DF1F bsr nXBLANK
00FFF560 0FC000904 ldd mon_YSAVE
00FFF563 08DF16 bsr nHEX4
00FFF565 08DF18 bsr nXBLANK
00FFF567 0FC000906 ldd mon_USAVE
00FFF56A 08DF0F bsr nHEX4
00FFF56C 08DF11 bsr nXBLANK
00FFF56E 0FC000908 ldd mon_SSAVE
00FFF571 08DF08 bsr nHEX4
00FFF573 08DF0A bsr nXBLANK
00FFF575 0F600090B ldb mon_PCSAVE+1
00FFF578 017FFEEBC lbsr DispByteAsHex
00FFF89F 08DF2A bsr nXBLANK
00FFF8A1 0FC000900 ldd mon_DSAVE
00FFF8A4 08DF21 bsr nHEX4
00FFF8A6 08DF23 bsr nXBLANK
00FFF8A8 0FC000902 ldd mon_XSAVE
00FFF8AB 08DF1A bsr nHEX4
00FFF8AD 08DF1C bsr nXBLANK
00FFF8AF 0FC000904 ldd mon_YSAVE
00FFF8B2 08DF13 bsr nHEX4
00FFF8B4 08DF15 bsr nXBLANK
00FFF8B6 0FC000906 ldd mon_USAVE
00FFF8B9 08DF0C bsr nHEX4
00FFF8BB 08DF0E bsr nXBLANK
00FFF8BD 0FC000908 ldd mon_SSAVE
00FFF8C0 08DF05 bsr nHEX4
00FFF8C2 08DF07 bsr nXBLANK
00FFF8C4 0F600090B ldb mon_PCSAVE+1
00FFF8C7 017FFEB70 lbsr DispByteAsHex
*** warning 1: Long branch within short branch range could be optimized
00FFF57B 0FC00090C ldd mon_PCSAVE+2
00FFF57E 08DEFB bsr nHEX4
00FFF580 08DEFD bsr nXBLANK
00FFF582 0FC00090E ldd mon_DPRSAVE
00FFF585 0BDFFD2CE jsr HEX2
00FFF588 08DEF5 bsr nXBLANK
00FFF58A 0B600090F lda mon_CCRSAVE
00FFF58D 017FFDD3E lbsr HEX2
00FFF8CA 0FC00090C ldd mon_PCSAVE+2
00FFF8CD 08DEF8 bsr nHEX4
00FFF8CF 08DEFA bsr nXBLANK
00FFF8D1 0FC00090E ldd mon_DPRSAVE
00FFF8D4 0BDFFD2CE jsr HEX2
00FFF8D7 08DEF2 bsr nXBLANK
00FFF8D9 0B600090F lda mon_CCRSAVE
00FFF8DC 017FFD9EF lbsr HEX2
*** warning 1: Long branch within short branch range could be optimized
00FFF590 08DEED bsr nXBLANK
00FFF592 016FFFAA4 lbra Monitor
00FFF8DF 08DEEA bsr nXBLANK
00FFF8E1 016FFFA78 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
; SetRegXXX
;
; Set the value to be loaded into a register.
;------------------------------------------------------------------------------
SetRegA:
00FFF8E4 017FFFB93 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF8E7 017FFFCA7 lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF8EA 0B6000913 lda mon_numwka+3
00FFF8ED 0B7000900 sta mon_DSAVE
00FFF8F0 016FFFA69 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegB:
00FFF8F3 017FFFB84 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF8F6 017FFFC98 lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF8F9 0B6000913 lda mon_numwka+3
00FFF8FC 0B7000901 sta mon_DSAVE+1
00FFF8FF 016FFFA5A lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegD:
00FFF902 017FFFB75 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF905 017FFFC89 lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF908 0FC000912 ldd mon_numwka+2
00FFF90B 0FD000900 std mon_DSAVE
00FFF90E 016FFFA4B lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegX:
00FFF911 017FFFB66 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF914 017FFFC7A lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF917 0FC000912 ldd mon_numwka+2
00FFF91A 0FD000902 std mon_XSAVE
00FFF91D 016FFFA3C lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegY:
00FFF920 017FFFB57 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF923 017FFFC6B lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF926 0FC000912 ldd mon_numwka+2
00FFF929 0FD000904 std mon_YSAVE
00FFF92C 016FFFA2D lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegU:
00FFF92F 017FFFB48 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF932 017FFFC5C lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF935 0FC000912 ldd mon_numwka+2
00FFF938 0FD000906 std mon_USAVE
00FFF93B 016FFFA1E lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegS:
00FFF93E 017FFFB39 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF941 017FFFC4D lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF944 0FC000912 ldd mon_numwka+2
00FFF947 0FD000908 std mon_SSAVE
00FFF94A 016FFFA0F lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegDPR:
00FFF94D 017FFFB2A lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF950 017FFFC3E lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF953 0B6000913 lda mon_numwka+3
00FFF956 0B700090E sta mon_DPRSAVE
00FFF959 016FFFA00 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegCCR:
00FFF95C 017FFFB1B lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF95F 017FFFC2F lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF962 0B6000913 lda mon_numwka+3
00FFF965 0B700090F sta mon_CCRSAVE
00FFF968 016FFF9F1 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
SetRegPC:
00FFF96B 017FFFB0C lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF96E 017FFFC20 lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF971 0FC000912 ldd mon_numwka+2
00FFF974 0FD00090C std mon_PCSAVE+2
00FFF977 0F6000911 ldb mon_numwka+1
00FFF97A 0F700090B stb mon_PCSAVE+1
00FFF97D 016FFF9DC lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
; Jump to code
;
; Registers are loaded with values from the monitor register save area before
4030,55 → 4730,55
;------------------------------------------------------------------------------
jump_to_code:
00FFF595 08DCCB bsr GetNumber
00FFF597 01A010 sei
00FFF599 1FE000908 lds mon_SSAVE
00FFF59C 0CCFFF5D0 ldd #jtc_exit ; setup stack for RTS back to monitor
00FFF59F 034006 pshs d
00FFF5A1 0C6000 ldb #0
00FFF5A3 034004 pshs b
00FFF5A5 0FC000912 ldd mon_numwka+2 ; get the address parameter
00FFF5A8 034006 pshs d
00FFF5AA 0F6000911 ldb mon_numwka+1
00FFF5AD 034004 pshs b
00FFF5AF 0FC000906 ldd mon_USAVE
00FFF5B2 034006 pshs d
00FFF5B4 0FC000904 ldd mon_YSAVE
00FFF5B7 034006 pshs d
00FFF5B9 0FC000902 ldd mon_XSAVE
00FFF5BC 034006 pshs d
00FFF5BE 0B600090E lda mon_DPRSAVE
00FFF5C1 034002 pshs a
00FFF5C3 0FC000900 ldd mon_DSAVE
00FFF5C6 034006 pshs d
00FFF5C8 0B600090F lda mon_CCRSAVE
00FFF5CB 034002 pshs a
00FFF5CD 0150350FF puls far ccr,d,dpr,x,y,u,pc
00FFF980 017FFFAF7 lbsr ignBlanks
*** warning 1: Long branch within short branch range could be optimized
00FFF983 017FFFC0B lbsr GetNumber
*** warning 1: Long branch within short branch range could be optimized
00FFF986 01A010 sei
00FFF988 1FE000908 lds mon_SSAVE
00FFF98B 0CCFFF9BA ldd #jtc_exit ; setup stack for RTS back to monitor
00FFF98E 034006 pshs d
00FFF990 0C6000 ldb #0
00FFF992 034004 pshs b
00FFF994 0FC000906 ldd mon_USAVE
00FFF997 034006 pshs d
00FFF999 0FC000904 ldd mon_YSAVE
00FFF99C 034006 pshs d
00FFF99E 0FC000902 ldd mon_XSAVE
00FFF9A1 034006 pshs d
00FFF9A3 0B600090E lda mon_DPRSAVE
00FFF9A6 034002 pshs a
00FFF9A8 0FC000900 ldd mon_DSAVE
00FFF9AB 034006 pshs d
00FFF9AD 0B600090F lda mon_CCRSAVE
00FFF9B0 034002 pshs a
00FFF9B2 01503507F puls far ccr,d,dpr,x,y,u
00FFF9B5 01506E90F000911 jmp far [mon_numwka+1]
jtc_exit:
00FFF5D0 1FF000908 sts >mon_SSAVE ; need to use extended addressing, no direct page setting
00FFF5D3 03280F006FFF leas $6FFF ; reset stack to system area, dont modify flags register!
00FFF5D7 034001 pshs ccr ; now the stack can be used
00FFF5D9 034002 pshs a ; save acca register so we can use it
00FFF5DB 01F0B8 tfr dpr,a ; a = outgoing dpr value
00FFF5DD 0B700090E sta >mon_DPRSAVE ; force extended addressing mode usage here dpr is not set
00FFF5E0 04F clra ; dpg register must be set to zero before values are
00FFF5E1 01F08B tfr a,dpr ; saved in the monitor register save area.
00FFF5E3 035002 puls a ; get back acca
00FFF5E5 0FD000900 std mon_DSAVE ; save regsters, can use direct addressing now
00FFF5E8 0BF000902 stx mon_XSAVE
00FFF5EB 1BF000904 sty mon_YSAVE
00FFF5EE 0FF000906 stu mon_USAVE
00FFF5F1 035002 puls a ; get back ccr
00FFF5F3 0B700090F sta mon_CCRSAVE ; and save it too
00FFF9BA 1FF000908 sts >mon_SSAVE ; need to use extended addressing, no direct page setting
00FFF9BD 03280F006FFF leas $6FFF ; reset stack to system area, dont modify flags register!
00FFF9C1 034001 pshs ccr ; now the stack can be used
00FFF9C3 034002 pshs a ; save acca register so we can use it
00FFF9C5 01F0B8 tfr dpr,a ; a = outgoing dpr value
00FFF9C7 0B700090E sta >mon_DPRSAVE ; force extended addressing mode usage here dpr is not set
00FFF9CA 04F clra ; dpg register must be set to zero before values are
00FFF9CB 01F08B tfr a,dpr ; saved in the monitor register save area.
00FFF9CD 035002 puls a ; get back acca
00FFF9CF 0FD000900 std mon_DSAVE ; save regsters, can use direct addressing now
00FFF9D2 0BF000902 stx mon_XSAVE
00FFF9D5 1BF000904 sty mon_YSAVE
00FFF9D8 0FF000906 stu mon_USAVE
00FFF9DB 035002 puls a ; get back ccr
00FFF9DD 0B700090F sta mon_CCRSAVE ; and save it too
; Reset vectors in case they got toasted.
00FFF5F6 0CCFFEC64 ldd #SerialPeekCharDirect
00FFF5F9 0FD000804 std CharInVec
00FFF5FC 0CCFFE319 ldd #DisplayChar
00FFF5FF 0FD000800 std CharOutVec
00FFF602 0FCFFF2B6 ldd DisplayErr
00FFF605 0FD00080C std MonErrVec
00FFF9E0 0CCFFEC73 ldd #SerialPeekCharDirect
00FFF9E3 0FD000804 std CharInVec
00FFF9E6 0CCFFE31C ldd #DisplayChar
00FFF9E9 0FD000800 std CharOutVec
00FFF9EC 0FCFFF5E5 ldd DisplayErr
00FFF9EF 0FD00080C std MonErrVec
; todo set according to coreid
00FFF608 016FFFF3F lbra DumpRegs ; now go do a register dump
00FFF9F2 016FFFEA4 lbra DumpRegs ; now go do a register dump
*** warning 1: Long branch within short branch range could be optimized
;------------------------------------------------------------------------------
4085,48 → 4785,49
;------------------------------------------------------------------------------
DumpIOFocusList:
00FFF60B 08E000000 ldx #0
00FFF9F5 08E000000 ldx #0
dfl2:
00FFF60E 0E680A000FFC000 ldb IOFocusList,x
00FFF613 0C1018 cmpb #24
00FFF615 02600A bne dfl1
00FFF617 01F010 tfr x,d
00FFF619 017FFEE1B lbsr DispByteAsHex
00FFF9F8 0E680A000FFC000 ldb IOFocusList,x
00FFF9FD 0C1018 cmpb #24
00FFF9FF 02600A bne dfl1
00FFFA01 01F010 tfr x,d
00FFFA03 017FFEA34 lbsr DispByteAsHex
*** warning 1: Long branch within short branch range could be optimized
00FFF61C 0C6020 ldb #' '
00FFF61E 017FFF8C0 lbsr OUTCH
00FFFA06 0C6020 ldb #' '
00FFFA08 017FFF7BE lbsr OUTCH
*** warning 1: Long branch within short branch range could be optimized
dfl1:
00FFF621 030001 inx
00FFF623 08C000010 cmpx #16
00FFF626 025FE6 blo dfl2
00FFF628 017FFDAA7 lbsr CRLF
00FFFA0B 030001 inx
00FFFA0D 08C000010 cmpx #16
00FFFA10 025FE6 blo dfl2
00FFFA12 017FFD6BD lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
00FFF62B 016FFFA0B lbra Monitor
00FFFA15 016FFF944 lbra Monitor
*** warning 1: Long branch within short branch range could be optimized
bootpg:
00FFF62E 000 fcb $000
00FFFA18 000 fcb $000
boot_stack:
00FFF62F FFC0FF fcw $FFC0FF
00FFFA19 FFC0FF fcw $FFC0FF
numBreakpoints:
00FFF631 008 fcb 8
00FFFA1B 000008 fcw 8
mon_rom_vectab:
00FFF632 FFF634 fcw mon_rom_vecs
00FFFA1D FFFA1F fcw mon_rom_vecs
mon_rom_vecs:
00FFF634 FFF039 fcw Monitor ; enter monitor program
00FFF636 FFEEA9 fcw INCH ; input a character
00FFF638 FFEEE1 fcw OUTCH ; output a character
00FFF63A FFD0D2 fcw CRLF ; output carriage-return, line feed
00FFF63C FFE3DA fcw DisplayString
00FFF63E FFE437 fcw DispByteAsHex
00FFF640 FFE42E fcw DispWordAsHex
00FFF642 FFEEEB fcw ShowSprites
00FFF644 FFEF6F fcw mon_srand
00FFF646 FFEF9D fcw mon_rand
00FFF648 000000 fcw 0 ; operating system call
00FFF64A FFF1A3 fcw GetRange
00FFF64C FFF262 fcw GetNumber
00FFFA1F FFF35C fcw Monitor ; enter monitor program
00FFFA21 FFF191 fcw INCH ; input a character
00FFFA23 FFF1C9 fcw OUTCH ; output a character
00FFFA25 FFD0D2 fcw CRLF ; output carriage-return, line feed
00FFFA27 FFE3DD fcw DisplayString
00FFFA29 FFE43A fcw DispByteAsHex
00FFFA2B FFE431 fcw DispWordAsHex
00FFFA2D FFF1D3 fcw ShowSprites
00FFFA2F FFF257 fcw mon_srand
00FFFA31 FFF285 fcw mon_rand
00FFFA33 000000 fcw 0 ; operating system call
00FFFA35 FFF4D2 fcw GetRange
00FFFA37 FFF591 fcw GetNumber
00FFFA39 FFEC9A fcw SerialPutChar
NumFuncs EQU (*-mon_rom_vectab)/2
4134,19 → 4835,20
; D and possibly X registers.
mon_rettab:
00FFF64E 000 fcb 0 ; monitor
00FFF64F 800 fcb $800 ; INCH
00FFF650 000 fcb 0 ; OUTCH
00FFF651 000 fcb 0 ; CRLF
00FFF652 000 fcb 0 ; DisplayString
00FFF653 000 fcb 0 ; DisplayByte
00FFF654 000 fcb 0 ; DisplayWord
00FFF655 000 fcb 0 ; show sprites
00FFF656 000 fcb 0 ; srand
00FFF657 C00 fcb $C00 ; rand
00FFF658 C00 fcb $C00 ; OS call
00FFF659 000 fcb 0 ; GetRange
00FFF65A 800 fcb $800 ; GetNumber
00FFFA3B 000 fcb 0 ; monitor
00FFFA3C 800 fcb $800 ; INCH
00FFFA3D 000 fcb 0 ; OUTCH
00FFFA3E 000 fcb 0 ; CRLF
00FFFA3F 000 fcb 0 ; DisplayString
00FFFA40 000 fcb 0 ; DisplayByte
00FFFA41 000 fcb 0 ; DisplayWord
00FFFA42 000 fcb 0 ; show sprites
00FFFA43 000 fcb 0 ; srand
00FFFA44 C00 fcb $C00 ; rand
00FFFA45 C00 fcb $C00 ; OS call
00FFFA46 000 fcb 0 ; GetRange
00FFFA47 800 fcb $800 ; GetNumber
00FFFA48 000 fcb 0 ; SerialPutChar
;------------------------------------------------------------------------------
; SWI routine.
4158,308 → 4860,350
;------------------------------------------------------------------------------
swi_rout:
00FFF65B 0E680CFD0 ldb bootpg,pcr ; reset direct page
00FFF65E 01F09B tfr b,dp
00FFFA49 0E680CFCC ldb bootpg,pcr ; reset direct page
00FFFA4C 01F09B tfr b,dp
swi_rout1:
00FFF660 0EE60B ldu 11,s ; get program counter (low order 2 bytes)
00FFF662 0335FF leau -1,u ; backup a byte
00FFF664 07D000810 tst BreakpointFlag ; are we in breakpoint mode?
00FFF667 02700F beq swiNotBkpt
00FFF669 0CE000820 ldu #Breakpoints
00FFF66C 0F6000811 ldb NumSetBreakpoints
00FFF66F 027007 beq swiNotBkpt
00FFFA4E 0EE60B ldu 11,s ; get program counter (low order 2 bytes)
00FFFA50 0335FF leau -1,u ; backup a byte
00FFFA52 07D000810 tst BreakpointFlag ; are we in breakpoint mode?
00FFFA55 02700F beq swiNotBkpt
00FFFA57 18E000820 ldy #Breakpoints
00FFFA5A 0F6000811 ldb NumSetBreakpoints
00FFFA5D 027007 beq swiNotBkpt
swi_rout2:
00FFF671 2A3A01 cmpu ,y++
00FFF673 02704B beq processBreakpoint
00FFF675 05A decb
00FFF676 026FF9 bne swi_rout2
00FFFA5F 2A3A01 cmpu ,y++
00FFFA61 02704B beq processBreakpoint
00FFFA63 05A decb
00FFFA64 026FF9 bne swi_rout2
swiNotBkpt:
00FFF678 07F000810 clr BreakpointFlag
00FFF67B 037006 pulu d ; get function #, increment PC
00FFF67D 0C100E cmpb #NumFuncs
00FFF67F 122FFFC34 lbhi DisplayErr
00FFFA66 07F000810 clr BreakpointFlag
00FFFA69 037006 pulu d ; get function #, increment PC
00FFFA6B 0C100F cmpb #NumFuncs
00FFFA6D 122FFFB75 lbhi DisplayErr
*** warning 1: Long branch within short branch range could be optimized
00FFF682 0EF60B stu 11,s ; save updated PC on stack
00FFF684 0C100A cmpb #MF_OSCALL
00FFF686 02706D beq swiCallOS
00FFF688 058 aslb ; 2 bytes per vector
00FFF689 0AE80CFA6 ldx mon_rom_vectab,pcr
00FFF68C 03A abx
00FFF68D 0AE804 ldx ,x
00FFF68F 0BF000928 stx jmpvec
00FFF692 054 lsrb
00FFF693 08EFFF64E ldx #mon_rettab
00FFF696 03A abx
00FFF697 0E6804 ldb ,x
00FFF699 0F7000930 stb mon_retflag
00FFF69C 1FF000908 sts mon_SSAVE ; save the stack pointer
00FFF69F 0EC601 ldd 1,s ; get back D
00FFF6A1 0AE604 ldx 4,s ; get back X
00FFF6A3 1AE606 ldy 6,s ; get back Y
00FFF6A5 0EE608 ldu 8,s ; get back U
00FFF6A7 1EE80CF85 lds boot_stack,pcr ; and use our own stack
00FFF6AA 0AD90F000928 jsr [jmpvec] ; call the routine
00FFFA70 0EF60B stu 11,s ; save updated PC on stack
00FFFA72 0C100A cmpb #MF_OSCALL
00FFFA74 027072 beq swiCallOS
00FFFA76 058 aslb ; 2 bytes per vector
00FFFA77 0AE80CFA3 ldx mon_rom_vectab,pcr
00FFFA7A 03A abx
00FFFA7B 0AE804 ldx ,x
00FFFA7D 0BF000928 stx jmpvec
00FFFA80 054 lsrb
00FFFA81 08EFFFA3B ldx #mon_rettab
00FFFA84 03A abx
00FFFA85 0E6804 ldb ,x
00FFFA87 0F7000930 stb mon_retflag
00FFFA8A 1FF000908 sts mon_SSAVE ; save the stack pointer
00FFFA8D 0EC601 ldd 1,s ; get back D
00FFFA8F 0AE604 ldx 4,s ; get back X
00FFFA91 1AE606 ldy 6,s ; get back Y
00FFFA93 0EE608 ldu 8,s ; get back U
00FFFA95 1EE80CF81 lds boot_stack,pcr ; and use our own stack
00FFFA98 0AD90F000928 jsr [jmpvec] ; call the routine
swi_rout3:
00FFF6AE 1FE000908 lds mon_SSAVE ; restore stack
00FFF6B1 07D000930 tst mon_retflag
00FFF6B4 02A009 bpl swi_rout4
00FFF6B6 0ED601 std 1,s ; return value in D
00FFF6B8 078000930 asl mon_retflag
00FFF6BB 02A002 bpl swi_rout4
00FFF6BD 0AF604 stx 4,s ; return value in X
00FFFA9C 1FE000908 lds mon_SSAVE ; restore stack
00FFFA9F 07D000930 tst mon_retflag
00FFFAA2 02A009 bpl swi_rout4
00FFFAA4 0ED601 std 1,s ; return value in D
00FFFAA6 078000930 asl mon_retflag
00FFFAA9 02A002 bpl swi_rout4
00FFFAAB 0AF604 stx 4,s ; return value in X
swi_rout4:
00FFF6BF 03B rti
00FFFAAD 03B rti
;------------------------------------------------------------------------------
; A breakpoint was struck during program execution, process accordingly.
;------------------------------------------------------------------------------
processBreakpoint:
00FFF6C0 0A6E04 lda ,s
00FFF6C2 0B700090F sta mon_CCRSAVE
00FFF6C5 0EC601 ldd 1,s
00FFF6C7 0FD000900 std mon_DSAVE
00FFF6CA 0E6603 ldb 3,s
00FFF6CC 0F700090E stb mon_DPRSAVE
00FFF6CF 0EC604 ldd 4,s
00FFF6D1 0FD000902 std mon_XSAVE
00FFF6D4 0EC606 ldd 6,s
00FFF6D6 0FD000904 std mon_YSAVE
00FFF6D9 0EC608 ldd 8,s
00FFF6DB 0FD000906 std mon_USAVE
00FFF6DE 1FF000908 sts mon_SSAVE
00FFF6E1 0EC60B ldd 11,s
00FFF6E3 0FD00090A std mon_PCSAVE
00FFF6E6 1EE80CF46 lds boot_stack,pcr
00FFF6E9 0CCFFF6AE ldd #swi_rout3 ; setup so monitor can return
00FFF6EC 034006 pshs d
00FFF6EE 08D01F bsr DisarmAllBreakpoints
00FFF6F0 016FFFE57 lbra DumpRegs
00FFFAAE 0A6E04 lda ,s
00FFFAB0 0B700090F sta mon_CCRSAVE
00FFFAB3 0EC601 ldd 1,s
00FFFAB5 0FD000900 std mon_DSAVE
00FFFAB8 0E6603 ldb 3,s
00FFFABA 0F700090E stb mon_DPRSAVE
00FFFABD 0EC604 ldd 4,s
00FFFABF 0FD000902 std mon_XSAVE
00FFFAC2 0EC606 ldd 6,s
00FFFAC4 0FD000904 std mon_YSAVE
00FFFAC7 0EC608 ldd 8,s
00FFFAC9 0FD000906 std mon_USAVE
00FFFACC 1FF000908 sts mon_SSAVE
00FFFACF 0E660A ldb 10,s
00FFFAD1 0F700090A stb mon_PCSAVE
00FFFAD4 0EC60B ldd 11,s
00FFFAD6 0FD00090B std mon_PCSAVE+1
00FFFAD9 1EE80CF3D lds boot_stack,pcr
00FFFADC 0CCFFFA9C ldd #swi_rout3 ; setup so monitor can return
00FFFADF 034006 pshs d
00FFFAE1 08D01F bsr DisarmAllBreakpoints
00FFFAE3 016FFFDB3 lbra DumpRegs
*** warning 1: Long branch within short branch range could be optimized
xitMonitor:
00FFF6F3 020039 bra ArmAllBreakpoints
00FFFAE6 020039 bra ArmAllBreakpoints
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
swiCallOS:
00FFF6F5 033401 leau 1,u ; next byte is func number
00FFF6F7 0E6C00 ldb ,u+
00FFF6F9 0C1019 cmpb #NumOSFuncs ; check for valid range
00FFF6FB 122FFFBB8 lbhi DisplayErr
00FFFAE8 033401 leau 1,u ; next byte is func number
00FFFAEA 0E6C00 ldb ,u+
00FFFAEC 0C1019 cmpb #NumOSFuncs ; check for valid range
00FFFAEE 122FFFAF4 lbhi DisplayErr
*** warning 1: Long branch within short branch range could be optimized
00FFF6FE 0EF60B stu 11,s ; save updateed PC on stack
00FFF700 058 aslb ; compute vector address
00FFF701 08EFFEEF6 ldx #OSCallTbl
00FFF704 06DE0F tst b,x ; check for non-zero vector
00FFF706 027FA6 beq swi_rout3
00FFFAF1 0EF60B stu 11,s ; save updateed PC on stack
00FFFAF3 058 aslb ; compute vector address
00FFFAF4 08EFFF1DE ldx #OSCallTbl
00FFFAF7 06DE0F tst b,x ; check for non-zero vector
00FFFAF9 027FA1 beq swi_rout3
osc1:
; tst OSSEMA+1 ; wait for availability
; beq osc1
00FFF708 0ADF0F jsr [b,x] ; call the OS routine
00FFFAFB 0ADF0F jsr [b,x] ; call the OS routine
oscx:
00FFF70A 07FEF0011 clr OSSEMA+1
00FFF70D 020F9F bra swi_rout3
00FFFAFD 07FEF0011 clr OSSEMA+1
00FFFB00 020F9A bra swi_rout3
;------------------------------------------------------------------------------
; DisarmAllBreakpoints, used when entering the monitor.
;------------------------------------------------------------------------------
DisarmAllBreakpoints:
00FFF70F 034036 pshs d,x,y
00FFF711 18E000000 ldy #0
00FFF714 05F clrb
00FFF715 08E000830 ldx #BreakpointBytes ; x = breakpoint byte table address
00FFFB02 034036 pshs d,x,y
00FFFB04 18E000000 ldy #0
00FFFB07 05F clrb
00FFFB08 08E000830 ldx #BreakpointBytes ; x = breakpoint byte table address
disarm2:
00FFF718 0C1631 cmpb #numBreakpoints ; safety check
00FFF71A 024010 bhs disarm1
00FFF71C 0F1000811 cmpb NumSetBreakpoints
00FFF71F 02400B bhs disarm1
00FFF721 0A6837 lda b,x ; get memory byte
00FFF723 0A7B09000820 sta [Breakpoints,y] ; and store it back to memory
00FFF727 031202 leay 2,y ; increment for next address
00FFF729 05C incb ; increment to next byte
00FFF72A 020FEC bra disarm2 ; loop back
00FFFB0B 0C1A1B cmpb #numBreakpoints ; safety check
00FFFB0D 024010 bhs disarm1
00FFFB0F 0F1000811 cmpb NumSetBreakpoints
00FFFB12 02400B bhs disarm1
00FFFB14 0A6837 lda b,x ; get memory byte
00FFFB16 0A7B09000820 sta [Breakpoints,y] ; and store it back to memory
00FFFB1A 031202 leay 2,y ; increment for next address
00FFFB1C 05C incb ; increment to next byte
00FFFB1D 020FEC bra disarm2 ; loop back
disarm1:
00FFF72C 0350B6 puls d,x,y,pc
00FFFB1F 0350B6 puls d,x,y,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
ArmAll