OpenCores
URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

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    /
    from Rev 51 to Rev 52
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  •

Rev 51 → Rev 52

/s6soc/trunk/sw/host/Makefile
70,6 → 70,9
scope: $(OBJDIR)/scope.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
 
xpflashscop: $(OBJDIR)/scopecls.o $(OBJDIR)/xpflashscop.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
 
readflash: $(OBJDIR)/readflash.o $(BUSOBJS)
$(CXX) $(CFLAGS) $^ $(LIBS) -o $@
 
/s6soc/trunk/sw/host/deppi.cpp
124,7 → 124,7
}
 
DEPPI::~DEPPI(void) {
close();
DEPPI::close();
}
 
void DEPPI::close(void) {
131,6 → 131,7
if (m_dev)
DmgrClose(m_dev);
m_dev = 0;
LLCOMMSI::close();
}
 
void DEPPI::depperr(void) {
/s6soc/trunk/sw/host/scopecls.cpp
0,0 → 1,282
////////////////////////////////////////////////////////////////////////////////
//
// Filename: scopecls.cpp
//
// Project: WBScope, a wishbone hosted scope
//
// Purpose: After rebuilding the same code over and over again for every
// "scope" I tried to interact with, I thought it would be simpler
// to try to make a more generic interface, that other things could plug
// into. This is that more generic interface.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <strings.h>
#include <ctype.h>
#include <string.h>
#include <signal.h>
#include <assert.h>
#include <time.h>
 
#include "devbus.h"
#include "scopecls.h"
 
bool SCOPE::ready() {
unsigned v;
v = m_fpga->readio(m_addr);
if (m_scoplen == 0) {
m_scoplen = (1<<((v>>20)&0x01f));
} v = (v>>28)&6;
return (v==6);
}
 
void SCOPE::decode_control(void) {
unsigned v;
 
v = m_fpga->readio(m_addr);
printf("\t31. RESET:\t%s\n", (v&0x80000000)?"Ongoing":"Complete");
printf("\t30. STOPPED:\t%s\n", (v&0x40000000)?"Yes":"No");
printf("\t29. TRIGGERED:\t%s\n", (v&0x20000000)?"Yes":"No");
printf("\t28. PRIMED:\t%s\n", (v&0x10000000)?"Yes":"No");
printf("\t27. MANUAL:\t%s\n", (v&0x08000000)?"Yes":"No");
printf("\t26. DISABLED:\t%s\n", (v&0x04000000)?"Yes":"No");
printf("\t25. ZERO:\t%s\n", (v&0x02000000)?"Yes":"No");
printf("\tSCOPLEN:\t%08x (%d)\n", m_scoplen, m_scoplen);
printf("\tHOLDOFF:\t%08x\n", (v&0x0fffff));
printf("\tTRIGLOC:\t%d\n", m_scoplen-(v&0x0fffff));
}
 
int SCOPE::scoplen(void) {
unsigned v, lgln;
 
// If the scope length is zero, then the scope isn't present.
// We use a length of zero here to also represent whether or not we've
// looked up the length by reading from the scope.
if (m_scoplen == 0) {
v = m_fpga->readio(m_addr);
 
// Since the length of the scope memory is a configuration
// parameter internal to the scope, we read it here to find
// out how the scope was configured.
lgln = (v>>20) & 0x1f;
 
// If the length is still zero, then there is no scope installed
if (lgln != 0) {
// Otherwise, the scope length contained in the device
// control register is the log base 2 of the actual
// length of what's in the FPGA. Here, we just convert
// that to the actual length of the scope.
m_scoplen = (1<<lgln);
}
// else we already know the length of the scope, and don't need to
// slow down to read that length from the device a second time.
} return m_scoplen;
}
 
//
// rawread
//
// Read the scope data from the scope.
void SCOPE::rawread(void) {
// If we've already read the data from the scope, then we don't need
// to read it a second time.
if (m_data)
return;
 
// Let's get the length of the scope, and check that it is a valid
// length
if (scoplen() <= 4) {
printf("ERR: Scope has less than a minimum length. Is it truly a scope?\n");
return;
}
 
// Now that we know the size of the scopes buffer, let's allocate a
// buffer to hold all this data
m_data = new DEVBUS::BUSW[m_scoplen];
 
// There are two means of reading from a DEVBUS interface: The first
// is a vector read, optimized so that the address and read command
// only needs to be sent once. This is the optimal means. However,
// if the bus isn't (yet) trustworthy, it may be more reliable to access
// the port by reading one register at a time--hence the second method.
// If the bus works, you'll want to use readz(): read scoplen values
// into the buffer, from the address WBSCOPEDATA, without incrementing
// the address each time (hence the 'z' in readz--for zero increment).
if (m_vector_read) {
m_fpga->readz(m_addr+4, m_scoplen, m_data);
} else {
for(unsigned int i=0; i<m_scoplen; i++)
m_data[i] = m_fpga->readio(m_addr+4);
}
}
 
void SCOPE::print(void) {
DEVBUS::BUSW addrv = 0;
 
rawread();
 
if(m_compressed) {
for(int i=0; i<(int)m_scoplen; i++) {
if ((m_data[i]>>31)&1) {
addrv += (m_data[i]&0x7fffffff);
printf(" ** (+0x%08x = %8d)\n",
(m_data[i]&0x07fffffff),
(m_data[i]&0x07fffffff));
continue;
}
printf("%10d %08x: ", addrv++, m_data[i]);
decode(m_data[i]);
printf("\n");
}
} else {
for(int i=0; i<(int)m_scoplen; i++) {
if ((i>0)&&(m_data[i] == m_data[i-1])&&(i<(int)(m_scoplen-1))) {
if ((i>2)&&(m_data[i] != m_data[i-2]))
printf(" **** ****\n");
continue;
} printf("%9d %08x: ", i, m_data[i]);
decode(m_data[i]);
printf("\n");
}
}
}
 
void SCOPE::write_trace_timescale(FILE *fp) {
fprintf(fp, "$timescle 1ns $end\n\n");
}
 
// $dumpoff and $dumpon
void SCOPE::write_trace_header(FILE *fp) {
time_t now;
 
time(&now);
fprintf(fp, "$version Generated by WBScope $end\n");
fprintf(fp, "$date %s\n $end\n", ctime(&now));
write_trace_timescale(fp);
 
fprintf(fp, " $scope module WBSCOPE $end\n");
// Print out all of the various values
fprintf(fp, " $var wire %2d \'C clk $end\n", 1);
fprintf(fp, " $var wire %2d \'R _raw_data [%d:0] $end\n",
(m_compressed)?31:32,
(m_compressed)?30:31);
 
for(unsigned i=0; i<m_traces.size(); i++) {
TRACEINFO *info = m_traces[i];
fprintf(fp, " $var wire %2d %s %s",
info->m_nbits, info->m_key, info->m_name);
if ((info->m_nbits > 0)&&(NULL == strchr(info->m_name, '[')))
fprintf(fp, "[%d:0] $end\n", info->m_nbits-1);
else
fprintf(fp, " $end\n");
}
 
fprintf(fp, " $upscope $end\n");
fprintf(fp, "$enddefinitions $end\n");
}
 
void SCOPE::write_binary_trace(FILE *fp, const int nbits, unsigned val,
const char *str) {
if (nbits <= 1) {
fprintf(fp, "%d%s\n", val&1, str);
return;
}
if ((unsigned)nbits < sizeof(val)*8)
val &= ~(-1<<nbits);
fputs("b", fp);
for(int i=0; i<nbits; i++)
fprintf(fp, "%d", (val>>(nbits-1-i))&1);
fprintf(fp, " %s\n", str);
}
 
void SCOPE::write_binary_trace(FILE *fp, TRACEINFO *info, unsigned value) {
write_binary_trace(fp, info->m_nbits, (value>>info->m_nshift),
info->m_key);
}
 
void SCOPE::register_trace(const char *name,
unsigned nbits, unsigned shift) {
TRACEINFO *info = new TRACEINFO;
int nkey = m_traces.size();
 
info->m_name = name;
info->m_nbits = nbits;
info->m_nshift = shift;
 
info->m_key[0] = 'v';
if (nkey < 26)
info->m_key[1] = 'a'+nkey;
else if (nkey < 26+26)
info->m_key[1] = 'A'+nkey-26;
else // if (nkey < 26+26+10) // Should never happen
info->m_key[1] = '0'+nkey-26-26;
info->m_key[2] = '\0';
info->m_key[3] = '\0';
 
m_traces.push_back(info);
}
 
void SCOPE::define_traces(void) {}
 
void SCOPE::writevcd(const char *trace_file_name) {
FILE *fp = fopen(trace_file_name, "w");
 
if (fp == NULL) {
fprintf(stderr, "ERR: Cannot open %s for writing!\n", trace_file_name);
fprintf(stderr, "ERR: Trace file not written\n");
return;
}
 
if (!m_data)
rawread();
 
write_trace_header(fp);
 
for(int i=0; i<(int)m_scoplen; i++) {
// Positive edge of the clock (everything is assumed to
// be on the positive edge)
fprintf(fp, "#%d\n", i * 10);
fprintf(fp, "1\'C\n");
write_binary_trace(fp, (m_compressed)?31:32, m_data[i], "\'R");
 
for(unsigned k=0; k<m_traces.size(); k++) {
TRACEINFO *info = m_traces[k];
write_binary_trace(fp, info, m_data[i]);
}
 
// Clock goes to zero
fprintf(fp, "#%d\n", i * 10 + 5);
fprintf(fp, "0\'C\n");
}
}
 
/s6soc/trunk/sw/host/scopecls.h
0,0 → 1,88
////////////////////////////////////////////////////////////////////////////////
//
// Filename: scopecls.h
//
// Project: WBScope, a wishbone hosted scope
//
// Purpose: After rebuilding the same code over and over again for every
// "scope" I tried to interact with, I thought it would be simpler
// to try to make a more generic interface, that other things could plug
// into. This is that more generic interface.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#ifndef SCOPECLS_H
#define SCOPECLS_H
 
#include <vector>
#include "devbus.h"
 
class TRACEINFO {
public:
const char *m_name;
char m_key[4];
unsigned m_nbits, m_nshift;
};
 
class SCOPE {
DEVBUS *m_fpga;
DEVBUS::BUSW m_addr;
bool m_compressed, m_vector_read;
unsigned m_scoplen;
unsigned *m_data;
std::vector<TRACEINFO *> m_traces;
 
public:
SCOPE(DEVBUS *fpga, unsigned addr,
bool compressed=false, bool vecread=true)
: m_fpga(fpga), m_addr(addr),
m_compressed(compressed), m_vector_read(vecread),
m_scoplen(0), m_data(NULL) {}
~SCOPE(void) { if (m_data) delete[] m_data; }
 
bool ready();
void decode_control(void);
int scoplen(void);
virtual void rawread(void);
void print(void);
virtual void write_trace_timescale(FILE *fp);
virtual void write_trace_header(FILE *fp);
void write_binary_trace(FILE *fp, const int nbits,
unsigned val, const char *str);
void write_binary_trace(FILE *fp, TRACEINFO *info,
unsigned value);
void writevcd(const char *trace_file_name);
void register_trace(const char *varname,
unsigned nbits, unsigned shift);
virtual void decode(DEVBUS::BUSW v) const = 0;
virtual void define_traces(void);
};
 
#endif // SCOPECLS_H
/s6soc/trunk/sw/host/xpflashscop.cpp
0,0 → 1,163
////////////////////////////////////////////////////////////////////////////////
//
// Filename: xpflashscop.cpp
//
// Project: CMod S6 System on a Chip, ZipCPU demonstration project
//
// Purpose: To test the QSPI Xpress flash interface, to see what it is doing
// on the chip, and to create a VCD file matching the wires
// determined/seen from the chip.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
//
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <strings.h>
#include <ctype.h>
#include <string.h>
#include <signal.h>
#include <assert.h>
 
#include "devbus.h"
 
#ifdef SIMPLE_DEPPBUS
# include "deppbus.h"
#else
# include "llcomms.h"
# include "deppi.h"
# include "ttybus.h"
 
#endif
 
// #include "port.h"
#include "regdefs.h"
#include "scopecls.h"
 
#ifdef SIMPLE_DEPPBUS
# define FPGAOPEN(SN) new DEPPBUS(SN);
#else
# define FPGAOPEN(SN) new FPGA(new DEPPI(SN))
#endif
 
FPGA *m_fpga;
void closeup(int v) {
m_fpga->kill();
exit(0);
}
 
class XPFLASHSCOPE : public SCOPE {
public:
XPFLASHSCOPE(DEVBUS *fpga) : SCOPE(fpga, R_SCOPE, false, true) {
define_traces();
}
 
// Inside our design, we have recorded 32-bits of information describing
// what's going on. Here, we describe the names and widths of the
// components of those 32-bits. These are used to create a VCD file
// that can be loaded into GTKWave if necessary to see what's going on.
virtual void define_traces(void) {
register_trace("wb_cyc", 1, 31);
register_trace("wb_stb", 1, 30);
register_trace("flash_sel", 1, 29);
register_trace("flctl_sel", 1, 28);
register_trace("flash_ack", 1, 27);
register_trace("flash_stall", 1, 26);
register_trace("qspi_cs_n", 1, 25); // blank/unused bit next
register_trace("qspi_sck", 2, 23);
register_trace("qspi_mod", 2, 21);
register_trace("o_qspi_dat", 4, 16);
register_trace("i_qspi_dat", 4, 12);
register_trace("flash_data", 12, 0);
}
 
// In case you aren't interested in creating a VCD file, we create an
// output decoder, allowing you to "see" (textually) the output. This
// is the default, although it may be ignored.
virtual void decode(DEVBUS::BUSW v) const {
printf("%3s%3s %3s%3s %3s%5s",
((v>>31)&1)?"CYC":"",
((v>>30)&1)?"STB":"",
((v>>29)&1)?"SEL":"",
((v>>28)&1)?"CTL":"",
((v>>27)&1)?"ACK":"",
((v>>26)&1)?"STALL":"");
printf(" %2s[%d%d,%d] %x->%x ",
((v>>25)&1)?"":"CS",
((v>>24)&1), ((v>>23)&1),
((v>>21)&3), // Mode
((v>>16)&0xf),
((v>>12)&0xf));
 
printf("%03x", (v&0x0fff));
}
};
 
int main(int argc, char **argv) {
char szSel[64];
 
// First step: connect to our FPGA.
strcpy(szSel, S6SN);
m_fpga = FPGAOPEN(szSel);
 
// Second step: create a piece of software to read the scope off of the
// FPGA device, and to decode it later.
XPFLASHSCOPE *xpscope = new XPFLASHSCOPE(m_fpga);
 
// Check if the scope is "ready". It will be "ready" when the scope
// has been both primed, triggered, and stopped. If the scope hasn't
// triggered, or hasn't stopped recording, you'll need to come back
// later.
if (xpscope->ready()) {
// The scope is ready. Hence, it has a buffer filled with
// the data we are looking for.
 
// Read the data off of the scope, and print it to the screen
xpscope->print();
 
// Should you wish to, you may also create a .VCD file with the
// scopes outputs within it.
xpscope->writevcd("xpscope.vcd");
} else {
//
// If the scope wasn't ready (yet) to be read, lets output
// the state of the scope, so that we can tell what happened
// or more specifically, what hasn't happened. (For example,
// if the trigger hasn't gone off, then we need to wait longer
// for it to go off.
//
xpscope->decode_control();
}
 
delete m_fpga;
}
 
/s6soc/trunk/sw/host/zipelf.cpp
119,17 → 119,17
}
 
if (dbg) {
printf(" %-20s 0x%jx\n", "e_type", (uintmax_t)ehdr.e_type);
printf(" %-20s 0x%jx\n", "e_machine", (uintmax_t)ehdr.e_machine);
printf(" %-20s 0x%jx\n", "e_version", (uintmax_t)ehdr.e_version);
printf(" %-20s 0x%jx\n", "e_entry", (uintmax_t)ehdr.e_entry);
printf(" %-20s 0x%jx\n", "e_phoff", (uintmax_t)ehdr.e_phoff);
printf(" %-20s 0x%jx\n", "e_shoff", (uintmax_t)ehdr.e_shoff);
printf(" %-20s 0x%jx\n", "e_flags", (uintmax_t)ehdr.e_flags);
printf(" %-20s 0x%jx\n", "e_ehsize", (uintmax_t)ehdr.e_ehsize);
printf(" %-20s 0x%jx\n", "e_phentsize", (uintmax_t)ehdr.e_phentsize);
printf(" %-20s 0x%jx\n", "e_shentsize", (uintmax_t)ehdr.e_shentsize);
printf("\n");
fprintf(stderr," %-20s 0x%jx\n","e_type", (uintmax_t)ehdr.e_type);
fprintf(stderr," %-20s 0x%jx\n","e_machine", (uintmax_t)ehdr.e_machine);
fprintf(stderr," %-20s 0x%jx\n","e_version", (uintmax_t)ehdr.e_version);
fprintf(stderr," %-20s 0x%jx\n","e_entry",(uintmax_t)ehdr.e_entry);
fprintf(stderr," %-20s 0x%jx\n","e_phoff",(uintmax_t)ehdr.e_phoff);
fprintf(stderr," %-20s 0x%jx\n","e_shoff",(uintmax_t)ehdr.e_shoff);
fprintf(stderr," %-20s 0x%jx\n","e_flags",(uintmax_t)ehdr.e_flags);
fprintf(stderr," %-20s 0x%jx\n","e_ehsize",(uintmax_t)ehdr.e_ehsize);
fprintf(stderr," %-20s 0x%jx\n","e_phentsize", (uintmax_t)ehdr.e_phentsize);
fprintf(stderr," %-20s 0x%jx\n","e_shentsize", (uintmax_t)ehdr.e_shentsize);
fprintf(stderr,"\n");
}
 
 
161,22 → 161,22
}
 
if (dbg) {
printf(" %-20s 0x%x\n", "p_type", phdr.p_type);
printf(" %-20s 0x%jx\n", "p_offset", phdr.p_offset);
printf(" %-20s 0x%jx\n", "p_vaddr", phdr.p_vaddr);
printf(" %-20s 0x%jx\n", "p_paddr", phdr.p_paddr);
printf(" %-20s 0x%jx\n", "p_filesz", phdr.p_filesz);
printf(" %-20s 0x%jx\n", "p_memsz", phdr.p_memsz);
printf(" %-20s 0x%x [", "p_flags", phdr.p_flags);
fprintf(stderr, " %-20s 0x%x\n", "p_type", phdr.p_type);
fprintf(stderr, " %-20s 0x%jx\n", "p_offset", phdr.p_offset);
fprintf(stderr, " %-20s 0x%jx\n", "p_vaddr", phdr.p_vaddr);
fprintf(stderr, " %-20s 0x%jx\n", "p_paddr", phdr.p_paddr);
fprintf(stderr, " %-20s 0x%jx\n", "p_filesz", phdr.p_filesz);
fprintf(stderr, " %-20s 0x%jx\n", "p_memsz", phdr.p_memsz);
fprintf(stderr, " %-20s 0x%x [", "p_flags", phdr.p_flags);
 
if (phdr.p_flags & PF_X) printf(" Execute");
if (phdr.p_flags & PF_R) printf(" Read");
if (phdr.p_flags & PF_W) printf(" Write");
printf("]\n");
printf(" %-20s 0x%jx\n", "p_align", phdr.p_align);
if (phdr.p_flags & PF_X) fprintf(stderr, " Execute");
if (phdr.p_flags & PF_R) fprintf(stderr, " Read");
if (phdr.p_flags & PF_W) fprintf(stderr, " Write");
fprintf(stderr, "]\n");
fprintf(stderr, " %-20s 0x%jx\n", "p_align", phdr.p_align);
}
 
total_octets += phdr.p_memsz;
total_octets += phdr.p_filesz;
}
 
char *d = (char *)malloc(total_octets + sizeof(ELFSECTION)+sizeof(ELFSECTION *));
187,6 → 187,7
current_section = 0;
 
for(i=0; i<(int)n; i++) {
if (dbg) fprintf(stderr, "Working with &d[%d]\n", current_offset);
r[i] = (ELFSECTION *)(&d[current_offset]);
 
if (gelf_getphdr(e, i, &phdr) != &phdr) {
195,19 → 196,19
}
 
if (dbg) {
printf(" %-20s 0x%jx\n", "p_offset", phdr.p_offset);
printf(" %-20s 0x%jx\n", "p_vaddr", phdr.p_vaddr);
printf(" %-20s 0x%jx\n", "p_paddr", phdr.p_paddr);
printf(" %-20s 0x%jx\n", "p_filesz", phdr.p_filesz);
printf(" %-20s 0x%jx\n", "p_memsz", phdr.p_memsz);
printf(" %-20s 0x%x [", "p_flags", phdr.p_flags);
fprintf(stderr, " %-20s 0x%jx\n", "p_offset", phdr.p_offset);
fprintf(stderr, " %-20s 0x%jx\n", "p_vaddr", phdr.p_vaddr);
fprintf(stderr, " %-20s 0x%jx\n", "p_paddr", phdr.p_paddr);
fprintf(stderr, " %-20s 0x%jx\n", "p_filesz", phdr.p_filesz);
fprintf(stderr, " %-20s 0x%jx\n", "p_memsz", phdr.p_memsz);
fprintf(stderr, " %-20s 0x%x [", "p_flags", phdr.p_flags);
 
if (phdr.p_flags & PF_X) printf(" Execute");
if (phdr.p_flags & PF_R) printf(" Read");
if (phdr.p_flags & PF_W) printf(" Write");
printf("]\n");
if (phdr.p_flags & PF_X) fprintf(stderr, " Execute");
if (phdr.p_flags & PF_R) fprintf(stderr, " Read");
if (phdr.p_flags & PF_W) fprintf(stderr, " Write");
fprintf(stderr, "]\n");
 
printf(" %-20s 0x%jx\n", "p_align", phdr.p_align);
fprintf(stderr, " %-20s 0x%jx\n", "p_align", phdr.p_align);
}
 
current_section++;
215,7 → 216,7
r[i]->m_start = phdr.p_paddr;
r[i]->m_len = phdr.p_filesz;
 
current_offset += phdr.p_memsz + sizeof(ELFSECTION);
current_offset += phdr.p_filesz + sizeof(ELFSECTION);
 
// Now, let's read in our section ...
if (lseek(fd, phdr.p_offset, SEEK_SET) < 0) {
/s6soc/trunk/sw/host/zipload.cpp
79,9 → 79,15
//
0xaa, 0x99, 0x55, 0x66 };
unsigned char buf[SEARCHLN];
size_t nr;
 
rewind(fp);
fread(buf, sizeof(char), SEARCHLN, fp);
nr = fread(buf, sizeof(char), SEARCHLN, fp);
if (nr != SEARCHLN) {
fprintf(stderr, "Cannot read the Xilinx bitfile header\n");
perror("O/S Err:");
exit(EXIT_FAILURE);
}
for(int start=0; start+MATCHLN<SEARCHLN; start++) {
int mloc;
 
91,8 → 97,11
if (buf[start+mloc] != matchstr[mloc])
break;
if (mloc < 0) {
fseek(fp, start, SEEK_SET);
return;
if (fseek(fp, (long)start, SEEK_SET) != 0) {
fprintf(stderr, "Cannot seek to the end of the Xilinx header\n");
perror("O/S Err:");
exit(EXIT_FAILURE);
} return;
}
}
 
104,7 → 113,7
int main(int argc, char **argv) {
int skp=0, argn;
bool debug_only = false, verbose = false;
bool ignore_missing_memory = false;
bool ignore_missing_memory = true;
unsigned entry = 0;
FLASHDRVR *flash = NULL;
const char *bitfile = NULL, *altbitfile = NULL, *execfile = NULL;
146,7 → 155,11
 
 
for(argn=0; argn<argc; argn++) {
if (iself(argv[argn])) {
if (access(argv[argn], R_OK)!=0) {
printf("ERR: Cannot open %s\n", argv[argn]);
usage();
exit(EXIT_FAILURE);
} else if (iself(argv[argn])) {
if (execfile) {
printf("Too many executable files given, %s and %s\n", execfile, argv[argn]);
usage();
186,6 → 199,8
if ((bitfile)&&(access(bitfile,R_OK)!=0)) {
// If there's no code file, or the code file cannot be opened
fprintf(stderr, "Cannot open bitfile, %s\n", bitfile);
if (iself(bitfile))
fprintf(stderr, "Is %s an ELF executable??\n", bitfile);
exit(EXIT_FAILURE);
}
 
198,7 → 213,7
fprintf(stderr, "Cannot open executable, %s\n\n", execfile);
usage();
exit(EXIT_FAILURE);
} else if (!iself(execfile)) {
} else if ((execfile)&&(!iself(execfile))) {
printf("%s is not an executable file\n\n", execfile);
usage();
exit(EXIT_FAILURE);
235,7 → 250,7
if (bitfile) {
 
fp = fopen(bitfile, "r");
if (strcmp(&argv[argn][strlen(argv[argn])-4],".bit")==0)
if (strcmp(&bitfile[strlen(bitfile)-4],".bit")==0)
skip_bitfile_header(fp);
bitsz = fread(&fbuf[CONFIG_ADDRESS-SPIFLASH],
sizeof(fbuf[0]),
298,10 → 313,14
<= SPIFLASH+FLASHLEN))
valid = true;
if (!valid) {
fprintf(stderr, "No such memory on board: 0x%08x - %08x\n",
secp->m_start, secp->m_start+secp->m_len);
if (!ignore_missing_memory)
if (ignore_missing_memory)
fprintf(stderr, "WARNING: No such memory on board: 0x%08x - %08x\n",
secp->m_start, secp->m_start+secp->m_len);
else {
fprintf(stderr, "ERROR: No such memory on board: 0x%08x - %08x\n",
secp->m_start, secp->m_start+secp->m_len);
exit(EXIT_FAILURE);
}
}
}
 
351,6 → 370,7
exit(-2);
}
 
if (flash) delete flash;
if (m_fpga) delete m_fpga;
 
return EXIT_SUCCESS;
/s6soc/trunk/sw/zipos/Makefile
50,7 → 50,8
HEADERS := $(wildcard *.h) $(subst .c,.h,$(DEVSRCS))
# CFLAGS := -O3 -fdump-tree-all -Wall -Wextra -nostdlib -fno-builtin
# CFLAGS := -O3 -fdump-rtl-all -DZIPOS -Wall -Wextra -nostdlib -fno-builtin
CFLAGS := -I. -I../dev -Os -DZIPOS -Wall -Wextra -nostdlib -fno-builtin -Wa,-nocis
INCS := -I. -I../dev
CFLAGS := $(INCS) -Os -DZIPOS -Wall -Wextra -nostdlib -fno-builtin -Wa,-nocis
LDFLAGS := -T cmodram.ld -Wl,-Map,$(OBJDIR)/doorbell.map -nostdlib
 
all: doorbell
94,7 → 95,7
 
define build-depends
@echo "Building dependency file(s)"
@$(CC) $(CPPFLAGS) -MM $(SOURCES) $(DEVSRCS) > $(OBJDIR)/xdepends.txt
@$(CC) $(INCS) -MM $(SOURCES) $(DEVSRCS) > $(OBJDIR)/xdepends.txt
@sed -e 's/^.*.o: /$(OBJDIR)\/&/' < $(OBJDIR)/xdepends.txt > $(OBJDIR)/depends.txt
@rm $(OBJDIR)/xdepends.txt
endef
/s6soc/trunk/sw/zipos/board.h
109,17 → 109,29
#define IOADDR 0x000400
#define SCOPEADDR 0x000800
// #define FCTLADDR 0x000c00 // Flash control, depends upon write capability
#define RAMADDR 0x004000
#define RAMSZ (RAMADDR)
#define FLASHADDR 0x1000000
#define BKRAM (void *)0x004000
#define FLASH (void *)0x1000000
#define SDRAM (void *)0
#define MEMLEN 0x04000
#define FLASHLEN 0x1000000
#define RESET_ADDR 0x1200000
#define FLASHSZ (FLASHADDR)
 
#define CLOCKFREQHZ 80000000
#define CLOCKFREQ_HZ CLOCKFREQHZ
 
static volatile IOSPACE *const _sys = (IOSPACE *)IOADDR;
#define _ZIP_HAS_WBUARTRX
#define _uartrx _sys->io_uart
#define _ZIP_HAS_LONELY_UART
#define LONELY_UART
#define _uart _sys->io_uart
#define _ZIP_HAS_WATCHDOG
#define _watchdog _sys->io_watchdog
 
static volatile WBSCOPE *const _scope = (WBSCOPE *)SCOPEADDR;
 
#define valid_ram_region(PTR,LN) (((int)(PTR)>=RAMADDR)&&((int)(PTR+LN)<RAMADDR+RAMSZ))
#define valid_flash_region(PTR,LN) (((int)(PTR)>=FLASHADDR)&&((int)(PTR+LN)<FLASHADDR+FLASHSZ))
#define valid_ram_region(PTR,LN) ((((char *)PTR)>=(char *)BKRAM)&&((((char *)PTR)+LN)<(char *)BKRAM+MEMLEN))
#define valid_flash_region(PTR,LN) ((((char *)PTR)>=(char *)FLASH)&&((((char *)PTR)+LN)<(char *)FLASH+FLASHLEN))
#define valid_mem_region(PTR,LN) ((valid_ram_region(PTR,LN))||(valid_flash_region(PTR,LN)))
 
#endif
/s6soc/trunk/sw/zipos/bootloader.h
2,7 → 2,7
//
// Filename: bootloader.h
//
// Project: Zip CPU -- a small, lightweight, RISC CPU soft core
// Project: CMod S6 System on a Chip, ZipCPU demonstration project
//
// Purpose:
//
12,7 → 12,7
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
// Copyright (C) 2015-2017, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
24,6 → 24,11
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License: GPL, v3, as defined and found on www.gnu.org,
// http://www.gnu.org/licenses/gpl.html
//
/s6soc/trunk/sw/zipos/cmod.ld
47,15 → 47,17
 
SECTIONS
{
.rocode 0x1200000 : {
.rocode 0x1200000 : ALIGN(4) {
_boot_address = .;
*(.start) *(.boot)
*(.start) *(.boot*)
*(.text*)
*(.rodata*)
*(.strings*)
__rocode_alignment = (. + 3) & ~ 3;
. = __rocode_alignment;
} > flash
_kernel_image_start = . ;
.data : {
.data : ALIGN_WITH_INPUT {
*(.kernel*)
*(.fixdata*)
*(.data*)
63,7 → 65,7
_kernel_image_end = . ;
}> blkram AT> flash
_blkram_image_end = . ;
.bss : {
.bss : ALIGN_WITH_INPUT {
*(.bss*)
_bss_image_end = . ;
} > blkram
/s6soc/trunk/sw/zipos/kernel.c
48,6 → 48,7
#include "ktraps.h"
#include "errno.h"
#include "swint.h"
#include "txfns.h"
 
extern void kpanic(void);
extern void raw_put_uart(int val);
74,6 → 75,8
 
extern void txstr(const char *);
 
#define SET_WATCHDOG _watchdog = (CONTEXT_LENGTH*2)
 
void kernel_entry(void) {
int nheartbeats= 0, tickcount = 0, milliseconds=0, ticks = 0;
int audiostate = 0, buttonstate = 0;
97,12 → 100,13
// Then selectively turn some of them back on
_sys->io_pic = INT_ENABLE | enableset | 0x07fff;
 
txstr("HEAP: "); txhex(heap);
txstr("HEAP: "); txhex((int)heap);
 
do {
int need_resched = 0, context_has_been_saved, pic;
nheartbeats++;
 
SET_WATCHDOG;
zip_rtu();
 
last_context = current->context;

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