OpenCores
URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /s6soc/trunk
    from Rev 5 to Rev 6
    ↔ Reverse comparison
  •

Rev 5 → Rev 6

/Makefile
1,3 → 1,42
##############################################################################//
##
## Filename: Makefile
##
## Project: CMod S6 System on a Chip, ZipCPU demonstration project
##
## Purpose: An initial attempt at a master project makefile. Does not
## yet support subdirectory recursion, so it currently does
## little more than make a tar file or a date stamp.
##
## Creator: Dan Gisselquist, Ph.D.
## Gisselquist Technology, LLC
##
##############################################################################//
##
## Copyright (C) 2015-2016, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with this program. (It's in the $(ROOT)/doc directory, run make with no
## target there if the PDF file isn't present.) If not, see
## <http://www.gnu.org/licenses/> for a copy.
##
## License: GPL, v3, as defined and found on www.gnu.org,
## http://www.gnu.org/licenses/gpl.html
##
##
##############################################################################//
##
##
.PHONY: all
all: datestamp archive
# BENCH := `find bench -name Makefile` `find bench -name "*.cpp"` `find bench -name "*.h"`
14,11 → 53,10
CONSTRAINTS := cmod.ucf
YYMMDD := `date +%Y%m%d`
 
datestamp: $(YYMMDD)-build.v
$(YYMMDD)-build.v:
-rm -rf 2*-build.v
perl mkdatev.pl > $(YYMMDD)-build.v
cd rtl; ln -fs ../$(YYMMDD)-build.v builddate.v
.PHONY: datestamp
datestamp:
@bash -c 'if [ ! -e $(YYMMDD)-build.v ]; then rm 20??????-build.v; perl mkdatev.pl > $(YYMMDD)-build.v; rm -f rtl/builddate.v; fi'
@bash -c 'if [ ! -e rtl/builddate.v ]; then cd rtl; cp ../$(YYMMDD)-build.v builddate.v; fi'
 
.PHONY: archive
archive:
28,4 → 66,11
# bit:
# cd xilinx ; make xula.bit
 
axload:
djtgcfg enum
djtgcfg init -d CmodS6
djtgcfg erase -d CmodS6 -i 0
djtgcfg prog -d CmodS6 -i 0 -f xilinx/alttop.bit
 
xload:
djtgcfg prog -d CmodS6 -i 0 -f xilinx/toplevel.bit
/cmod.ucf
1,3 → 1,47
################################################################################
##
## Filename: cmod.ucf
##
## Project: CMod S6 System on a Chip, ZipCPU demonstration project
##
## Purpose: This file is really from Digilent, and so the copyright
## statement below applies only to those changes that have been
## made to modify it to support the CMod S6 SoC project. That said ...
##
## This file specifies the pin connections for all of the peripherals
## connected to the Cmod S6 SoC.
##
##
## Creator: Dan Gisselquist, Ph.D.
## Gisselquist Technology, LLC
##
################################################################################
##
## Copyright (C) 2015-2016, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with this program. (It's in the $(ROOT)/doc directory, run make with no
## target there if the PDF file isn't present.) If not, see
## <http://www.gnu.org/licenses/> for a copy.
##
## License: GPL, v3, as defined and found on www.gnu.org,
## http://www.gnu.org/licenses/gpl.html
##
##
################################################################################
##
##
 
#FPGA_GCLK
NET "i_clk_8mhz" LOC = "N8" | IOSTANDARD = LVCMOS33;
NET "i_clk_8mhz" TNM_NET = "i_clk_8mhz";
40,19 → 84,26
 
#IO PORTs
 
# #A
NET "i_uart" LOC = "P5" | IOSTANDARD = LVCMOS33;
NET "o_uart" LOC = "N5" | IOSTANDARD = LVCMOS33;
NET "o_pwm" LOC = "P12" | IOSTANDARD = LVCMOS33;
NET "io_scl" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP; # io_scl
NET "io_sda" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP; # io_sda
NET "o_pwm_shutdown_n" LOC = "K1" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "o_pwm_gain" LOC = "K2" | IOSTANDARD = LVCMOS33 | PULLUP;
# UART: PIO26 (CTS), PIO27 (TXD), PIO28(RXD), PIO29(RTS)
NET "i_uart" LOC = "A2" | IOSTANDARD = LVCMOS33;
NET "o_uart" LOC = "B3" | IOSTANDARD = LVCMOS33;
NET "i_uart_cts" LOC = "A3" | IOSTANDARD = LVCMOS33;
NET "o_uart_rts" LOC = "B1" | IOSTANDARD = LVCMOS33;
# PWM-Audio: Shutdown (PIO46), Gain (PIO47), PWM-Audio (PIO48)
NET "o_pwm" LOC = "M2" | IOSTANDARD = LVCMOS33;
NET "o_pwm_shutdown_n" LOC = "L2" | IOSTANDARD = LVCMOS33 | PULLUP;
NET "o_pwm_gain" LOC = "M1" | IOSTANDARD = LVCMOS33 | PULLUP;
# I2C
NET "io_scl" LOC = "K2" | IOSTANDARD = LVCMOS33 | PULLUP; # io_scl, PIO44
NET "io_sda" LOC = "L1" | IOSTANDARD = LVCMOS33 | PULLUP; # io_sda, PIO45
 
#
NET "o_gpio<2>" LOC = "N12" | IOSTANDARD = LVCMOS33; # o_mosi
NET "o_gpio<3>" LOC = "L14" | IOSTANDARD = LVCMOS33; # o_sck
NET "o_gpio<4>" LOC = "L13" | IOSTANDARD = LVCMOS33; # o_ss
# o_gpio<0> and o_gpio<1> have been borrowed for io_scl and io_sda, hence we
# start our count here at 2
#
NET "o_gpio<2>" LOC = "N12" | IOSTANDARD = LVCMOS33; # display o_mosi
NET "o_gpio<3>" LOC = "L14" | IOSTANDARD = LVCMOS33; # display o_sck
NET "o_gpio<4>" LOC = "L13" | IOSTANDARD = LVCMOS33; # display o_ss
NET "o_gpio<5>" LOC = "K14" | IOSTANDARD = LVCMOS33;
NET "o_gpio<6>" LOC = "K13" | IOSTANDARD = LVCMOS33;
NET "o_gpio<7>" LOC = "J14" | IOSTANDARD = LVCMOS33;
65,10 → 116,14
NET "o_gpio<14>" LOC = "G13" | IOSTANDARD = LVCMOS33;
NET "o_gpio<15>" LOC = "E14" | IOSTANDARD = LVCMOS33;
 
#
# As with the o_gpio wires, i_gpio<0> and i_gpio<1> have been borrowed for
# io_scl and io_sda, hence we start our count here at 2
#
# NET "i_gpio<0>" LOC = "A3" | IOSTANDARD = LVCMOS33;
# NET "i_gpio<1>" LOC = "B3" | IOSTANDARD = LVCMOS33;
NET "i_gpio<2>" LOC = "A2" | IOSTANDARD = LVCMOS33;
NET "i_gpio<3>" LOC = "B1" | IOSTANDARD = LVCMOS33;
NET "i_gpio<2>" LOC = "P5" | IOSTANDARD = LVCMOS33; # display miso
NET "i_gpio<3>" LOC = "D14" | IOSTANDARD = LVCMOS33;
NET "i_gpio<4>" LOC = "C1" | IOSTANDARD = LVCMOS33;
NET "i_gpio<5>" LOC = "D1" | IOSTANDARD = LVCMOS33;
NET "i_gpio<6>" LOC = "D2" | IOSTANDARD = LVCMOS33;
82,59 → 137,59
NET "i_gpio<14>" LOC = "G2" | IOSTANDARD = LVCMOS33;
NET "i_gpio<15>" LOC = "J1" | IOSTANDARD = LVCMOS33;
 
# NET "PORTA<0>" LOC = "P5" | IOSTANDARD = LVCMOS33 | PULLUP; # i_uart
# NET "PORTA<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP; # o_uart
# NET "PORTA<2>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP; # io_scl
# NET "PORTA<3>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP; # io_sda
# NET "PORTA<4>" LOC = "P12" | IOSTANDARD = LVCMOS33 | PULLUP; # o_pwm
# NET "PORTA<5>" LOC = "N12" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTA<6>" LOC = "L14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTA<7>" LOC = "L13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTA<0>" LOC = "P5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO01, i_uart
# NET "PORTA<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO02, o_uart
# NET "PORTA<2>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO03, io_scl
# NET "PORTA<3>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO04, io_sda
# NET "PORTA<4>" LOC = "P12" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO05, o_pwm
# NET "PORTA<5>" LOC = "N12" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO06
# NET "PORTA<6>" LOC = "L14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO07
# NET "PORTA<7>" LOC = "L13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO08
#
# #B Input ports
# NET "PORTB<0>" LOC = "K14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<1>" LOC = "K13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<2>" LOC = "J14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<3>" LOC = "J13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<4>" LOC = "H14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<5>" LOC = "H13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<6>" LOC = "F14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<7>" LOC = "F13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTB<0>" LOC = "K14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO09
# NET "PORTB<1>" LOC = "K13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO10
# NET "PORTB<2>" LOC = "J14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO11
# NET "PORTB<3>" LOC = "J13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO12
# NET "PORTB<4>" LOC = "H14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO13
# NET "PORTB<5>" LOC = "H13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO14
# NET "PORTB<6>" LOC = "F14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO15
# NET "PORTB<7>" LOC = "F13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO16
#
# #C Input ports
# NET "PORTC<0>" LOC = "G14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<1>" LOC = "G13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<2>" LOC = "E14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<3>" LOC = "E13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<4>" LOC = "D14" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<5>" LOC = "D13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<6>" LOC = "C13" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTC<0>" LOC = "G14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO17
# NET "PORTC<1>" LOC = "G13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO18
# NET "PORTC<2>" LOC = "E14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO19
# NET "PORTC<3>" LOC = "E13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO20
# NET "PORTC<4>" LOC = "D14" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO21
# NET "PORTC<5>" LOC = "D13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO22
# NET "PORTC<6>" LOC = "C13" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO23
#
# #D Output ports
# NET "PORTD<0>" LOC = "A3" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<1>" LOC = "B3" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<2>" LOC = "A2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<3>" LOC = "B1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<4>" LOC = "C1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<5>" LOC = "D1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<6>" LOC = "D2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<7>" LOC = "E1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTD<0>" LOC = "A3" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO26
# NET "PORTD<1>" LOC = "B3" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTD<2>" LOC = "A2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTD<3>" LOC = "B1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTD<4>" LOC = "C1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO30
# NET "PORTD<5>" LOC = "D1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTD<6>" LOC = "D2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTD<7>" LOC = "E1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO33
#
# #E Output ports
# NET "PORTE<0>" LOC = "E2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<1>" LOC = "F1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<2>" LOC = "F2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<3>" LOC = "H1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<4>" LOC = "H2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<5>" LOC = "G1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<6>" LOC = "G2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<7>" LOC = "J1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTE<0>" LOC = "E2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO34
# NET "PORTE<1>" LOC = "F1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<2>" LOC = "F2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<3>" LOC = "H1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<4>" LOC = "H2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<5>" LOC = "G1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<6>" LOC = "G2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTE<7>" LOC = "J1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO41
#
# #F Unused ports
# NET "PORTF<0>" LOC = "J2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<1>" LOC = "K1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<2>" LOC = "K2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<3>" LOC = "L1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<4>" LOC = "L2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<5>" LOC = "M1" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<6>" LOC = "M2" | IOSTANDARD = LVCMOS33 | PULLUP;
# NET "PORTF<0>" LOC = "J2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO42
# NET "PORTF<1>" LOC = "K1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO
# NET "PORTF<2>" LOC = "K2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO44
# NET "PORTF<3>" LOC = "L1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO45
# NET "PORTF<4>" LOC = "L2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO46
# NET "PORTF<5>" LOC = "M1" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO47
# NET "PORTF<6>" LOC = "M2" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO48

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.