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URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

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  • This comparison shows the changes necessary to convert path
    /sdr_ctrl/trunk/verif/tb
    from Rev 68 to Rev 70
    Reverse comparison

Rev 68 → Rev 70

/tb_core.sv
167,7 → 167,7
.sdr_init_done (sdr_init_done ),
.cfg_req_depth (2'h3 ), //how many req. buffer should hold
.cfg_sdr_en (1'b1 ),
.cfg_sdr_mode_reg (12'h033 ),
.cfg_sdr_mode_reg (13'h033 ),
.cfg_sdr_tras_d (4'h4 ),
.cfg_sdr_trp_d (4'h2 ),
.cfg_sdr_trcd_d (4'h2 ),
187,7 → 187,7
assign Dq[31:24] = (sdr_den_n[3] == 1'b0) ? sdr_dout[31:24] : 8'hZZ;
mt48lc2m32b2 #(.data_bits(32)) u_sdram32 (
.Dq (Dq ) ,
.Addr (sdr_addr[11:0] ),
.Addr (sdr_addr[10:0] ),
.Ba (sdr_ba ),
.Clk (sdram_clk_d ),
.Cke (sdr_cke ),
/tb_top.sv
159,7 → 159,7
.sdr_init_done (sdr_init_done ),
.cfg_req_depth (2'h3 ), //how many req. buffer should hold
.cfg_sdr_en (1'b1 ),
.cfg_sdr_mode_reg (12'h033 ),
.cfg_sdr_mode_reg (13'h033 ),
.cfg_sdr_tras_d (4'h4 ),
.cfg_sdr_trp_d (4'h2 ),
.cfg_sdr_trcd_d (4'h2 ),
175,7 → 175,7
`ifdef SDR_32BIT
mt48lc2m32b2 #(.data_bits(32)) u_sdram32 (
.Dq (Dq ) ,
.Addr (sdr_addr[11:0] ),
.Addr (sdr_addr[10:0] ),
.Ba (sdr_ba ),
.Clk (sdram_clk_d ),
.Cke (sdr_cke ),

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