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URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

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  • This comparison shows the changes necessary to convert path
    /sdr_ctrl/trunk/rtl/core
    from Rev 23 to Rev 31
    Reverse comparison

Rev 23 → Rev 31

/sdrc_bs_convert.v
216,7 → 216,8
saved_rd_data <= 24'h0;
end
else begin
lcl_mc_req_wr_n <= app_req_wr_n;
if(app_req_ack)
lcl_mc_req_wr_n <= app_req_wr_n;
 
// During Write Phase
if(app_req_ack && (app_req_wr_n == 0)) begin
/sdrc_core.v
90,6 → 90,7
app_wr_en_n,
app_rd_data,
app_rd_valid,
app_last_rd,
app_wr_next_req,
sdr_init_done,
app_req_dma_last,
154,6 → 155,7
input [APP_BW-1:0] app_wr_en_n ; // Byte wise Write Enable
output [APP_DW-1:0] app_rd_data ; // Read Data
output app_rd_valid ; // Read Valid
output app_last_rd ; // Last Read Transfer of a given Burst
//------------------------------------------------
// Interface to SDRAMs
215,7 → 217,7
wire x2b_ack;
wire [3:0] x2b_pre_ok;
wire x2b_refresh, x2b_act_ok, x2b_rdok, x2b_wrok;
wire xfr_rdstart, xfr_rdlast;
wire xfr_rdstart, app_last_rd;
wire xfr_wrstart, xfr_wrlast;
wire [`SDR_REQ_ID_W-1:0]xfr_id;
wire [APP_DW-1:0] app_rd_data;
419,7 → 421,7
.x2a_rdstart (xfr_rdstart ),
.x2a_wrstart (xfr_wrstart ),
.x2a_id (xfr_id ),
.x2a_rdlast (xfr_rdlast ),
.x2a_rdlast (app_last_rd ),
.x2a_wrlast (xfr_wrlast ),
.app_wrdt (add_wr_data_int ),
.app_wren_n (app_wr_en_n_int ),

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