OpenCores
URL https://opencores.org/ocsvn/spacewire_light/spacewire_light/trunk

Subversion Repositories spacewire_light

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /spacewire_light/trunk/sim
    from Rev 6 to Rev 7
    Reverse comparison

Rev 6 → Rev 7

/spwamba_leon3/spwamba_tb.vhd
200,6 → 200,7
ahbi => ahbmi,
ahbo => ahbmo(1),
tick_in => spw_tick_in,
tick_out => open,
spw_di => spw_di,
spw_si => spw_si,
spw_do => spw_do,
/spwamba_leon3/Makefile
4,7 → 4,7
 
 
# Change this to your local GRLIB directory.
GRLIB = /data/leon3/grlib-gpl-1.0.22-b4095
GRLIB = /data/leon3/grlib-gpl-1.1.0-b4104
 
 
RTLDIR = ../../rtl/vhdl
22,6 → 22,8
$(RTLDIR)/spwxmit_fast.vhd \
$(RTLDIR)/spwrecvfront_generic.vhd \
$(RTLDIR)/spwrecvfront_fast.vhd \
$(RTLDIR)/syncdff.vhd \
$(RTLDIR)/spwram.vhd \
$(RTLDIR)/spwambapkg.vhd \
$(RTLDIR)/spwamba.vhd \
$(RTLDIR)/spwahbmst.vhd \
31,7 → 33,7
TECHLIBS = inferred
LIBSKIP = contrib cypress eth fmf gleichmann gsi hynix micron openchip opencores spansion spw
DIRSKIP = ata can ddr greth spacewire
FILESKIP = i2cmst.vhd i2cmst_gen.vhd
FILESKIP = i2cmst.vhd i2cmst_gen.vhd ahbtrace_mb.vhd
 
include $(GRLIB)/bin/Makefile
 
/ghdl/Makefile
26,11 → 26,12
$(RTLDIR)/spwxmit.vhd \
$(RTLDIR)/spwxmit_fast.vhd \
$(RTLDIR)/spwrecvfront_generic.vhd \
$(RTLDIR)/spwrecvfront_fast.vhd
$(RTLDIR)/spwrecvfront_fast.vhd \
$(RTLDIR)/syncdff.vhd \
$(RTLDIR)/spwram.vhd
 
SPWSTREAM_VHDL = $(SPWLINK_VHDL) \
$(RTLDIR)/spwstream.vhd \
$(RTLDIR)/spwram.vhd
$(RTLDIR)/spwstream.vhd
 
spwlink_tb: $(TBDIR)/spwlink_tb.vhd $(SPWLINK_VHDL)
$(GHDL) -c $^ -e spwlink_tb

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