URL
https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk
Subversion Repositories spi_master_slave
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- This comparison shows the changes necessary to convert path
/spi_master_slave/trunk/syn
- from Rev 13 to Rev 14
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Rev 13 → Rev 14
/spi_master.vhd
305,7 → 305,7
-- the spi clock generator and the input sampling clock. |
-- The clock generation block derive 2 continuous antiphase signals from the 2x spi base clock |
-- for the core clocking. |
-- The 2 clock phases are generated by sepparate and synchronous FFs, and should have only |
-- The 2 clock phases are generated by separate and synchronous FFs, and should have only |
-- differential interconnect delay skew. |
-- Clock enable signals are generated with the same phase as the 2 core clocks, and these clock |
-- enables are used to control clocking of all internal synchronous circuitry. |