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URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /versatile_library/trunk/rtl/verilog
    from Rev 54 to Rev 55
    Reverse comparison

Rev 54 → Rev 55

/versatile_library.v
4677,7 → 4677,7
endgenerate
 
always @ (posedge wb_clk or posedge wb_rst)
if (rst)
if (wb_rst)
wb_ack_o <= 1'b0;
else
wb_ack_o <= wb_stb_i & wb_cyc_i;
/versatile_library_actel.v
1976,7 → 1976,7
end
endgenerate
always @ (posedge wb_clk or posedge wb_rst)
if (rst)
if (wb_rst)
wb_ack_o <= 1'b0;
else
wb_ack_o <= wb_stb_i & wb_cyc_i;
/wb.v
507,7 → 507,7
endgenerate
 
always @ (posedge wb_clk or posedge wb_rst)
if (rst)
if (wb_rst)
wb_ack_o <= 1'b0;
else
wb_ack_o <= wb_stb_i & wb_cyc_i;
/versatile_library_altera.v
2081,7 → 2081,7
end
endgenerate
always @ (posedge wb_clk or posedge wb_rst)
if (rst)
if (wb_rst)
wb_ack_o <= 1'b0;
else
wb_ack_o <= wb_stb_i & wb_cyc_i;

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