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URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

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  • This comparison shows the changes necessary to convert path
    /versatile_library/trunk
    from Rev 128 to Rev 129
    Reverse comparison

Rev 128 → Rev 129

/rtl/verilog/versatile_library.v
6588,6 → 6588,10
`define ADR_WIDTH wb_adr_width
`define WB wb1
`include "wb_wires.v"
`undef DAT_WIDTH
`undef ADR_WIDTH
`define DAT_WIDTH avalon_dat_width
`define ADR_WIDTH avalon_adr_width
`define WB wb2
`include "wb_wires.v"
`undef DAT_WIDTH
/rtl/verilog/versatile_library_actel.v
3224,9 → 3224,9
wire wb1_stall_i;
wire [wb_dat_width-1:0] wb1_dat_i;
wire wb1_ack_i;
wire [wb_dat_width-1:0] wb2_dat_o;
wire [wb_adr_width-1:0] wb2_adr_o;
wire [wb_dat_width/8-1:0] wb2_sel_o;
wire [avalon_dat_width-1:0] wb2_dat_o;
wire [avalon_adr_width-1:0] wb2_adr_o;
wire [avalon_dat_width/8-1:0] wb2_sel_o;
wire [2:0] wb2_cti_o;
wire [1:0] wb2_bte_o;
wire wb2_we_o;
3233,7 → 3233,7
wire wb2_stb_o;
wire wb2_cyc_o;
wire wb2_stall_i;
wire [wb_dat_width-1:0] wb2_dat_i;
wire [avalon_dat_width-1:0] wb2_dat_i;
wire wb2_ack_i;
vl_wb_shadow_ram # ( .dat_width(wb_dat_width), .mode(wb_mode), .max_burst_width(wb_max_burst_width),
.shadow_mem_adr_width(shadow_ram_adr_width), .shadow_mem_size(shadow_ram_size), .shadow_mem_init(shadow_ram_init), .shadow_mem_file(shadow_ram_file),
/rtl/verilog/wb.v
1670,6 → 1670,10
`define ADR_WIDTH wb_adr_width
`define WB wb1
`include "wb_wires.v"
`undef DAT_WIDTH
`undef ADR_WIDTH
`define DAT_WIDTH avalon_dat_width
`define ADR_WIDTH avalon_adr_width
`define WB wb2
`include "wb_wires.v"
`undef DAT_WIDTH
/rtl/verilog/versatile_library_altera.v
3329,9 → 3329,9
wire wb1_stall_i;
wire [wb_dat_width-1:0] wb1_dat_i;
wire wb1_ack_i;
wire [wb_dat_width-1:0] wb2_dat_o;
wire [wb_adr_width-1:0] wb2_adr_o;
wire [wb_dat_width/8-1:0] wb2_sel_o;
wire [avalon_dat_width-1:0] wb2_dat_o;
wire [avalon_adr_width-1:0] wb2_adr_o;
wire [avalon_dat_width/8-1:0] wb2_sel_o;
wire [2:0] wb2_cti_o;
wire [1:0] wb2_bte_o;
wire wb2_we_o;
3338,7 → 3338,7
wire wb2_stb_o;
wire wb2_cyc_o;
wire wb2_stall_i;
wire [wb_dat_width-1:0] wb2_dat_i;
wire [avalon_dat_width-1:0] wb2_dat_i;
wire wb2_ack_i;
vl_wb_shadow_ram # ( .dat_width(wb_dat_width), .mode(wb_mode), .max_burst_width(wb_max_burst_width),
.shadow_mem_adr_width(shadow_ram_adr_width), .shadow_mem_size(shadow_ram_size), .shadow_mem_init(shadow_ram_init), .shadow_mem_file(shadow_ram_file),

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