URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
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- This comparison shows the changes necessary to convert path
/versatile_library/trunk
- from Rev 24 to Rev 23
- ↔ Reverse comparison
Rev 24 → Rev 23
/rtl/verilog/versatile_library.v
366,27 → 366,6
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endmodule |
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module vl_dff_ce_set ( d, ce, set, q, clk, rst); |
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parameter width = 1; |
parameter reset_value = 0; |
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input [width-1:0] d; |
input ce, set, clk, rst; |
output reg [width-1:0] q; |
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always @ (posedge clk or posedge rst) |
if (rst) |
q <= reset_value; |
else |
if (ce) |
if (set) |
q <= {width{1'b1}}; |
else |
q <= d; |
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endmodule |
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`ifdef ALTERA |
// megafunction wizard: %LPM_FF% |
// GENERATION: STANDARD |
/rtl/verilog/versatile_library_actel.v
268,22 → 268,6
else |
q <= d; |
endmodule |
module vl_dff_ce_set ( d, ce, set, q, clk, rst); |
parameter width = 1; |
parameter reset_value = 0; |
input [width-1:0] d; |
input ce, set, clk, rst; |
output reg [width-1:0] q; |
always @ (posedge clk or posedge rst) |
if (rst) |
q <= reset_value; |
else |
if (ce) |
if (set) |
q <= {width{1'b1}}; |
else |
q <= d; |
endmodule |
module vl_dff_sr ( aclr, aset, clock, data, q); |
input aclr; |
input aset; |
/rtl/verilog/versatile_library_altera.v
165,22 → 165,6
else |
q <= d; |
endmodule |
module vl_dff_ce_set ( d, ce, set, q, clk, rst); |
parameter width = 1; |
parameter reset_value = 0; |
input [width-1:0] d; |
input ce, set, clk, rst; |
output reg [width-1:0] q; |
always @ (posedge clk or posedge rst) |
if (rst) |
q <= reset_value; |
else |
if (ce) |
if (set) |
q <= {width{1'b1}}; |
else |
q <= d; |
endmodule |
// megafunction wizard: %LPM_FF% |
// GENERATION: STANDARD |
// VERSION: WM1.0 |
/rtl/verilog/registers.v
121,27 → 121,6
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endmodule |
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module vl_dff_ce_set ( d, ce, set, q, clk, rst); |
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parameter width = 1; |
parameter reset_value = 0; |
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input [width-1:0] d; |
input ce, set, clk, rst; |
output reg [width-1:0] q; |
|
always @ (posedge clk or posedge rst) |
if (rst) |
q <= reset_value; |
else |
if (ce) |
if (set) |
q <= {width{1'b1}}; |
else |
q <= d; |
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endmodule |
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`ifdef ALTERA |
// megafunction wizard: %LPM_FF% |
// GENERATION: STANDARD |