URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_library/trunk/sim/rtl_sim/run
- from Rev 91 to Rev 92
- ↔ Reverse comparison
Rev 91 → Rev 92
/wave_wb_b3_dpram.do
0,0 → 1,45
onerror {resume} |
quietly WaveActivateNextPane {} 0 |
add wave -noupdate -divider {A side} |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_a_dat_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_a_sel_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_a_adr_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_a_cti_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_a_bte_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_we_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_cyc_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_stb_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_a_dat_i |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_ack_i |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_clk |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_a_rst |
add wave -noupdate -divider {B side} |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_b_dat_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_b_sel_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_b_adr_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_b_cti_o |
add wave -noupdate -format Literal /vl_wb_b3_dpram_tb/wbm_b_bte_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_we_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_cyc_o |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_stb_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_dpram_tb/wbm_b_dat_i |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_ack_i |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_clk |
add wave -noupdate -format Logic /vl_wb_b3_dpram_tb/wbm_b_rst |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {131 ns} 0} |
configure wave -namecolwidth 150 |
configure wave -valuecolwidth 100 |
configure wave -justifyvalue left |
configure wave -signalnamewidth 0 |
configure wave -snapdistance 10 |
configure wave -datasetprefix 0 |
configure wave -rowmargin 4 |
configure wave -childrowmargin 2 |
configure wave -gridoffset 0 |
configure wave -gridperiod 1 |
configure wave -griddelta 40 |
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {0 ns} {1 us} |
/wave_wb_br_ram_be.do
0,0 → 1,42
onerror {resume} |
quietly WaveActivateNextPane {} 0 |
add wave -noupdate -divider Wishbone |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/wbm_a_dat_o |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/wbm_a_sel_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/wbm_a_adr_o |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/wbm_a_cti_o |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/wbm_a_bte_o |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_we_o |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_cyc_o |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_stb_o |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/wbm_a_dat_i |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_ack_i |
add wave -noupdate -divider Memory |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/dut/ram0/d |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/dut/ram0/adr |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/dut/ram0/be |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/dut/ram0/we |
add wave -noupdate -format Literal -radix hexadecimal /vl_wb_b3_ram_be_tb/dut/ram0/q |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/dut/adr_inc0/last_adr |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/dut/adr_inc0/last_cycle |
add wave -noupdate -divider {Clock and reset} |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_clk |
add wave -noupdate -format Logic /vl_wb_b3_ram_be_tb/wbm_a_rst |
add wave -noupdate -format Literal /vl_wb_b3_ram_be_tb/wbmi/i |
TreeUpdate [SetDefaultTree] |
WaveRestoreCursors {{Cursor 1} {654 ns} 0} {{Cursor 2} {1030 ns} 0} |
configure wave -namecolwidth 150 |
configure wave -valuecolwidth 100 |
configure wave -justifyvalue left |
configure wave -signalnamewidth 0 |
configure wave -snapdistance 10 |
configure wave -datasetprefix 0 |
configure wave -rowmargin 4 |
configure wave -childrowmargin 2 |
configure wave -gridoffset 0 |
configure wave -gridperiod 1 |
configure wave -griddelta 40 |
configure wave -timeline 0 |
configure wave -timelineunits ns |
update |
WaveRestoreZoom {817 ns} {1104 ns} |
/Makefile
6,3 → 6,9
vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/wbm.v |
vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/tb_wb_b3_ram_be.v |
vsim -do "run 10 us" -l log.txt -c work.vl_wb_b3_ram_be_tb |
|
tb_wb_b3_dpram: |
vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_DPRAM $(VERILOG_FILES) > wb_b3_dpram.v |
vlog -reportprogress 300 -work work ./wb_b3_dpram.v |
vlog -reportprogress 300 -work work ./../../../bench/wbm.v |
vlog -reportprogress 300 -work work ./../../../bench/tb_wb_b3_dpram.v |